1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 Texas Instruments Incorporated
5 $id: "http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Texas Instruments AM65x Display Subsystem
11 - Jyri Sarha <jsarha@ti.com>
12 - Tomi Valkeinen <tomi.valkeinen@ti.com>
15 The AM65x TI Keystone Display SubSystem with two output ports and
16 two video planes. The first video port supports OLDI and the second
17 supports DPI format. The fist plane is full video plane with all
18 features and the second is a "lite plane" without scaling support.
26 Addresses to each DSS memory region described in the SoC's TRM.
28 - description: common DSS register area
29 - description: VIDL1 light video plane
30 - description: VID video plane
31 - description: OVR1 overlay manager for vp1
32 - description: OVR2 overlay manager for vp2
33 - description: VP1 video port 1
34 - description: VP2 video port 2
48 - description: fck DSS functional clock
49 - description: vp1 Video Port 1 pixel clock
50 - description: vp2 Video Port 2 pixel clock
63 description: phandle to the associated power domain
68 Ports as described in Documentation/devicetree/bindings/graph.txt
79 The DSS OLDI output port node form video port 1
84 The DSS DPI output port node from video port 2
90 ti,am65x-oldi-io-ctrl:
92 - $ref: "/schemas/types.yaml#/definitions/phandle-array"
95 phandle to syscon device node mapping OLDI IO_CTRL registers.
96 The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
97 following OLDI_DAT1_IO_CTRL, OLDI_DAT2_IO_CTRL, OLDI_DAT3_IO_CTRL,
98 and OLDI_CLK_IO_CTRL registers. This property is needed for OLDI
101 max-memory-bandwidth:
102 $ref: /schemas/types.yaml#/definitions/uint32
104 Input memory (from main memory to dispc) bandwidth limit in
116 additionalProperties: false
120 #include <dt-bindings/interrupt-controller/arm-gic.h>
121 #include <dt-bindings/interrupt-controller/irq.h>
122 #include <dt-bindings/soc/ti,sci_pm_domain.h>
125 compatible = "ti,am65x-dss";
126 reg = <0x0 0x04a00000 0x0 0x1000>, /* common */
127 <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
128 <0x0 0x04a06000 0x0 0x1000>, /* vid */
129 <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
130 <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
131 <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
132 <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
133 reg-names = "common", "vidl1", "vid",
134 "ovr1", "ovr2", "vp1", "vp2";
135 ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
136 power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
137 clocks = <&k3_clks 67 1>,
140 clock-names = "fck", "vp1", "vp2";
141 interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
143 #address-cells = <1>;
147 oldi_out0: endpoint {
148 remote-endpoint = <&lcd_in0>;