Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml

   1 # SPDX-License-Identifier: GPL-2.0-only
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: ARM Mali Bifrost GPU
   8
   9 maintainers:
  10   - Rob Herring <robh@kernel.org>
  11
  12 properties:
  13   $nodename:
  14     pattern: '^gpu@[a-f0-9]+$'
  15
  16   compatible:
  17     items:
  18       - enum:
  19           - amlogic,meson-g12a-mali
  20           - realtek,rtd1619-mali
  21           - rockchip,px30-mali
  22       - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
  23
  24   reg:
  25     maxItems: 1
  26
  27   interrupts:
  28     items:
  29       - description: Job interrupt
  30       - description: MMU interrupt
  31       - description: GPU interrupt
  32
  33   interrupt-names:
  34     items:
  35       - const: job
  36       - const: mmu
  37       - const: gpu
  38
  39   clocks:
  40     maxItems: 1
  41
  42   mali-supply: true
  43
  44   operating-points-v2: true
  45
  46 required:
  47   - compatible
  48   - reg
  49   - interrupts
  50   - interrupt-names
  51   - clocks
  52
  53 allOf:
  54   - if:
  55       properties:
  56         compatible:
  57           contains:
  58             const: amlogic,meson-g12a-mali
  59     then:
  60       properties:
  61         resets:
  62           minItems: 2
  63       required:
  64         - resets
  65
  66 examples:
  67   - |
  68     #include <dt-bindings/interrupt-controller/irq.h>
  69     #include <dt-bindings/interrupt-controller/arm-gic.h>
  70
  71     gpu@ffe40000 {
  72       compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
  73       reg = <0xffe40000 0x10000>;
  74       interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
  75              <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
  76              <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
  77       interrupt-names = "job", "mmu", "gpu";
  78       clocks = <&clk 1>;
  79       mali-supply = <&vdd_gpu>;
  80       operating-points-v2 = <&gpu_opp_table>;
  81       resets = <&reset 0>, <&reset 1>;
  82     };
  83
  84     gpu_opp_table: opp_table0 {
  85       compatible = "operating-points-v2";
  86
  87       opp@533000000 {
  88         opp-hz = /bits/ 64 <533000000>;
  89         opp-microvolt = <1250000>;
  90       };
  91       opp@450000000 {
  92         opp-hz = /bits/ 64 <450000000>;
  93         opp-microvolt = <1150000>;
  94       };
  95       opp@400000000 {
  96         opp-hz = /bits/ 64 <400000000>;
  97         opp-microvolt = <1125000>;
  98       };
  99       opp@350000000 {
 100         opp-hz = /bits/ 64 <350000000>;
 101         opp-microvolt = <1075000>;
 102       };
 103       opp@266000000 {
 104         opp-hz = /bits/ 64 <266000000>;
 105         opp-microvolt = <1025000>;
 106       };
 107       opp@160000000 {
 108         opp-hz = /bits/ 64 <160000000>;
 109         opp-microvolt = <925000>;
 110       };
 111       opp@100000000 {
 112         opp-hz = /bits/ 64 <100000000>;
 113         opp-microvolt = <912500>;
 114       };
 115     };
 116
 117 ...