Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/mfd/allwinner,sun6i-a31-prcm.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A31 PRCM
   8
   9 maintainers:
  10   - Chen-Yu Tsai <wens@csie.org>
  11   - Maxime Ripard <mripard@kernel.org>
  12
  13 deprecated: true
  14
  15 properties:
  16   compatible:
  17     const: allwinner,sun6i-a31-prcm
  18
  19   reg:
  20     maxItems: 1
  21
  22 patternProperties:
  23   "^.*_(clk|rst)$":
  24     type: object
  25     unevaluatedProperties: false
  26
  27     properties:
  28       compatible:
  29         enum:
  30           - allwinner,sun4i-a10-mod0-clk
  31           - allwinner,sun6i-a31-apb0-clk
  32           - allwinner,sun6i-a31-apb0-gates-clk
  33           - allwinner,sun6i-a31-ar100-clk
  34           - allwinner,sun6i-a31-clock-reset
  35           - fixed-factor-clock
  36
  37     required:
  38       - compatible
  39
  40     allOf:
  41       - if:
  42           properties:
  43             compatible:
  44               contains:
  45                 const: fixed-factor-clock
  46
  47         then:
  48           $ref: /schemas/clock/fixed-factor-clock.yaml#
  49
  50       - if:
  51           properties:
  52             compatible:
  53               contains:
  54                 const: allwinner,sun4i-a10-mod0-clk
  55
  56         then:
  57           properties:
  58             "#clock-cells":
  59               const: 0
  60
  61             clocks:
  62               maxItems: 2
  63
  64             clock-output-names:
  65               maxItems: 1
  66
  67           required:
  68             - "#clock-cells"
  69             - clocks
  70             - clock-output-names
  71
  72       - if:
  73           properties:
  74             compatible:
  75               contains:
  76                 const: allwinner,sun6i-a31-apb0-clk
  77
  78         then:
  79           properties:
  80             "#clock-cells":
  81               const: 0
  82
  83             clocks:
  84               maxItems: 1
  85
  86             clock-output-names:
  87               maxItems: 1
  88
  89           required:
  90             - "#clock-cells"
  91             - clocks
  92             - clock-output-names
  93
  94       - if:
  95           properties:
  96             compatible:
  97               contains:
  98                 const: allwinner,sun6i-a31-apb0-gates-clk
  99
 100         then:
 101           properties:
 102             "#clock-cells":
 103               const: 1
 104               description: >
 105                 This additional argument passed to that clock is the
 106                 offset of the bit controlling this particular gate in
 107                 the register.
 108
 109             clocks:
 110               maxItems: 1
 111
 112             clock-output-names:
 113               minItems: 1
 114               maxItems: 32
 115
 116           required:
 117             - "#clock-cells"
 118             - clocks
 119             - clock-output-names
 120
 121       - if:
 122           properties:
 123             compatible:
 124               contains:
 125                 const: allwinner,sun6i-a31-ar100-clk
 126
 127         then:
 128           properties:
 129             "#clock-cells":
 130               const: 0
 131
 132             clocks:
 133               maxItems: 4
 134               description: >
 135                 The parent order must match the hardware programming
 136                 order.
 137
 138             clock-output-names:
 139               maxItems: 1
 140
 141           required:
 142             - "#clock-cells"
 143             - clocks
 144             - clock-output-names
 145
 146       - if:
 147           properties:
 148             compatible:
 149               contains:
 150                 const: allwinner,sun6i-a31-clock-reset
 151
 152         then:
 153           properties:
 154             "#reset-cells":
 155               const: 1
 156
 157           required:
 158             - "#reset-cells"
 159
 160 required:
 161   - compatible
 162   - reg
 163
 164 additionalProperties: false
 165
 166 examples:
 167   - |
 168     #include <dt-bindings/clock/sun6i-a31-ccu.h>
 169
 170     prcm@1f01400 {
 171         compatible = "allwinner,sun6i-a31-prcm";
 172         reg = <0x01f01400 0x200>;
 173
 174         ar100: ar100_clk {
 175             compatible = "allwinner,sun6i-a31-ar100-clk";
 176             #clock-cells = <0>;
 177             clocks = <&rtc 0>, <&osc24M>,
 178                      <&ccu CLK_PLL_PERIPH>,
 179                      <&ccu CLK_PLL_PERIPH>;
 180             clock-output-names = "ar100";
 181         };
 182
 183         ahb0: ahb0_clk {
 184             compatible = "fixed-factor-clock";
 185             #clock-cells = <0>;
 186             clock-div = <1>;
 187             clock-mult = <1>;
 188             clocks = <&ar100>;
 189             clock-output-names = "ahb0";
 190         };
 191
 192         apb0: apb0_clk {
 193             compatible = "allwinner,sun6i-a31-apb0-clk";
 194             #clock-cells = <0>;
 195             clocks = <&ahb0>;
 196             clock-output-names = "apb0";
 197         };
 198
 199         apb0_gates: apb0_gates_clk {
 200             compatible = "allwinner,sun6i-a31-apb0-gates-clk";
 201             #clock-cells = <1>;
 202             clocks = <&apb0>;
 203             clock-output-names = "apb0_pio", "apb0_ir",
 204                                  "apb0_timer", "apb0_p2wi",
 205                                  "apb0_uart", "apb0_1wire",
 206                                  "apb0_i2c";
 207         };
 208
 209         ir_clk: ir_clk {
 210             #clock-cells = <0>;
 211             compatible = "allwinner,sun4i-a10-mod0-clk";
 212             clocks = <&rtc 0>, <&osc24M>;
 213             clock-output-names = "ir";
 214         };
 215
 216         apb0_rst: apb0_rst {
 217             compatible = "allwinner,sun6i-a31-clock-reset";
 218             #reset-cells = <1>;
 219         };
 220     };
 221
 222 ...