1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 BayLibre, SAS
5 $id: "http://devicetree.org/schemas/net/stm32-dwmac.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: STMicroelectronics STM32 / MCU DWMAC glue layer controller
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
15 This file documents platform glue layer for stmmac.
17 # We need a select here so we don't match all nodes with 'snps,dwmac'
29 - $ref: "snps,dwmac.yaml#"
37 - const: snps,dwmac-4.20a
41 - const: snps,dwmac-4.10a
45 - const: snps,dwmac-3.50a
56 - description: GMAC main clock
57 - description: MAC TX clock
58 - description: MAC RX clock
59 - description: For MPU family, used for power mode
60 - description: For MPU family, used for PHY without quartz
61 - description: PTP clock
76 $ref: "/schemas/types.yaml#/definitions/phandle-array"
78 Should be phandle/offset pair. The phandle to the syscon node which
79 encompases the glue register, and the offset of the control register
83 set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125.
88 set this property in RMII mode when you have PHY without crystal 50MHz and want to
89 select RCC clock instead of ETH_REF_CLK.
98 unevaluatedProperties: false
102 #include <dt-bindings/interrupt-controller/arm-gic.h>
103 #include <dt-bindings/clock/stm32mp1-clks.h>
104 #include <dt-bindings/reset/stm32mp1-resets.h>
105 #include <dt-bindings/mfd/stm32h7-rcc.h>
107 ethernet0: ethernet@5800a000 {
108 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
109 reg = <0x5800a000 0x2000>;
110 reg-names = "stmmaceth";
111 interrupts = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
112 interrupt-names = "macirq";
113 clock-names = "stmmaceth",
118 clocks = <&rcc ETHMAC>,
123 st,syscon = <&syscfg 0x4>;
125 snps,axi-config = <&stmmac_axi_config_0>;
130 //Example 2 (MCU example)
131 ethernet1: ethernet@40028000 {
132 compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
133 reg = <0x40028000 0x8000>;
134 reg-names = "stmmaceth";
135 interrupts = <0 61 0>, <0 62 0>;
136 interrupt-names = "macirq", "eth_wake_irq";
137 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
138 clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
139 st,syscon = <&syscfg 0x4>;
146 ethernet2: ethernet@40027000 {
147 compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
148 reg = <0x40028000 0x8000>;
149 reg-names = "stmmaceth";
151 interrupt-names = "macirq";
152 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
153 clocks = <&rcc 62>, <&rcc 61>, <&rcc 60>;
154 st,syscon = <&syscfg 0x4>;