1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/nvmem/nvmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVMEM (Non Volatile Memory) Device Tree Bindings
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 This binding is intended to represent the location of hardware
14 configuration data stored in NVMEMs like eeprom, efuses and so on.
16 On a significant proportion of boards, the manufacturer has stored
17 some data on NVMEM, for the OS to be able to retrieve these
18 information and act upon it. Obviously, the OS has to know about
19 where to retrieve these data from, and where they are stored on the
24 pattern: "^(eeprom|efuse|nvram)(@.*|-[0-9a-f])*$"
33 $ref: /schemas/types.yaml#/definitions/flag
35 Mark the provider as read only.
39 GPIO to which the write-protect pin of the chip is connected.
40 The write-protect GPIO is asserted, when it's driven high
41 (logical '1') to block the write operation. It's deasserted,
42 when it's driven low (logical '0') to allow writing.
53 Offset and size in bytes within the storage device.
62 Offset in bit within the address range specified by reg.
65 Size in bit within the address range specified by reg.
70 additionalProperties: false
74 #include <dt-bindings/gpio/gpio.h>
76 qfprom: eeprom@700000 {
79 reg = <0x00700000 0x100000>;
81 wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
86 tsens_calibration: calib@404 {
90 tsens_calibration_bckp: calib_bckp@504 {
95 pvs_version: pvs-version@6 {
100 speed_bin: speed-bin@c{