Documentation/devicetree/bindings/thermal/qcom-tsens.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 # Copyright 2019 Linaro Ltd.
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: QCOM SoC Temperature Sensor (TSENS)
   9
  10 maintainers:
  11   - Amit Kucheria <amit.kucheria@linaro.org>
  12
  13 description: |
  14   QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
  15   three distinct major versions of the IP that is supported by a single driver.
  16   The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
  17   everything before v1 when there was no versioning information.
  18
  19 properties:
  20   compatible:
  21     oneOf:
  22       - description: v0.1 of TSENS
  23         items:
  24           - enum:
  25               - qcom,msm8916-tsens
  26               - qcom,msm8974-tsens
  27           - const: qcom,tsens-v0_1
  28
  29       - description: v1 of TSENS
  30         items:
  31           - enum:
  32               - qcom,msm8976-tsens
  33               - qcom,qcs404-tsens
  34           - const: qcom,tsens-v1
  35
  36       - description: v2 of TSENS
  37         items:
  38           - enum:
  39               - qcom,msm8996-tsens
  40               - qcom,msm8998-tsens
  41               - qcom,sdm845-tsens
  42           - const: qcom,tsens-v2
  43
  44   reg:
  45     maxItems: 2
  46     items:
  47       - description: TM registers
  48       - description: SROT registers
  49
  50   interrupts:
  51     minItems: 1
  52     items:
  53       - description: Combined interrupt if upper or lower threshold crossed
  54       - description: Interrupt if critical threshold crossed
  55
  56   interrupt-names:
  57     minItems: 1
  58     items:
  59       - const: uplow
  60       - const: critical
  61
  62   nvmem-cells:
  63     minItems: 1
  64     maxItems: 2
  65     description:
  66       Reference to an nvmem node for the calibration data
  67
  68   nvmem-cell-names:
  69     minItems: 1
  70     maxItems: 2
  71     items:
  72       - const: calib
  73       - const: calib_sel
  74
  75   "#qcom,sensors":
  76     allOf:
  77       - $ref: /schemas/types.yaml#/definitions/uint32
  78       - minimum: 1
  79       - maximum: 16
  80     description:
  81       Number of sensors enabled on this platform
  82
  83   "#thermal-sensor-cells":
  84     const: 1
  85     description:
  86       Number of cells required to uniquely identify the thermal sensors. Since
  87       we have multiple sensors this is set to 1
  88
  89 allOf:
  90   - if:
  91       properties:
  92         compatible:
  93           contains:
  94             enum:
  95               - qcom,msm8916-tsens
  96               - qcom,msm8974-tsens
  97               - qcom,msm8976-tsens
  98               - qcom,qcs404-tsens
  99               - qcom,tsens-v0_1
 100               - qcom,tsens-v1
 101     then:
 102       properties:
 103         interrupts:
 104           maxItems: 1
 105         interrupt-names:
 106           maxItems: 1
 107
 108     else:
 109       properties:
 110         interrupts:
 111           minItems: 2
 112         interrupt-names:
 113           minItems: 2
 114
 115 required:
 116   - compatible
 117   - reg
 118   - "#qcom,sensors"
 119   - interrupts
 120   - interrupt-names
 121   - "#thermal-sensor-cells"
 122
 123 additionalProperties: false
 124
 125 examples:
 126   - |
 127     #include <dt-bindings/interrupt-controller/arm-gic.h>
 128     // Example 1 (legacy: for pre v1 IP):
 129     tsens1: thermal-sensor@900000 {
 130            compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
 131            reg = <0x4a9000 0x1000>, /* TM */
 132                  <0x4a8000 0x1000>; /* SROT */
 133
 134            nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
 135            nvmem-cell-names = "calib", "calib_sel";
 136
 137            interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 138            interrupt-names = "uplow";
 139
 140            #qcom,sensors = <5>;
 141            #thermal-sensor-cells = <1>;
 142     };
 143
 144   - |
 145     #include <dt-bindings/interrupt-controller/arm-gic.h>
 146     // Example 2 (for any platform containing v1 of the TSENS IP):
 147     tsens2: thermal-sensor@4a9000 {
 148           compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
 149           reg = <0x004a9000 0x1000>, /* TM */
 150                 <0x004a8000 0x1000>; /* SROT */
 151
 152           nvmem-cells = <&tsens_caldata>;
 153           nvmem-cell-names = "calib";
 154
 155           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
 156           interrupt-names = "uplow";
 157
 158           #qcom,sensors = <10>;
 159           #thermal-sensor-cells = <1>;
 160     };
 161
 162   - |
 163     #include <dt-bindings/interrupt-controller/arm-gic.h>
 164     // Example 3 (for any platform containing v2 of the TSENS IP):
 165     tsens3: thermal-sensor@c263000 {
 166            compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
 167            reg = <0xc263000 0x1ff>,
 168                  <0xc222000 0x1ff>;
 169
 170            interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
 171                         <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
 172            interrupt-names = "uplow", "critical";
 173
 174            #qcom,sensors = <13>;
 175            #thermal-sensor-cells = <1>;
 176     };
 177 ...