2 ; -----------------------------------------------------------------------
4 ; -----------------------------------------------------------------------
42 [UNDEFINED] CONSTANT [IF]
58 [UNDEFINED] SPACE [IF]
63 [UNDEFINED] SPACES [IF]
94 R> OVER - 0 MAX SPACES TYPE
115 DO I C@ $7E MIN BL MAX EMIT LOOP
123 ; --------------------------------------------------------------------------------
124 ; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES IV : Adda|Cmpa|Mova|Suba (without extended word)
125 ; --------------------------------------------------------------------------------
126 ; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
127 ; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
128 ; --------------------------------------------------------------------------------
135 ; you should see: 45 53 54 52>0B 0A<04 44 55 4D 50 4F
143 ; you should see: 45 53 54 52>1A 0B<04 44 55 4D 50 4F
151 ; you should see: 45 53 54 52>2B 01 45 23<04 44 55 4D
159 ; you should see: 45 53 54 52>3C 0A 34 12<04 44 55 4D
167 ; you should see: 45 53 54 52>61 0B 45 23<04 44 55 4D
175 ; you should see: 45 53 54 52>7A 0C 34 12<04 44 55 4D
183 ; you should see: 45 53 54 52>8C 00 01 00<04 44 55 4D
191 ; you should see: 45 53 54 52>9C 01 45 23<04 44 55 4D
199 ; you should see: 45 53 54 52>AC 02 56 34<04 44 55 4D
207 ; you should see: 45 53 54 52>BC 03 67 45<04 44 55 4D
217 ; you should see: 45 53 54 52>CB 0A<04 44 55 4D 50 4F
225 ; you should see: 45 53 54 52>DB 0A<04 44 55 4D 50 4F
233 ; you should see: 45 53 54 52>EB 0A<04 44 55 4D 50 4F
241 ; you should see: 45 53 54 52>FB 0A<04 44 55 4D 50 4F
244 ; --------------------------------------------------------------------------------
245 ; DTCforthMSP430FR5xxx ASSEMBLER: CALLA (without extended word)
246 ; --------------------------------------------------------------------------------
247 ; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
248 ; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
249 ; --------------------------------------------------------------------------------
256 ; you should see: 45 53 54 52>4A 13<04 44 55 4D 50 4F
264 ; you should see: 45 53 54 52>5A 13 56 34<04 44 55 4D
272 ; you should see: 45 53 54 52>6A 13<04 44 55 4D 50 4F
280 ; you should see: 45 53 54 52>7A 13<04 44 55 4D 50 4F
288 ; you should see: 45 53 54 52>82 13 56 34<04 44 55 4D
296 ; you should see: 45 53 54 52>B5 13 89 67<04 44 55 4D
299 ; --------------------------------------------------------------------------------
300 ; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES V extended double operand
301 ; --------------------------------------------------------------------------------
302 ; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
303 ; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
304 ; --------------------------------------------------------------------------------
312 ; you should see: 45 53 54 52>0B 4C 40 18 0B 4C<04 44
321 ; you should see: 45 53 54 52>0B 5B 00 18 4B 5B<04 44
331 ; you should see: 45 53 54 52>0B 5B 89 18 4B 5B<04 44
341 ; you should see: 45 53 54 52>0B 5B 07 18 4B 5B<04 44
350 ; you should see: 45 53 54 52>3B 60 76 98 80 1A 7B 60
360 ; you should see: 45 53 54 52>1B 62 76 98 80 1A 5B 62
367 XORX.B $6.5432(R12),R11
370 ; you should see: 45 53 54 52>5B EC 32 54 46 18 5B EC
377 SUBCX.A R11,$6.5432(R12)
380 ; you should see: 45 53 54 52>8C 7B 32 54 06 18 CC 7B
387 XORX.B R11,$6.5432(R12)
390 ; you should see: 45 53 54 52>CC EB 32 54 46 18 CC EB
394 ; --------------------------------------------------------------------------------
395 ; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES VI extended single operand (take count of RPT)
396 ; --------------------------------------------------------------------------------
397 ; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
398 ; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
399 ; --------------------------------------------------------------------------------
407 ; you should see: 45 53 54 52>09 11 40 18 09 11<04 44
416 ; you should see: 45 53 54 52>29 10 00 18 69 10<04 44
425 ; you should see: 45 53 54 52>2C 10 00 18 6C 10<04 44
434 ; you should see: 45 53 54 52>39 10 00 19 79 10<04 44
444 ; you should see: 45 53 54 52>0B 10 08 19 4B 10<04 44
454 ; you should see: 45 53 54 52>0B 10 89 19 4B 10<04 44
463 ; you should see: 45 53 54 52>30 12 45 23 40 18 30 12
473 ; you should see: 45 53 54 52>12 12 78 56 00 1A 52 12
483 ; you should see: 45 53 54 52>52 12 33 00 40 18 52 12
493 ; you should see: 45 53 54 52>5B 12 44 33 40 18 5B 12
500 $1DDC @ %10 $1DDC ! SWAP 8 EMIT . $1DDC !
504 $1DDC @ %10 $1DDC ! SWAP 8 EMIT U. $1DDC ! ;
523 RRUX_T ; you should see %111100001111000 --> %
542 RRUX_T ; you should see %111100001111000 --> %
556 RRUX_T ; you should see %111100001111 --> %
570 RRUX_T ; you should see %11110000 --> %
590 RRCX_T ; you should see %100000000000000 --> %
609 RRCX_T ; you should see %100000000000000 --> %
624 RRCX_T ; you should see %10000000 --> %
642 RRAX_T ; you should see %-100000000000000 --> %
661 RRAX_T ; you should see %-100000000000000 --> %
675 RRAX_T ; you should see %-10000000000000 --> %
689 RRAX_T ; you should see %-1000000000000 --> %
703 RRAX_T ; you should see %-100000000 --> %
721 RLAX_T ; you should see -2 -->
740 RLAX_T ; you should see -2 -->
754 RLAX_T ; you should see -4 -->
768 RLAX_T ; you should see -8 -->
782 RLAX_T ; you should see -256 -->
801 ADDX_T ; you should see -1 -->
821 ADDX_T ; you should see -1 -->
836 ADDX_T ; you should see -2 -->
851 ADDX_T ; you should see -8 -->
871 SUBX_T ; you should see 1 -->
891 SUBX_T ; you should see 1 -->
906 SUBX_T ; you should see 2 -->
921 SUBX_T ; you should see 8 -->
937 SUBX_T ; you should see 16 -->
953 SUBX_T ; you should see 1 -->
969 SUBX_T ; you should see 2 -->