2 i_rst, i_clk50, i_clk25,
13 input [7:0] i_wrdata ;
15 output [7:0] o_rddata ;
23 (* remstyle = "no_rw_check" *) reg [7:0] mem1[511:0] ;
25 assign o_rddata = mem1[r_rdadrs] ;
26 assign o_rdack = (r_rdadrs_buff != r_rdadrs[9]) ;
28 always @( posedge i_clk50 ) begin
29 r_rdadrs_buff <= r_rdadrs[9] ;
32 // memory read command
33 always @ ( posedge i_clk25 or posedge i_rst ) begin
38 r_rdadrs <= r_rdadrs + 9'd1 ;
42 // memory write command
43 always @ ( posedge i_clk50 or posedge i_rst ) begin
48 mem1[r_wradrs] <= i_wrdata ;
49 r_wradrs <= r_wradrs + 9'd1 ;