amdgpu/amdgpu_device.c

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 /**
  25  * \file amdgpu_device.c
  26  *
  27  *  Implementation of functions for AMD GPU device
  28  *
  29  */
  30
  31 #ifdef HAVE_CONFIG_H
  32 #include "config.h"
  33 #endif
  34
  35 #include <sys/stat.h>
  36 #include <errno.h>
  37 #include <string.h>
  38 #include <stdio.h>
  39 #include <stdlib.h>
  40 #include <unistd.h>
  41
  42 #include "xf86drm.h"
  43 #include "amdgpu_drm.h"
  44 #include "amdgpu_internal.h"
  45 #include "util_hash_table.h"
  46 #include "util_math.h"
  47
  48 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
  49 #define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
  50
  51 static pthread_mutex_t fd_mutex = PTHREAD_MUTEX_INITIALIZER;
  52 static struct util_hash_table *fd_tab;
  53
  54 static unsigned handle_hash(void *key)
  55 {
  56         return PTR_TO_UINT(key);
  57 }
  58
  59 static int handle_compare(void *key1, void *key2)
  60 {
  61         return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
  62 }
  63
  64 static unsigned fd_hash(void *key)
  65 {
  66         int fd = PTR_TO_UINT(key);
  67         char *name = drmGetPrimaryDeviceNameFromFd(fd);
  68         unsigned result = 0;
  69         char *c;
  70
  71         if (name == NULL)
  72                 return 0;
  73
  74         for (c = name; *c; ++c)
  75                 result += *c;
  76
  77         free(name);
  78
  79         return result;
  80 }
  81
  82 static int fd_compare(void *key1, void *key2)
  83 {
  84         int fd1 = PTR_TO_UINT(key1);
  85         int fd2 = PTR_TO_UINT(key2);
  86         char *name1 = drmGetPrimaryDeviceNameFromFd(fd1);
  87         char *name2 = drmGetPrimaryDeviceNameFromFd(fd2);
  88         int result;
  89
  90         if (name1 == NULL || name2 == NULL) {
  91                 free(name1);
  92                 free(name2);
  93                 return 0;
  94         }
  95
  96         result = strcmp(name1, name2);
  97         free(name1);
  98         free(name2);
  99
 100         return result;
 101 }
 102
 103 /**
 104 * Get the authenticated form fd,
 105 *
 106 * \param   fd   - \c [in]  File descriptor for AMD GPU device
 107 * \param   auth - \c [out] Pointer to output the fd is authenticated or not
 108 *                          A render node fd, output auth = 0
 109 *                          A legacy fd, get the authenticated for compatibility root
 110 *
 111 * \return   0 on success\n
 112 *          >0 - AMD specific error code\n
 113 *          <0 - Negative POSIX Error code
 114 */
 115 static int amdgpu_get_auth(int fd, int *auth)
 116 {
 117         int r = 0;
 118         drm_client_t client = {};
 119
 120         if (drmGetNodeTypeFromFd(fd) == DRM_NODE_RENDER)
 121                 *auth = 0;
 122         else {
 123                 client.idx = 0;
 124                 r = drmIoctl(fd, DRM_IOCTL_GET_CLIENT, &client);
 125                 if (!r)
 126                         *auth = client.auth;
 127         }
 128         return r;
 129 }
 130
 131 static void amdgpu_device_free_internal(amdgpu_device_handle dev)
 132 {
 133         amdgpu_vamgr_deinit(dev->vamgr);
 134         free(dev->vamgr);
 135         util_hash_table_destroy(dev->bo_flink_names);
 136         util_hash_table_destroy(dev->bo_handles);
 137         pthread_mutex_destroy(&dev->bo_table_mutex);
 138         util_hash_table_remove(fd_tab, UINT_TO_PTR(dev->fd));
 139         close(dev->fd);
 140         if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
 141                 close(dev->flink_fd);
 142         free(dev);
 143 }
 144
 145 /**
 146  * Assignment between two amdgpu_device pointers with reference counting.
 147  *
 148  * Usage:
 149  *    struct amdgpu_device *dst = ... , *src = ...;
 150  *
 151  *    dst = src;
 152  *    // No reference counting. Only use this when you need to move
 153  *    // a reference from one pointer to another.
 154  *
 155  *    amdgpu_device_reference(&dst, src);
 156  *    // Reference counters are updated. dst is decremented and src is
 157  *    // incremented. dst is freed if its reference counter is 0.
 158  */
 159 static void amdgpu_device_reference(struct amdgpu_device **dst,
 160                              struct amdgpu_device *src)
 161 {
 162         if (update_references(&(*dst)->refcount, &src->refcount))
 163                 amdgpu_device_free_internal(*dst);
 164         *dst = src;
 165 }
 166
 167 int amdgpu_device_initialize(int fd,
 168                              uint32_t *major_version,
 169                              uint32_t *minor_version,
 170                              amdgpu_device_handle *device_handle)
 171 {
 172         struct amdgpu_device *dev;
 173         drmVersionPtr version;
 174         int r;
 175         int flag_auth = 0;
 176         int flag_authexist=0;
 177         uint32_t accel_working = 0;
 178         uint64_t start, max;
 179
 180         *device_handle = NULL;
 181
 182         pthread_mutex_lock(&fd_mutex);
 183         if (!fd_tab)
 184                 fd_tab = util_hash_table_create(fd_hash, fd_compare);
 185         r = amdgpu_get_auth(fd, &flag_auth);
 186         if (r) {
 187                 pthread_mutex_unlock(&fd_mutex);
 188                 return r;
 189         }
 190         dev = util_hash_table_get(fd_tab, UINT_TO_PTR(fd));
 191         if (dev) {
 192                 r = amdgpu_get_auth(dev->fd, &flag_authexist);
 193                 if (r) {
 194                         pthread_mutex_unlock(&fd_mutex);
 195                         return r;
 196                 }
 197                 if ((flag_auth) && (!flag_authexist)) {
 198                         dev->flink_fd = dup(fd);
 199                 }
 200                 *major_version = dev->major_version;
 201                 *minor_version = dev->minor_version;
 202                 amdgpu_device_reference(device_handle, dev);
 203                 pthread_mutex_unlock(&fd_mutex);
 204                 return 0;
 205         }
 206
 207         dev = calloc(1, sizeof(struct amdgpu_device));
 208         if (!dev) {
 209                 pthread_mutex_unlock(&fd_mutex);
 210                 return -ENOMEM;
 211         }
 212
 213         dev->fd = -1;
 214         dev->flink_fd = -1;
 215
 216         atomic_set(&dev->refcount, 1);
 217
 218         version = drmGetVersion(fd);
 219         if (version->version_major != 3) {
 220                 fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
 221                         "only compatible with 3.x.x.\n",
 222                         __func__,
 223                         version->version_major,
 224                         version->version_minor,
 225                         version->version_patchlevel);
 226                 drmFreeVersion(version);
 227                 r = -EBADF;
 228                 goto cleanup;
 229         }
 230
 231         dev->fd = dup(fd);
 232         dev->flink_fd = dev->fd;
 233         dev->major_version = version->version_major;
 234         dev->minor_version = version->version_minor;
 235         drmFreeVersion(version);
 236
 237         dev->bo_flink_names = util_hash_table_create(handle_hash,
 238                                                      handle_compare);
 239         dev->bo_handles = util_hash_table_create(handle_hash, handle_compare);
 240         pthread_mutex_init(&dev->bo_table_mutex, NULL);
 241
 242         /* Check if acceleration is working. */
 243         r = amdgpu_query_info(dev, AMDGPU_INFO_ACCEL_WORKING, 4, &accel_working);
 244         if (r)
 245                 goto cleanup;
 246         if (!accel_working) {
 247                 r = -EBADF;
 248                 goto cleanup;
 249         }
 250
 251         r = amdgpu_query_gpu_info_init(dev);
 252         if (r)
 253                 goto cleanup;
 254
 255         dev->vamgr = calloc(1, sizeof(struct amdgpu_bo_va_mgr));
 256         if (dev->vamgr == NULL)
 257                 goto cleanup;
 258
 259         amdgpu_vamgr_init(dev->vamgr, dev->dev_info.virtual_address_offset,
 260                           dev->dev_info.virtual_address_max,
 261                           dev->dev_info.virtual_address_alignment);
 262
 263         max = MIN2(dev->dev_info.virtual_address_max, 0xffffffff);
 264         start = amdgpu_vamgr_find_va(dev->vamgr,
 265                                      max - dev->dev_info.virtual_address_offset,
 266                                      dev->dev_info.virtual_address_alignment, 0);
 267         if (start > 0xffffffff)
 268                 goto free_va; /* shouldn't get here */
 269
 270         dev->vamgr_32 =  calloc(1, sizeof(struct amdgpu_bo_va_mgr));
 271         if (dev->vamgr_32 == NULL)
 272                 goto free_va;
 273         amdgpu_vamgr_init(dev->vamgr_32, start, max,
 274                           dev->dev_info.virtual_address_alignment);
 275
 276         *major_version = dev->major_version;
 277         *minor_version = dev->minor_version;
 278         *device_handle = dev;
 279         util_hash_table_set(fd_tab, UINT_TO_PTR(dev->fd), dev);
 280         pthread_mutex_unlock(&fd_mutex);
 281
 282         return 0;
 283
 284 free_va:
 285         r = -ENOMEM;
 286         amdgpu_vamgr_free_va(dev->vamgr, start,
 287                              max - dev->dev_info.virtual_address_offset);
 288         amdgpu_vamgr_deinit(dev->vamgr);
 289         free(dev->vamgr);
 290
 291 cleanup:
 292         if (dev->fd >= 0)
 293                 close(dev->fd);
 294         free(dev);
 295         pthread_mutex_unlock(&fd_mutex);
 296         return r;
 297 }
 298
 299 int amdgpu_device_deinitialize(amdgpu_device_handle dev)
 300 {
 301         amdgpu_device_reference(&dev, NULL);
 302         return 0;
 303 }