amdgpu.c

   1 /*
   2  * Copyright 2016 The Chromium OS Authors. All rights reserved.
   3  * Use of this source code is governed by a BSD-style license that can be
   4  * found in the LICENSE file.
   5  */
   6 #ifdef DRV_AMDGPU
   7 #include <amdgpu.h>
   8 #include <amdgpu_drm.h>
   9 #include <errno.h>
  10 #include <stdio.h>
  11 #include <stdlib.h>
  12 #include <string.h>
  13 #include <sys/mman.h>
  14 #include <xf86drm.h>
  15
  16 #include "dri.h"
  17 #include "drv_priv.h"
  18 #include "helpers.h"
  19 #include "util.h"
  20
  21 #ifdef __ANDROID__
  22 #define DRI_PATH "/vendor/lib/dri/radeonsi_dri.so"
  23 #else
  24 #define DRI_PATH "/usr/lib64/dri/radeonsi_dri.so"
  25 #endif
  26
  27 #define TILE_TYPE_LINEAR 0
  28 /* DRI backend decides tiling in this case. */
  29 #define TILE_TYPE_DRI 1
  30
  31 struct amdgpu_priv {
  32         struct dri_driver dri;
  33         int drm_version;
  34 };
  35
  36 const static uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
  37                                                   DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
  38                                                   DRM_FORMAT_XRGB8888 };
  39
  40 const static uint32_t texture_source_formats[] = { DRM_FORMAT_GR88,           DRM_FORMAT_R8,
  41                                                    DRM_FORMAT_NV21,           DRM_FORMAT_NV12,
  42                                                    DRM_FORMAT_YVU420_ANDROID, DRM_FORMAT_YVU420 };
  43
  44 static int amdgpu_init(struct driver *drv)
  45 {
  46         struct amdgpu_priv *priv;
  47         drmVersionPtr drm_version;
  48         struct format_metadata metadata;
  49         uint64_t use_flags = BO_USE_RENDER_MASK;
  50
  51         priv = calloc(1, sizeof(struct amdgpu_priv));
  52         if (!priv)
  53                 return -ENOMEM;
  54
  55         drm_version = drmGetVersion(drv_get_fd(drv));
  56         if (!drm_version) {
  57                 free(priv);
  58                 return -ENODEV;
  59         }
  60
  61         priv->drm_version = drm_version->version_minor;
  62         drmFreeVersion(drm_version);
  63
  64         drv->priv = priv;
  65
  66         if (dri_init(drv, DRI_PATH, "radeonsi")) {
  67                 free(priv);
  68                 drv->priv = NULL;
  69                 return -ENODEV;
  70         }
  71
  72         metadata.tiling = TILE_TYPE_LINEAR;
  73         metadata.priority = 1;
  74         metadata.modifier = DRM_FORMAT_MOD_LINEAR;
  75
  76         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
  77                              &metadata, use_flags);
  78
  79         drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
  80                              &metadata, BO_USE_TEXTURE_MASK);
  81
  82         /*
  83          * Chrome uses DMA-buf mmap to write to YV12 buffers, which are then accessed by the
  84          * Video Encoder Accelerator (VEA). It could also support NV12 potentially in the future.
  85          */
  86         drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata, BO_USE_HW_VIDEO_ENCODER);
  87         drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata, BO_USE_HW_VIDEO_ENCODER);
  88
  89         /* Android CTS tests require this. */
  90         drv_add_combination(drv, DRM_FORMAT_BGR888, &metadata, BO_USE_SW_MASK);
  91
  92         /* Linear formats supported by display. */
  93         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
  94         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
  95         drv_modify_combination(drv, DRM_FORMAT_ABGR8888, &metadata, BO_USE_SCANOUT);
  96         drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &metadata, BO_USE_SCANOUT);
  97
  98         /* YUV formats for camera and display. */
  99         drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
 100                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SCANOUT |
 101                                    BO_USE_HW_VIDEO_DECODER);
 102
 103         drv_modify_combination(drv, DRM_FORMAT_NV21, &metadata, BO_USE_SCANOUT);
 104
 105         /*
 106          * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
 107          * from camera.
 108          */
 109         drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
 110                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
 111
 112         /*
 113          * The following formats will be allocated by the DRI backend and may be potentially tiled.
 114          * Since format modifier support hasn't been implemented fully yet, it's not
 115          * possible to enumerate the different types of buffers (like i915 can).
 116          */
 117         use_flags &= ~BO_USE_RENDERSCRIPT;
 118         use_flags &= ~BO_USE_SW_WRITE_OFTEN;
 119         use_flags &= ~BO_USE_SW_READ_OFTEN;
 120         use_flags &= ~BO_USE_LINEAR;
 121
 122         metadata.tiling = TILE_TYPE_DRI;
 123         metadata.priority = 2;
 124
 125         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 126                              &metadata, use_flags);
 127
 128         /* Potentially tiled formats supported by display. */
 129         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 130         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 131         drv_modify_combination(drv, DRM_FORMAT_ABGR8888, &metadata, BO_USE_SCANOUT);
 132         drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &metadata, BO_USE_SCANOUT);
 133         return 0;
 134 }
 135
 136 static void amdgpu_close(struct driver *drv)
 137 {
 138         dri_close(drv);
 139         free(drv->priv);
 140         drv->priv = NULL;
 141 }
 142
 143 static int amdgpu_create_bo(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
 144                             uint64_t use_flags)
 145 {
 146         int ret;
 147         uint32_t plane, stride;
 148         struct combination *combo;
 149         union drm_amdgpu_gem_create gem_create;
 150
 151         combo = drv_get_combination(bo->drv, format, use_flags);
 152         if (!combo)
 153                 return -EINVAL;
 154
 155         if (combo->metadata.tiling == TILE_TYPE_DRI) {
 156                 bool needs_alignment = false;
 157 #ifdef __ANDROID__
 158                 /*
 159                  * Currently, the gralloc API doesn't differentiate between allocation time and map
 160                  * time strides. A workaround for amdgpu DRI buffers is to always to align to 256 at
 161                  * allocation time.
 162                  *
 163                  * See b/115946221,b/117942643
 164                  */
 165                 if (use_flags & (BO_USE_SW_MASK))
 166                         needs_alignment = true;
 167 #endif
 168                 // See b/122049612
 169                 if (use_flags & (BO_USE_SCANOUT))
 170                         needs_alignment = true;
 171
 172                 if (needs_alignment) {
 173                         uint32_t bytes_per_pixel = drv_bytes_per_pixel_from_format(format, 0);
 174                         width = ALIGN(width, 256 / bytes_per_pixel);
 175                 }
 176
 177                 return dri_bo_create(bo, width, height, format, use_flags);
 178         }
 179
 180         stride = drv_stride_from_format(format, width, 0);
 181         stride = ALIGN(stride, 256);
 182
 183         drv_bo_from_format(bo, stride, height, format);
 184
 185         memset(&gem_create, 0, sizeof(gem_create));
 186         gem_create.in.bo_size = bo->total_size;
 187         gem_create.in.alignment = 256;
 188         gem_create.in.domain_flags = 0;
 189
 190         if (use_flags & (BO_USE_LINEAR | BO_USE_SW_MASK))
 191                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
 192
 193         gem_create.in.domains = AMDGPU_GEM_DOMAIN_GTT;
 194         if (!(use_flags & (BO_USE_SW_READ_OFTEN | BO_USE_SCANOUT)))
 195                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_CPU_GTT_USWC;
 196
 197         /* Allocate the buffer with the preferred heap. */
 198         ret = drmCommandWriteRead(drv_get_fd(bo->drv), DRM_AMDGPU_GEM_CREATE, &gem_create,
 199                                   sizeof(gem_create));
 200         if (ret < 0)
 201                 return ret;
 202
 203         for (plane = 0; plane < bo->num_planes; plane++)
 204                 bo->handles[plane].u32 = gem_create.out.handle;
 205
 206         return 0;
 207 }
 208
 209 static int amdgpu_import_bo(struct bo *bo, struct drv_import_fd_data *data)
 210 {
 211         struct combination *combo;
 212         combo = drv_get_combination(bo->drv, data->format, data->use_flags);
 213         if (!combo)
 214                 return -EINVAL;
 215
 216         if (combo->metadata.tiling == TILE_TYPE_DRI)
 217                 return dri_bo_import(bo, data);
 218         else
 219                 return drv_prime_bo_import(bo, data);
 220 }
 221
 222 static int amdgpu_destroy_bo(struct bo *bo)
 223 {
 224         if (bo->priv)
 225                 return dri_bo_destroy(bo);
 226         else
 227                 return drv_gem_bo_destroy(bo);
 228 }
 229
 230 static void *amdgpu_map_bo(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
 231 {
 232         int ret;
 233         union drm_amdgpu_gem_mmap gem_map;
 234
 235         if (bo->priv)
 236                 return dri_bo_map(bo, vma, plane, map_flags);
 237
 238         memset(&gem_map, 0, sizeof(gem_map));
 239         gem_map.in.handle = bo->handles[plane].u32;
 240
 241         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_AMDGPU_GEM_MMAP, &gem_map);
 242         if (ret) {
 243                 drv_log("DRM_IOCTL_AMDGPU_GEM_MMAP failed\n");
 244                 return MAP_FAILED;
 245         }
 246
 247         vma->length = bo->total_size;
 248
 249         return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
 250                     gem_map.out.addr_ptr);
 251 }
 252
 253 static int amdgpu_unmap_bo(struct bo *bo, struct vma *vma)
 254 {
 255         if (bo->priv)
 256                 return dri_bo_unmap(bo, vma);
 257         else
 258                 return munmap(vma->addr, vma->length);
 259 }
 260
 261 static int amdgpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
 262 {
 263         int ret;
 264         union drm_amdgpu_gem_wait_idle wait_idle;
 265
 266         if (bo->priv)
 267                 return 0;
 268
 269         memset(&wait_idle, 0, sizeof(wait_idle));
 270         wait_idle.in.handle = bo->handles[0].u32;
 271         wait_idle.in.timeout = AMDGPU_TIMEOUT_INFINITE;
 272
 273         ret = drmCommandWriteRead(bo->drv->fd, DRM_AMDGPU_GEM_WAIT_IDLE, &wait_idle,
 274                                   sizeof(wait_idle));
 275
 276         if (ret < 0) {
 277                 drv_log("DRM_AMDGPU_GEM_WAIT_IDLE failed with %d\n", ret);
 278                 return ret;
 279         }
 280
 281         if (ret == 0 && wait_idle.out.status)
 282                 drv_log("DRM_AMDGPU_GEM_WAIT_IDLE BO is busy\n");
 283
 284         return 0;
 285 }
 286
 287 static uint32_t amdgpu_resolve_format(struct driver *drv, uint32_t format, uint64_t use_flags)
 288 {
 289         switch (format) {
 290         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
 291                 /* Camera subsystem requires NV12. */
 292                 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
 293                         return DRM_FORMAT_NV12;
 294                 /*HACK: See b/28671744 */
 295                 return DRM_FORMAT_XBGR8888;
 296         case DRM_FORMAT_FLEX_YCbCr_420_888:
 297                 return DRM_FORMAT_NV12;
 298         default:
 299                 return format;
 300         }
 301 }
 302
 303 const struct backend backend_amdgpu = {
 304         .name = "amdgpu",
 305         .init = amdgpu_init,
 306         .close = amdgpu_close,
 307         .bo_create = amdgpu_create_bo,
 308         .bo_destroy = amdgpu_destroy_bo,
 309         .bo_import = amdgpu_import_bo,
 310         .bo_map = amdgpu_map_bo,
 311         .bo_unmap = amdgpu_unmap_bo,
 312         .bo_invalidate = amdgpu_bo_invalidate,
 313         .resolve_format = amdgpu_resolve_format,
 314 };
 315
 316 #endif