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minigbm: align width so that stride aligns to 256
[android-x86/external-minigbm.git] / amdgpu.c
1 /*
2  * Copyright 2016 The Chromium OS Authors. All rights reserved.
3  * Use of this source code is governed by a BSD-style license that can be
4  * found in the LICENSE file.
5  */
6 #ifdef DRV_AMDGPU
7 #include <amdgpu.h>
8 #include <amdgpu_drm.h>
9 #include <errno.h>
10 #include <stdio.h>
11 #include <stdlib.h>
12 #include <string.h>
13 #include <sys/mman.h>
14 #include <xf86drm.h>
15
16 #include "dri.h"
17 #include "drv_priv.h"
18 #include "helpers.h"
19 #include "util.h"
20
21 #ifdef __ANDROID__
22 #define DRI_PATH "/vendor/lib/dri/radeonsi_dri.so"
23 #else
24 #define DRI_PATH "/usr/lib64/dri/radeonsi_dri.so"
25 #endif
26
27 #define TILE_TYPE_LINEAR 0
28 /* DRI backend decides tiling in this case. */
29 #define TILE_TYPE_DRI 1
30
31 struct amdgpu_priv {
32         struct dri_driver dri;
33         int drm_version;
34 };
35
36 const static uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
37                                                   DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
38                                                   DRM_FORMAT_XRGB8888 };
39
40 const static uint32_t texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8, DRM_FORMAT_NV21,
41                                                    DRM_FORMAT_NV12, DRM_FORMAT_YVU420_ANDROID };
42
43 static int amdgpu_init(struct driver *drv)
44 {
45         struct amdgpu_priv *priv;
46         drmVersionPtr drm_version;
47         struct format_metadata metadata;
48         uint64_t use_flags = BO_USE_RENDER_MASK;
49
50         priv = calloc(1, sizeof(struct amdgpu_priv));
51         if (!priv)
52                 return -ENOMEM;
53
54         drm_version = drmGetVersion(drv_get_fd(drv));
55         if (!drm_version) {
56                 free(priv);
57                 return -ENODEV;
58         }
59
60         priv->drm_version = drm_version->version_minor;
61         drmFreeVersion(drm_version);
62
63         drv->priv = priv;
64
65         if (dri_init(drv, DRI_PATH, "radeonsi")) {
66                 free(priv);
67                 drv->priv = NULL;
68                 return -ENODEV;
69         }
70
71         metadata.tiling = TILE_TYPE_LINEAR;
72         metadata.priority = 1;
73         metadata.modifier = DRM_FORMAT_MOD_LINEAR;
74
75         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
76                              &metadata, use_flags);
77
78         drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
79                              &metadata, BO_USE_TEXTURE_MASK);
80
81         /* Android CTS tests require this. */
82         drv_add_combination(drv, DRM_FORMAT_BGR888, &metadata, BO_USE_SW_MASK);
83
84         /* Linear formats supported by display. */
85         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
86         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
87         drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &metadata, BO_USE_SCANOUT);
88
89         /* YUV formats for camera and display. */
90         drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
91                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SCANOUT |
92                                    BO_USE_HW_VIDEO_DECODER);
93
94         drv_modify_combination(drv, DRM_FORMAT_NV21, &metadata, BO_USE_SCANOUT);
95
96         /*
97          * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
98          * from camera.
99          */
100         drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
101                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
102
103         /*
104          * The following formats will be allocated by the DRI backend and may be potentially tiled.
105          * Since format modifier support hasn't been implemented fully yet, it's not
106          * possible to enumerate the different types of buffers (like i915 can).
107          */
108         use_flags &= ~BO_USE_RENDERSCRIPT;
109         use_flags &= ~BO_USE_SW_WRITE_OFTEN;
110         use_flags &= ~BO_USE_SW_READ_OFTEN;
111         use_flags &= ~BO_USE_LINEAR;
112
113         metadata.tiling = TILE_TYPE_DRI;
114         metadata.priority = 2;
115
116         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
117                              &metadata, use_flags);
118
119         /* Potentially tiled formats supported by display. */
120         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
121         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
122         drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &metadata, BO_USE_SCANOUT);
123         return 0;
124 }
125
126 static void amdgpu_close(struct driver *drv)
127 {
128         dri_close(drv);
129         free(drv->priv);
130         drv->priv = NULL;
131 }
132
133 static int amdgpu_create_bo(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
134                             uint64_t use_flags)
135 {
136         int ret;
137         uint32_t plane, stride;
138         struct combination *combo;
139         union drm_amdgpu_gem_create gem_create;
140         struct amdgpu_priv *priv = bo->drv->priv;
141
142         combo = drv_get_combination(bo->drv, format, use_flags);
143         if (!combo)
144                 return -EINVAL;
145
146         /* Currently Gralloc does not handle a different map_stride. So to work around,
147          * aligning the stride to 256 to make bo_stride same as map_stride. b/115946221.
148          */
149 #ifdef __ANDROID__
150         uint32_t bytes_per_pixel = drv_bytes_per_pixel_from_format(format, 0);
151         width = ALIGN(width, 256 / bytes_per_pixel);
152 #endif
153         if (combo->metadata.tiling == TILE_TYPE_DRI)
154                 return dri_bo_create(bo, width, height, format, use_flags);
155
156         stride = drv_stride_from_format(format, width, 0);
157         stride = ALIGN(stride, 256);
158
159         drv_bo_from_format(bo, stride, height, format);
160
161         memset(&gem_create, 0, sizeof(gem_create));
162         gem_create.in.bo_size = bo->total_size;
163         gem_create.in.alignment = 256;
164         gem_create.in.domain_flags = 0;
165
166         if (use_flags & (BO_USE_LINEAR | BO_USE_SW_MASK))
167                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
168
169         gem_create.in.domains = AMDGPU_GEM_DOMAIN_GTT;
170         if (!(use_flags & (BO_USE_SW_READ_OFTEN | BO_USE_SCANOUT)))
171                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_CPU_GTT_USWC;
172
173         /* If drm_version >= 21 everything exposes explicit synchronization primitives
174            and chromeos/arc++ will use them. Disable implicit synchronization. */
175         if (priv->drm_version >= 21) {
176                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_EXPLICIT_SYNC;
177         }
178
179         /* Allocate the buffer with the preferred heap. */
180         ret = drmCommandWriteRead(drv_get_fd(bo->drv), DRM_AMDGPU_GEM_CREATE, &gem_create,
181                                   sizeof(gem_create));
182         if (ret < 0)
183                 return ret;
184
185         for (plane = 0; plane < bo->num_planes; plane++)
186                 bo->handles[plane].u32 = gem_create.out.handle;
187
188         return 0;
189 }
190
191 static int amdgpu_import_bo(struct bo *bo, struct drv_import_fd_data *data)
192 {
193         struct combination *combo;
194         combo = drv_get_combination(bo->drv, data->format, data->use_flags);
195         if (!combo)
196                 return -EINVAL;
197
198         if (combo->metadata.tiling == TILE_TYPE_DRI)
199                 return dri_bo_import(bo, data);
200         else
201                 return drv_prime_bo_import(bo, data);
202 }
203
204 static int amdgpu_destroy_bo(struct bo *bo)
205 {
206         if (bo->priv)
207                 return dri_bo_destroy(bo);
208         else
209                 return drv_gem_bo_destroy(bo);
210 }
211
212 static void *amdgpu_map_bo(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
213 {
214         int ret;
215         union drm_amdgpu_gem_mmap gem_map;
216
217         if (bo->priv)
218                 return dri_bo_map(bo, vma, plane, map_flags);
219
220         memset(&gem_map, 0, sizeof(gem_map));
221         gem_map.in.handle = bo->handles[plane].u32;
222
223         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_AMDGPU_GEM_MMAP, &gem_map);
224         if (ret) {
225                 drv_log("DRM_IOCTL_AMDGPU_GEM_MMAP failed\n");
226                 return MAP_FAILED;
227         }
228
229         vma->length = bo->total_size;
230
231         return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
232                     gem_map.out.addr_ptr);
233 }
234
235 static int amdgpu_unmap_bo(struct bo *bo, struct vma *vma)
236 {
237         if (bo->priv)
238                 return dri_bo_unmap(bo, vma);
239         else
240                 return munmap(vma->addr, vma->length);
241 }
242
243 static uint32_t amdgpu_resolve_format(uint32_t format, uint64_t use_flags)
244 {
245         switch (format) {
246         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
247                 /* Camera subsystem requires NV12. */
248                 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
249                         return DRM_FORMAT_NV12;
250                 /*HACK: See b/28671744 */
251                 return DRM_FORMAT_XBGR8888;
252         case DRM_FORMAT_FLEX_YCbCr_420_888:
253                 return DRM_FORMAT_NV12;
254         default:
255                 return format;
256         }
257 }
258
259 const struct backend backend_amdgpu = {
260         .name = "amdgpu",
261         .init = amdgpu_init,
262         .close = amdgpu_close,
263         .bo_create = amdgpu_create_bo,
264         .bo_destroy = amdgpu_destroy_bo,
265         .bo_import = amdgpu_import_bo,
266         .bo_map = amdgpu_map_bo,
267         .bo_unmap = amdgpu_unmap_bo,
268         .resolve_format = amdgpu_resolve_format,
269 };
270
271 #endif