arch/arm/boot/dts/armada-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada XP family SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is dual-licensed: you can use it either under the terms
  12  * of the GPL or the X11 license, at your option. Note that this dual
  13  * licensing only applies to this file, and not this project as a
  14  * whole.
  15  *
  16  *  a) This file is free software; you can redistribute it and/or
  17  *     modify it under the terms of the GNU General Public License as
  18  *     published by the Free Software Foundation; either version 2 of the
  19  *     License, or (at your option) any later version.
  20  *
  21  *     This file is distributed in the hope that it will be useful
  22  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  *     GNU General Public License for more details.
  25  *
  26  * Or, alternatively
  27  *
  28  *  b) Permission is hereby granted, free of charge, to any person
  29  *     obtaining a copy of this software and associated documentation
  30  *     files (the "Software"), to deal in the Software without
  31  *     restriction, including without limitation the rights to use
  32  *     copy, modify, merge, publish, distribute, sublicense, and/or
  33  *     sell copies of the Software, and to permit persons to whom the
  34  *     Software is furnished to do so, subject to the following
  35  *     conditions:
  36  *
  37  *     The above copyright notice and this permission notice shall be
  38  *     included in all copies or substantial portions of the Software.
  39  *
  40  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  41  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  42  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  43  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  44  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  45  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  46  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  47  *     OTHER DEALINGS IN THE SOFTWARE.
  48  *
  49  * Contains definitions specific to the Armada XP SoC that are not
  50  * common to all Armada SoCs.
  51  */
  52
  53 #include "armada-370-xp.dtsi"
  54
  55 / {
  56         model = "Marvell Armada XP family SoC";
  57         compatible = "marvell,armadaxp", "marvell,armada-370-xp";
  58
  59         aliases {
  60                 serial2 = &uart2;
  61                 serial3 = &uart3;
  62         };
  63
  64         soc {
  65                 compatible = "marvell,armadaxp-mbus", "simple-bus";
  66
  67                 bootrom {
  68                         compatible = "marvell,bootrom";
  69                         reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
  70                 };
  71
  72                 internal-regs {
  73                         sdramc@1400 {
  74                                 compatible = "marvell,armada-xp-sdram-controller";
  75                                 reg = <0x1400 0x500>;
  76                         };
  77
  78                         L2: l2-cache {
  79                                 compatible = "marvell,aurora-system-cache";
  80                                 reg = <0x08000 0x1000>;
  81                                 cache-id-part = <0x100>;
  82                                 cache-level = <2>;
  83                                 cache-unified;
  84                                 wt-override;
  85                         };
  86
  87                         uart2: serial@12200 {
  88                                 compatible = "snps,dw-apb-uart";
  89                                 pinctrl-0 = <&uart2_pins>;
  90                                 pinctrl-names = "default";
  91                                 reg = <0x12200 0x100>;
  92                                 reg-shift = <2>;
  93                                 interrupts = <43>;
  94                                 reg-io-width = <1>;
  95                                 clocks = <&coreclk 0>;
  96                                 status = "disabled";
  97                         };
  98
  99                         uart3: serial@12300 {
 100                                 compatible = "snps,dw-apb-uart";
 101                                 pinctrl-0 = <&uart3_pins>;
 102                                 pinctrl-names = "default";
 103                                 reg = <0x12300 0x100>;
 104                                 reg-shift = <2>;
 105                                 interrupts = <44>;
 106                                 reg-io-width = <1>;
 107                                 clocks = <&coreclk 0>;
 108                                 status = "disabled";
 109                         };
 110
 111                         systemc: system-controller@18200 {
 112                                 compatible = "marvell,armada-370-xp-system-controller";
 113                                 reg = <0x18200 0x500>;
 114                         };
 115
 116                         gateclk: clock-gating-control@18220 {
 117                                 compatible = "marvell,armada-xp-gating-clock";
 118                                 reg = <0x18220 0x4>;
 119                                 clocks = <&coreclk 0>;
 120                                 #clock-cells = <1>;
 121                         };
 122
 123                         coreclk: mvebu-sar@18230 {
 124                                 compatible = "marvell,armada-xp-core-clock";
 125                                 reg = <0x18230 0x08>;
 126                                 #clock-cells = <1>;
 127                         };
 128
 129                         thermal: thermal@182b0 {
 130                                 compatible = "marvell,armadaxp-thermal";
 131                                 reg = <0x182b0 0x4
 132                                         0x184d0 0x4>;
 133                                 status = "okay";
 134                         };
 135
 136                         cpuclk: clock-complex@18700 {
 137                                 #clock-cells = <1>;
 138                                 compatible = "marvell,armada-xp-cpu-clock";
 139                                 reg = <0x18700 0x24>, <0x1c054 0x10>;
 140                                 clocks = <&coreclk 1>;
 141                         };
 142
 143                         cpu-config@21000 {
 144                                 compatible = "marvell,armada-xp-cpu-config";
 145                                 reg = <0x21000 0x8>;
 146                         };
 147
 148                         eth2: ethernet@30000 {
 149                                 compatible = "marvell,armada-xp-neta";
 150                                 reg = <0x30000 0x4000>;
 151                                 interrupts = <12>;
 152                                 clocks = <&gateclk 2>;
 153                                 status = "disabled";
 154                         };
 155
 156                         usb2: usb@52000 {
 157                                 compatible = "marvell,orion-ehci";
 158                                 reg = <0x52000 0x500>;
 159                                 interrupts = <47>;
 160                                 clocks = <&gateclk 20>;
 161                                 status = "disabled";
 162                         };
 163
 164                         xor1: xor@60900 {
 165                                 compatible = "marvell,orion-xor";
 166                                 reg = <0x60900 0x100
 167                                        0x60b00 0x100>;
 168                                 clocks = <&gateclk 22>;
 169                                 status = "okay";
 170
 171                                 xor10 {
 172                                         interrupts = <51>;
 173                                         dmacap,memcpy;
 174                                         dmacap,xor;
 175                                 };
 176                                 xor11 {
 177                                         interrupts = <52>;
 178                                         dmacap,memcpy;
 179                                         dmacap,xor;
 180                                         dmacap,memset;
 181                                 };
 182                         };
 183
 184                         ethernet@70000 {
 185                                 compatible = "marvell,armada-xp-neta";
 186                         };
 187
 188                         ethernet@74000 {
 189                                 compatible = "marvell,armada-xp-neta";
 190                         };
 191
 192                         cesa: crypto@90000 {
 193                                 compatible = "marvell,armada-xp-crypto";
 194                                 reg = <0x90000 0x10000>;
 195                                 reg-names = "regs";
 196                                 interrupts = <48>, <49>;
 197                                 clocks = <&gateclk 23>, <&gateclk 23>;
 198                                 clock-names = "cesa0", "cesa1";
 199                                 marvell,crypto-srams = <&crypto_sram0>,
 200                                                        <&crypto_sram1>;
 201                                 marvell,crypto-sram-size = <0x800>;
 202                         };
 203
 204                         bm: bm@c0000 {
 205                                 compatible = "marvell,armada-380-neta-bm";
 206                                 reg = <0xc0000 0xac>;
 207                                 clocks = <&gateclk 13>;
 208                                 internal-mem = <&bm_bppi>;
 209                                 status = "disabled";
 210                         };
 211
 212                         xor0: xor@f0900 {
 213                                 compatible = "marvell,orion-xor";
 214                                 reg = <0xF0900 0x100
 215                                        0xF0B00 0x100>;
 216                                 clocks = <&gateclk 28>;
 217                                 status = "okay";
 218
 219                                 xor00 {
 220                                         interrupts = <94>;
 221                                         dmacap,memcpy;
 222                                         dmacap,xor;
 223                                 };
 224                                 xor01 {
 225                                         interrupts = <95>;
 226                                         dmacap,memcpy;
 227                                         dmacap,xor;
 228                                         dmacap,memset;
 229                                 };
 230                         };
 231                 };
 232
 233                 crypto_sram0: sa-sram0 {
 234                         compatible = "mmio-sram";
 235                         reg = <MBUS_ID(0x09, 0x09) 0 0x800>;
 236                         clocks = <&gateclk 23>;
 237                         #address-cells = <1>;
 238                         #size-cells = <1>;
 239                         ranges = <0 MBUS_ID(0x09, 0x09) 0 0x800>;
 240                 };
 241
 242                 crypto_sram1: sa-sram1 {
 243                         compatible = "mmio-sram";
 244                         reg = <MBUS_ID(0x09, 0x05) 0 0x800>;
 245                         clocks = <&gateclk 23>;
 246                         #address-cells = <1>;
 247                         #size-cells = <1>;
 248                         ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>;
 249                 };
 250
 251                 bm_bppi: bm-bppi {
 252                         compatible = "mmio-sram";
 253                         reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
 254                         ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
 255                         #address-cells = <1>;
 256                         #size-cells = <1>;
 257                         clocks = <&gateclk 13>;
 258                         no-memory-wc;
 259                         status = "disabled";
 260                 };
 261         };
 262
 263         clocks {
 264                 /* 25 MHz reference crystal */
 265                 refclk: oscillator {
 266                         compatible = "fixed-clock";
 267                         #clock-cells = <0>;
 268                         clock-frequency = <25000000>;
 269                 };
 270         };
 271 };
 272
 273 &i2c0 {
 274         compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
 275         reg = <0x11000 0x100>;
 276 };
 277
 278 &i2c1 {
 279         compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
 280         reg = <0x11100 0x100>;
 281 };
 282
 283 &mpic {
 284         reg = <0x20a00 0x2d0>, <0x21070 0x58>;
 285 };
 286
 287 &timer {
 288         compatible = "marvell,armada-xp-timer";
 289         clocks = <&coreclk 2>, <&refclk>;
 290         clock-names = "nbclk", "fixed";
 291 };
 292
 293 &watchdog {
 294         compatible = "marvell,armada-xp-wdt";
 295         clocks = <&coreclk 2>, <&refclk>;
 296         clock-names = "nbclk", "fixed";
 297 };
 298
 299 &cpurst {
 300         reg = <0x20800 0x20>;
 301 };
 302
 303 &usb0 {
 304         clocks = <&gateclk 18>;
 305 };
 306
 307 &usb1 {
 308         clocks = <&gateclk 19>;
 309 };
 310
 311 &pinctrl {
 312         ge0_gmii_pins: ge0-gmii-pins {
 313                 marvell,pins =
 314                      "mpp0",  "mpp1",  "mpp2",  "mpp3",
 315                      "mpp4",  "mpp5",  "mpp6",  "mpp7",
 316                      "mpp8",  "mpp9",  "mpp10", "mpp11",
 317                      "mpp12", "mpp13", "mpp14", "mpp15",
 318                      "mpp16", "mpp17", "mpp18", "mpp19",
 319                      "mpp20", "mpp21", "mpp22", "mpp23";
 320                 marvell,function = "ge0";
 321         };
 322
 323         ge0_rgmii_pins: ge0-rgmii-pins {
 324                 marvell,pins =
 325                      "mpp0", "mpp1", "mpp2", "mpp3",
 326                      "mpp4", "mpp5", "mpp6", "mpp7",
 327                      "mpp8", "mpp9", "mpp10", "mpp11";
 328                 marvell,function = "ge0";
 329         };
 330
 331         ge1_rgmii_pins: ge1-rgmii-pins {
 332                 marvell,pins =
 333                      "mpp12", "mpp13", "mpp14", "mpp15",
 334                      "mpp16", "mpp17", "mpp18", "mpp19",
 335                      "mpp20", "mpp21", "mpp22", "mpp23";
 336                 marvell,function = "ge1";
 337         };
 338
 339         sdio_pins: sdio-pins {
 340                 marvell,pins = "mpp30", "mpp31", "mpp32",
 341                                "mpp33", "mpp34", "mpp35";
 342                 marvell,function = "sd0";
 343         };
 344
 345         spi0_pins: spi0-pins {
 346                 marvell,pins = "mpp36", "mpp37",
 347                                "mpp38", "mpp39";
 348                 marvell,function = "spi0";
 349         };
 350
 351         spi1_pins: spi1-pins {
 352                 marvell,pins = "mpp13", "mpp14",
 353                                "mpp16", "mpp17";
 354                 marvell,function = "spi1";
 355         };
 356
 357         uart2_pins: uart2-pins {
 358                 marvell,pins = "mpp42", "mpp43";
 359                 marvell,function = "uart2";
 360         };
 361
 362         uart3_pins: uart3-pins {
 363                 marvell,pins = "mpp44", "mpp45";
 364                 marvell,function = "uart3";
 365         };
 366 };
 367
 368 &spi0 {
 369         compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
 370         pinctrl-0 = <&spi0_pins>;
 371         pinctrl-names = "default";
 372 };
 373
 374 &spi1 {
 375         compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
 376         pinctrl-0 = <&spi1_pins>;
 377         pinctrl-names = "default";
 378 };