arch/arm/boot/dts/dra72-evm.dts

   1 /*
   2  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8 /dts-v1/;
   9
  10 #include "dra72x.dtsi"
  11
  12 / {
  13         model = "TI DRA722";
  14         compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
  15
  16         memory {
  17                 device_type = "memory";
  18                 reg = <0x80000000 0x40000000>; /* 1024 MB */
  19         };
  20 };
  21
  22 &dra7_pmx_core {
  23         i2c1_pins: pinmux_i2c1_pins {
  24                 pinctrl-single,pins = <
  25                         0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
  26                         0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
  27                 >;
  28         };
  29
  30         nand_default: nand_default {
  31                 pinctrl-single,pins = <
  32                         0x0     (PIN_INPUT  | MUX_MODE0) /* gpmc_ad0 */
  33                         0x4     (PIN_INPUT  | MUX_MODE0) /* gpmc_ad1 */
  34                         0x8     (PIN_INPUT  | MUX_MODE0) /* gpmc_ad2 */
  35                         0xc     (PIN_INPUT  | MUX_MODE0) /* gpmc_ad3 */
  36                         0x10    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad4 */
  37                         0x14    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad5 */
  38                         0x18    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad6 */
  39                         0x1c    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad7 */
  40                         0x20    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad8 */
  41                         0x24    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad9 */
  42                         0x28    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad10 */
  43                         0x2c    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad11 */
  44                         0x30    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad12 */
  45                         0x34    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad13 */
  46                         0x38    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad14 */
  47                         0x3c    (PIN_INPUT  | MUX_MODE0) /* gpmc_ad15 */
  48                         0xb4    (PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
  49                         0xc4    (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
  50                         0xcc    (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
  51                         0xc8    (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
  52                         0xd0    (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
  53                         0xd8    (PIN_INPUT  | MUX_MODE0) /* gpmc_wait0 */
  54                 >;
  55         };
  56 };
  57
  58 &i2c1 {
  59         status = "okay";
  60         pinctrl-names = "default";
  61         pinctrl-0 = <&i2c1_pins>;
  62         clock-frequency = <400000>;
  63
  64         tps65917: tps65917@58 {
  65                 compatible = "ti,tps65917";
  66                 reg = <0x58>;
  67
  68                 interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>;  /* IRQ_SYS_1N */
  69                 interrupt-parent = <&gic>;
  70                 interrupt-controller;
  71                 #interrupt-cells = <2>;
  72
  73                 ti,system-power-controller;
  74
  75                 tps65917_pmic {
  76                         compatible = "ti,tps65917-pmic";
  77
  78                         regulators {
  79                                 smps1_reg: smps1 {
  80                                         /* VDD_MPU */
  81                                         regulator-name = "smps1";
  82                                         regulator-min-microvolt = <850000>;
  83                                         regulator-max-microvolt = <1250000>;
  84                                         regulator-always-on;
  85                                         regulator-boot-on;
  86                                 };
  87
  88                                 smps2_reg: smps2 {
  89                                         /* VDD_CORE */
  90                                         regulator-name = "smps2";
  91                                         regulator-min-microvolt = <850000>;
  92                                         regulator-max-microvolt = <1030000>;
  93                                         regulator-boot-on;
  94                                         regulator-always-on;
  95                                 };
  96
  97                                 smps3_reg: smps3 {
  98                                         /* VDD_GPU IVA DSPEVE */
  99                                         regulator-name = "smps3";
 100                                         regulator-min-microvolt = <850000>;
 101                                         regulator-max-microvolt = <1250000>;
 102                                         regulator-boot-on;
 103                                         regulator-always-on;
 104                                 };
 105
 106                                 smps4_reg: smps4 {
 107                                         /* VDDS1V8 */
 108                                         regulator-name = "smps4";
 109                                         regulator-min-microvolt = <1800000>;
 110                                         regulator-max-microvolt = <1800000>;
 111                                         regulator-always-on;
 112                                         regulator-boot-on;
 113                                 };
 114
 115                                 smps5_reg: smps5 {
 116                                         /* VDD_DDR */
 117                                         regulator-name = "smps5";
 118                                         regulator-min-microvolt = <1350000>;
 119                                         regulator-max-microvolt = <1350000>;
 120                                         regulator-boot-on;
 121                                         regulator-always-on;
 122                                 };
 123
 124                                 ldo1_reg: ldo1 {
 125                                         /* LDO1_OUT --> SDIO  */
 126                                         regulator-name = "ldo1";
 127                                         regulator-min-microvolt = <1800000>;
 128                                         regulator-max-microvolt = <3300000>;
 129                                         regulator-boot-on;
 130                                 };
 131
 132                                 ldo2_reg: ldo2 {
 133                                         /* LDO2_OUT --> TP1017 (UNUSED)  */
 134                                         regulator-name = "ldo2";
 135                                         regulator-min-microvolt = <1800000>;
 136                                         regulator-max-microvolt = <3300000>;
 137                                 };
 138
 139                                 ldo3_reg: ldo3 {
 140                                         /* VDDA_1V8_PHY */
 141                                         regulator-name = "ldo3";
 142                                         regulator-min-microvolt = <1800000>;
 143                                         regulator-max-microvolt = <1800000>;
 144                                         regulator-boot-on;
 145                                         regulator-always-on;
 146                                 };
 147
 148                                 ldo5_reg: ldo5 {
 149                                         /* VDDA_1V8_PLL */
 150                                         regulator-name = "ldo5";
 151                                         regulator-min-microvolt = <1800000>;
 152                                         regulator-max-microvolt = <1800000>;
 153                                         regulator-always-on;
 154                                         regulator-boot-on;
 155                                 };
 156
 157                                 ldo4_reg: ldo4 {
 158                                         /* VDDA_3V_USB: VDDA_USBHS33 */
 159                                         regulator-name = "ldo4";
 160                                         regulator-min-microvolt = <3300000>;
 161                                         regulator-max-microvolt = <3300000>;
 162                                         regulator-boot-on;
 163                                 };
 164                         };
 165                 };
 166         };
 167 };
 168
 169 &uart1 {
 170         status = "okay";
 171 };
 172
 173 &elm {
 174         status = "okay";
 175 };
 176
 177 &gpmc {
 178         status = "okay";
 179         pinctrl-names = "default";
 180         pinctrl-0 = <&nand_default>;
 181         ranges = <0 0 0 0x01000000>;    /* minimum GPMC partition = 16MB */
 182         nand@0,0 {
 183                 /* To use NAND, DIP switch SW5 must be set like so:
 184                  * SW5.1 (NAND_SELn) = ON (LOW)
 185                  * SW5.9 (GPMC_WPN) = OFF (HIGH)
 186                  */
 187                 reg = <0 0 4>;          /* device IO registers */
 188                 ti,nand-ecc-opt = "bch8";
 189                 ti,elm-id = <&elm>;
 190                 nand-bus-width = <16>;
 191                 gpmc,device-width = <2>;
 192                 gpmc,sync-clk-ps = <0>;
 193                 gpmc,cs-on-ns = <0>;
 194                 gpmc,cs-rd-off-ns = <80>;
 195                 gpmc,cs-wr-off-ns = <80>;
 196                 gpmc,adv-on-ns = <0>;
 197                 gpmc,adv-rd-off-ns = <60>;
 198                 gpmc,adv-wr-off-ns = <60>;
 199                 gpmc,we-on-ns = <10>;
 200                 gpmc,we-off-ns = <50>;
 201                 gpmc,oe-on-ns = <4>;
 202                 gpmc,oe-off-ns = <40>;
 203                 gpmc,access-ns = <40>;
 204                 gpmc,wr-access-ns = <80>;
 205                 gpmc,rd-cycle-ns = <80>;
 206                 gpmc,wr-cycle-ns = <80>;
 207                 gpmc,bus-turnaround-ns = <0>;
 208                 gpmc,cycle2cycle-delay-ns = <0>;
 209                 gpmc,clk-activation-ns = <0>;
 210                 gpmc,wait-monitoring-ns = <0>;
 211                 gpmc,wr-data-mux-bus-ns = <0>;
 212                 /* MTD partition table */
 213                 /* All SPL-* partitions are sized to minimal length
 214                  * which can be independently programmable. For
 215                  * NAND flash this is equal to size of erase-block */
 216                 #address-cells = <1>;
 217                 #size-cells = <1>;
 218                 partition@0 {
 219                         label = "NAND.SPL";
 220                         reg = <0x00000000 0x000020000>;
 221                 };
 222                 partition@1 {
 223                         label = "NAND.SPL.backup1";
 224                         reg = <0x00020000 0x00020000>;
 225                 };
 226                 partition@2 {
 227                         label = "NAND.SPL.backup2";
 228                         reg = <0x00040000 0x00020000>;
 229                 };
 230                 partition@3 {
 231                         label = "NAND.SPL.backup3";
 232                         reg = <0x00060000 0x00020000>;
 233                 };
 234                 partition@4 {
 235                         label = "NAND.u-boot-spl-os";
 236                         reg = <0x00080000 0x00040000>;
 237                 };
 238                 partition@5 {
 239                         label = "NAND.u-boot";
 240                         reg = <0x000c0000 0x00100000>;
 241                 };
 242                 partition@6 {
 243                         label = "NAND.u-boot-env";
 244                         reg = <0x001c0000 0x00020000>;
 245                 };
 246                 partition@7 {
 247                         label = "NAND.u-boot-env.backup1";
 248                         reg = <0x001e0000 0x00020000>;
 249                 };
 250                 partition@8 {
 251                         label = "NAND.kernel";
 252                         reg = <0x00200000 0x00800000>;
 253                 };
 254                 partition@9 {
 255                         label = "NAND.file-system";
 256                         reg = <0x00a00000 0x0f600000>;
 257                 };
 258         };
 259 };