arch/arm/boot/dts/omap4-l4.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 &l4_cfg {                                               /* 0x4a000000 */
   3         compatible = "ti,omap4-l4-cfg", "simple-bus";
   4         reg = <0x4a000000 0x800>,
   5               <0x4a000800 0x800>,
   6               <0x4a001000 0x1000>;
   7         reg-names = "ap", "la", "ia0";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  11                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  12                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  13                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  14                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  15                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  16                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  17
  18         segment@0 {                                     /* 0x4a000000 */
  19                 compatible = "simple-bus";
  20                 #address-cells = <1>;
  21                 #size-cells = <1>;
  22                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  23                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  24                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  25                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  26                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  27                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  28                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  29                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  30                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  31                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  32                          <0x00058000 0x00058000 0x004000>,      /* ap 10 */
  33                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  34                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  35                          <0x00008000 0x00008000 0x002000>,      /* ap 23 */
  36                          <0x0000a000 0x0000a000 0x001000>,      /* ap 24 */
  37                          <0x00066000 0x00066000 0x001000>,      /* ap 25 */
  38                          <0x00067000 0x00067000 0x001000>,      /* ap 26 */
  39                          <0x0005e000 0x0005e000 0x002000>,      /* ap 80 */
  40                          <0x00060000 0x00060000 0x001000>,      /* ap 81 */
  41                          <0x00064000 0x00064000 0x001000>,      /* ap 86 */
  42                          <0x00065000 0x00065000 0x001000>;      /* ap 87 */
  43
  44                 target-module@2000 {                    /* 0x4a002000, ap 3 06.0 */
  45                         compatible = "ti,sysc-omap4", "ti,sysc";
  46                         ti,hwmods = "ctrl_module_core";
  47                         reg = <0x2000 0x4>,
  48                               <0x2010 0x4>;
  49                         reg-names = "rev", "sysc";
  50                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
  51                                         <SYSC_IDLE_NO>,
  52                                         <SYSC_IDLE_SMART>,
  53                                         <SYSC_IDLE_SMART_WKUP>;
  54                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         ranges = <0x0 0x2000 0x1000>;
  58
  59                         omap4_scm_core: scm@0 {
  60                                 compatible = "ti,omap4-scm-core", "simple-bus";
  61                                 reg = <0x0 0x1000>;
  62                                 #address-cells = <1>;
  63                                 #size-cells = <1>;
  64                                 ranges = <0 0 0x1000>;
  65
  66                                 scm_conf: scm_conf@0 {
  67                                         compatible = "syscon";
  68                                         reg = <0x0 0x800>;
  69                                         #address-cells = <1>;
  70                                         #size-cells = <1>;
  71                                 };
  72
  73                                 omap_control_usb2phy: control-phy@300 {
  74                                         compatible = "ti,control-phy-usb2";
  75                                         reg = <0x300 0x4>;
  76                                         reg-names = "power";
  77                                 };
  78
  79                                 omap_control_usbotg: control-phy@33c {
  80                                         compatible = "ti,control-phy-otghs";
  81                                         reg = <0x33c 0x4>;
  82                                         reg-names = "otghs_control";
  83                                 };
  84                         };
  85                 };
  86
  87                 target-module@4000 {                    /* 0x4a004000, ap 5 02.0 */
  88                         compatible = "ti,sysc-omap4", "ti,sysc";
  89                         reg = <0x4000 0x4>;
  90                         reg-names = "rev";
  91                         #address-cells = <1>;
  92                         #size-cells = <1>;
  93                         ranges = <0x0 0x4000 0x1000>;
  94
  95                         cm1: cm1@0 {
  96                                 compatible = "ti,omap4-cm1", "simple-bus";
  97                                 reg = <0x0 0x2000>;
  98                                 #address-cells = <1>;
  99                                 #size-cells = <1>;
 100                                 ranges = <0 0 0x2000>;
 101
 102                                 cm1_clocks: clocks {
 103                                         #address-cells = <1>;
 104                                         #size-cells = <0>;
 105                                 };
 106
 107                                 cm1_clockdomains: clockdomains {
 108                                 };
 109                         };
 110                 };
 111
 112                 target-module@8000 {                    /* 0x4a008000, ap 23 32.0 */
 113                         compatible = "ti,sysc-omap4", "ti,sysc";
 114                         reg = <0x8000 0x4>;
 115                         reg-names = "rev";
 116                         #address-cells = <1>;
 117                         #size-cells = <1>;
 118                         ranges = <0x0 0x8000 0x2000>;
 119
 120                         cm2: cm2@0 {
 121                                 compatible = "ti,omap4-cm2", "simple-bus";
 122                                 reg = <0x0 0x2000>;
 123                                 #address-cells = <1>;
 124                                 #size-cells = <1>;
 125                                 ranges = <0 0 0x2000>;
 126
 127                                 cm2_clocks: clocks {
 128                                         #address-cells = <1>;
 129                                         #size-cells = <0>;
 130                                 };
 131
 132                                 cm2_clockdomains: clockdomains {
 133                                 };
 134                         };
 135                 };
 136
 137                 target-module@56000 {                   /* 0x4a056000, ap 7 0a.0 */
 138                         compatible = "ti,sysc-omap2", "ti,sysc";
 139                         ti,hwmods = "dma_system";
 140                         reg = <0x56000 0x4>,
 141                               <0x5602c 0x4>,
 142                               <0x56028 0x4>;
 143                         reg-names = "rev", "sysc", "syss";
 144                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 145                                          SYSC_OMAP2_EMUFREE |
 146                                          SYSC_OMAP2_SOFTRESET |
 147                                          SYSC_OMAP2_AUTOIDLE)>;
 148                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 149                                         <SYSC_IDLE_NO>,
 150                                         <SYSC_IDLE_SMART>;
 151                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 152                                         <SYSC_IDLE_NO>,
 153                                         <SYSC_IDLE_SMART>;
 154                         ti,syss-mask = <1>;
 155                         /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */
 156                         clocks = <&l3_dma_clkctrl OMAP4_DMA_SYSTEM_CLKCTRL 0>;
 157                         clock-names = "fck";
 158                         #address-cells = <1>;
 159                         #size-cells = <1>;
 160                         ranges = <0x0 0x56000 0x1000>;
 161
 162                         sdma: dma-controller@0 {
 163                                 compatible = "ti,omap4430-sdma";
 164                                 reg = <0x0 0x1000>;
 165                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 166                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 167                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 168                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 169                                 #dma-cells = <1>;
 170                                 dma-channels = <32>;
 171                                 dma-requests = <127>;
 172                         };
 173                 };
 174
 175                 target-module@58000 {                   /* 0x4a058000, ap 10 0e.0 */
 176                         compatible = "ti,sysc-omap2", "ti,sysc";
 177                         ti,hwmods = "hsi";
 178                         reg = <0x58000 0x4>,
 179                               <0x58010 0x4>,
 180                               <0x58014 0x4>;
 181                         reg-names = "rev", "sysc", "syss";
 182                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 183                                          SYSC_OMAP2_SOFTRESET |
 184                                          SYSC_OMAP2_AUTOIDLE)>;
 185                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 186                                         <SYSC_IDLE_NO>,
 187                                         <SYSC_IDLE_SMART>,
 188                                         <SYSC_IDLE_SMART_WKUP>;
 189                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 190                                         <SYSC_IDLE_NO>,
 191                                         <SYSC_IDLE_SMART>,
 192                                         <SYSC_IDLE_SMART_WKUP>;
 193                         ti,syss-mask = <1>;
 194                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 195                         clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 196                         clock-names = "fck";
 197                         #address-cells = <1>;
 198                         #size-cells = <1>;
 199                         ranges = <0x0 0x58000 0x5000>;
 200
 201                         hsi: hsi@0 {
 202                                 compatible = "ti,omap4-hsi";
 203                                 reg = <0x0 0x4000>,
 204                                       <0x5000 0x1000>;
 205                                 reg-names = "sys", "gdd";
 206
 207                                 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 208                                 clock-names = "hsi_fck";
 209
 210                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 211                                 interrupt-names = "gdd_mpu";
 212
 213                                 #address-cells = <1>;
 214                                 #size-cells = <1>;
 215                                 ranges = <0 0 0x4000>;
 216
 217                                 hsi_port1: hsi-port@2000 {
 218                                         compatible = "ti,omap4-hsi-port";
 219                                         reg = <0x2000 0x800>,
 220                                               <0x2800 0x800>;
 221                                         reg-names = "tx", "rx";
 222                                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 223                                 };
 224
 225                                 hsi_port2: hsi-port@3000 {
 226                                         compatible = "ti,omap4-hsi-port";
 227                                         reg = <0x3000 0x800>,
 228                                               <0x3800 0x800>;
 229                                         reg-names = "tx", "rx";
 230                                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 231                                 };
 232                         };
 233                 };
 234
 235                 target-module@5e000 {                   /* 0x4a05e000, ap 80 68.0 */
 236                         compatible = "ti,sysc";
 237                         status = "disabled";
 238                         #address-cells = <1>;
 239                         #size-cells = <1>;
 240                         ranges = <0x0 0x5e000 0x2000>;
 241                 };
 242
 243                 target-module@62000 {                   /* 0x4a062000, ap 11 16.0 */
 244                         compatible = "ti,sysc-omap2", "ti,sysc";
 245                         ti,hwmods = "usb_tll_hs";
 246                         reg = <0x62000 0x4>,
 247                               <0x62010 0x4>,
 248                               <0x62014 0x4>;
 249                         reg-names = "rev", "sysc", "syss";
 250                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 251                                          SYSC_OMAP2_ENAWAKEUP |
 252                                          SYSC_OMAP2_SOFTRESET |
 253                                          SYSC_OMAP2_AUTOIDLE)>;
 254                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 255                                         <SYSC_IDLE_NO>,
 256                                         <SYSC_IDLE_SMART>;
 257                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 258                         clocks = <&l3_init_clkctrl OMAP4_USB_TLL_HS_CLKCTRL 0>;
 259                         clock-names = "fck";
 260                         #address-cells = <1>;
 261                         #size-cells = <1>;
 262                         ranges = <0x0 0x62000 0x1000>;
 263
 264                         usbhstll: usbhstll@0 {
 265                                 compatible = "ti,usbhs-tll";
 266                                 reg = <0x0 0x1000>;
 267                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 268                         };
 269                 };
 270
 271                 target-module@64000 {                   /* 0x4a064000, ap 86 1e.0 */
 272                         compatible = "ti,sysc-omap4", "ti,sysc";
 273                         ti,hwmods = "usb_host_hs";
 274                         reg = <0x64000 0x4>,
 275                               <0x64010 0x4>,
 276                               <0x64014 0x4>;
 277                         reg-names = "rev", "sysc", "syss";
 278                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 279                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 280                                         <SYSC_IDLE_NO>,
 281                                         <SYSC_IDLE_SMART>,
 282                                         <SYSC_IDLE_SMART_WKUP>;
 283                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 284                                         <SYSC_IDLE_NO>,
 285                                         <SYSC_IDLE_SMART>,
 286                                         <SYSC_IDLE_SMART_WKUP>;
 287                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 288                         clocks = <&l3_init_clkctrl OMAP4_USB_HOST_HS_CLKCTRL 0>;
 289                         clock-names = "fck";
 290                         #address-cells = <1>;
 291                         #size-cells = <1>;
 292                         ranges = <0x0 0x64000 0x1000>;
 293
 294                         usbhshost: usbhshost@0 {
 295                                 compatible = "ti,usbhs-host";
 296                                 reg = <0x0 0x800>;
 297                                 #address-cells = <1>;
 298                                 #size-cells = <1>;
 299                                 ranges = <0 0 0x1000>;
 300                                 clocks = <&init_60m_fclk>,
 301                                          <&xclk60mhsp1_ck>,
 302                                          <&xclk60mhsp2_ck>;
 303                                 clock-names = "refclk_60m_int",
 304                                               "refclk_60m_ext_p1",
 305                                               "refclk_60m_ext_p2";
 306
 307                                 usbhsohci: ohci@800 {
 308                                         compatible = "ti,ohci-omap3";
 309                                         reg = <0x800 0x400>;
 310                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 311                                         remote-wakeup-connected;
 312                                 };
 313
 314                                 usbhsehci: ehci@c00 {
 315                                         compatible = "ti,ehci-omap";
 316                                         reg = <0xc00 0x400>;
 317                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 318                                 };
 319                         };
 320                 };
 321
 322                 target-module@66000 {                   /* 0x4a066000, ap 25 26.0 */
 323                         compatible = "ti,sysc-omap2", "ti,sysc";
 324                         ti,hwmods = "mmu_dsp";
 325                         reg = <0x66000 0x4>,
 326                               <0x66010 0x4>,
 327                               <0x66014 0x4>;
 328                         reg-names = "rev", "sysc", "syss";
 329                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 330                                          SYSC_OMAP2_SOFTRESET |
 331                                          SYSC_OMAP2_AUTOIDLE)>;
 332                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 333                                         <SYSC_IDLE_NO>,
 334                                         <SYSC_IDLE_SMART>;
 335                         /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */
 336                         clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
 337                         clock-names = "fck";
 338                         #address-cells = <1>;
 339                         #size-cells = <1>;
 340                         ranges = <0x0 0x66000 0x1000>;
 341
 342                         /* mmu_dsp cannot be moved before reset driver */
 343                         status = "disabled";
 344                 };
 345         };
 346
 347         segment@80000 {                                 /* 0x4a080000 */
 348                 compatible = "simple-bus";
 349                 #address-cells = <1>;
 350                 #size-cells = <1>;
 351                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 352                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 353                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 354                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 355                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 356                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 357                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 358                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 359                          <0x00074000 0x000f4000 0x001000>,      /* ap 27 */
 360                          <0x00075000 0x000f5000 0x001000>,      /* ap 28 */
 361                          <0x00076000 0x000f6000 0x001000>,      /* ap 29 */
 362                          <0x00077000 0x000f7000 0x001000>,      /* ap 30 */
 363                          <0x00036000 0x000b6000 0x001000>,      /* ap 69 */
 364                          <0x00037000 0x000b7000 0x001000>,      /* ap 70 */
 365                          <0x0004d000 0x000cd000 0x001000>,      /* ap 78 */
 366                          <0x0004e000 0x000ce000 0x001000>,      /* ap 79 */
 367                          <0x00029000 0x000a9000 0x001000>,      /* ap 82 */
 368                          <0x0002a000 0x000aa000 0x001000>,      /* ap 83 */
 369                          <0x0002b000 0x000ab000 0x001000>,      /* ap 84 */
 370                          <0x0002c000 0x000ac000 0x001000>,      /* ap 85 */
 371                          <0x0002d000 0x000ad000 0x001000>,      /* ap 88 */
 372                          <0x0002e000 0x000ae000 0x001000>;      /* ap 89 */
 373
 374                 target-module@29000 {                   /* 0x4a0a9000, ap 82 04.0 */
 375                         compatible = "ti,sysc";
 376                         status = "disabled";
 377                         #address-cells = <1>;
 378                         #size-cells = <1>;
 379                         ranges = <0x0 0x29000 0x1000>;
 380                 };
 381
 382                 target-module@2b000 {                   /* 0x4a0ab000, ap 84 12.0 */
 383                         compatible = "ti,sysc-omap2", "ti,sysc";
 384                         reg = <0x2b400 0x4>,
 385                               <0x2b404 0x4>,
 386                               <0x2b408 0x4>;
 387                         reg-names = "rev", "sysc", "syss";
 388                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 389                                          SYSC_OMAP2_SOFTRESET |
 390                                          SYSC_OMAP2_AUTOIDLE)>;
 391                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 392                                         <SYSC_IDLE_NO>,
 393                                         <SYSC_IDLE_SMART>;
 394                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 395                                         <SYSC_IDLE_NO>,
 396                                         <SYSC_IDLE_SMART>,
 397                                         <SYSC_IDLE_SMART_WKUP>;
 398                         ti,syss-mask = <1>;
 399                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 400                         clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
 401                         clock-names = "fck";
 402                         #address-cells = <1>;
 403                         #size-cells = <1>;
 404                         ranges = <0x0 0x2b000 0x1000>;
 405
 406                         usb_otg_hs: usb_otg_hs@0 {
 407                                 compatible = "ti,omap4-musb";
 408                                 reg = <0x0 0x7ff>;
 409                                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 410                                 interrupt-names = "mc", "dma";
 411                                 usb-phy = <&usb2_phy>;
 412                                 phys = <&usb2_phy>;
 413                                 phy-names = "usb2-phy";
 414                                 multipoint = <1>;
 415                                 num-eps = <16>;
 416                                 ram-bits = <12>;
 417                                 ctrl-module = <&omap_control_usbotg>;
 418                         };
 419                 };
 420
 421                 target-module@2d000 {                   /* 0x4a0ad000, ap 88 0c.0 */
 422                         compatible = "ti,sysc-omap2", "ti,sysc";
 423                         ti,hwmods = "ocp2scp_usb_phy";
 424                         reg = <0x2d000 0x4>,
 425                               <0x2d010 0x4>,
 426                               <0x2d014 0x4>;
 427                         reg-names = "rev", "sysc", "syss";
 428                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 429                                          SYSC_OMAP2_AUTOIDLE)>;
 430                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 431                                         <SYSC_IDLE_NO>,
 432                                         <SYSC_IDLE_SMART>;
 433                         ti,syss-mask = <1>;
 434                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 435                         clocks = <&l3_init_clkctrl OMAP4_OCP2SCP_USB_PHY_CLKCTRL 0>;
 436                         clock-names = "fck";
 437                         #address-cells = <1>;
 438                         #size-cells = <1>;
 439                         ranges = <0x0 0x2d000 0x1000>;
 440
 441                         ocp2scp@0 {
 442                                 compatible = "ti,omap-ocp2scp";
 443                                 reg = <0x0 0x1f>;
 444                                 #address-cells = <1>;
 445                                 #size-cells = <1>;
 446                                 ranges = <0 0 0x1000>;
 447                                 usb2_phy: usb2phy@80 {
 448                                         compatible = "ti,omap-usb2";
 449                                         reg = <0x80 0x58>;
 450                                         ctrl-module = <&omap_control_usb2phy>;
 451                                         clocks = <&usb_phy_cm_clk32k>;
 452                                         clock-names = "wkupclk";
 453                                         #phy-cells = <0>;
 454                                 };
 455                         };
 456                 };
 457
 458                 /* d2d mdm */
 459                 target-module@36000 {                   /* 0x4a0b6000, ap 69 60.0 */
 460                         compatible = "ti,sysc-omap2", "ti,sysc";
 461                         reg = <0x36000 0x4>,
 462                               <0x36010 0x4>,
 463                               <0x36014 0x4>;
 464                         reg-names = "rev", "sysc", "syss";
 465                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 466                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 467                                         <SYSC_IDLE_NO>,
 468                                         <SYSC_IDLE_SMART>,
 469                                         <SYSC_IDLE_SMART_WKUP>;
 470                         ti,syss-mask = <1>;
 471                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 472                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 473                         clock-names = "fck";
 474                         #address-cells = <1>;
 475                         #size-cells = <1>;
 476                         ranges = <0x0 0x36000 0x1000>;
 477                 };
 478
 479                 /* d2d mpu */
 480                 target-module@4d000 {                   /* 0x4a0cd000, ap 78 58.0 */
 481                         compatible = "ti,sysc-omap2", "ti,sysc";
 482                         reg = <0x4d000 0x4>,
 483                               <0x4d010 0x4>,
 484                               <0x4d014 0x4>;
 485                         reg-names = "rev", "sysc", "syss";
 486                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 487                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 488                                         <SYSC_IDLE_NO>,
 489                                         <SYSC_IDLE_SMART>,
 490                                         <SYSC_IDLE_SMART_WKUP>;
 491                         ti,syss-mask = <1>;
 492                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 493                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 494                         clock-names = "fck";
 495                         #address-cells = <1>;
 496                         #size-cells = <1>;
 497                         ranges = <0x0 0x4d000 0x1000>;
 498                 };
 499
 500                 target-module@59000 {                   /* 0x4a0d9000, ap 13 1a.0 */
 501                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 502                         ti,hwmods = "smartreflex_mpu";
 503                         reg = <0x59038 0x4>;
 504                         reg-names = "sysc";
 505                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 506                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 507                                         <SYSC_IDLE_NO>,
 508                                         <SYSC_IDLE_SMART>,
 509                                         <SYSC_IDLE_SMART_WKUP>;
 510                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 511                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
 512                         clock-names = "fck";
 513                         #address-cells = <1>;
 514                         #size-cells = <1>;
 515                         ranges = <0x0 0x59000 0x1000>;
 516
 517                         smartreflex_mpu: smartreflex@0 {
 518                                 compatible = "ti,omap4-smartreflex-mpu";
 519                                 reg = <0x0 0x80>;
 520                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 521                         };
 522                 };
 523
 524                 target-module@5b000 {                   /* 0x4a0db000, ap 15 08.0 */
 525                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 526                         ti,hwmods = "smartreflex_iva";
 527                         reg = <0x5b038 0x4>;
 528                         reg-names = "sysc";
 529                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 530                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 531                                         <SYSC_IDLE_NO>,
 532                                         <SYSC_IDLE_SMART>,
 533                                         <SYSC_IDLE_SMART_WKUP>;
 534                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 535                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
 536                         clock-names = "fck";
 537                         #address-cells = <1>;
 538                         #size-cells = <1>;
 539                         ranges = <0x0 0x5b000 0x1000>;
 540
 541                         smartreflex_iva: smartreflex@0 {
 542                                 compatible = "ti,omap4-smartreflex-iva";
 543                                 reg = <0x0 0x80>;
 544                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 545                         };
 546                 };
 547
 548                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 22.0 */
 549                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 550                         ti,hwmods = "smartreflex_core";
 551                         reg = <0x5d038 0x4>;
 552                         reg-names = "sysc";
 553                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 554                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 555                                         <SYSC_IDLE_NO>,
 556                                         <SYSC_IDLE_SMART>,
 557                                         <SYSC_IDLE_SMART_WKUP>;
 558                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 559                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
 560                         clock-names = "fck";
 561                         #address-cells = <1>;
 562                         #size-cells = <1>;
 563                         ranges = <0x0 0x5d000 0x1000>;
 564
 565                         smartreflex_core: smartreflex@0 {
 566                                 compatible = "ti,omap4-smartreflex-core";
 567                                 reg = <0x0 0x80>;
 568                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 569                         };
 570                 };
 571
 572                 target-module@60000 {                   /* 0x4a0e0000, ap 19 1c.0 */
 573                         compatible = "ti,sysc";
 574                         status = "disabled";
 575                         #address-cells = <1>;
 576                         #size-cells = <1>;
 577                         ranges = <0x0 0x60000 0x1000>;
 578                 };
 579
 580                 target-module@74000 {                   /* 0x4a0f4000, ap 27 24.0 */
 581                         compatible = "ti,sysc-omap4", "ti,sysc";
 582                         reg = <0x74000 0x4>,
 583                               <0x74010 0x4>;
 584                         reg-names = "rev", "sysc";
 585                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 586                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 587                                         <SYSC_IDLE_NO>,
 588                                         <SYSC_IDLE_SMART>;
 589                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 590                         clocks = <&l4_cfg_clkctrl OMAP4_MAILBOX_CLKCTRL 0>;
 591                         clock-names = "fck";
 592                         #address-cells = <1>;
 593                         #size-cells = <1>;
 594                         ranges = <0x0 0x74000 0x1000>;
 595
 596                         mailbox: mailbox@0 {
 597                                 compatible = "ti,omap4-mailbox";
 598                                 reg = <0x0 0x200>;
 599                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 600                                 #mbox-cells = <1>;
 601                                 ti,mbox-num-users = <3>;
 602                                 ti,mbox-num-fifos = <8>;
 603                                 mbox_ipu: mbox_ipu {
 604                                         ti,mbox-tx = <0 0 0>;
 605                                         ti,mbox-rx = <1 0 0>;
 606                                 };
 607                                 mbox_dsp: mbox_dsp {
 608                                         ti,mbox-tx = <3 0 0>;
 609                                         ti,mbox-rx = <2 0 0>;
 610                                 };
 611                         };
 612                 };
 613
 614                 target-module@76000 {                   /* 0x4a0f6000, ap 29 3a.0 */
 615                         compatible = "ti,sysc-omap2", "ti,sysc";
 616                         ti,hwmods = "spinlock";
 617                         reg = <0x76000 0x4>,
 618                               <0x76010 0x4>,
 619                               <0x76014 0x4>;
 620                         reg-names = "rev", "sysc", "syss";
 621                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 622                                          SYSC_OMAP2_ENAWAKEUP |
 623                                          SYSC_OMAP2_SOFTRESET |
 624                                          SYSC_OMAP2_AUTOIDLE)>;
 625                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 626                                         <SYSC_IDLE_NO>,
 627                                         <SYSC_IDLE_SMART>;
 628                         ti,syss-mask = <1>;
 629                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 630                         clocks = <&l4_cfg_clkctrl OMAP4_SPINLOCK_CLKCTRL 0>;
 631                         clock-names = "fck";
 632                         #address-cells = <1>;
 633                         #size-cells = <1>;
 634                         ranges = <0x0 0x76000 0x1000>;
 635
 636                         hwspinlock: spinlock@0 {
 637                                 compatible = "ti,omap4-hwspinlock";
 638                                 reg = <0x0 0x1000>;
 639                                 #hwlock-cells = <1>;
 640                         };
 641                 };
 642         };
 643
 644         segment@100000 {                                        /* 0x4a100000 */
 645                 compatible = "simple-bus";
 646                 #address-cells = <1>;
 647                 #size-cells = <1>;
 648                 ranges = <0x00000000 0x00100000 0x001000>,      /* ap 21 */
 649                          <0x00001000 0x00101000 0x001000>,      /* ap 22 */
 650                          <0x00002000 0x00102000 0x001000>,      /* ap 61 */
 651                          <0x00003000 0x00103000 0x001000>,      /* ap 62 */
 652                          <0x00008000 0x00108000 0x001000>,      /* ap 63 */
 653                          <0x00009000 0x00109000 0x001000>,      /* ap 64 */
 654                          <0x0000a000 0x0010a000 0x001000>,      /* ap 65 */
 655                          <0x0000b000 0x0010b000 0x001000>;      /* ap 66 */
 656
 657                 target-module@0 {                       /* 0x4a100000, ap 21 2a.0 */
 658                         compatible = "ti,sysc-omap4", "ti,sysc";
 659                         ti,hwmods = "ctrl_module_pad_core";
 660                         reg = <0x0 0x4>,
 661                               <0x10 0x4>;
 662                         reg-names = "rev", "sysc";
 663                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 664                                         <SYSC_IDLE_NO>,
 665                                         <SYSC_IDLE_SMART>,
 666                                         <SYSC_IDLE_SMART_WKUP>;
 667                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 668                         #address-cells = <1>;
 669                         #size-cells = <1>;
 670                         ranges = <0x0 0x0 0x1000>;
 671
 672                         omap4_pmx_core: pinmux@40 {
 673                                 compatible = "ti,omap4-padconf",
 674                                              "pinctrl-single";
 675                                 reg = <0x40 0x0196>;
 676                                 #address-cells = <1>;
 677                                 #size-cells = <0>;
 678                                 #pinctrl-cells = <1>;
 679                                 #interrupt-cells = <1>;
 680                                 interrupt-controller;
 681                                 pinctrl-single,register-width = <16>;
 682                                 pinctrl-single,function-mask = <0x7fff>;
 683                         };
 684
 685                         omap4_padconf_global: omap4_padconf_global@5a0 {
 686                                 compatible = "syscon",
 687                                              "simple-bus";
 688                                 reg = <0x5a0 0x170>;
 689                                 #address-cells = <1>;
 690                                 #size-cells = <1>;
 691                                 ranges = <0 0x5a0 0x170>;
 692
 693                                 pbias_regulator: pbias_regulator@60 {
 694                                         compatible = "ti,pbias-omap4", "ti,pbias-omap";
 695                                         reg = <0x60 0x4>;
 696                                         syscon = <&omap4_padconf_global>;
 697                                         pbias_mmc_reg: pbias_mmc_omap4 {
 698                                                 regulator-name = "pbias_mmc_omap4";
 699                                                 regulator-min-microvolt = <1800000>;
 700                                                 regulator-max-microvolt = <3000000>;
 701                                         };
 702                                 };
 703                         };
 704                 };
 705
 706                 target-module@2000 {                    /* 0x4a102000, ap 61 3c.0 */
 707                         compatible = "ti,sysc";
 708                         status = "disabled";
 709                         #address-cells = <1>;
 710                         #size-cells = <1>;
 711                         ranges = <0x0 0x2000 0x1000>;
 712                 };
 713
 714                 target-module@8000 {                    /* 0x4a108000, ap 63 62.0 */
 715                         compatible = "ti,sysc";
 716                         status = "disabled";
 717                         #address-cells = <1>;
 718                         #size-cells = <1>;
 719                         ranges = <0x0 0x8000 0x1000>;
 720                 };
 721
 722                 target-module@a000 {                    /* 0x4a10a000, ap 65 50.0 */
 723                         compatible = "ti,sysc-omap4", "ti,sysc";
 724                         ti,hwmods = "fdif";
 725                         reg = <0xa000 0x4>,
 726                               <0xa010 0x4>;
 727                         reg-names = "rev", "sysc";
 728                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 729                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 730                                         <SYSC_IDLE_NO>,
 731                                         <SYSC_IDLE_SMART>;
 732                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 733                                         <SYSC_IDLE_NO>,
 734                                         <SYSC_IDLE_SMART>;
 735                         ti,sysc-delay-us = <2>;
 736                         /* Domains (V, P, C): core, cam_pwrdm, iss_clkdm */
 737                         clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
 738                         clock-names = "fck";
 739                         #address-cells = <1>;
 740                         #size-cells = <1>;
 741                         ranges = <0x0 0xa000 0x1000>;
 742
 743                         /* No child device binding or driver in mainline */
 744                 };
 745         };
 746
 747         segment@180000 {                                        /* 0x4a180000 */
 748                 compatible = "simple-bus";
 749                 #address-cells = <1>;
 750                 #size-cells = <1>;
 751         };
 752
 753         segment@200000 {                                        /* 0x4a200000 */
 754                 compatible = "simple-bus";
 755                 #address-cells = <1>;
 756                 #size-cells = <1>;
 757                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 31 */
 758                          <0x0001f000 0x0021f000 0x001000>,      /* ap 32 */
 759                          <0x0000a000 0x0020a000 0x001000>,      /* ap 33 */
 760                          <0x0000b000 0x0020b000 0x001000>,      /* ap 34 */
 761                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 762                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 763                          <0x00006000 0x00206000 0x001000>,      /* ap 37 */
 764                          <0x00007000 0x00207000 0x001000>,      /* ap 38 */
 765                          <0x00012000 0x00212000 0x001000>,      /* ap 39 */
 766                          <0x00013000 0x00213000 0x001000>,      /* ap 40 */
 767                          <0x0000c000 0x0020c000 0x001000>,      /* ap 41 */
 768                          <0x0000d000 0x0020d000 0x001000>,      /* ap 42 */
 769                          <0x00010000 0x00210000 0x001000>,      /* ap 43 */
 770                          <0x00011000 0x00211000 0x001000>,      /* ap 44 */
 771                          <0x00016000 0x00216000 0x001000>,      /* ap 45 */
 772                          <0x00017000 0x00217000 0x001000>,      /* ap 46 */
 773                          <0x00014000 0x00214000 0x001000>,      /* ap 47 */
 774                          <0x00015000 0x00215000 0x001000>,      /* ap 48 */
 775                          <0x00018000 0x00218000 0x001000>,      /* ap 49 */
 776                          <0x00019000 0x00219000 0x001000>,      /* ap 50 */
 777                          <0x00020000 0x00220000 0x001000>,      /* ap 51 */
 778                          <0x00021000 0x00221000 0x001000>,      /* ap 52 */
 779                          <0x00026000 0x00226000 0x001000>,      /* ap 53 */
 780                          <0x00027000 0x00227000 0x001000>,      /* ap 54 */
 781                          <0x00028000 0x00228000 0x001000>,      /* ap 55 */
 782                          <0x00029000 0x00229000 0x001000>,      /* ap 56 */
 783                          <0x0002a000 0x0022a000 0x001000>,      /* ap 57 */
 784                          <0x0002b000 0x0022b000 0x001000>,      /* ap 58 */
 785                          <0x0001c000 0x0021c000 0x001000>,      /* ap 59 */
 786                          <0x0001d000 0x0021d000 0x001000>;      /* ap 60 */
 787
 788                 target-module@4000 {                    /* 0x4a204000, ap 35 42.0 */
 789                         compatible = "ti,sysc";
 790                         status = "disabled";
 791                         #address-cells = <1>;
 792                         #size-cells = <1>;
 793                         ranges = <0x0 0x4000 0x1000>;
 794                 };
 795
 796                 target-module@6000 {                    /* 0x4a206000, ap 37 4a.0 */
 797                         compatible = "ti,sysc";
 798                         status = "disabled";
 799                         #address-cells = <1>;
 800                         #size-cells = <1>;
 801                         ranges = <0x0 0x6000 0x1000>;
 802                 };
 803
 804                 target-module@a000 {                    /* 0x4a20a000, ap 33 2c.0 */
 805                         compatible = "ti,sysc";
 806                         status = "disabled";
 807                         #address-cells = <1>;
 808                         #size-cells = <1>;
 809                         ranges = <0x0 0xa000 0x1000>;
 810                 };
 811
 812                 target-module@c000 {                    /* 0x4a20c000, ap 41 20.0 */
 813                         compatible = "ti,sysc";
 814                         status = "disabled";
 815                         #address-cells = <1>;
 816                         #size-cells = <1>;
 817                         ranges = <0x0 0xc000 0x1000>;
 818                 };
 819
 820                 target-module@10000 {                   /* 0x4a210000, ap 43 52.0 */
 821                         compatible = "ti,sysc";
 822                         status = "disabled";
 823                         #address-cells = <1>;
 824                         #size-cells = <1>;
 825                         ranges = <0x0 0x10000 0x1000>;
 826                 };
 827
 828                 target-module@12000 {                   /* 0x4a212000, ap 39 18.0 */
 829                         compatible = "ti,sysc";
 830                         status = "disabled";
 831                         #address-cells = <1>;
 832                         #size-cells = <1>;
 833                         ranges = <0x0 0x12000 0x1000>;
 834                 };
 835
 836                 target-module@14000 {                   /* 0x4a214000, ap 47 30.0 */
 837                         compatible = "ti,sysc";
 838                         status = "disabled";
 839                         #address-cells = <1>;
 840                         #size-cells = <1>;
 841                         ranges = <0x0 0x14000 0x1000>;
 842                 };
 843
 844                 target-module@16000 {                   /* 0x4a216000, ap 45 28.0 */
 845                         compatible = "ti,sysc";
 846                         status = "disabled";
 847                         #address-cells = <1>;
 848                         #size-cells = <1>;
 849                         ranges = <0x0 0x16000 0x1000>;
 850                 };
 851
 852                 target-module@18000 {                   /* 0x4a218000, ap 49 38.0 */
 853                         compatible = "ti,sysc";
 854                         status = "disabled";
 855                         #address-cells = <1>;
 856                         #size-cells = <1>;
 857                         ranges = <0x0 0x18000 0x1000>;
 858                 };
 859
 860                 target-module@1c000 {                   /* 0x4a21c000, ap 59 5a.0 */
 861                         compatible = "ti,sysc";
 862                         status = "disabled";
 863                         #address-cells = <1>;
 864                         #size-cells = <1>;
 865                         ranges = <0x0 0x1c000 0x1000>;
 866                 };
 867
 868                 target-module@1e000 {                   /* 0x4a21e000, ap 31 10.0 */
 869                         compatible = "ti,sysc";
 870                         status = "disabled";
 871                         #address-cells = <1>;
 872                         #size-cells = <1>;
 873                         ranges = <0x0 0x1e000 0x1000>;
 874                 };
 875
 876                 target-module@20000 {                   /* 0x4a220000, ap 51 40.0 */
 877                         compatible = "ti,sysc";
 878                         status = "disabled";
 879                         #address-cells = <1>;
 880                         #size-cells = <1>;
 881                         ranges = <0x0 0x20000 0x1000>;
 882                 };
 883
 884                 target-module@26000 {                   /* 0x4a226000, ap 53 34.0 */
 885                         compatible = "ti,sysc";
 886                         status = "disabled";
 887                         #address-cells = <1>;
 888                         #size-cells = <1>;
 889                         ranges = <0x0 0x26000 0x1000>;
 890                 };
 891
 892                 target-module@28000 {                   /* 0x4a228000, ap 55 2e.0 */
 893                         compatible = "ti,sysc";
 894                         status = "disabled";
 895                         #address-cells = <1>;
 896                         #size-cells = <1>;
 897                         ranges = <0x0 0x28000 0x1000>;
 898                 };
 899
 900                 target-module@2a000 {                   /* 0x4a22a000, ap 57 48.0 */
 901                         compatible = "ti,sysc";
 902                         status = "disabled";
 903                         #address-cells = <1>;
 904                         #size-cells = <1>;
 905                         ranges = <0x0 0x2a000 0x1000>;
 906                 };
 907         };
 908
 909         segment@280000 {                                        /* 0x4a280000 */
 910                 compatible = "simple-bus";
 911                 #address-cells = <1>;
 912                 #size-cells = <1>;
 913         };
 914
 915         l4_cfg_segment_300000: segment@300000 {                 /* 0x4a300000 */
 916                 compatible = "simple-bus";
 917                 #address-cells = <1>;
 918                 #size-cells = <1>;
 919                 ranges = <0x00000000 0x00300000 0x020000>,      /* ap 67 */
 920                          <0x00040000 0x00340000 0x001000>,      /* ap 68 */
 921                          <0x00020000 0x00320000 0x004000>,      /* ap 71 */
 922                          <0x00024000 0x00324000 0x002000>,      /* ap 72 */
 923                          <0x00026000 0x00326000 0x001000>,      /* ap 73 */
 924                          <0x00027000 0x00327000 0x001000>,      /* ap 74 */
 925                          <0x00028000 0x00328000 0x001000>,      /* ap 75 */
 926                          <0x00029000 0x00329000 0x001000>,      /* ap 76 */
 927                          <0x00030000 0x00330000 0x010000>,      /* ap 77 */
 928                          <0x0002a000 0x0032a000 0x002000>,      /* ap 90 */
 929                          <0x0002c000 0x0032c000 0x004000>;      /* ap 91 */
 930
 931                 l4_cfg_target_0: target-module@0 {      /* 0x4a300000, ap 67 14.0 */
 932                         compatible = "ti,sysc";
 933                         status = "disabled";
 934                         #address-cells = <1>;
 935                         #size-cells = <1>;
 936                         ranges = <0x00000000 0x00000000 0x00020000>,
 937                                  <0x00020000 0x00020000 0x00004000>,
 938                                  <0x00024000 0x00024000 0x00002000>,
 939                                  <0x00026000 0x00026000 0x00001000>,
 940                                  <0x00027000 0x00027000 0x00001000>,
 941                                  <0x00028000 0x00028000 0x00001000>,
 942                                  <0x00029000 0x00029000 0x00001000>,
 943                                  <0x0002a000 0x0002a000 0x00002000>,
 944                                  <0x0002c000 0x0002c000 0x00004000>,
 945                                  <0x00030000 0x00030000 0x00010000>;
 946                 };
 947         };
 948 };
 949
 950 &l4_wkup {                                              /* 0x4a300000 */
 951         compatible = "ti,omap4-l4-wkup", "simple-bus";
 952         reg = <0x4a300000 0x800>,
 953               <0x4a300800 0x800>,
 954               <0x4a301000 0x1000>;
 955         reg-names = "ap", "la", "ia0";
 956         #address-cells = <1>;
 957         #size-cells = <1>;
 958         ranges = <0x00000000 0x4a300000 0x010000>,      /* segment 0 */
 959                  <0x00010000 0x4a310000 0x010000>,      /* segment 1 */
 960                  <0x00020000 0x4a320000 0x010000>;      /* segment 2 */
 961
 962         segment@0 {                                     /* 0x4a300000 */
 963                 compatible = "simple-bus";
 964                 #address-cells = <1>;
 965                 #size-cells = <1>;
 966                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 967                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
 968                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 969                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
 970                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
 971                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
 972                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
 973                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
 974                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
 975                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
 976                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
 977
 978                 target-module@4000 {                    /* 0x4a304000, ap 17 24.0 */
 979                         compatible = "ti,sysc-omap2", "ti,sysc";
 980                         ti,hwmods = "counter_32k";
 981                         reg = <0x4000 0x4>,
 982                               <0x4004 0x4>;
 983                         reg-names = "rev", "sysc";
 984                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 985                                         <SYSC_IDLE_NO>;
 986                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
 987                         clocks = <&l4_wkup_clkctrl OMAP4_COUNTER_32K_CLKCTRL 0>;
 988                         clock-names = "fck";
 989                         #address-cells = <1>;
 990                         #size-cells = <1>;
 991                         ranges = <0x0 0x4000 0x1000>;
 992
 993                         counter32k: counter@0 {
 994                                 compatible = "ti,omap-counter32k";
 995                                 reg = <0x0 0x20>;
 996                         };
 997                 };
 998
 999                 target-module@6000 {                    /* 0x4a306000, ap 3 08.0 */
1000                         compatible = "ti,sysc-omap4", "ti,sysc";
1001                         reg = <0x6000 0x4>;
1002                         reg-names = "rev";
1003                         #address-cells = <1>;
1004                         #size-cells = <1>;
1005                         ranges = <0x0 0x6000 0x2000>;
1006
1007                         prm: prm@0 {
1008                                 compatible = "ti,omap4-prm", "simple-bus";
1009                                 reg = <0x0 0x2000>;
1010                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1011                                 #address-cells = <1>;
1012                                 #size-cells = <1>;
1013                                 ranges = <0 0 0x2000>;
1014
1015                                 prm_clocks: clocks {
1016                                         #address-cells = <1>;
1017                                         #size-cells = <0>;
1018                                 };
1019
1020                                 prm_clockdomains: clockdomains {
1021                                 };
1022                         };
1023                 };
1024
1025                 target-module@a000 {                    /* 0x4a30a000, ap 15 34.0 */
1026                         compatible = "ti,sysc-omap4", "ti,sysc";
1027                         reg = <0xa000 0x4>;
1028                         reg-names = "rev";
1029                         #address-cells = <1>;
1030                         #size-cells = <1>;
1031                         ranges = <0x0 0xa000 0x1000>;
1032
1033                         scrm: scrm@0 {
1034                                 compatible = "ti,omap4-scrm";
1035                                 reg = <0x0 0x2000>;
1036
1037                                 scrm_clocks: clocks {
1038                                         #address-cells = <1>;
1039                                         #size-cells = <0>;
1040                                 };
1041
1042                                 scrm_clockdomains: clockdomains {
1043                                 };
1044                         };
1045                 };
1046
1047                 target-module@c000 {                    /* 0x4a30c000, ap 19 2c.0 */
1048                         compatible = "ti,sysc-omap4", "ti,sysc";
1049                         ti,hwmods = "ctrl_module_wkup";
1050                         reg = <0xc000 0x4>,
1051                               <0xc010 0x4>;
1052                         reg-names = "rev", "sysc";
1053                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1054                                         <SYSC_IDLE_NO>,
1055                                         <SYSC_IDLE_SMART>,
1056                                         <SYSC_IDLE_SMART_WKUP>;
1057                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1058                         #address-cells = <1>;
1059                         #size-cells = <1>;
1060                         ranges = <0x0 0xc000 0x1000>;
1061
1062                         omap4_scm_wkup: scm@c000 {
1063                                 compatible = "ti,omap4-scm-wkup";
1064                                 reg = <0xc000 0x1000>;
1065                         };
1066                 };
1067         };
1068
1069         segment@10000 {                                 /* 0x4a310000 */
1070                 compatible = "simple-bus";
1071                 #address-cells = <1>;
1072                 #size-cells = <1>;
1073                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
1074                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
1075                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
1076                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
1077                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
1078                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
1079                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
1080                          <0x0000d000 0x0001d000 0x001000>,      /* ap 12 */
1081                          <0x0000e000 0x0001e000 0x001000>,      /* ap 21 */
1082                          <0x0000f000 0x0001f000 0x001000>;      /* ap 22 */
1083
1084                 gpio1_target: target-module@0 {                 /* 0x4a310000, ap 5 14.0 */
1085                         compatible = "ti,sysc-omap2", "ti,sysc";
1086                         reg = <0x0 0x4>,
1087                               <0x10 0x4>,
1088                               <0x114 0x4>;
1089                         reg-names = "rev", "sysc", "syss";
1090                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1091                                          SYSC_OMAP2_SOFTRESET |
1092                                          SYSC_OMAP2_AUTOIDLE)>;
1093                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1094                                         <SYSC_IDLE_NO>,
1095                                         <SYSC_IDLE_SMART>,
1096                                         <SYSC_IDLE_SMART_WKUP>;
1097                         ti,syss-mask = <1>;
1098                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1099                         clocks = <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 0>,
1100                                  <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 8>;
1101                         clock-names = "fck", "dbclk";
1102                         #address-cells = <1>;
1103                         #size-cells = <1>;
1104                         ranges = <0x0 0x0 0x1000>;
1105
1106                         gpio1: gpio@0 {
1107                                 compatible = "ti,omap4-gpio";
1108                                 reg = <0x0 0x200>;
1109                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1110                                 ti,gpio-always-on;
1111                                 gpio-controller;
1112                                 #gpio-cells = <2>;
1113                                 interrupt-controller;
1114                                 #interrupt-cells = <2>;
1115                         };
1116                 };
1117
1118                 target-module@4000 {                    /* 0x4a314000, ap 7 18.0 */
1119                         compatible = "ti,sysc-omap2", "ti,sysc";
1120                         reg = <0x4000 0x4>,
1121                               <0x4010 0x4>,
1122                               <0x4014 0x4>;
1123                         reg-names = "rev", "sysc", "syss";
1124                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
1125                                          SYSC_OMAP2_SOFTRESET)>;
1126                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1127                                         <SYSC_IDLE_NO>,
1128                                         <SYSC_IDLE_SMART>,
1129                                         <SYSC_IDLE_SMART_WKUP>;
1130                         ti,syss-mask = <1>;
1131                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1132                         clocks = <&l4_wkup_clkctrl OMAP4_WD_TIMER2_CLKCTRL 0>;
1133                         clock-names = "fck";
1134                         #address-cells = <1>;
1135                         #size-cells = <1>;
1136                         ranges = <0x0 0x4000 0x1000>;
1137
1138                         wdt2: wdt@0 {
1139                                 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
1140                                 reg = <0x0 0x80>;
1141                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
1142                         };
1143                 };
1144
1145                 target-module@8000 {                    /* 0x4a318000, ap 9 1c.0 */
1146                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1147                         ti,hwmods = "timer1";
1148                         reg = <0x8000 0x4>,
1149                               <0x8010 0x4>,
1150                               <0x8014 0x4>;
1151                         reg-names = "rev", "sysc", "syss";
1152                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1153                                          SYSC_OMAP2_EMUFREE |
1154                                          SYSC_OMAP2_ENAWAKEUP |
1155                                          SYSC_OMAP2_SOFTRESET |
1156                                          SYSC_OMAP2_AUTOIDLE)>;
1157                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1158                                         <SYSC_IDLE_NO>,
1159                                         <SYSC_IDLE_SMART>;
1160                         ti,syss-mask = <1>;
1161                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1162                         clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 0>;
1163                         clock-names = "fck";
1164                         #address-cells = <1>;
1165                         #size-cells = <1>;
1166                         ranges = <0x0 0x8000 0x1000>;
1167
1168                         timer1: timer@0 {
1169                                 compatible = "ti,omap3430-timer";
1170                                 reg = <0x0 0x80>;
1171                                 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
1172                                 clock-names = "fck";
1173                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1174                                 ti,timer-alwon;
1175                         };
1176                 };
1177
1178                 target-module@c000 {                    /* 0x4a31c000, ap 11 20.0 */
1179                         compatible = "ti,sysc-omap2", "ti,sysc";
1180                         ti,hwmods = "kbd";
1181                         reg = <0xc000 0x4>,
1182                               <0xc010 0x4>,
1183                               <0xc014 0x4>;
1184                         reg-names = "rev", "sysc", "syss";
1185                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1186                                          SYSC_OMAP2_EMUFREE |
1187                                          SYSC_OMAP2_ENAWAKEUP |
1188                                          SYSC_OMAP2_SOFTRESET |
1189                                          SYSC_OMAP2_AUTOIDLE)>;
1190                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1191                                         <SYSC_IDLE_NO>,
1192                                         <SYSC_IDLE_SMART>;
1193                         ti,syss-mask = <1>;
1194                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1195                         clocks = <&l4_wkup_clkctrl OMAP4_KBD_CLKCTRL 0>;
1196                         clock-names = "fck";
1197                         #address-cells = <1>;
1198                         #size-cells = <1>;
1199                         ranges = <0x0 0xc000 0x1000>;
1200
1201                         keypad: keypad@0 {
1202                                 compatible = "ti,omap4-keypad";
1203                                 reg = <0x0 0x80>;
1204                                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1205                                 reg-names = "mpu";
1206                         };
1207                 };
1208
1209                 target-module@e000 {                    /* 0x4a31e000, ap 21 30.0 */
1210                         compatible = "ti,sysc-omap4", "ti,sysc";
1211                         ti,hwmods = "ctrl_module_pad_wkup";
1212                         reg = <0xe000 0x4>,
1213                               <0xe010 0x4>;
1214                         reg-names = "rev", "sysc";
1215                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1216                                         <SYSC_IDLE_NO>,
1217                                         <SYSC_IDLE_SMART>,
1218                                         <SYSC_IDLE_SMART_WKUP>;
1219                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1220                         #address-cells = <1>;
1221                         #size-cells = <1>;
1222                         ranges = <0x0 0xe000 0x1000>;
1223
1224                         omap4_pmx_wkup: pinmux@40 {
1225                                 compatible = "ti,omap4-padconf",
1226                                              "pinctrl-single";
1227                                 reg = <0x40 0x0038>;
1228                                 #address-cells = <1>;
1229                                 #size-cells = <0>;
1230                                 #pinctrl-cells = <1>;
1231                                 #interrupt-cells = <1>;
1232                                 interrupt-controller;
1233                                 pinctrl-single,register-width = <16>;
1234                                 pinctrl-single,function-mask = <0x7fff>;
1235                         };
1236                 };
1237         };
1238
1239         segment@20000 {                                 /* 0x4a320000 */
1240                 compatible = "simple-bus";
1241                 #address-cells = <1>;
1242                 #size-cells = <1>;
1243                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
1244                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
1245                          <0x00000000 0x00020000 0x001000>,      /* ap 23 */
1246                          <0x00001000 0x00021000 0x001000>,      /* ap 24 */
1247                          <0x00002000 0x00022000 0x001000>,      /* ap 25 */
1248                          <0x00003000 0x00023000 0x001000>,      /* ap 26 */
1249                          <0x00004000 0x00024000 0x001000>,      /* ap 27 */
1250                          <0x00005000 0x00025000 0x001000>,      /* ap 28 */
1251                          <0x00007000 0x00027000 0x000400>,      /* ap 29 */
1252                          <0x00008000 0x00028000 0x000800>,      /* ap 30 */
1253                          <0x00009000 0x00029000 0x000400>;      /* ap 31 */
1254
1255                 target-module@0 {                       /* 0x4a320000, ap 23 04.0 */
1256                         compatible = "ti,sysc";
1257                         status = "disabled";
1258                         #address-cells = <1>;
1259                         #size-cells = <1>;
1260                         ranges = <0x0 0x0 0x1000>;
1261                 };
1262
1263                 target-module@2000 {                    /* 0x4a322000, ap 25 0c.0 */
1264                         compatible = "ti,sysc";
1265                         status = "disabled";
1266                         #address-cells = <1>;
1267                         #size-cells = <1>;
1268                         ranges = <0x0 0x2000 0x1000>;
1269                 };
1270
1271                 target-module@4000 {                    /* 0x4a324000, ap 27 10.0 */
1272                         compatible = "ti,sysc";
1273                         status = "disabled";
1274                         #address-cells = <1>;
1275                         #size-cells = <1>;
1276                         ranges = <0x0 0x4000 0x1000>;
1277                 };
1278
1279                 target-module@6000 {                    /* 0x4a326000, ap 13 28.0 */
1280                         compatible = "ti,sysc";
1281                         status = "disabled";
1282                         #address-cells = <1>;
1283                         #size-cells = <1>;
1284                         ranges = <0x00000000 0x00006000 0x00001000>,
1285                                  <0x00001000 0x00007000 0x00000400>,
1286                                  <0x00002000 0x00008000 0x00000800>,
1287                                  <0x00003000 0x00009000 0x00000400>;
1288                 };
1289         };
1290 };
1291
1292 &l4_per {                                               /* 0x48000000 */
1293         compatible = "ti,omap4-l4-per", "simple-bus";
1294         reg = <0x48000000 0x800>,
1295               <0x48000800 0x800>,
1296               <0x48001000 0x400>,
1297               <0x48001400 0x400>,
1298               <0x48001800 0x400>,
1299               <0x48001c00 0x400>;
1300         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
1301         #address-cells = <1>;
1302         #size-cells = <1>;
1303         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
1304                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
1305
1306         segment@0 {                                     /* 0x48000000 */
1307                 compatible = "simple-bus";
1308                 #address-cells = <1>;
1309                 #size-cells = <1>;
1310                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
1311                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
1312                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
1313                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
1314                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
1315                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
1316                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
1317                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
1318                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
1319                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
1320                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
1321                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
1322                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
1323                          <0x00040000 0x00040000 0x010000>,      /* ap 13 */
1324                          <0x00050000 0x00050000 0x001000>,      /* ap 14 */
1325                          <0x00055000 0x00055000 0x001000>,      /* ap 15 */
1326                          <0x00056000 0x00056000 0x001000>,      /* ap 16 */
1327                          <0x00057000 0x00057000 0x001000>,      /* ap 17 */
1328                          <0x00058000 0x00058000 0x001000>,      /* ap 18 */
1329                          <0x00059000 0x00059000 0x001000>,      /* ap 19 */
1330                          <0x0005a000 0x0005a000 0x001000>,      /* ap 20 */
1331                          <0x0005b000 0x0005b000 0x001000>,      /* ap 21 */
1332                          <0x0005c000 0x0005c000 0x001000>,      /* ap 22 */
1333                          <0x0005d000 0x0005d000 0x001000>,      /* ap 23 */
1334                          <0x0005e000 0x0005e000 0x001000>,      /* ap 24 */
1335                          <0x00060000 0x00060000 0x001000>,      /* ap 25 */
1336                          <0x0006a000 0x0006a000 0x001000>,      /* ap 26 */
1337                          <0x0006b000 0x0006b000 0x001000>,      /* ap 27 */
1338                          <0x0006c000 0x0006c000 0x001000>,      /* ap 28 */
1339                          <0x0006d000 0x0006d000 0x001000>,      /* ap 29 */
1340                          <0x0006e000 0x0006e000 0x001000>,      /* ap 30 */
1341                          <0x0006f000 0x0006f000 0x001000>,      /* ap 31 */
1342                          <0x00070000 0x00070000 0x001000>,      /* ap 32 */
1343                          <0x00071000 0x00071000 0x001000>,      /* ap 33 */
1344                          <0x00072000 0x00072000 0x001000>,      /* ap 34 */
1345                          <0x00073000 0x00073000 0x001000>,      /* ap 35 */
1346                          <0x00061000 0x00061000 0x001000>,      /* ap 36 */
1347                          <0x00096000 0x00096000 0x001000>,      /* ap 37 */
1348                          <0x00097000 0x00097000 0x001000>,      /* ap 38 */
1349                          <0x00076000 0x00076000 0x001000>,      /* ap 39 */
1350                          <0x00077000 0x00077000 0x001000>,      /* ap 40 */
1351                          <0x00078000 0x00078000 0x001000>,      /* ap 41 */
1352                          <0x00079000 0x00079000 0x001000>,      /* ap 42 */
1353                          <0x00086000 0x00086000 0x001000>,      /* ap 43 */
1354                          <0x00087000 0x00087000 0x001000>,      /* ap 44 */
1355                          <0x00088000 0x00088000 0x001000>,      /* ap 45 */
1356                          <0x00089000 0x00089000 0x001000>,      /* ap 46 */
1357                          <0x000b0000 0x000b0000 0x001000>,      /* ap 47 */
1358                          <0x000b1000 0x000b1000 0x001000>,      /* ap 48 */
1359                          <0x00098000 0x00098000 0x001000>,      /* ap 49 */
1360                          <0x00099000 0x00099000 0x001000>,      /* ap 50 */
1361                          <0x0009a000 0x0009a000 0x001000>,      /* ap 51 */
1362                          <0x0009b000 0x0009b000 0x001000>,      /* ap 52 */
1363                          <0x0009c000 0x0009c000 0x001000>,      /* ap 53 */
1364                          <0x0009d000 0x0009d000 0x001000>,      /* ap 54 */
1365                          <0x0009e000 0x0009e000 0x001000>,      /* ap 55 */
1366                          <0x0009f000 0x0009f000 0x001000>,      /* ap 56 */
1367                          <0x00090000 0x00090000 0x002000>,      /* ap 57 */
1368                          <0x00092000 0x00092000 0x001000>,      /* ap 58 */
1369                          <0x000a4000 0x000a4000 0x001000>,      /* ap 59 */
1370                          <0x000a6000 0x000a6000 0x001000>,      /* ap 60 */
1371                          <0x000a8000 0x000a8000 0x004000>,      /* ap 61 */
1372                          <0x000ac000 0x000ac000 0x001000>,      /* ap 62 */
1373                          <0x000ad000 0x000ad000 0x001000>,      /* ap 63 */
1374                          <0x000ae000 0x000ae000 0x001000>,      /* ap 64 */
1375                          <0x000b2000 0x000b2000 0x001000>,      /* ap 65 */
1376                          <0x000b3000 0x000b3000 0x001000>,      /* ap 66 */
1377                          <0x000b4000 0x000b4000 0x001000>,      /* ap 67 */
1378                          <0x000b5000 0x000b5000 0x001000>,      /* ap 68 */
1379                          <0x000b8000 0x000b8000 0x001000>,      /* ap 69 */
1380                          <0x000b9000 0x000b9000 0x001000>,      /* ap 70 */
1381                          <0x000ba000 0x000ba000 0x001000>,      /* ap 71 */
1382                          <0x000bb000 0x000bb000 0x001000>,      /* ap 72 */
1383                          <0x000d1000 0x000d1000 0x001000>,      /* ap 73 */
1384                          <0x000d2000 0x000d2000 0x001000>,      /* ap 74 */
1385                          <0x000d5000 0x000d5000 0x001000>,      /* ap 75 */
1386                          <0x000d6000 0x000d6000 0x001000>,      /* ap 76 */
1387                          <0x000a2000 0x000a2000 0x001000>,      /* ap 79 */
1388                          <0x000a3000 0x000a3000 0x001000>,      /* ap 80 */
1389                          <0x00001400 0x00001400 0x000400>,      /* ap 81 */
1390                          <0x00001800 0x00001800 0x000400>,      /* ap 82 */
1391                          <0x00001c00 0x00001c00 0x000400>,      /* ap 83 */
1392                          <0x000a5000 0x000a5000 0x001000>;      /* ap 84 */
1393
1394                 target-module@20000 {                   /* 0x48020000, ap 3 06.0 */
1395                         compatible = "ti,sysc-omap2", "ti,sysc";
1396                         reg = <0x20050 0x4>,
1397                               <0x20054 0x4>,
1398                               <0x20058 0x4>;
1399                         reg-names = "rev", "sysc", "syss";
1400                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1401                                          SYSC_OMAP2_SOFTRESET |
1402                                          SYSC_OMAP2_AUTOIDLE)>;
1403                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1404                                         <SYSC_IDLE_NO>,
1405                                         <SYSC_IDLE_SMART>,
1406                                         <SYSC_IDLE_SMART_WKUP>;
1407                         ti,syss-mask = <1>;
1408                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1409                         clocks = <&l4_per_clkctrl OMAP4_UART3_CLKCTRL 0>;
1410                         clock-names = "fck";
1411                         #address-cells = <1>;
1412                         #size-cells = <1>;
1413                         ranges = <0x0 0x20000 0x1000>;
1414
1415                         uart3: serial@0 {
1416                                 compatible = "ti,omap4-uart";
1417                                 reg = <0x0 0x100>;
1418                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1419                                 clock-frequency = <48000000>;
1420                         };
1421                 };
1422
1423                 target-module@32000 {                   /* 0x48032000, ap 5 02.0 */
1424                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1425                         ti,hwmods = "timer2";
1426                         reg = <0x32000 0x4>,
1427                               <0x32010 0x4>,
1428                               <0x32014 0x4>;
1429                         reg-names = "rev", "sysc", "syss";
1430                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1431                                          SYSC_OMAP2_EMUFREE |
1432                                          SYSC_OMAP2_ENAWAKEUP |
1433                                          SYSC_OMAP2_SOFTRESET |
1434                                          SYSC_OMAP2_AUTOIDLE)>;
1435                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1436                                         <SYSC_IDLE_NO>,
1437                                         <SYSC_IDLE_SMART>;
1438                         ti,syss-mask = <1>;
1439                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1440                         clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 0>;
1441                         clock-names = "fck";
1442                         #address-cells = <1>;
1443                         #size-cells = <1>;
1444                         ranges = <0x0 0x32000 0x1000>;
1445
1446                         timer2: timer@0 {
1447                                 compatible = "ti,omap3430-timer";
1448                                 reg = <0x0 0x80>;
1449                                 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>;
1450                                 clock-names = "fck";
1451                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1452                         };
1453                 };
1454
1455                 target-module@34000 {                   /* 0x48034000, ap 7 04.0 */
1456                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1457                         ti,hwmods = "timer3";
1458                         reg = <0x34000 0x4>,
1459                               <0x34010 0x4>;
1460                         reg-names = "rev", "sysc";
1461                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1462                                          SYSC_OMAP4_SOFTRESET)>;
1463                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1464                                         <SYSC_IDLE_NO>,
1465                                         <SYSC_IDLE_SMART>,
1466                                         <SYSC_IDLE_SMART_WKUP>;
1467                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1468                         clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 0>;
1469                         clock-names = "fck";
1470                         #address-cells = <1>;
1471                         #size-cells = <1>;
1472                         ranges = <0x0 0x34000 0x1000>;
1473
1474                         timer3: timer@0 {
1475                                 compatible = "ti,omap4430-timer";
1476                                 reg = <0x0 0x80>;
1477                                 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>;
1478                                 clock-names = "fck";
1479                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1480                         };
1481                 };
1482
1483                 target-module@36000 {                   /* 0x48036000, ap 9 0e.0 */
1484                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1485                         ti,hwmods = "timer4";
1486                         reg = <0x36000 0x4>,
1487                               <0x36010 0x4>;
1488                         reg-names = "rev", "sysc";
1489                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1490                                          SYSC_OMAP4_SOFTRESET)>;
1491                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1492                                         <SYSC_IDLE_NO>,
1493                                         <SYSC_IDLE_SMART>,
1494                                         <SYSC_IDLE_SMART_WKUP>;
1495                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1496                         clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 0>;
1497                         clock-names = "fck";
1498                         #address-cells = <1>;
1499                         #size-cells = <1>;
1500                         ranges = <0x0 0x36000 0x1000>;
1501
1502                         timer4: timer@0 {
1503                                 compatible = "ti,omap4430-timer";
1504                                 reg = <0x0 0x80>;
1505                                 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>;
1506                                 clock-names = "fck";
1507                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1508                         };
1509                 };
1510
1511                 target-module@3e000 {                   /* 0x4803e000, ap 11 08.0 */
1512                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1513                         ti,hwmods = "timer9";
1514                         reg = <0x3e000 0x4>,
1515                               <0x3e010 0x4>;
1516                         reg-names = "rev", "sysc";
1517                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1518                                          SYSC_OMAP4_SOFTRESET)>;
1519                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1520                                         <SYSC_IDLE_NO>,
1521                                         <SYSC_IDLE_SMART>,
1522                                         <SYSC_IDLE_SMART_WKUP>;
1523                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1524                         clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 0>;
1525                         clock-names = "fck";
1526                         #address-cells = <1>;
1527                         #size-cells = <1>;
1528                         ranges = <0x0 0x3e000 0x1000>;
1529
1530                         timer9: timer@0 {
1531                                 compatible = "ti,omap4430-timer";
1532                                 reg = <0x0 0x80>;
1533                                 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
1534                                 clock-names = "fck";
1535                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1536                                 ti,timer-pwm;
1537                         };
1538                 };
1539
1540                 target-module@40000 {                   /* 0x48040000, ap 13 0a.0 */
1541                         compatible = "ti,sysc";
1542                         status = "disabled";
1543                         #address-cells = <1>;
1544                         #size-cells = <1>;
1545                         ranges = <0x0 0x40000 0x10000>;
1546                 };
1547
1548                 target-module@55000 {                   /* 0x48055000, ap 15 0c.0 */
1549                         compatible = "ti,sysc-omap2", "ti,sysc";
1550                         reg = <0x55000 0x4>,
1551                               <0x55010 0x4>,
1552                               <0x55114 0x4>;
1553                         reg-names = "rev", "sysc", "syss";
1554                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1555                                          SYSC_OMAP2_SOFTRESET |
1556                                          SYSC_OMAP2_AUTOIDLE)>;
1557                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1558                                         <SYSC_IDLE_NO>,
1559                                         <SYSC_IDLE_SMART>,
1560                                         <SYSC_IDLE_SMART_WKUP>;
1561                         ti,syss-mask = <1>;
1562                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1563                         clocks = <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 0>,
1564                                  <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 8>;
1565                         clock-names = "fck", "dbclk";
1566                         #address-cells = <1>;
1567                         #size-cells = <1>;
1568                         ranges = <0x0 0x55000 0x1000>;
1569
1570                         gpio2: gpio@0 {
1571                                 compatible = "ti,omap4-gpio";
1572                                 reg = <0x0 0x200>;
1573                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1574                                 gpio-controller;
1575                                 #gpio-cells = <2>;
1576                                 interrupt-controller;
1577                                 #interrupt-cells = <2>;
1578                         };
1579                 };
1580
1581                 target-module@57000 {                   /* 0x48057000, ap 17 16.0 */
1582                         compatible = "ti,sysc-omap2", "ti,sysc";
1583                         reg = <0x57000 0x4>,
1584                               <0x57010 0x4>,
1585                               <0x57114 0x4>;
1586                         reg-names = "rev", "sysc", "syss";
1587                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1588                                          SYSC_OMAP2_SOFTRESET |
1589                                          SYSC_OMAP2_AUTOIDLE)>;
1590                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1591                                         <SYSC_IDLE_NO>,
1592                                         <SYSC_IDLE_SMART>,
1593                                         <SYSC_IDLE_SMART_WKUP>;
1594                         ti,syss-mask = <1>;
1595                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1596                         clocks = <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 0>,
1597                                  <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 8>;
1598                         clock-names = "fck", "dbclk";
1599                         #address-cells = <1>;
1600                         #size-cells = <1>;
1601                         ranges = <0x0 0x57000 0x1000>;
1602
1603                         gpio3: gpio@0 {
1604                                 compatible = "ti,omap4-gpio";
1605                                 reg = <0x0 0x200>;
1606                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1607                                 gpio-controller;
1608                                 #gpio-cells = <2>;
1609                                 interrupt-controller;
1610                                 #interrupt-cells = <2>;
1611                         };
1612                 };
1613
1614                 target-module@59000 {                   /* 0x48059000, ap 19 10.0 */
1615                         compatible = "ti,sysc-omap2", "ti,sysc";
1616                         reg = <0x59000 0x4>,
1617                               <0x59010 0x4>,
1618                               <0x59114 0x4>;
1619                         reg-names = "rev", "sysc", "syss";
1620                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1621                                          SYSC_OMAP2_SOFTRESET |
1622                                          SYSC_OMAP2_AUTOIDLE)>;
1623                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1624                                         <SYSC_IDLE_NO>,
1625                                         <SYSC_IDLE_SMART>,
1626                                         <SYSC_IDLE_SMART_WKUP>;
1627                         ti,syss-mask = <1>;
1628                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1629                         clocks = <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 0>,
1630                                  <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 8>;
1631                         clock-names = "fck", "dbclk";
1632                         #address-cells = <1>;
1633                         #size-cells = <1>;
1634                         ranges = <0x0 0x59000 0x1000>;
1635
1636                         gpio4: gpio@0 {
1637                                 compatible = "ti,omap4-gpio";
1638                                 reg = <0x0 0x200>;
1639                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1640                                 gpio-controller;
1641                                 #gpio-cells = <2>;
1642                                 interrupt-controller;
1643                                 #interrupt-cells = <2>;
1644                         };
1645                 };
1646
1647                 target-module@5b000 {                   /* 0x4805b000, ap 21 12.0 */
1648                         compatible = "ti,sysc-omap2", "ti,sysc";
1649                         reg = <0x5b000 0x4>,
1650                               <0x5b010 0x4>,
1651                               <0x5b114 0x4>;
1652                         reg-names = "rev", "sysc", "syss";
1653                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1654                                          SYSC_OMAP2_SOFTRESET |
1655                                          SYSC_OMAP2_AUTOIDLE)>;
1656                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1657                                         <SYSC_IDLE_NO>,
1658                                         <SYSC_IDLE_SMART>,
1659                                         <SYSC_IDLE_SMART_WKUP>;
1660                         ti,syss-mask = <1>;
1661                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1662                         clocks = <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 0>,
1663                                  <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 8>;
1664                         clock-names = "fck", "dbclk";
1665                         #address-cells = <1>;
1666                         #size-cells = <1>;
1667                         ranges = <0x0 0x5b000 0x1000>;
1668
1669                         gpio5: gpio@0 {
1670                                 compatible = "ti,omap4-gpio";
1671                                 reg = <0x0 0x200>;
1672                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1673                                 gpio-controller;
1674                                 #gpio-cells = <2>;
1675                                 interrupt-controller;
1676                                 #interrupt-cells = <2>;
1677                         };
1678                 };
1679
1680                 target-module@5d000 {                   /* 0x4805d000, ap 23 14.0 */
1681                         compatible = "ti,sysc-omap2", "ti,sysc";
1682                         reg = <0x5d000 0x4>,
1683                               <0x5d010 0x4>,
1684                               <0x5d114 0x4>;
1685                         reg-names = "rev", "sysc", "syss";
1686                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1687                                          SYSC_OMAP2_SOFTRESET |
1688                                          SYSC_OMAP2_AUTOIDLE)>;
1689                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1690                                         <SYSC_IDLE_NO>,
1691                                         <SYSC_IDLE_SMART>,
1692                                         <SYSC_IDLE_SMART_WKUP>;
1693                         ti,syss-mask = <1>;
1694                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1695                         clocks = <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 0>,
1696                                  <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 8>;
1697                         clock-names = "fck", "dbclk";
1698                         #address-cells = <1>;
1699                         #size-cells = <1>;
1700                         ranges = <0x0 0x5d000 0x1000>;
1701
1702                         gpio6: gpio@0 {
1703                                 compatible = "ti,omap4-gpio";
1704                                 reg = <0x0 0x200>;
1705                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1706                                 gpio-controller;
1707                                 #gpio-cells = <2>;
1708                                 interrupt-controller;
1709                                 #interrupt-cells = <2>;
1710                         };
1711                 };
1712
1713                 target-module@60000 {                   /* 0x48060000, ap 25 1e.0 */
1714                         compatible = "ti,sysc-omap2", "ti,sysc";
1715                         reg = <0x60000 0x8>,
1716                               <0x60010 0x8>,
1717                               <0x60090 0x8>;
1718                         reg-names = "rev", "sysc", "syss";
1719                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1720                                          SYSC_OMAP2_ENAWAKEUP |
1721                                          SYSC_OMAP2_SOFTRESET |
1722                                          SYSC_OMAP2_AUTOIDLE)>;
1723                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1724                                         <SYSC_IDLE_NO>,
1725                                         <SYSC_IDLE_SMART>,
1726                                         <SYSC_IDLE_SMART_WKUP>;
1727                         ti,syss-mask = <1>;
1728                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1729                         clocks = <&l4_per_clkctrl OMAP4_I2C3_CLKCTRL 0>;
1730                         clock-names = "fck";
1731                         #address-cells = <1>;
1732                         #size-cells = <1>;
1733                         ranges = <0x0 0x60000 0x1000>;
1734
1735                         i2c3: i2c@0 {
1736                                 compatible = "ti,omap4-i2c";
1737                                 reg = <0x0 0x100>;
1738                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1739                                 #address-cells = <1>;
1740                                 #size-cells = <0>;
1741                         };
1742                 };
1743
1744                 target-module@6a000 {                   /* 0x4806a000, ap 26 18.0 */
1745                         compatible = "ti,sysc-omap2", "ti,sysc";
1746                         reg = <0x6a050 0x4>,
1747                               <0x6a054 0x4>,
1748                               <0x6a058 0x4>;
1749                         reg-names = "rev", "sysc", "syss";
1750                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1751                                          SYSC_OMAP2_SOFTRESET |
1752                                          SYSC_OMAP2_AUTOIDLE)>;
1753                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1754                                         <SYSC_IDLE_NO>,
1755                                         <SYSC_IDLE_SMART>,
1756                                         <SYSC_IDLE_SMART_WKUP>;
1757                         ti,syss-mask = <1>;
1758                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1759                         clocks = <&l4_per_clkctrl OMAP4_UART1_CLKCTRL 0>;
1760                         clock-names = "fck";
1761                         #address-cells = <1>;
1762                         #size-cells = <1>;
1763                         ranges = <0x0 0x6a000 0x1000>;
1764
1765                         uart1: serial@0 {
1766                                 compatible = "ti,omap4-uart";
1767                                 reg = <0x0 0x100>;
1768                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1769                                 clock-frequency = <48000000>;
1770                         };
1771                 };
1772
1773                 target-module@6c000 {                   /* 0x4806c000, ap 28 20.0 */
1774                         compatible = "ti,sysc-omap2", "ti,sysc";
1775                         reg = <0x6c050 0x4>,
1776                               <0x6c054 0x4>,
1777                               <0x6c058 0x4>;
1778                         reg-names = "rev", "sysc", "syss";
1779                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1780                                          SYSC_OMAP2_SOFTRESET |
1781                                          SYSC_OMAP2_AUTOIDLE)>;
1782                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1783                                         <SYSC_IDLE_NO>,
1784                                         <SYSC_IDLE_SMART>,
1785                                         <SYSC_IDLE_SMART_WKUP>;
1786                         ti,syss-mask = <1>;
1787                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1788                         clocks = <&l4_per_clkctrl OMAP4_UART2_CLKCTRL 0>;
1789                         clock-names = "fck";
1790                         #address-cells = <1>;
1791                         #size-cells = <1>;
1792                         ranges = <0x0 0x6c000 0x1000>;
1793
1794                         uart2: serial@0 {
1795                                 compatible = "ti,omap4-uart";
1796                                 reg = <0x0 0x100>;
1797                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1798                                 clock-frequency = <48000000>;
1799                         };
1800                 };
1801
1802                 target-module@6e000 {                   /* 0x4806e000, ap 30 1c.1 */
1803                         compatible = "ti,sysc-omap2", "ti,sysc";
1804                         reg = <0x6e050 0x4>,
1805                               <0x6e054 0x4>,
1806                               <0x6e058 0x4>;
1807                         reg-names = "rev", "sysc", "syss";
1808                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1809                                          SYSC_OMAP2_SOFTRESET |
1810                                          SYSC_OMAP2_AUTOIDLE)>;
1811                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1812                                         <SYSC_IDLE_NO>,
1813                                         <SYSC_IDLE_SMART>,
1814                                         <SYSC_IDLE_SMART_WKUP>;
1815                         ti,syss-mask = <1>;
1816                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1817                         clocks = <&l4_per_clkctrl OMAP4_UART4_CLKCTRL 0>;
1818                         clock-names = "fck";
1819                         #address-cells = <1>;
1820                         #size-cells = <1>;
1821                         ranges = <0x0 0x6e000 0x1000>;
1822
1823                         uart4: serial@0 {
1824                                 compatible = "ti,omap4-uart";
1825                                 reg = <0x0 0x100>;
1826                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1827                                 clock-frequency = <48000000>;
1828                         };
1829                 };
1830
1831                 target-module@70000 {                   /* 0x48070000, ap 32 28.0 */
1832                         compatible = "ti,sysc-omap2", "ti,sysc";
1833                         reg = <0x70000 0x8>,
1834                               <0x70010 0x8>,
1835                               <0x70090 0x8>;
1836                         reg-names = "rev", "sysc", "syss";
1837                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1838                                          SYSC_OMAP2_ENAWAKEUP |
1839                                          SYSC_OMAP2_SOFTRESET |
1840                                          SYSC_OMAP2_AUTOIDLE)>;
1841                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1842                                         <SYSC_IDLE_NO>,
1843                                         <SYSC_IDLE_SMART>,
1844                                         <SYSC_IDLE_SMART_WKUP>;
1845                         ti,syss-mask = <1>;
1846                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1847                         clocks = <&l4_per_clkctrl OMAP4_I2C1_CLKCTRL 0>;
1848                         clock-names = "fck";
1849                         #address-cells = <1>;
1850                         #size-cells = <1>;
1851                         ranges = <0x0 0x70000 0x1000>;
1852
1853                         i2c1: i2c@0 {
1854                                 compatible = "ti,omap4-i2c";
1855                                 reg = <0x0 0x100>;
1856                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1857                                 #address-cells = <1>;
1858                                 #size-cells = <0>;
1859                         };
1860                 };
1861
1862                 target-module@72000 {                   /* 0x48072000, ap 34 30.0 */
1863                         compatible = "ti,sysc-omap2", "ti,sysc";
1864                         reg = <0x72000 0x8>,
1865                               <0x72010 0x8>,
1866                               <0x72090 0x8>;
1867                         reg-names = "rev", "sysc", "syss";
1868                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1869                                          SYSC_OMAP2_ENAWAKEUP |
1870                                          SYSC_OMAP2_SOFTRESET |
1871                                          SYSC_OMAP2_AUTOIDLE)>;
1872                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1873                                         <SYSC_IDLE_NO>,
1874                                         <SYSC_IDLE_SMART>,
1875                                         <SYSC_IDLE_SMART_WKUP>;
1876                         ti,syss-mask = <1>;
1877                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1878                         clocks = <&l4_per_clkctrl OMAP4_I2C2_CLKCTRL 0>;
1879                         clock-names = "fck";
1880                         #address-cells = <1>;
1881                         #size-cells = <1>;
1882                         ranges = <0x0 0x72000 0x1000>;
1883
1884                         i2c2: i2c@0 {
1885                                 compatible = "ti,omap4-i2c";
1886                                 reg = <0x0 0x100>;
1887                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1888                                 #address-cells = <1>;
1889                                 #size-cells = <0>;
1890                         };
1891                 };
1892
1893                 target-module@76000 {                   /* 0x48076000, ap 39 38.0 */
1894                         compatible = "ti,sysc-omap4", "ti,sysc";
1895                         ti,hwmods = "slimbus2";
1896                         reg = <0x76000 0x4>,
1897                               <0x76010 0x4>;
1898                         reg-names = "rev", "sysc";
1899                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1900                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1901                                         <SYSC_IDLE_NO>,
1902                                         <SYSC_IDLE_SMART>,
1903                                         <SYSC_IDLE_SMART_WKUP>;
1904                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1905                         clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
1906                         clock-names = "fck";
1907                         #address-cells = <1>;
1908                         #size-cells = <1>;
1909                         ranges = <0x0 0x76000 0x1000>;
1910
1911                         /* No child device binding or driver in mainline */
1912                 };
1913
1914                 target-module@78000 {                   /* 0x48078000, ap 41 1a.0 */
1915                         compatible = "ti,sysc-omap2", "ti,sysc";
1916                         ti,hwmods = "elm";
1917                         reg = <0x78000 0x4>,
1918                               <0x78010 0x4>,
1919                               <0x78014 0x4>;
1920                         reg-names = "rev", "sysc", "syss";
1921                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1922                                          SYSC_OMAP2_SOFTRESET |
1923                                          SYSC_OMAP2_AUTOIDLE)>;
1924                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1925                                         <SYSC_IDLE_NO>,
1926                                         <SYSC_IDLE_SMART>;
1927                         ti,syss-mask = <1>;
1928                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1929                         clocks = <&l4_per_clkctrl OMAP4_ELM_CLKCTRL 0>;
1930                         clock-names = "fck";
1931                         #address-cells = <1>;
1932                         #size-cells = <1>;
1933                         ranges = <0x0 0x78000 0x1000>;
1934
1935                         elm: elm@0 {
1936                                 compatible = "ti,am3352-elm";
1937                                 reg = <0x0 0x2000>;
1938                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1939                                 status = "disabled";
1940                         };
1941                 };
1942
1943                 target-module@86000 {                   /* 0x48086000, ap 43 24.0 */
1944                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1945                         ti,hwmods = "timer10";
1946                         reg = <0x86000 0x4>,
1947                               <0x86010 0x4>,
1948                               <0x86014 0x4>;
1949                         reg-names = "rev", "sysc", "syss";
1950                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1951                                          SYSC_OMAP2_EMUFREE |
1952                                          SYSC_OMAP2_ENAWAKEUP |
1953                                          SYSC_OMAP2_SOFTRESET |
1954                                          SYSC_OMAP2_AUTOIDLE)>;
1955                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1956                                         <SYSC_IDLE_NO>,
1957                                         <SYSC_IDLE_SMART>;
1958                         ti,syss-mask = <1>;
1959                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1960                         clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 0>;
1961                         clock-names = "fck";
1962                         #address-cells = <1>;
1963                         #size-cells = <1>;
1964                         ranges = <0x0 0x86000 0x1000>;
1965
1966                         timer10: timer@0 {
1967                                 compatible = "ti,omap3430-timer";
1968                                 reg = <0x0 0x80>;
1969                                 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>;
1970                                 clock-names = "fck";
1971                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1972                                 ti,timer-pwm;
1973                         };
1974                 };
1975
1976                 target-module@88000 {                   /* 0x48088000, ap 45 2e.0 */
1977                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1978                         ti,hwmods = "timer11";
1979                         reg = <0x88000 0x4>,
1980                               <0x88010 0x4>;
1981                         reg-names = "rev", "sysc";
1982                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1983                                          SYSC_OMAP4_SOFTRESET)>;
1984                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1985                                         <SYSC_IDLE_NO>,
1986                                         <SYSC_IDLE_SMART>,
1987                                         <SYSC_IDLE_SMART_WKUP>;
1988                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1989                         clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 0>;
1990                         clock-names = "fck";
1991                         #address-cells = <1>;
1992                         #size-cells = <1>;
1993                         ranges = <0x0 0x88000 0x1000>;
1994
1995                         timer11: timer@0 {
1996                                 compatible = "ti,omap4430-timer";
1997                                 reg = <0x0 0x80>;
1998                                 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>;
1999                                 clock-names = "fck";
2000                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
2001                                 ti,timer-pwm;
2002                         };
2003                 };
2004
2005                 target-module@90000 {                   /* 0x48090000, ap 57 2a.0 */
2006                         compatible = "ti,sysc";
2007                         status = "disabled";
2008                         #address-cells = <1>;
2009                         #size-cells = <1>;
2010                         ranges = <0x0 0x90000 0x2000>;
2011                 };
2012
2013                 target-module@96000 {                   /* 0x48096000, ap 37 26.0 */
2014                         compatible = "ti,sysc-omap2", "ti,sysc";
2015                         reg = <0x9608c 0x4>;
2016                         reg-names = "sysc";
2017                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2018                                          SYSC_OMAP2_ENAWAKEUP |
2019                                          SYSC_OMAP2_SOFTRESET)>;
2020                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2021                                         <SYSC_IDLE_NO>,
2022                                         <SYSC_IDLE_SMART>;
2023                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2024                         clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 0>;
2025                         clock-names = "fck";
2026                         #address-cells = <1>;
2027                         #size-cells = <1>;
2028                         ranges = <0x0 0x96000 0x1000>;
2029
2030                         mcbsp4: mcbsp@0 {
2031                                 compatible = "ti,omap4-mcbsp";
2032                                 reg = <0x0 0xff>; /* L4 Interconnect */
2033                                 reg-names = "mpu";
2034                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2035                                 interrupt-names = "common";
2036                                 ti,buffer-size = <128>;
2037                                 dmas = <&sdma 31>,
2038                                        <&sdma 32>;
2039                                 dma-names = "tx", "rx";
2040                                 status = "disabled";
2041                         };
2042                 };
2043
2044                 target-module@98000 {                   /* 0x48098000, ap 49 22.0 */
2045                         compatible = "ti,sysc-omap4", "ti,sysc";
2046                         reg = <0x98000 0x4>,
2047                               <0x98010 0x4>;
2048                         reg-names = "rev", "sysc";
2049                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2050                                          SYSC_OMAP4_SOFTRESET)>;
2051                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2052                                         <SYSC_IDLE_NO>,
2053                                         <SYSC_IDLE_SMART>,
2054                                         <SYSC_IDLE_SMART_WKUP>;
2055                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2056                         clocks = <&l4_per_clkctrl OMAP4_MCSPI1_CLKCTRL 0>;
2057                         clock-names = "fck";
2058                         #address-cells = <1>;
2059                         #size-cells = <1>;
2060                         ranges = <0x0 0x98000 0x1000>;
2061
2062                         mcspi1: spi@0 {
2063                                 compatible = "ti,omap4-mcspi";
2064                                 reg = <0x0 0x200>;
2065                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
2066                                 #address-cells = <1>;
2067                                 #size-cells = <0>;
2068                                 ti,spi-num-cs = <4>;
2069                                 dmas = <&sdma 35>,
2070                                        <&sdma 36>,
2071                                        <&sdma 37>,
2072                                        <&sdma 38>,
2073                                        <&sdma 39>,
2074                                        <&sdma 40>,
2075                                        <&sdma 41>,
2076                                        <&sdma 42>;
2077                                 dma-names = "tx0", "rx0", "tx1", "rx1",
2078                                             "tx2", "rx2", "tx3", "rx3";
2079                         };
2080                 };
2081
2082                 target-module@9a000 {                   /* 0x4809a000, ap 51 2c.0 */
2083                         compatible = "ti,sysc-omap4", "ti,sysc";
2084                         reg = <0x9a000 0x4>,
2085                               <0x9a010 0x4>;
2086                         reg-names = "rev", "sysc";
2087                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2088                                          SYSC_OMAP4_SOFTRESET)>;
2089                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2090                                         <SYSC_IDLE_NO>,
2091                                         <SYSC_IDLE_SMART>,
2092                                         <SYSC_IDLE_SMART_WKUP>;
2093                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2094                         clocks = <&l4_per_clkctrl OMAP4_MCSPI2_CLKCTRL 0>;
2095                         clock-names = "fck";
2096                         #address-cells = <1>;
2097                         #size-cells = <1>;
2098                         ranges = <0x0 0x9a000 0x1000>;
2099
2100                         mcspi2: spi@0 {
2101                                 compatible = "ti,omap4-mcspi";
2102                                 reg = <0x0 0x200>;
2103                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
2104                                 #address-cells = <1>;
2105                                 #size-cells = <0>;
2106                                 ti,spi-num-cs = <2>;
2107                                 dmas = <&sdma 43>,
2108                                        <&sdma 44>,
2109                                        <&sdma 45>,
2110                                        <&sdma 46>;
2111                                 dma-names = "tx0", "rx0", "tx1", "rx1";
2112                         };
2113                 };
2114
2115                 target-module@9c000 {                   /* 0x4809c000, ap 53 36.0 */
2116                         compatible = "ti,sysc-omap4", "ti,sysc";
2117                         reg = <0x9c000 0x4>,
2118                               <0x9c010 0x4>;
2119                         reg-names = "rev", "sysc";
2120                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2121                                          SYSC_OMAP4_SOFTRESET)>;
2122                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2123                                         <SYSC_IDLE_NO>,
2124                                         <SYSC_IDLE_SMART>,
2125                                         <SYSC_IDLE_SMART_WKUP>;
2126                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2127                                         <SYSC_IDLE_NO>,
2128                                         <SYSC_IDLE_SMART>,
2129                                         <SYSC_IDLE_SMART_WKUP>;
2130                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2131                         clocks = <&l3_init_clkctrl OMAP4_MMC1_CLKCTRL 0>;
2132                         clock-names = "fck";
2133                         #address-cells = <1>;
2134                         #size-cells = <1>;
2135                         ranges = <0x0 0x9c000 0x1000>;
2136
2137                         mmc1: mmc@0 {
2138                                 compatible = "ti,omap4-hsmmc";
2139                                 reg = <0x0 0x400>;
2140                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
2141                                 ti,dual-volt;
2142                                 ti,needs-special-reset;
2143                                 dmas = <&sdma 61>, <&sdma 62>;
2144                                 dma-names = "tx", "rx";
2145                                 pbias-supply = <&pbias_mmc_reg>;
2146                         };
2147                 };
2148
2149                 target-module@9e000 {                   /* 0x4809e000, ap 55 48.0 */
2150                         compatible = "ti,sysc";
2151                         status = "disabled";
2152                         #address-cells = <1>;
2153                         #size-cells = <1>;
2154                         ranges = <0x0 0x9e000 0x1000>;
2155                 };
2156
2157                 target-module@a2000 {                   /* 0x480a2000, ap 79 3a.0 */
2158                         compatible = "ti,sysc";
2159                         status = "disabled";
2160                         #address-cells = <1>;
2161                         #size-cells = <1>;
2162                         ranges = <0x0 0xa2000 0x1000>;
2163                 };
2164
2165                 target-module@a4000 {                   /* 0x480a4000, ap 59 34.0 */
2166                         compatible = "ti,sysc";
2167                         status = "disabled";
2168                         #address-cells = <1>;
2169                         #size-cells = <1>;
2170                         ranges = <0x00000000 0x000a4000 0x00001000>,
2171                                  <0x00001000 0x000a5000 0x00001000>;
2172                 };
2173
2174                 target-module@a8000 {                   /* 0x480a8000, ap 61 3e.0 */
2175                         compatible = "ti,sysc";
2176                         status = "disabled";
2177                         #address-cells = <1>;
2178                         #size-cells = <1>;
2179                         ranges = <0x0 0xa8000 0x4000>;
2180                 };
2181
2182                 target-module@ad000 {                   /* 0x480ad000, ap 63 50.0 */
2183                         compatible = "ti,sysc-omap4", "ti,sysc";
2184                         reg = <0xad000 0x4>,
2185                               <0xad010 0x4>;
2186                         reg-names = "rev", "sysc";
2187                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2188                                          SYSC_OMAP4_SOFTRESET)>;
2189                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2190                                         <SYSC_IDLE_NO>,
2191                                         <SYSC_IDLE_SMART>,
2192                                         <SYSC_IDLE_SMART_WKUP>;
2193                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2194                                         <SYSC_IDLE_NO>,
2195                                         <SYSC_IDLE_SMART>,
2196                                         <SYSC_IDLE_SMART_WKUP>;
2197                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2198                         clocks = <&l4_per_clkctrl OMAP4_MMC3_CLKCTRL 0>;
2199                         clock-names = "fck";
2200                         #address-cells = <1>;
2201                         #size-cells = <1>;
2202                         ranges = <0x0 0xad000 0x1000>;
2203
2204                         mmc3: mmc@0 {
2205                                 compatible = "ti,omap4-hsmmc";
2206                                 reg = <0x0 0x400>;
2207                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
2208                                 ti,needs-special-reset;
2209                                 dmas = <&sdma 77>, <&sdma 78>;
2210                                 dma-names = "tx", "rx";
2211                         };
2212                 };
2213
2214                 target-module@b0000 {                   /* 0x480b0000, ap 47 40.0 */
2215                         compatible = "ti,sysc";
2216                         status = "disabled";
2217                         #address-cells = <1>;
2218                         #size-cells = <1>;
2219                         ranges = <0x0 0xb0000 0x1000>;
2220                 };
2221
2222                 target-module@b2000 {                   /* 0x480b2000, ap 65 3c.0 */
2223                         compatible = "ti,sysc-omap2", "ti,sysc";
2224                         reg = <0xb2000 0x4>,
2225                               <0xb2014 0x4>,
2226                               <0xb2018 0x4>;
2227                         reg-names = "rev", "sysc", "syss";
2228                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2229                                          SYSC_OMAP2_AUTOIDLE)>;
2230                         ti,syss-mask = <1>;
2231                         ti,no-reset-on-init;
2232                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2233                         clocks = <&l4_per_clkctrl OMAP4_HDQ1W_CLKCTRL 0>;
2234                         clock-names = "fck";
2235                         #address-cells = <1>;
2236                         #size-cells = <1>;
2237                         ranges = <0x0 0xb2000 0x1000>;
2238
2239                         hdqw1w: 1w@0 {
2240                                 compatible = "ti,omap3-1w";
2241                                 reg = <0x0 0x1000>;
2242                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
2243                         };
2244                 };
2245
2246                 target-module@b4000 {                   /* 0x480b4000, ap 67 46.0 */
2247                         compatible = "ti,sysc-omap4", "ti,sysc";
2248                         reg = <0xb4000 0x4>,
2249                               <0xb4010 0x4>;
2250                         reg-names = "rev", "sysc";
2251                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2252                                          SYSC_OMAP4_SOFTRESET)>;
2253                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2254                                         <SYSC_IDLE_NO>,
2255                                         <SYSC_IDLE_SMART>,
2256                                         <SYSC_IDLE_SMART_WKUP>;
2257                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2258                                         <SYSC_IDLE_NO>,
2259                                         <SYSC_IDLE_SMART>,
2260                                         <SYSC_IDLE_SMART_WKUP>;
2261                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2262                         clocks = <&l3_init_clkctrl OMAP4_MMC2_CLKCTRL 0>;
2263                         clock-names = "fck";
2264                         #address-cells = <1>;
2265                         #size-cells = <1>;
2266                         ranges = <0x0 0xb4000 0x1000>;
2267
2268                         mmc2: mmc@0 {
2269                                 compatible = "ti,omap4-hsmmc";
2270                                 reg = <0x0 0x400>;
2271                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2272                                 ti,needs-special-reset;
2273                                 dmas = <&sdma 47>, <&sdma 48>;
2274                                 dma-names = "tx", "rx";
2275                         };
2276                 };
2277
2278                 target-module@b8000 {                   /* 0x480b8000, ap 69 58.0 */
2279                         compatible = "ti,sysc-omap4", "ti,sysc";
2280                         reg = <0xb8000 0x4>,
2281                               <0xb8010 0x4>;
2282                         reg-names = "rev", "sysc";
2283                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2284                                          SYSC_OMAP4_SOFTRESET)>;
2285                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2286                                         <SYSC_IDLE_NO>,
2287                                         <SYSC_IDLE_SMART>,
2288                                         <SYSC_IDLE_SMART_WKUP>;
2289                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2290                         clocks = <&l4_per_clkctrl OMAP4_MCSPI3_CLKCTRL 0>;
2291                         clock-names = "fck";
2292                         #address-cells = <1>;
2293                         #size-cells = <1>;
2294                         ranges = <0x0 0xb8000 0x1000>;
2295
2296                         mcspi3: spi@0 {
2297                                 compatible = "ti,omap4-mcspi";
2298                                 reg = <0x0 0x200>;
2299                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2300                                 #address-cells = <1>;
2301                                 #size-cells = <0>;
2302                                 ti,spi-num-cs = <2>;
2303                                 dmas = <&sdma 15>, <&sdma 16>;
2304                                 dma-names = "tx0", "rx0";
2305                         };
2306                 };
2307
2308                 target-module@ba000 {                   /* 0x480ba000, ap 71 32.0 */
2309                         compatible = "ti,sysc-omap4", "ti,sysc";
2310                         reg = <0xba000 0x4>,
2311                               <0xba010 0x4>;
2312                         reg-names = "rev", "sysc";
2313                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2314                                          SYSC_OMAP4_SOFTRESET)>;
2315                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2316                                         <SYSC_IDLE_NO>,
2317                                         <SYSC_IDLE_SMART>,
2318                                         <SYSC_IDLE_SMART_WKUP>;
2319                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2320                         clocks = <&l4_per_clkctrl OMAP4_MCSPI4_CLKCTRL 0>;
2321                         clock-names = "fck";
2322                         #address-cells = <1>;
2323                         #size-cells = <1>;
2324                         ranges = <0x0 0xba000 0x1000>;
2325
2326                         mcspi4: spi@0 {
2327                                 compatible = "ti,omap4-mcspi";
2328                                 reg = <0x0 0x200>;
2329                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2330                                 #address-cells = <1>;
2331                                 #size-cells = <0>;
2332                                 ti,spi-num-cs = <1>;
2333                                 dmas = <&sdma 70>, <&sdma 71>;
2334                                 dma-names = "tx0", "rx0";
2335                         };
2336                 };
2337
2338                 target-module@d1000 {                   /* 0x480d1000, ap 73 44.0 */
2339                         compatible = "ti,sysc-omap4", "ti,sysc";
2340                         reg = <0xd1000 0x4>,
2341                               <0xd1010 0x4>;
2342                         reg-names = "rev", "sysc";
2343                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2344                                          SYSC_OMAP4_SOFTRESET)>;
2345                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2346                                         <SYSC_IDLE_NO>,
2347                                         <SYSC_IDLE_SMART>,
2348                                         <SYSC_IDLE_SMART_WKUP>;
2349                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2350                                         <SYSC_IDLE_NO>,
2351                                         <SYSC_IDLE_SMART>,
2352                                         <SYSC_IDLE_SMART_WKUP>;
2353                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2354                         clocks = <&l4_per_clkctrl OMAP4_MMC4_CLKCTRL 0>;
2355                         clock-names = "fck";
2356                         #address-cells = <1>;
2357                         #size-cells = <1>;
2358                         ranges = <0x0 0xd1000 0x1000>;
2359
2360                         mmc4: mmc@0 {
2361                                 compatible = "ti,omap4-hsmmc";
2362                                 reg = <0x0 0x400>;
2363                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2364                                 ti,needs-special-reset;
2365                                 dmas = <&sdma 57>, <&sdma 58>;
2366                                 dma-names = "tx", "rx";
2367                         };
2368                 };
2369
2370                 target-module@d5000 {                   /* 0x480d5000, ap 75 4e.0 */
2371                         compatible = "ti,sysc-omap4", "ti,sysc";
2372                         reg = <0xd5000 0x4>,
2373                               <0xd5010 0x4>;
2374                         reg-names = "rev", "sysc";
2375                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2376                                          SYSC_OMAP4_SOFTRESET)>;
2377                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2378                                         <SYSC_IDLE_NO>,
2379                                         <SYSC_IDLE_SMART>,
2380                                         <SYSC_IDLE_SMART_WKUP>;
2381                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2382                                         <SYSC_IDLE_NO>,
2383                                         <SYSC_IDLE_SMART>,
2384                                         <SYSC_IDLE_SMART_WKUP>;
2385                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2386                         clocks = <&l4_per_clkctrl OMAP4_MMC5_CLKCTRL 0>;
2387                         clock-names = "fck";
2388                         #address-cells = <1>;
2389                         #size-cells = <1>;
2390                         ranges = <0x0 0xd5000 0x1000>;
2391
2392                         mmc5: mmc@0 {
2393                                 compatible = "ti,omap4-hsmmc";
2394                                 reg = <0x0 0x400>;
2395                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2396                                 ti,needs-special-reset;
2397                                 dmas = <&sdma 59>, <&sdma 60>;
2398                                 dma-names = "tx", "rx";
2399                         };
2400                 };
2401         };
2402
2403         segment@200000 {                                        /* 0x48200000 */
2404                 compatible = "simple-bus";
2405                 #address-cells = <1>;
2406                 #size-cells = <1>;
2407                 ranges = <0x00150000 0x00350000 0x001000>,      /* ap 77 */
2408                          <0x00151000 0x00351000 0x001000>;      /* ap 78 */
2409
2410                 target-module@150000 {                  /* 0x48350000, ap 77 4c.0 */
2411                         compatible = "ti,sysc-omap2", "ti,sysc";
2412                         reg = <0x150000 0x8>,
2413                               <0x150010 0x8>,
2414                               <0x150090 0x8>;
2415                         reg-names = "rev", "sysc", "syss";
2416                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2417                                          SYSC_OMAP2_ENAWAKEUP |
2418                                          SYSC_OMAP2_SOFTRESET |
2419                                          SYSC_OMAP2_AUTOIDLE)>;
2420                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2421                                         <SYSC_IDLE_NO>,
2422                                         <SYSC_IDLE_SMART>,
2423                                         <SYSC_IDLE_SMART_WKUP>;
2424                         ti,syss-mask = <1>;
2425                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2426                         clocks = <&l4_per_clkctrl OMAP4_I2C4_CLKCTRL 0>;
2427                         clock-names = "fck";
2428                         #address-cells = <1>;
2429                         #size-cells = <1>;
2430                         ranges = <0x0 0x150000 0x1000>;
2431
2432                         i2c4: i2c@0 {
2433                                 compatible = "ti,omap4-i2c";
2434                                 reg = <0x0 0x100>;
2435                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
2436                                 #address-cells = <1>;
2437                                 #size-cells = <0>;
2438                         };
2439                 };
2440         };
2441 };
2442