arch/arm/boot/dts/qcom/msm8996-agave-adp.dtsi

   1 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12
  13 #include "msm8996-pinctrl.dtsi"
  14 #include "msm8996-camera-sensor-adp.dtsi"
  15 #include "msm8996-wsa881x.dtsi"
  16
  17 / {
  18         bluetooth: bt_qca6174 {
  19                 compatible = "qca,qca6174";
  20                 qca,bt-reset-gpio = <&pm8994_gpios 19 0>; /* BT_EN */
  21                 qca,bt-vdd-core-supply = <&pm8994_s3>;
  22                 qca,bt-vdd-pa-supply = <&rome_vreg>;
  23                 qca,bt-vdd-io-supply = <&pm8994_s4>;
  24                 qca,bt-vdd-xtal-supply = <&pm8994_l30>;
  25                 qca,bt-chip-pwd-voltage-level = <1300000 1300000>;
  26                 qca,bt-vdd-io-voltage-level = <1800000 1800000>;
  27                 qca,bt-vdd-xtal-voltage-level = <1800000 1800000>;
  28         };
  29 };
  30
  31 &ufs_ice {
  32         status = "ok";
  33 };
  34
  35 &sdcc1_ice {
  36         status = "ok";
  37 };
  38
  39 &ufsphy1 {
  40         status = "ok";
  41 };
  42
  43 &ufs1 {
  44         status = "ok";
  45 };
  46
  47 &pcie0 {
  48         qcom,phy-sequence = <0x404 0x01 0x00
  49                                 0x034 0x1c 0x00
  50                                 0x038 0x10 0x00
  51                                 0x174 0x33 0x00
  52                                 0x194 0x06 0x00
  53                                 0x0c8 0x42 0x00
  54                                 0x128 0x00 0x00
  55                                 0x144 0xff 0x00
  56                                 0x148 0x1f 0x00
  57                                 0x178 0x01 0x00
  58                                 0x19c 0x01 0x00
  59                                 0x18c 0x00 0x00
  60                                 0x184 0x0a 0x00
  61                                 0x00c 0x09 0x00
  62                                 0x0d0 0x82 0x00
  63                                 0x0e4 0x03 0x00
  64                                 0x0e0 0x55 0x00
  65                                 0x0dc 0x55 0x00
  66                                 0x054 0x00 0x00
  67                                 0x050 0x1a 0x00
  68                                 0x04c 0x0a 0x00
  69                                 0x174 0x33 0x00
  70                                 0x03c 0x02 0x00
  71                                 0x040 0x1f 0x00
  72                                 0x0ac 0x04 0x00
  73                                 0x078 0x0b 0x00
  74                                 0x084 0x16 0x00
  75                                 0x090 0x28 0x00
  76                                 0x10c 0x00 0x00
  77                                 0x108 0x80 0x00
  78                                 0x010 0x01 0x00
  79                                 0x01c 0x31 0x00
  80                                 0x020 0x01 0x00
  81                                 0x014 0x02 0x00
  82                                 0x018 0x00 0x00
  83                                 0x024 0x2f 0x00
  84                                 0x028 0x19 0x00
  85                                 0x0c4 0x15 0x00
  86                                 0x070 0x0f 0x00
  87                                 0x048 0x0f 0x00
  88                                 0x074 0x19 0x00
  89                                 0x038 0x10 0x00
  90                                 0x178 0x00 0x00
  91                                 0x0c4 0x40 0x00
  92                                 0x400 0x00 0x00
  93                                 0x408 0x03 0x00>;
  94
  95         qcom,port-phy-sequence = <0x1068 0x45 0x00
  96                                 0x1094 0x06 0x00
  97                                 0x1310 0x1c 0x00
  98                                 0x1318 0x17 0x00
  99                                 0x12d8 0x01 0x00
 100                                 0x12dc 0x00 0x00
 101                                 0x12e0 0xdb 0x00
 102                                 0x1320 0x18 0x00
 103                                 0x121c 0x04 0x00
 104                                 0x1210 0x04 0x00
 105                                 0x1458 0x4c 0x00
 106                                 0x14a0 0x00 0x00
 107                                 0x14a4 0x01 0x00
 108                                 0x14a8 0x05 0x00
 109                                 0x1248 0x4b 0x00
 110                                 0x131c 0x14 0x00
 111                                 0x1454 0x05 0x00
 112                                 0x1404 0x02 0x00
 113                                 0x146c 0x00 0x00
 114                                 0x1460 0xa3 0x00
 115                                 0x1318 0x19 0x00
 116                                 0x1428 0x0e 0x00
 117                                 0x1054 0x08 0x00
 118                                 0x14f8 0x04 0x00
 119                                 0x14ec 0x06 0x00
 120                                 0x104c 0x2e 0x00
 121                                 0x1404 0x03 0x0a
 122                                 0x1400 0x00 0x00
 123                                 0x1408 0x0a 0x00>;
 124
 125         /delete-property/ qcom,l1-supported;
 126         /delete-property/ qcom,l1ss-supported;
 127         /delete-property/ qcom,aux-clk-sync;
 128 };
 129
 130 &pcie1 {
 131         qcom,phy-sequence = <0x404 0x01 0x00
 132                                 0x034 0x1c 0x00
 133                                 0x038 0x10 0x00
 134                                 0x174 0x33 0x00
 135                                 0x194 0x06 0x00
 136                                 0x0c8 0x42 0x00
 137                                 0x128 0x00 0x00
 138                                 0x144 0xff 0x00
 139                                 0x148 0x1f 0x00
 140                                 0x178 0x01 0x00
 141                                 0x19c 0x01 0x00
 142                                 0x18c 0x00 0x00
 143                                 0x184 0x0a 0x00
 144                                 0x00c 0x09 0x00
 145                                 0x0d0 0x82 0x00
 146                                 0x0e4 0x03 0x00
 147                                 0x0e0 0x55 0x00
 148                                 0x0dc 0x55 0x00
 149                                 0x054 0x00 0x00
 150                                 0x050 0x1a 0x00
 151                                 0x04c 0x0a 0x00
 152                                 0x174 0x33 0x00
 153                                 0x03c 0x02 0x00
 154                                 0x040 0x1f 0x00
 155                                 0x0ac 0x04 0x00
 156                                 0x078 0x0b 0x00
 157                                 0x084 0x16 0x00
 158                                 0x090 0x28 0x00
 159                                 0x10c 0x00 0x00
 160                                 0x108 0x80 0x00
 161                                 0x010 0x01 0x00
 162                                 0x01c 0x31 0x00
 163                                 0x020 0x01 0x00
 164                                 0x014 0x02 0x00
 165                                 0x018 0x00 0x00
 166                                 0x024 0x2f 0x00
 167                                 0x028 0x19 0x00
 168                                 0x0c4 0x15 0x00
 169                                 0x070 0x0f 0x00
 170                                 0x048 0x0f 0x00
 171                                 0x074 0x19 0x00
 172                                 0x038 0x10 0x00
 173                                 0x178 0x00 0x00
 174                                 0x0c4 0x40 0x00
 175                                 0x400 0x00 0x00
 176                                 0x408 0x03 0x00>;
 177
 178         qcom,port-phy-sequence = <0x2068 0x45 0x00
 179                                 0x2094 0x06 0x00
 180                                 0x2310 0x1c 0x00
 181                                 0x2318 0x17 0x00
 182                                 0x22d8 0x01 0x00
 183                                 0x22dc 0x00 0x00
 184                                 0x22e0 0xdb 0x00
 185                                 0x2320 0x18 0x00
 186                                 0x221c 0x04 0x00
 187                                 0x2210 0x04 0x00
 188                                 0x2458 0x4c 0x00
 189                                 0x24a0 0x00 0x00
 190                                 0x24a4 0x01 0x00
 191                                 0x24a8 0x05 0x00
 192                                 0x2248 0x4b 0x00
 193                                 0x231c 0x14 0x00
 194                                 0x2454 0x05 0x00
 195                                 0x2404 0x02 0x00
 196                                 0x246c 0x00 0x00
 197                                 0x2460 0xa3 0x00
 198                                 0x2318 0x19 0x00
 199                                 0x2428 0x0e 0x00
 200                                 0x2054 0x08 0x00
 201                                 0x24f8 0x04 0x00
 202                                 0x24ec 0x06 0x00
 203                                 0x204c 0x2e 0x00
 204                                 0x2404 0x03 0x0a
 205                                 0x2400 0x00 0x00
 206                                 0x2408 0x0a 0x00>;
 207
 208         qcom,msi-gicm-addr = <0x09BD0040>;
 209         qcom,msi-gicm-base = <0x240>;
 210
 211         /delete-property/ qcom,l1-supported;
 212         /delete-property/ qcom,l1ss-supported;
 213         /delete-property/ qcom,aux-clk-sync;
 214 };
 215
 216 &pcie2 {
 217         qcom,phy-sequence = <0x404 0x01 0x00
 218                                 0x034 0x1c 0x00
 219                                 0x038 0x10 0x00
 220                                 0x174 0x33 0x00
 221                                 0x194 0x06 0x00
 222                                 0x0c8 0x42 0x00
 223                                 0x128 0x00 0x00
 224                                 0x144 0xff 0x00
 225                                 0x148 0x1f 0x00
 226                                 0x178 0x01 0x00
 227                                 0x19c 0x01 0x00
 228                                 0x18c 0x00 0x00
 229                                 0x184 0x0a 0x00
 230                                 0x00c 0x09 0x00
 231                                 0x0d0 0x82 0x00
 232                                 0x0e4 0x03 0x00
 233                                 0x0e0 0x55 0x00
 234                                 0x0dc 0x55 0x00
 235                                 0x054 0x00 0x00
 236                                 0x050 0x1a 0x00
 237                                 0x04c 0x0a 0x00
 238                                 0x174 0x33 0x00
 239                                 0x03c 0x02 0x00
 240                                 0x040 0x1f 0x00
 241                                 0x0ac 0x04 0x00
 242                                 0x078 0x0b 0x00
 243                                 0x084 0x16 0x00
 244                                 0x090 0x28 0x00
 245                                 0x10c 0x00 0x00
 246                                 0x108 0x80 0x00
 247                                 0x010 0x01 0x00
 248                                 0x01c 0x31 0x00
 249                                 0x020 0x01 0x00
 250                                 0x014 0x02 0x00
 251                                 0x018 0x00 0x00
 252                                 0x024 0x2f 0x00
 253                                 0x028 0x19 0x00
 254                                 0x0c4 0x15 0x00
 255                                 0x070 0x0f 0x00
 256                                 0x048 0x0f 0x00
 257                                 0x074 0x19 0x00
 258                                 0x038 0x10 0x00
 259                                 0x178 0x00 0x00
 260                                 0x0c4 0x40 0x00
 261                                 0x400 0x00 0x00
 262                                 0x408 0x03 0x00>;
 263
 264         qcom,port-phy-sequence = <0x3068 0x45 0x00
 265                                 0x3094 0x06 0x00
 266                                 0x3310 0x1c 0x00
 267                                 0x3318 0x17 0x00
 268                                 0x32d8 0x01 0x00
 269                                 0x32dc 0x00 0x00
 270                                 0x32e0 0xdb 0x00
 271                                 0x3320 0x18 0x00
 272                                 0x321c 0x04 0x00
 273                                 0x3210 0x04 0x00
 274                                 0x3458 0x4c 0x00
 275                                 0x34a0 0x00 0x00
 276                                 0x34a4 0x01 0x00
 277                                 0x34a8 0x05 0x00
 278                                 0x3248 0x4b 0x00
 279                                 0x331c 0x14 0x00
 280                                 0x3454 0x05 0x00
 281                                 0x3404 0x02 0x00
 282                                 0x346c 0x00 0x00
 283                                 0x3460 0xa3 0x00
 284                                 0x3318 0x19 0x00
 285                                 0x3428 0x0e 0x00
 286                                 0x3054 0x08 0x00
 287                                 0x34f8 0x04 0x00
 288                                 0x34ec 0x06 0x00
 289                                 0x304c 0x2e 0x00
 290                                 0x3404 0x03 0x0a
 291                                 0x3400 0x00 0x00
 292                                 0x3408 0x0a 0x00>;
 293
 294         /delete-property/ qcom,l1-supported;
 295         /delete-property/ qcom,l1ss-supported;
 296         /delete-property/ qcom,aux-clk-sync;
 297 };
 298
 299 &uartblsp2dm1 {
 300         status = "ok";
 301         pinctrl-names = "default";
 302         pinctrl-0 = <&uart_console_active>;
 303 };
 304
 305 &sdhc_1 {
 306         vdd-supply = <&pm8994_l20>;
 307         qcom,vdd-voltage-level = <2950000 2950000>;
 308         qcom,vdd-current-level = <200 570000>;
 309
 310         vdd-io-supply = <&pm8994_s4>;
 311         qcom,vdd-io-always-on;
 312         qcom,vdd-io-voltage-level = <1800000 1800000>;
 313         qcom,vdd-io-current-level = <110 325000>;
 314
 315         pinctrl-names = "active", "sleep";
 316         pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
 317         pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
 318
 319         qcom,clk-rates = <400000 20000000 25000000 50000000
 320                                 96000000 192000000 384000000>;
 321         qcom,ice-clk-rates = <300000000 150000000>;
 322         qcom,nonremovable;
 323         qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
 324
 325         status = "ok";
 326 };
 327
 328 &sdhc_2 {
 329         vdd-supply = <&pm8994_l21>;
 330         qcom,vdd-voltage-level = <2950000 2950000>;
 331         qcom,vdd-current-level = <200 800000>;
 332
 333         vdd-io-supply = <&pm8994_l13>;
 334         qcom,vdd-io-voltage-level = <1800000 2950000>;
 335         qcom,vdd-io-current-level = <200 22000>;
 336
 337         pinctrl-names = "active", "sleep";
 338         pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
 339         pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
 340
 341         qcom,clk-rates = <400000 20000000 25000000
 342                                 50000000 100000000 200000000>;
 343         qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
 344
 345         cd-gpios = <&tlmm 95 0x1>;
 346
 347         status = "ok";
 348 };
 349
 350 &pm8994_vadc {
 351         chan@5 {
 352                 label = "vcoin";
 353                 reg = <5>;
 354                 qcom,decimation = <0>;
 355                 qcom,pre-div-channel-scaling = <1>;
 356                 qcom,calibration-type = "absolute";
 357                 qcom,scale-function = <0>;
 358                 qcom,hw-settle-time = <0>;
 359                 qcom,fast-avg-setup = <0>;
 360         };
 361
 362         chan@7 {
 363                 label = "vph_pwr";
 364                 reg = <7>;
 365                 qcom,decimation = <0>;
 366                 qcom,pre-div-channel-scaling = <1>;
 367                 qcom,calibration-type = "absolute";
 368                 qcom,scale-function = <0>;
 369                 qcom,hw-settle-time = <0>;
 370                 qcom,fast-avg-setup = <0>;
 371         };
 372
 373         chan@73 {
 374                 label = "msm_therm";
 375                 reg = <0x73>;
 376                 qcom,decimation = <0>;
 377                 qcom,pre-div-channel-scaling = <0>;
 378                 qcom,calibration-type = "ratiometric";
 379                 qcom,scale-function = <2>;
 380                 qcom,hw-settle-time = <2>;
 381                 qcom,fast-avg-setup = <0>;
 382         };
 383
 384         chan@74 {
 385                 label = "emmc_therm";
 386                 reg = <0x74>;
 387                 qcom,decimation = <0>;
 388                 qcom,pre-div-channel-scaling = <0>;
 389                 qcom,calibration-type = "ratiometric";
 390                 qcom,scale-function = <2>;
 391                 qcom,hw-settle-time = <2>;
 392                 qcom,fast-avg-setup = <0>;
 393         };
 394
 395         chan@75 {
 396                 label = "pa_therm0";
 397                 reg = <0x75>;
 398                 qcom,decimation = <0>;
 399                 qcom,pre-div-channel-scaling = <0>;
 400                 qcom,calibration-type = "ratiometric";
 401                 qcom,scale-function = <2>;
 402                 qcom,hw-settle-time = <2>;
 403                 qcom,fast-avg-setup = <0>;
 404         };
 405
 406         chan@77 {
 407                 label = "pa_therm1";
 408                 reg = <0x77>;
 409                 qcom,decimation = <0>;
 410                 qcom,pre-div-channel-scaling = <0>;
 411                 qcom,calibration-type = "ratiometric";
 412                 qcom,scale-function = <2>;
 413                 qcom,hw-settle-time = <2>;
 414                 qcom,fast-avg-setup = <0>;
 415         };
 416
 417         chan@78 {
 418                 label = "quiet_therm";
 419                 reg = <0x78>;
 420                 qcom,decimation = <0>;
 421                 qcom,pre-div-channel-scaling = <0>;
 422                 qcom,calibration-type = "ratiometric";
 423                 qcom,scale-function = <2>;
 424                 qcom,hw-settle-time = <2>;
 425                 qcom,fast-avg-setup = <0>;
 426         };
 427
 428         chan@7c {
 429                 label = "xo_therm_buf";
 430                 reg = <0x7c>;
 431                 qcom,decimation = <0>;
 432                 qcom,pre-div-channel-scaling = <0>;
 433                 qcom,calibration-type = "ratiometric";
 434                 qcom,scale-function = <4>;
 435                 qcom,hw-settle-time = <2>;
 436                 qcom,fast-avg-setup = <0>;
 437         };
 438
 439         chan@7c {
 440                 label = "xo_therm_buf";
 441                 reg = <0x7c>;
 442                 qcom,decimation = <0>;
 443                 qcom,pre-div-channel-scaling = <0>;
 444                 qcom,calibration-type = "ratiometric";
 445                 qcom,scale-function = <4>;
 446                 qcom,hw-settle-time = <2>;
 447                 qcom,fast-avg-setup = <0>;
 448         };
 449 };
 450
 451 &pm8994_adc_tm {
 452         chan@73 {
 453                 label = "msm_therm";
 454                 reg = <0x73>;
 455                 qcom,decimation = <0>;
 456                 qcom,pre-div-channel-scaling = <0>;
 457                 qcom,calibration-type = "ratiometric";
 458                 qcom,scale-function = <2>;
 459                 qcom,hw-settle-time = <2>;
 460                 qcom,fast-avg-setup = <0>;
 461                 qcom,btm-channel-number = <0x48>;
 462                 qcom,thermal-node;
 463         };
 464
 465         chan@74 {
 466                 label = "emmc_therm";
 467                 reg = <0x74>;
 468                 qcom,decimation = <0>;
 469                 qcom,pre-div-channel-scaling = <0>;
 470                 qcom,calibration-type = "ratiometric";
 471                 qcom,scale-function = <2>;
 472                 qcom,hw-settle-time = <2>;
 473                 qcom,fast-avg-setup = <0>;
 474                 qcom,btm-channel-number = <0x68>;
 475                 qcom,thermal-node;
 476         };
 477
 478         chan@75 {
 479                 label = "pa_therm0";
 480                 reg = <0x75>;
 481                 qcom,decimation = <0>;
 482                 qcom,pre-div-channel-scaling = <0>;
 483                 qcom,calibration-type = "ratiometric";
 484                 qcom,scale-function = <2>;
 485                 qcom,hw-settle-time = <2>;
 486                 qcom,fast-avg-setup = <0>;
 487                 qcom,btm-channel-number = <0x70>;
 488                 qcom,thermal-node;
 489         };
 490
 491         chan@77 {
 492                 label = "pa_therm1";
 493                 reg = <0x77>;
 494                 qcom,decimation = <0>;
 495                 qcom,pre-div-channel-scaling = <0>;
 496                 qcom,calibration-type = "ratiometric";
 497                 qcom,scale-function = <2>;
 498                 qcom,hw-settle-time = <2>;
 499                 qcom,fast-avg-setup = <0>;
 500                 qcom,btm-channel-number = <0x78>;
 501                 qcom,thermal-node;
 502         };
 503
 504         chan@78 {
 505                 label = "quiet_therm";
 506                 reg = <0x78>;
 507                 qcom,decimation = <0>;
 508                 qcom,pre-div-channel-scaling = <0>;
 509                 qcom,calibration-type = "ratiometric";
 510                 qcom,scale-function = <2>;
 511                 qcom,hw-settle-time = <2>;
 512                 qcom,fast-avg-setup = <0>;
 513                 qcom,btm-channel-number = <0x80>;
 514                 qcom,thermal-node;
 515         };
 516
 517         chan@7c {
 518                 label = "xo_therm_buf";
 519                 reg = <0x7c>;
 520                 qcom,decimation = <0>;
 521                 qcom,pre-div-channel-scaling = <0>;
 522                 qcom,calibration-type = "ratiometric";
 523                 qcom,scale-function = <4>;
 524                 qcom,hw-settle-time = <2>;
 525                 qcom,fast-avg-setup = <0>;
 526                 qcom,btm-channel-number = <0x88>;
 527                 qcom,thermal-node;
 528         };
 529 };
 530
 531 &mdss_hdmi_tx {
 532         qcom,display-id = "secondary";
 533         pinctrl-names = "hdmi_hpd_active", "hdmi_ddc_active", "hdmi_cec_active",
 534                                 "hdmi_active", "hdmi_sleep";
 535         pinctrl-0 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_suspend
 536                                                 &mdss_hdmi_cec_suspend>;
 537         pinctrl-1 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active
 538                                                 &mdss_hdmi_cec_suspend>;
 539         pinctrl-2 = <&mdss_hdmi_hpd_active &mdss_hdmi_cec_active
 540                                                 &mdss_hdmi_ddc_suspend>;
 541         pinctrl-3 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active
 542                                                 &mdss_hdmi_cec_active>;
 543         pinctrl-4 = <&mdss_hdmi_hpd_suspend &mdss_hdmi_ddc_suspend
 544                                                 &mdss_hdmi_cec_suspend>;
 545         /delete-property/ qcom,pluggable;
 546 };
 547
 548 #include "msm8996-sde-display.dtsi"
 549
 550 &sde_kms {
 551         qcom,mdss-pref-prim-intf = "dsi";
 552 };
 553
 554 &dsi_adv_7533_1 {
 555         qcom,dsi-display-active;
 556         qcom,dsi-panel = <&dsi_adv7533_1080p>;
 557
 558         qcom,panel-supply-entries {
 559                 #address-cells = <1>;
 560                 #size-cells = <0>;
 561
 562                 qcom,panel-supply-entry@0 {
 563                         reg = <0>;
 564                         qcom,supply-name = "vdd";
 565                         qcom,supply-min-voltage = <3300000>;
 566                         qcom,supply-max-voltage = <3300000>;
 567                         qcom,supply-enable-load = <100000>;
 568                         qcom,supply-disable-load = <100>;
 569                 };
 570
 571                 qcom,panel-supply-entry@1 {
 572                         reg = <1>;
 573                         qcom,supply-name = "vddio";
 574                         qcom,supply-min-voltage = <1800000>;
 575                         qcom,supply-max-voltage = <1800000>;
 576                         qcom,supply-enable-load = <100000>;
 577                         qcom,supply-disable-load = <100>;
 578                 };
 579         };
 580 };
 581
 582 &dsi_adv_7533_2 {
 583         qcom,dsi-display-active;
 584         qcom,dsi-panel = <&dsi_adv7533_1080p>;
 585
 586         qcom,panel-supply-entries {
 587                 #address-cells = <1>;
 588                 #size-cells = <0>;
 589
 590                 qcom,panel-supply-entry@0 {
 591                         reg = <0>;
 592                         qcom,supply-name = "vdd";
 593                         qcom,supply-min-voltage = <3300000>;
 594                         qcom,supply-max-voltage = <3300000>;
 595                         qcom,supply-enable-load = <100000>;
 596                         qcom,supply-disable-load = <100>;
 597                 };
 598
 599                 qcom,panel-supply-entry@1 {
 600                         reg = <1>;
 601                         qcom,supply-name = "vddio";
 602                         qcom,supply-min-voltage = <1800000>;
 603                         qcom,supply-max-voltage = <1800000>;
 604                         qcom,supply-enable-load = <100000>;
 605                         qcom,supply-disable-load = <100>;
 606                 };
 607         };
 608 };
 609
 610 &sde_hdmi {
 611         qcom,non-pluggable;
 612         qcom,customize-modes {
 613                 qcom,customize-mode-id@0 {
 614                         qcom,mode-name = "1920x1080@60Hz";
 615                         qcom,mode-h-active = <1920>;
 616                         qcom,mode-h-front-porch = <88>;
 617                         qcom,mode-h-pulse-width = <44>;
 618                         qcom,mode-h-back-porch = <148>;
 619                         qcom,mode-h-active-high;
 620                         qcom,mode-v-active = <1080>;
 621                         qcom,mode-v-front-porch = <4>;
 622                         qcom,mode-v-pulse-width = <5>;
 623                         qcom,mode-v-back-porch = <36>;
 624                         qcom,mode-v-active-high;
 625                         qcom,mode-refresh-rate = <60>;
 626                         qcom,mode-clock-in-khz = <148500>;
 627                 };
 628         };
 629 };
 630
 631 &mdss_dsi {
 632         hw-config = "dual_dsi";
 633 };
 634
 635 &mdss_dsi0 {
 636         qcom,dsi-pref-prim-pan = <&dsi_adv7533_720p>;
 637         pinctrl-names = "mdss_default", "mdss_sleep";
 638         pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
 639         pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
 640         qcom,display-id = "primary";
 641         qcom,bridge-index = <0>;
 642
 643         qcom,panel-supply-entries {
 644                         #address-cells = <1>;
 645                         #size-cells = <0>;
 646
 647                         qcom,panel-supply-entry@0 {
 648                                 reg = <0>;
 649                                 qcom,supply-name = "vdd";
 650                                 qcom,supply-min-voltage = <3300000>;
 651                                 qcom,supply-max-voltage = <3300000>;
 652                                 qcom,supply-enable-load = <100000>;
 653                                 qcom,supply-disable-load = <100>;
 654                         };
 655
 656                         qcom,panel-supply-entry@1 {
 657                                 reg = <1>;
 658                                 qcom,supply-name = "vddio";
 659                                 qcom,supply-min-voltage = <1800000>;
 660                                 qcom,supply-max-voltage = <1800000>;
 661                                 qcom,supply-enable-load = <100000>;
 662                                 qcom,supply-disable-load = <100>;
 663                         };
 664         };
 665 };
 666
 667 &mdss_dsi1 {
 668         qcom,dsi-pref-prim-pan = <&dsi_adv7533_720p>;
 669         pinctrl-names = "mdss_default", "mdss_sleep";
 670         pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
 671         pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
 672         qcom,display-id = "tertiary";
 673         qcom,bridge-index = <1>;
 674
 675         qcom,panel-supply-entries {
 676                 #address-cells = <1>;
 677                 #size-cells = <0>;
 678
 679                         qcom,panel-supply-entry@0 {
 680                                 reg = <0>;
 681                                 qcom,supply-name = "vdd";
 682                                 qcom,supply-min-voltage = <3300000>;
 683                                 qcom,supply-max-voltage = <3300000>;
 684                                 qcom,supply-enable-load = <100000>;
 685                                 qcom,supply-disable-load = <100>;
 686                         };
 687
 688                         qcom,panel-supply-entry@1 {
 689                                 reg = <1>;
 690                                 qcom,supply-name = "vddio";
 691                                 qcom,supply-min-voltage = <1800000>;
 692                                 qcom,supply-max-voltage = <1800000>;
 693                                 qcom,supply-enable-load = <100000>;
 694                                 qcom,supply-disable-load = <100>;
 695                         };
 696         };
 697 };
 698
 699 &dsi_dual_sharp_video {
 700         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
 701         qcom,mdss-dsi-bl-min-level = <1>;
 702         qcom,mdss-dsi-bl-max-level = <4095>;
 703         qcom,cont-splash-enabled;
 704         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 705 };
 706
 707 &dsi_dual_nt35597_video {
 708         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
 709         qcom,mdss-dsi-bl-min-level = <1>;
 710         qcom,mdss-dsi-bl-max-level = <4095>;
 711         qcom,cont-splash-enabled;
 712         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 713 };
 714
 715 &dsi_dual_nt35597_cmd {
 716         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
 717         qcom,mdss-dsi-bl-min-level = <1>;
 718         qcom,mdss-dsi-bl-max-level = <4095>;
 719         qcom,cont-splash-enabled;
 720         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 721         qcom,partial-update-enabled = "single_roi";
 722         qcom,panel-roi-alignment = <720 128 720 64 720 64>;
 723 };
 724
 725 &dsi_nt35597_dsc_video {
 726         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
 727         qcom,mdss-dsi-bl-min-level = <1>;
 728         qcom,mdss-dsi-bl-max-level = <4095>;
 729         qcom,cont-splash-enabled;
 730         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 731 };
 732
 733 &dsi_nt35597_dsc_cmd {
 734         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
 735         qcom,mdss-dsi-bl-min-level = <1>;
 736         qcom,mdss-dsi-bl-max-level = <4095>;
 737         qcom,cont-splash-enabled;
 738         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 739 };
 740
 741 &dsi_dual_jdi_video {
 742         pwms = <&pmi8994_pwm_4 0 0>;
 743         pwm-names = "backlight";
 744         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
 745         qcom,mdss-dsi-bl-pwm-pmi;
 746         qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>;
 747         qcom,mdss-dsi-bl-min-level = <1>;
 748         qcom,mdss-dsi-bl-max-level = <4095>;
 749         qcom,5v-boost-gpio = <&pmi8994_gpios 8 0>;
 750         qcom,cont-splash-enabled;
 751         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 752 };
 753
 754 &dsi_dual_jdi_cmd {
 755         pwms = <&pmi8994_pwm_4 0 0>;
 756         pwm-names = "backlight";
 757         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
 758         qcom,mdss-dsi-bl-pwm-pmi;
 759         qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>;
 760         qcom,mdss-dsi-bl-min-level = <1>;
 761         qcom,mdss-dsi-bl-max-level = <4095>;
 762         qcom,5v-boost-gpio = <&pmi8994_gpios 8 0>;
 763         qcom,cont-splash-enabled;
 764         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 765         qcom,partial-update-enabled = "single_roi";
 766         qcom,panel-roi-alignment = <4 4 2 2 20 20>;
 767 };
 768
 769 &dsi_dual_jdi_4k_nofbc_video {
 770         pwms = <&pmi8994_pwm_4 0 0>;
 771         pwm-names = "backlight";
 772         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
 773         qcom,mdss-dsi-bl-pwm-pmi;
 774         qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>;
 775         qcom,mdss-dsi-bl-min-level = <1>;
 776         qcom,mdss-dsi-bl-max-level = <4095>;
 777         qcom,cont-splash-enabled;
 778         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 779 };
 780
 781 /{
 782         mtp_batterydata: qcom,battery-data {
 783                 qcom,batt-id-range-pct = <15>;
 784                 #include "batterydata-itech-3000mah.dtsi"
 785         };
 786 };
 787
 788 &pm8994_mpps {
 789         mpp@a100 { /* MPP 2 */
 790                 qcom,mode = <1>;                /* Digital output */
 791                 qcom,output-type = <0>;         /* CMOS logic */
 792                 qcom,vin-sel = <2>;             /* S4 1.8V */
 793                 qcom,src-sel = <0>;             /* Constant */
 794                 qcom,master-en = <1>;           /* Enable GPIO */
 795                 status = "okay";
 796         };
 797
 798         mpp@a300 { /* MPP 4 */
 799                 /* HDMI_5v_vreg regulator enable */
 800                 qcom,mode = <1>;                /* Digital output */
 801                 qcom,output-type = <0>;         /* CMOS logic */
 802                 qcom,vin-sel = <2>;             /* S4 1.8V */
 803                 qcom,src-sel = <0>;             /* Constant */
 804                 qcom,master-en = <1>;           /* Enable GPIO */
 805                 qcom,invert = <0>;
 806                 status = "okay";
 807         };
 808 };
 809
 810 &soc {
 811         qcom,early-cam {
 812                 cell-index = <0>;
 813                 compatible = "qcom,early-cam";
 814                 status = "ok";
 815                 mmagic-supply = <&gdsc_mmagic_camss>;
 816                 gdscr-supply = <&gdsc_camss_top>;
 817                 vfe0-vdd-supply = <&gdsc_vfe0>;
 818                 vfe1-vdd-supply = <&gdsc_vfe1>;
 819                 qcom,cam-vreg-name = "mmagic", "gdscr", "vfe0-vdd", "vfe1-vdd";
 820                 clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
 821                         <&clock_mmss clk_camss_top_ahb_clk>,
 822                         <&clock_mmss clk_cci_clk_src>,
 823                         <&clock_mmss clk_camss_cci_ahb_clk>,
 824                         <&clock_mmss clk_camss_cci_clk>,
 825                         <&clock_mmss clk_camss_ahb_clk>,
 826                         <&clock_mmss clk_mmagic_camss_axi_clk>,
 827                         <&clock_mmss clk_camss_vfe_ahb_clk>,
 828                         <&clock_mmss clk_camss_vfe0_ahb_clk>,
 829                         <&clock_mmss clk_camss_vfe1_ahb_clk>,
 830                         <&clock_mmss clk_camss_vfe_axi_clk>,
 831                         <&clock_mmss clk_smmu_vfe_axi_clk>,
 832                         <&clock_mmss clk_smmu_vfe_ahb_clk>,
 833                         <&clock_mmss clk_vfe0_clk_src>,
 834                         <&clock_mmss clk_vfe1_clk_src>,
 835                         <&clock_mmss clk_camss_vfe0_stream_clk>,
 836                         <&clock_mmss clk_camss_vfe1_stream_clk>,
 837                         <&clock_mmss clk_camss_csi_vfe0_clk>,
 838                         <&clock_mmss clk_camss_csi_vfe1_clk>,
 839                         <&clock_mmss clk_camss_csi2_ahb_clk>,
 840                         <&clock_mmss clk_camss_csi2_clk>,
 841                         <&clock_mmss clk_camss_csi2phy_clk>,
 842                         <&clock_mmss clk_csi2phytimer_clk_src>,
 843                         <&clock_mmss clk_camss_csi2phytimer_clk>,
 844                         <&clock_mmss clk_camss_csi2rdi_clk>,
 845                         <&clock_mmss clk_camss_ispif_ahb_clk>,
 846                         <&clock_mmss clk_camss_vfe0_clk>,
 847                         <&clock_mmss clk_camss_vfe1_clk>;
 848                 clock-names =
 849                         "mmss_mmagic_ahb_clk",
 850                         "camss_top_ahb_clk",
 851                         "cci_clk_src",
 852                         "camss_cci_ahb_clk",
 853                         "camss_cci_clk",
 854                         "camss_ahb_clk",
 855                         "mmagic_camss_axi_clk",
 856                         "camss_vfe_ahb_clk",
 857                         "camss_vfe0_ahb_clk",
 858                         "camss_vfe1_ahb_clk",
 859                         "camss_vfe_axi_clk",
 860                         "smmu_vfe_axi_clk",
 861                         "smmu_vfe_ahb_clk",
 862                         "vfe0_clk_src",
 863                         "vfe1_clk_src",
 864                         "camss_vfe0_stream_clk",
 865                         "camss_vfe1_stream_clk",
 866                         "camss_csi_vfe0_clk",
 867                         "camss_csi_vfe1_clk",
 868                         "camss_csi2_ahb_clk",
 869                         "camss_csi2_clk",
 870                         "camss_csi2phy_clk",
 871                         "csi2phytimer_clk_src",
 872                         "camss_csi2phytimer_clk",
 873                         "camss_csi2rdi_clk",
 874                         "camss_ispif_ahb_clk",
 875                         "clk_camss_vfe0_clk",
 876                         "clk_camss_vfe1_clk";
 877                 qcom,clock-rates = <19200000
 878                                         19200000
 879                                         19200000
 880                                         19200000
 881                                         19200000
 882                                         19200000
 883                                         0
 884                                         0
 885                                         0
 886                                         0
 887                                         320000000
 888                                         0
 889                                         0
 890                                         320000000
 891                                         320000000
 892                                         0
 893                                         0
 894                                         0
 895                                         0
 896                                         0
 897                                         200000000
 898                                         200000000
 899                                         200000000
 900                                         200000000
 901                                         200000000
 902                                         0
 903                                         100000000
 904                                         100000000>;
 905                 qcom,clock-cntl-support;
 906                 qcom,clock-control = "NO_SET_RATE", "NO_SET_RATE",
 907                         "NO_SET_RATE", "NO_SET_RATE",
 908                         "NO_SET_RATE", "NO_SET_RATE",
 909                         "NO_SET_RATE", "NO_SET_RATE",
 910                         "NO_SET_RATE", "NO_SET_RATE",
 911                         "NO_SET_RATE", "NO_SET_RATE",
 912                         "NO_SET_RATE", "INIT_RATE",
 913                         "INIT_RATE", "NO_SET_RATE",
 914                         "NO_SET_RATE", "NO_SET_RATE",
 915                         "NO_SET_RATE","NO_SET_RATE",
 916                         "INIT_RATE","NO_SET_RATE",
 917                         "INIT_RATE", "NO_SET_RATE",
 918                         "NO_SET_RATE","NO_SET_RATE",
 919                         "NO_SET_RATE", "NO_SET_RATE";
 920         };
 921
 922         qcom,ntn_avb {
 923                 compatible = "qcom,ntn_avb";
 924
 925                 ntn-rst-gpio = <&pm8994_gpios 13 0>;
 926                 pinctrl-names = "default";
 927                 pinctrl-0 = <&ntn_clk_sync>;
 928
 929                 vdd-ntn-hsic-supply = <&pm8994_l25>;
 930                 vdd-ntn-pci-supply = <&pm8994_s4>;
 931                 vdd-ntn-io-supply = <&pm8994_s4>;
 932
 933                 qcom,ntn-rst-delay-msec = <100>;
 934                 qcom,ntn-rc-num = <1>;
 935                 qcom,ntn-bus-num = <1>;
 936                 qcom,ntn-mdio-bus-id = <1>;
 937                 qcom,ntn-phy-addr = <7>;
 938
 939                 qcom,msm-bus,name = "ntn";
 940                 qcom,msm-bus,num-cases = <2>;
 941                 qcom,msm-bus,num-paths = <1>;
 942                 qcom,msm-bus,vectors-KBps =
 943                                 <100 512 0 0>,
 944                                 <100 512 207108 14432000>;
 945         };
 946
 947         i2c@75ba000 {
 948                 synaptics@20 {
 949                         compatible = "synaptics,dsx";
 950                         reg = <0x20>;
 951                         interrupt-parent = <&tlmm>;
 952                         interrupts = <125 0x2008>;
 953                         vdd-supply = <&pm8994_l14>;
 954                         avdd-supply = <&pm8994_l22>;
 955                         pinctrl-names = "pmx_ts_active", "pmx_ts_suspend";
 956                         pinctrl-0 = <&ts_active>;
 957                         pinctrl-1 = <&ts_suspend>;
 958                         synaptics,display-coords = <0 0 1599 2559>;
 959                         synaptics,panel-coords = <0 0 1599 2703>;
 960                         synaptics,reset-gpio = <&tlmm 89 0x00>;
 961                         synaptics,irq-gpio = <&tlmm 125 0x2008>;
 962                         synaptics,disable-gpios;
 963                         synaptics,fw-name = "PR1702898-s3528t_00350002.img";
 964                         /* Underlying clocks used by secure touch */
 965                         clock-names = "iface_clk", "core_clk";
 966                         clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>,
 967                                  <&clock_gcc clk_gcc_blsp2_qup6_i2c_apps_clk>;
 968                         status = "disabled";
 969                 };
 970         };
 971
 972         i2c@75b6000 { /* BLSP8 */
 973                 /* ADV7533 configuration */
 974                 adv7533@3d {
 975                         compatible = "adv7533";
 976                         instance_id = <0>;
 977                         reg = <0x3d>;
 978                         adi,video-mode = <3>; /* 3 = 1080p */
 979                         adi,main-addr = <0x3D>;
 980                         adi,cec-dsi-addr = <0x3E>;
 981                         adi,enable-audio;
 982                         pinctrl-names = "pmx_adv7533_active",
 983                                 "pmx_adv7533_suspend";
 984                         pinctrl-0 = <&adv7533_0_int_active
 985                                 &adv7533_0_hpd_int_active
 986                                 &adv7533_0_switch_active>;
 987                         pinctrl-1 = <&adv7533_0_int_suspend
 988                                 &adv7533_0_hpd_int_suspend
 989                                 &adv7533_0_switch_suspend>;
 990                         adi,irq-gpio = <&tlmm 106 0x2002>;
 991                         adi,switch-gpio = <&tlmm 105 0x1>;
 992                 };
 993
 994                 adv7533@39 {
 995                         compatible = "adv7533";
 996                         instance_id = <1>;
 997                         reg = <0x39>;
 998                         adi,video-mode = <3>; /* 3 = 1080p */
 999                         adi,main-addr = <0x39>;
1000                         adi,cec-dsi-addr = <0x3C>;
1001                         adi,enable-audio;
1002                         pinctrl-names = "pmx_adv7533_active",
1003                                 "pmx_adv7533_suspend";
1004                         pinctrl-0 = <&adv7533_1_int_active
1005                                 &adv7533_1_hpd_int_active
1006                                 &adv7533_1_switch_active>;
1007                         pinctrl-1 = <&adv7533_1_int_suspend
1008                                 &adv7533_1_hpd_int_suspend
1009                                 &adv7533_1_switch_suspend>;
1010                         adi,irq-gpio = <&tlmm 108 0x2002>;
1011                         adi,switch-gpio = <&tlmm 107 0x0>;
1012                 };
1013         };
1014
1015         gen-vkeys {
1016                 compatible = "qcom,gen-vkeys";
1017                 label = "synaptics_dsx";
1018                 qcom,disp-maxx = <1599>;
1019                 qcom,disp-maxy = <2559>;
1020                 qcom,panel-maxx = <1599>;
1021                 qcom,panel-maxy = <2703>;
1022                 qcom,key-codes = <158 139 102 217>;
1023         };
1024
1025         gpio_keys {
1026                 compatible = "gpio-keys";
1027                 input-name = "gpio-keys";
1028
1029                 vol_up {
1030                         label = "volume_up";
1031                         gpios = <&pm8994_gpios 2 0x1>;
1032                         linux,input-type = <1>;
1033                         linux,code = <115>;
1034                         gpio-key,wakeup;
1035                         debounce-interval = <15>;
1036                 };
1037         };
1038
1039         sound-9335 {
1040                 status = "disabled";
1041         };
1042
1043         qcom,msm-ssc-sensors {
1044                 compatible = "qcom,msm-ssc-sensors";
1045                 qcom,firmware-name = "slpi";
1046                 status = "ok";
1047         };
1048
1049         sound-adp-agave {
1050                 compatible = "qcom,apq8096-asoc-snd-adp-agave";
1051                 qcom,model = "apq8096-adp-agave-snd-card";
1052
1053                 asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
1054                                 <&loopback>, <&compress>, <&hostless>,
1055                                 <&afe>, <&lsm>, <&routing>, <&pcmnoirq>,
1056                                 <&loopback1>;
1057                 asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
1058                                 "msm-pcm-dsp.2", "msm-voip-dsp",
1059                                 "msm-pcm-voice", "msm-pcm-loopback",
1060                                 "msm-compress-dsp", "msm-pcm-hostless",
1061                                 "msm-pcm-afe", "msm-lsm-client",
1062                                 "msm-pcm-routing", "msm-pcm-dsp-noirq",
1063                                 "msm-pcm-loopback.1";
1064                 asoc-cpu = <&dai_pri_auxpcm>, <&dai_sec_auxpcm>, <&dai_hdmi>,
1065                                 <&dai_mi2s_sec>, <&dai_mi2s>, <&dai_mi2s_quat>,
1066                                 <&afe_pcm_rx>, <&afe_pcm_tx>,
1067                                 <&afe_proxy_rx>, <&afe_proxy_tx>,
1068                                 <&incall_record_rx>, <&incall_record_tx>,
1069                                 <&incall_music_rx>, <&incall_music2_rx>,
1070                                 <&dai_pri_tdm_tx_0>, <&dai_pri_tdm_tx_1>,
1071                                 <&dai_pri_tdm_tx_2>, <&dai_pri_tdm_tx_3>,
1072                                 <&dai_pri_tdm_rx_0>, <&dai_pri_tdm_rx_1>,
1073                                 <&dai_pri_tdm_rx_2>, <&dai_pri_tdm_rx_3>,
1074                                 <&dai_sec_tdm_rx_0>, <&dai_sec_tdm_rx_1>,
1075                                 <&dai_sec_tdm_rx_2>, <&dai_sec_tdm_rx_3>,
1076                                 <&dai_sec_tdm_tx_0>, <&dai_sec_tdm_tx_1>,
1077                                 <&dai_sec_tdm_tx_2>, <&dai_sec_tdm_tx_3>,
1078                                 <&dai_tert_tdm_rx_0>, <&dai_tert_tdm_rx_1>,
1079                                 <&dai_tert_tdm_rx_2>, <&dai_tert_tdm_rx_3>,
1080                                 <&dai_tert_tdm_rx_4>, <&dai_tert_tdm_tx_0>,
1081                                 <&dai_tert_tdm_tx_1>, <&dai_tert_tdm_tx_2>,
1082                                 <&dai_tert_tdm_tx_3>, <&dai_quat_tdm_rx_0>,
1083                                 <&dai_quat_tdm_rx_1>, <&dai_quat_tdm_rx_2>,
1084                                 <&dai_quat_tdm_rx_3>, <&dai_quat_tdm_tx_0>,
1085                                 <&dai_quat_tdm_tx_1>, <&dai_quat_tdm_tx_2>,
1086                                 <&dai_quat_tdm_tx_3>;
1087                 asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2",
1088                                 "msm-dai-q6-hdmi.8", "msm-dai-q6-mi2s.1",
1089                                 "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
1090                                 "msm-dai-q6-dev.224", "msm-dai-q6-dev.225",
1091                                 "msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
1092                                 "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
1093                                 "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
1094                                 "msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36867",
1095                                 "msm-dai-q6-tdm.36869", "msm-dai-q6-tdm.36871",
1096                                 "msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36866",
1097                                 "msm-dai-q6-tdm.36868", "msm-dai-q6-tdm.36870",
1098                                 "msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36882",
1099                                 "msm-dai-q6-tdm.36884", "msm-dai-q6-tdm.36886",
1100                                 "msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36883",
1101                                 "msm-dai-q6-tdm.36885", "msm-dai-q6-tdm.36887",
1102                                 "msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36898",
1103                                 "msm-dai-q6-tdm.36900", "msm-dai-q6-tdm.36902",
1104                                 "msm-dai-q6-tdm.36904", "msm-dai-q6-tdm.36897",
1105                                 "msm-dai-q6-tdm.36899", "msm-dai-q6-tdm.36901",
1106                                 "msm-dai-q6-tdm.36903", "msm-dai-q6-tdm.36912",
1107                                 "msm-dai-q6-tdm.36914", "msm-dai-q6-tdm.36916",
1108                                 "msm-dai-q6-tdm.36918", "msm-dai-q6-tdm.36913",
1109                                 "msm-dai-q6-tdm.36915", "msm-dai-q6-tdm.36917",
1110                                 "msm-dai-q6-tdm.36919";
1111                 asoc-codec = <&stub_codec>;
1112                 asoc-codec-names = "msm-stub-codec.1";
1113         };
1114
1115         qcom,msm-dai-tdm-tert-rx {
1116                 qcom,msm-cpudai-tdm-group-num-ports = <6>;
1117                 qcom,msm-cpudai-tdm-group-port-id = <36896 36898 36900
1118                         36902 36904 36906>;
1119
1120                 dai_tert_tdm_rx_5: qcom,msm-dai-q6-tdm-tert-rx-5 {
1121                         compatible = "qcom,msm-dai-q6-tdm";
1122                         qcom,msm-cpudai-tdm-dev-id = <36906>;
1123                         qcom,msm-cpudai-tdm-data-align = <0>;
1124                 };
1125         };
1126
1127         qcom,msm-ext-anc {
1128                 compatible = "qcom,msm-ext-anc";
1129                 qcom,refs-port-id = <36906>;
1130                 qcom,spkr-port-id = <36912>;
1131                 qcom,mic-port-id = <36913>;
1132                 qcom,sample-rate = <48000>;
1133                 qcom,num-channels = <8>;
1134                 qcom,bit-width = <32>;
1135                 qcom,num-anc-mic = <4>;
1136                 qcom,num-add-mic-signal = <0>;
1137                 qcom,anc-mic-array = <0 1 2 3>;
1138                 qcom,num-anc-spkr = <4>;
1139                 qcom,num-add-spkr-signal = <0>;
1140                 qcom,anc-spkr-array = <0 1 2 3>;
1141                 qcom,refs-tdm-rx = <&dai_tert_tdm_rx_5>;
1142                 qcom,spkr-tdm-rx = <&dai_quat_tdm_rx_0>;
1143                 qcom,mic-tdm-tx = <&dai_quat_tdm_tx_0>;
1144         };
1145
1146         usb_detect: usb_detect {
1147                 compatible = "qcom,gpio-usbdetect";
1148                 qcom,vbus-det-gpio = <&pm8994_gpios 17 0>;
1149                 interrupt-parent = <&spmi_bus>;
1150                 interrupts = <0x0 0x9 0x0 IRQ_TYPE_NONE>;
1151                 interrupt-names ="pmic_id_irq";
1152         };
1153
1154         loopback1: qcom,msm-pcm-loopback-low-latency {
1155                 compatible = "qcom,msm-pcm-loopback";
1156                 qcom,msm-pcm-loopback-low-latency;
1157         };
1158
1159         loopback1: qcom,msm-pcm-loopback-low-latency {
1160                 compatible = "qcom,msm-pcm-loopback";
1161                 qcom,msm-pcm-loopback-low-latency;
1162         };
1163
1164         qcom,msm-dai-mi2s {
1165                 dai_mi2s_sec: qcom,msm-dai-q6-mi2s-sec {
1166                         qcom,msm-mi2s-rx-lines = <2>;
1167                         qcom,msm-mi2s-tx-lines = <1>;
1168                         pinctrl-names = "default", "sleep";
1169                         pinctrl-0 = <&sec_mi2s_active &sec_mi2s_sd0_active
1170                                 &sec_mi2s_sd1_active>;
1171                         pinctrl-1 = <&sec_mi2s_sleep &sec_mi2s_sd0_sleep
1172                                 &sec_mi2s_sd1_sleep>;
1173                 };
1174
1175                 dai_mi2s: qcom,msm-dai-q6-mi2s-tert {
1176                         pinctrl-names = "default", "sleep";
1177                         pinctrl-0 = <&tert_mi2s_active &tert_mi2s_sd0_active>;
1178                         pinctrl-1 = <&tert_mi2s_sleep &tert_mi2s_sd0_sleep>;
1179                 };
1180
1181                 dai_mi2s_quat: qcom,msm-dai-q6-mi2s-quat {
1182                         pinctrl-names = "default", "sleep";
1183                         pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active>;
1184                         pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep>;
1185                 };
1186         };
1187
1188         qcom,msm-dai-tdm-tert-rx {
1189                 pinctrl-names = "default", "sleep";
1190                 pinctrl-0 = <&tert_tdm_dout_active>;
1191                 pinctrl-1 = <&tert_tdm_dout_sleep>;
1192         };
1193
1194         qcom,msm-dai-tdm-quat-rx {
1195                 pinctrl-names = "default", "sleep";
1196                 pinctrl-0 = <&quat_tdm_dout_active>;
1197                 pinctrl-1 = <&quat_tdm_dout_sleep>;
1198         };
1199
1200         qcom,adv7481@70 {
1201                 compatible = "qcom,adv7481";
1202                 reg = <0x70 0xff>;
1203                 cam_vdig-supply = <&pm8994_s3>;
1204                 tx-lanes = <4 2 1>;
1205                 settle-count = <16 16 16>;
1206                 res-array = "RES_1080P", "RES_720P", "RES_576P_480P";
1207                 /* Cameras powered by PMIC: */
1208                 cam_vio-supply = <&pm8994_lvs1>;
1209                 cam_vana-supply = <&pm8994_l17>;
1210                 /* Self-powered cameras: */
1211                 qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
1212                 qcom,cam-vreg-min-voltage = <1300000 0 2500000>;
1213                 qcom,cam-vreg-max-voltage = <1300000 0 2500000>;
1214                 qcom,cam-vreg-op-mode = <105000 0 80000>;
1215
1216                 qcom,cci-master = <0>;
1217                 gpios = <&tlmm 17 0>,          /* I2C SDA */
1218                         <&tlmm 18 0>,          /* I2C SCL */
1219                         <&pm8994_gpios 4 0>,   /* RST     */
1220                         <&pm8994_gpios 5 0>,   /* INT1    */
1221                         <&pm8994_gpios 6 0>,   /* INT2    */
1222                         <&pm8994_gpios 7 0>;   /* INT3    */
1223         };
1224
1225         qcom,tv-tuner {
1226                 compatible = "qcom,tv-tuner";
1227         };
1228
1229         qcom,msm-ba {
1230                 compatible = "qcom,msm-ba";
1231                 qcom,ba-input-profile-0 {
1232                         qcom,type = <4>;          /* input type   */
1233                         qcom,name = "HDMI-1";     /* input name   */
1234                         qcom,ba-input = <13>;     /* ba input id  */
1235                         qcom,ba-output = <0>;     /* ba output id */
1236                         qcom,sd-name = "adv7481"; /* sd name      */
1237                         qcom,ba-node = <0>;       /* ba node      */
1238                         qcom,user-type = <1>;     /* user type    */
1239                 };
1240
1241                 qcom,ba-input-profile-1 {
1242                         qcom,type = <0>;          /* input type   */
1243                         qcom,name = "CVBS-0";     /* input name   */
1244                         qcom,ba-input = <0>;      /* ba input id  */
1245                         qcom,ba-output = <0>;     /* ba output id */
1246                         qcom,sd-name = "adv7481"; /* sd name      */
1247                         qcom,ba-node = <1>;       /* ba node      */
1248                         qcom,user-type = <1>;     /* user type    */
1249                 };
1250
1251                 qcom,ba-input-profile-2 {
1252                         qcom,type = <8>;          /* input type   */
1253                         qcom,name = "TUNER-2";     /* input name   */
1254                         qcom,ba-input = <16>;      /* ba input id  */
1255                         qcom,ba-output = <0>;     /* ba output id */
1256                         qcom,sd-name = "tv-tuner"; /* sd name      */
1257                         qcom,ba-node = <2>;       /* ba node      */
1258                         qcom,user-type = <1>;     /* user type    */
1259                 };
1260         };
1261 };
1262
1263 &pm8994_gpios {
1264         gpio@c600 { /* GPIO 7 - adv7481 INT3 */
1265                 qcom,mode = <0>;
1266                 qcom,vin-sel = <2>;
1267                 qcom,src-sel = <0>;
1268                 status = "okay";
1269         };
1270
1271         gpio@c700 { /* GPIO 8 - WLAN_EN */
1272                 qcom,mode = <1>;                /* Digital output*/
1273                 qcom,pull = <4>;                /* Pulldown 10uA */
1274                 qcom,vin-sel = <2>;             /* VIN2 */
1275                 qcom,src-sel = <0>;             /* GPIO */
1276                 qcom,invert = <0>;              /* Invert */
1277                 qcom,master-en = <1>;           /* Enable GPIO */
1278                 status = "okay";
1279         };
1280
1281         gpio@c800 { /* GPIO 9 - Rome 3.3V control */
1282                 qcom,mode = <1>;                /* Digital output */
1283                 qcom,output-type = <0>;         /* MOS logic */
1284                 qcom,invert = <1>;              /* Output high */
1285                 qcom,vin-sel = <0>;             /* VPH_PWR */
1286                 qcom,src-sel = <0>;             /* Constant */
1287                 qcom,out-strength = <1>;        /* High drive strength */
1288                 qcom,master-en = <1>;           /* Enable GPIO */
1289                 status = "okay";
1290         };
1291
1292         gpio@c900 { /* GPIO 10 - NFC CLK _REQ*/
1293                 qcom,mode = <0>;
1294                 qcom,vin-sel = <2>;
1295                 qcom,src-sel = <0>;
1296                 qcom,master-en = <1>;
1297                 status = "okay";
1298         };
1299
1300         gpio@cd00 { /* GPIO 14 - lcd_bklt_reg_en */
1301                 qcom,mode = <1>;        /* DIGITAL OUT */
1302                 qcom,output-type = <0>;         /* CMOS logic */
1303                 qcom,invert = <1>;      /* output hight initially */
1304                 qcom,vin-sel = <2>;     /* 1.8 */
1305                 qcom,src-sel = <0>;     /* CONSTANT */
1306                 qcom,out-strength = <1>;        /* Low drive strength */
1307                 qcom,master-en = <1>;   /* ENABLE GPIO */
1308                 status = "okay";
1309         };
1310         gpio@c100 { /* GPIO 2 */
1311                 qcom,mode = <0>;
1312                 qcom,pull = <0>;
1313                 qcom,vin-sel = <2>;
1314                 qcom,src-sel = <0>;
1315                 status = "okay";
1316         };
1317
1318         gpio@c300 { /* GPIO 4 - adv7481 RST */
1319                 qcom,mode = <1>;
1320                 qcom,pull = <0>;
1321                 qcom,vin-sel = <2>;
1322                 qcom,src-sel = <0>;
1323                 status = "okay";
1324         };
1325
1326         gpio@c400 { /* GPIO 5 - adv7481 INT1 */
1327                 qcom,mode = <0>;
1328                 qcom,vin-sel = <2>;
1329                 qcom,src-sel = <0>;
1330                 status = "okay";
1331         };
1332
1333         gpio@c500 { /* GPIO 6 - adv7481 INT2*/
1334                 qcom,mode = <0>;
1335                 qcom,vin-sel = <2>;
1336                 qcom,src-sel = <0>;
1337                 status = "okay";
1338         };
1339
1340         gpio@ca00 { /* GPIO 11 - USB enb1 (otg switch) */
1341                 qcom,mode = <1>;        /* DIGITAL OUT */
1342                 qcom,vin-sel = <2>;     /* 1.8 */
1343                 qcom,src-sel = <0>;     /* GPIO */
1344                 qcom,master-en = <1>;   /* Enable GPIO */
1345                 status = "okay";
1346         };
1347
1348         gpio@cc00 { /* GPIO 13 - NTN_RST */
1349                 qcom,mode = <1>; /* DIGITAL OUT */
1350                 qcom,output-type = <0>; /* CMOS logic */
1351                 qcom,pull = <5>;
1352                 qcom,vin-sel = <2>; /* 1.8 */
1353                 qcom,out-strength = <1>;
1354                 qcom,src-sel = <0>; /* GPIO */
1355                 qcom,master-en = <1>; /* Enable GPIO */
1356                 status = "okay";
1357         };
1358
1359         gpio@ce00 { /* GPIO 15 */
1360                 qcom,mode = <1>;
1361                 qcom,output-type = <0>;
1362                 qcom,pull = <5>;
1363                 qcom,vin-sel = <2>;
1364                 qcom,out-strength = <1>;
1365                 qcom,src-sel = <2>;
1366                 qcom,master-en = <1>;
1367                 status = "okay";
1368         };
1369
1370         gpio@d000 { /* GPIO 17 - USB1 VBUS detect */
1371                 qcom,mode = <0>;        /* Digital Input*/
1372                 qcom,pull = <5>;        /* No pull */
1373                 qcom,vin-sel = <2>;     /* 1.8 V */
1374                 qcom,src-sel = <0>;     /* GPIO */
1375                 qcom,master-en = <1>;   /* Enable GPIO */
1376                 status = "okay";
1377         };
1378
1379         gpio@d100 { /* GPIO 18 - Rome Sleep Clock */
1380                 qcom,mode = <1>;                /* Digital output */
1381                 qcom,output-type = <0>;         /* CMOS logic */
1382                 qcom,invert = <0>;              /* Output low initially */
1383                 qcom,vin-sel = <2>;             /* VIN 2 */
1384                 qcom,src-sel = <3>;             /* Function 2 */
1385                 qcom,out-strength = <2>;        /* Medium */
1386                 qcom,master-en = <1>;           /* Enable GPIO */
1387                 status = "okay";
1388         };
1389
1390         gpio@d200 { /* GPIO 19 - Rome BT Reset */
1391                 qcom,mode = <1>;                /* Digital output*/
1392                 qcom,pull = <4>;                /* Pulldown 10uA */
1393                 qcom,vin-sel = <2>;             /* VIN2 */
1394                 qcom,src-sel = <0>;             /* GPIO */
1395                 qcom,invert = <0>;              /* Invert */
1396                 qcom,master-en = <1>;           /* Enable GPIO */
1397                 status = "okay";
1398         };
1399 };
1400
1401 &usb2s {
1402         status = "ok";
1403         qcom,no-wakeup-src-in-hostmode;
1404 };
1405
1406 &usb3 {
1407         extcon = <&usb_detect>;
1408         vbus_dwc3-supply = <&usb_otg_switch>;
1409         vdda33-supply = <&pm8994_l24>;
1410         vdda18-supply = <&pm8994_l12>;
1411         qcom,no-wakeup-src-in-hostmode;
1412 };
1413
1414 &blsp1_uart2 {
1415         status = "ok";
1416 };
1417
1418 &i2c_6 {
1419         at24@51 {
1420                 compatible = "atmel,24c32";
1421                 reg = <0x51>;
1422         };
1423 };
1424
1425 &i2c_7 {
1426         silabs4705@11 { /* SiLabs FM chip, slave id 0x11*/
1427                 status = "ok";
1428                 compatible = "silabs,si4705";
1429                 reg = <0x11>;
1430                 vdd-supply = <&pm8994_s4>;
1431                 silabs,vdd-supply-voltage = <1800000 1800000>;
1432                 va-supply = <&rome_vreg>;
1433                 silabs,va-supply-voltage = <3300000 3300000>;
1434                 pinctrl-names = "pmx_fm_active","pmx_fm_suspend";
1435                 pinctrl-0 = <&fm_int_active &fm_status_int_active
1436                                                  &fm_rst_active>;
1437                 pinctrl-1 = <&fm_int_suspend &fm_status_int_suspend
1438                                                 &fm_rst_suspend>;
1439                 silabs,reset-gpio = <&tlmm 39 0>;
1440                 silabs,int-gpio = <&tlmm 38 0>;
1441                 silabs,status-gpio = <&tlmm 78 0>;
1442                 #address-cells = <0>;
1443                 interrupts = <0 1>;
1444                 #interrupt-cells = <1>;
1445                 interrupt-map-mask = <0xffffffff>;
1446                 interrupt-map = <
1447                                   0 &tlmm 38 2
1448                                   1 &tlmm 78 1
1449                                 >;
1450                 interrupt-names = "silabs_fm_int", "silabs_fm_status_int";
1451         };
1452 };
1453
1454 &i2c_8 { /* BLSP2 QUP2 */
1455         nq@28 {
1456                 compatible = "qcom,nq-nci";
1457                 reg = <0x28>;
1458                 qcom,nq-irq = <&tlmm 9 0x00>;
1459                 qcom,nq-ven = <&tlmm 12 0x00>;
1460                 qcom,nq-firm = <&pm8994_gpios 7 0x00>;
1461                 qcom,nq-clkreq = <&pm8994_gpios 10 0x00>;
1462                 interrupt-parent = <&tlmm>;
1463                 qcom,clk-src = "BBCLK2";
1464                 interrupts = <9 0>;
1465                 interrupt-names = "nfc_irq";
1466                 pinctrl-names = "nfc_active", "nfc_suspend";
1467                 pinctrl-0 = <&nfc_int_active &nfc_disable_active>;
1468                 pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;
1469                 clocks = <&clock_gcc clk_bb_clk2_pin>;
1470                 clock-names = "ref_clk";
1471                 status = "disabled";
1472         };
1473 };
1474
1475 &dsi_dual_jdi_video {
1476         /delete-property/ pwms;
1477         /delete-property/ qcom,5v-boost-gpio;
1478 };
1479
1480 &dsi_dual_jdi_cmd {
1481         /delete-property/ pwms;
1482         /delete-property/ qcom,5v-boost-gpio;
1483 };
1484
1485 &dsi_dual_jdi_4k_nofbc_video {
1486         /delete-property/ pwms;
1487 };
1488
1489 &soc {
1490         sound-9335 {
1491                 /delete-property/ qcom,hph-en1-gpio;
1492         };
1493 };
1494
1495 &slim_msm {
1496         status = "disabled";
1497 };
1498
1499 /delete-node/  &led_flash0;
1500
1501 &mdss_dsi0 {
1502         /delete-property/ lab-supply;
1503         /delete-property/ ibb-supply;
1504 };
1505
1506 &mdss_dsi1 {
1507         /delete-property/ lab-supply;
1508         /delete-property/ ibb-supply;
1509 };
1510
1511 &cci {
1512         qcom,camera@0 {
1513                 /delete-property/ qcom,led-flash-src;
1514         };
1515
1516         qcom,camera@1 {
1517                 /delete-property/ cam_vana-supply;
1518         };
1519 };
1520
1521 &usb_otg_switch {
1522         gpio = <&pm8994_gpios 11 0>;
1523         enable-active-high;
1524         status = "ok";
1525         /delete-property/ vin-supply;
1526 };
1527
1528 &wsa881x_211 {
1529         /delete-property/ qcom,spkr-sd-n-gpio;
1530 };
1531
1532 &wsa881x_212 {
1533         /delete-property/ qcom,spkr-sd-n-gpio;
1534 };
1535
1536 &wsa881x_213 {
1537         /delete-property/ qcom,spkr-sd-n-gpio;
1538 };
1539
1540 &wsa881x_214 {
1541         /delete-property/ qcom,spkr-sd-n-gpio;
1542 };
1543
1544 &spi_9 {
1545         status = "ok";
1546 };
1547
1548 &spi_10 {
1549         status = "ok";
1550 };
1551
1552 &blsp1_uart2 {
1553         status = "ok";
1554 };
1555
1556 &spi_0 {
1557         spi_codec@0 {
1558                 compatible = "qcom,spi-msm-codec-slave";
1559                 reg = <0>;
1560                 spi-max-frequency = <2000000>;
1561                 spi-cpha;
1562         };
1563 };
1564
1565 &vfe_smmu {
1566         qcom,no-smr-check;
1567 };
1568
1569 / {
1570         reserved-memory {
1571                 lk_mem: lk_pool@0x91600000 {
1572                         reg = <0 0x91600000 0 0x00600000>;
1573                         label = "lk_pool";
1574                 };
1575
1576                 early_camera_mem: early_camera_mem@b3fff000 {
1577                         reg = <0 0xb3fff000 0 0x800000>;
1578                         label = "early_camera_mem";
1579                 };
1580                 early_audio_mem: early_audio_mem@0xb5fff000 {
1581                         reg = <0x0 0xb5fff000 0x0 0x3FFFFC>;
1582                         label = "early_audio_mem";
1583                 };
1584         };
1585 };