arch/arm/boot/dts/qcom/msm8996-auto-cdp.dtsi

   1 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12
  13 #include "msm8996-pinctrl.dtsi"
  14 #include "msm8996-camera-sensor-auto-cdp.dtsi"
  15 #include "msm8996-wsa881x.dtsi"
  16
  17 / {
  18         bluetooth: bt_qca6174 {
  19                 compatible = "qca,qca6174";
  20                 qca,bt-reset-gpio = <&pm8994_gpios 19 0>; /* BT_EN */
  21                 qca,bt-vdd-core-supply = <&pm8994_s3>;
  22                 qca,bt-vdd-pa-supply = <&rome_vreg>;
  23                 qca,bt-vdd-io-supply = <&pm8994_s4>;
  24                 qca,bt-vdd-xtal-supply = <&pm8994_l30>;
  25                 qca,bt-chip-pwd-voltage-level = <1300000 1300000>;
  26                 qca,bt-vdd-io-voltage-level = <1800000 1800000>;
  27                 qca,bt-vdd-xtal-voltage-level = <1800000 1800000>;
  28         };
  29 };
  30
  31 &ufs_ice {
  32         status = "ok";
  33 };
  34
  35 &sdcc1_ice {
  36         status = "ok";
  37 };
  38
  39 &ufsphy1 {
  40         status = "ok";
  41 };
  42
  43 &ufs1 {
  44         status = "ok";
  45 };
  46
  47 &spi_0 {
  48         spi_codec@0 {
  49                 compatible = "qcom,spi-msm-codec-slave";
  50                 reg = <0>;
  51                 spi-max-frequency = <2000000>;
  52                 spi-cpha;
  53         };
  54 };
  55
  56 &uartblsp2dm1 {
  57         status = "ok";
  58         pinctrl-names = "default";
  59         pinctrl-0 = <&uart_console_active>;
  60 };
  61
  62 &sdhc_1 {
  63         vdd-supply = <&pm8994_l20>;
  64         qcom,vdd-voltage-level = <2950000 2950000>;
  65         qcom,vdd-current-level = <200 570000>;
  66
  67         vdd-io-supply = <&pm8994_s4>;
  68         qcom,vdd-io-always-on;
  69         qcom,vdd-io-voltage-level = <1800000 1800000>;
  70         qcom,vdd-io-current-level = <110 325000>;
  71
  72         pinctrl-names = "active", "sleep";
  73         pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
  74         pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
  75
  76         qcom,clk-rates = <400000 20000000 25000000 50000000
  77                                 96000000 192000000 384000000>;
  78         qcom,ice-clk-rates = <300000000 150000000>;
  79         qcom,nonremovable;
  80         qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
  81
  82         status = "ok";
  83 };
  84
  85 &sdhc_2 {
  86         vdd-supply = <&pm8994_l21>;
  87         qcom,vdd-voltage-level = <2950000 2950000>;
  88         qcom,vdd-current-level = <200 800000>;
  89
  90         vdd-io-supply = <&pm8994_l13>;
  91         qcom,vdd-io-voltage-level = <1800000 2950000>;
  92         qcom,vdd-io-current-level = <200 22000>;
  93
  94         pinctrl-names = "active", "sleep";
  95         pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on
  96                      &sdc2_cd_on_sbc>;
  97         pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off
  98                      &sdc2_cd_on_sbc>;
  99
 100         qcom,clk-rates = <400000 20000000 25000000
 101                                 50000000 100000000 200000000>;
 102         qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
 103
 104         cd-gpios = <&tlmm 38 0x1>;
 105
 106         status = "ok";
 107 };
 108
 109 &pm8994_vadc {
 110         chan@5 {
 111                 label = "vcoin";
 112                 reg = <5>;
 113                 qcom,decimation = <0>;
 114                 qcom,pre-div-channel-scaling = <1>;
 115                 qcom,calibration-type = "absolute";
 116                 qcom,scale-function = <0>;
 117                 qcom,hw-settle-time = <0>;
 118                 qcom,fast-avg-setup = <0>;
 119         };
 120
 121         chan@7 {
 122                 label = "vph_pwr";
 123                 reg = <7>;
 124                 qcom,decimation = <0>;
 125                 qcom,pre-div-channel-scaling = <1>;
 126                 qcom,calibration-type = "absolute";
 127                 qcom,scale-function = <0>;
 128                 qcom,hw-settle-time = <0>;
 129                 qcom,fast-avg-setup = <0>;
 130         };
 131
 132         chan@73 {
 133                 label = "msm_therm";
 134                 reg = <0x73>;
 135                 qcom,decimation = <0>;
 136                 qcom,pre-div-channel-scaling = <0>;
 137                 qcom,calibration-type = "ratiometric";
 138                 qcom,scale-function = <2>;
 139                 qcom,hw-settle-time = <2>;
 140                 qcom,fast-avg-setup = <0>;
 141         };
 142
 143         chan@74 {
 144                 label = "emmc_therm";
 145                 reg = <0x74>;
 146                 qcom,decimation = <0>;
 147                 qcom,pre-div-channel-scaling = <0>;
 148                 qcom,calibration-type = "ratiometric";
 149                 qcom,scale-function = <2>;
 150                 qcom,hw-settle-time = <2>;
 151                 qcom,fast-avg-setup = <0>;
 152         };
 153
 154         chan@75 {
 155                 label = "pa_therm0";
 156                 reg = <0x75>;
 157                 qcom,decimation = <0>;
 158                 qcom,pre-div-channel-scaling = <0>;
 159                 qcom,calibration-type = "ratiometric";
 160                 qcom,scale-function = <2>;
 161                 qcom,hw-settle-time = <2>;
 162                 qcom,fast-avg-setup = <0>;
 163         };
 164
 165         chan@77 {
 166                 label = "pa_therm1";
 167                 reg = <0x77>;
 168                 qcom,decimation = <0>;
 169                 qcom,pre-div-channel-scaling = <0>;
 170                 qcom,calibration-type = "ratiometric";
 171                 qcom,scale-function = <2>;
 172                 qcom,hw-settle-time = <2>;
 173                 qcom,fast-avg-setup = <0>;
 174         };
 175
 176         chan@78 {
 177                 label = "quiet_therm";
 178                 reg = <0x78>;
 179                 qcom,decimation = <0>;
 180                 qcom,pre-div-channel-scaling = <0>;
 181                 qcom,calibration-type = "ratiometric";
 182                 qcom,scale-function = <2>;
 183                 qcom,hw-settle-time = <2>;
 184                 qcom,fast-avg-setup = <0>;
 185         };
 186
 187         chan@7c {
 188                 label = "xo_therm_buf";
 189                 reg = <0x7c>;
 190                 qcom,decimation = <0>;
 191                 qcom,pre-div-channel-scaling = <0>;
 192                 qcom,calibration-type = "ratiometric";
 193                 qcom,scale-function = <4>;
 194                 qcom,hw-settle-time = <2>;
 195                 qcom,fast-avg-setup = <0>;
 196         };
 197
 198         chan@7c {
 199                 label = "xo_therm_buf";
 200                 reg = <0x7c>;
 201                 qcom,decimation = <0>;
 202                 qcom,pre-div-channel-scaling = <0>;
 203                 qcom,calibration-type = "ratiometric";
 204                 qcom,scale-function = <4>;
 205                 qcom,hw-settle-time = <2>;
 206                 qcom,fast-avg-setup = <0>;
 207         };
 208 };
 209
 210 &pm8994_adc_tm {
 211         chan@73 {
 212                 label = "msm_therm";
 213                 reg = <0x73>;
 214                 qcom,decimation = <0>;
 215                 qcom,pre-div-channel-scaling = <0>;
 216                 qcom,calibration-type = "ratiometric";
 217                 qcom,scale-function = <2>;
 218                 qcom,hw-settle-time = <2>;
 219                 qcom,fast-avg-setup = <0>;
 220                 qcom,btm-channel-number = <0x48>;
 221                 qcom,thermal-node;
 222         };
 223
 224         chan@74 {
 225                 label = "emmc_therm";
 226                 reg = <0x74>;
 227                 qcom,decimation = <0>;
 228                 qcom,pre-div-channel-scaling = <0>;
 229                 qcom,calibration-type = "ratiometric";
 230                 qcom,scale-function = <2>;
 231                 qcom,hw-settle-time = <2>;
 232                 qcom,fast-avg-setup = <0>;
 233                 qcom,btm-channel-number = <0x68>;
 234                 qcom,thermal-node;
 235         };
 236
 237         chan@75 {
 238                 label = "pa_therm0";
 239                 reg = <0x75>;
 240                 qcom,decimation = <0>;
 241                 qcom,pre-div-channel-scaling = <0>;
 242                 qcom,calibration-type = "ratiometric";
 243                 qcom,scale-function = <2>;
 244                 qcom,hw-settle-time = <2>;
 245                 qcom,fast-avg-setup = <0>;
 246                 qcom,btm-channel-number = <0x70>;
 247                 qcom,thermal-node;
 248         };
 249
 250         chan@77 {
 251                 label = "pa_therm1";
 252                 reg = <0x77>;
 253                 qcom,decimation = <0>;
 254                 qcom,pre-div-channel-scaling = <0>;
 255                 qcom,calibration-type = "ratiometric";
 256                 qcom,scale-function = <2>;
 257                 qcom,hw-settle-time = <2>;
 258                 qcom,fast-avg-setup = <0>;
 259                 qcom,btm-channel-number = <0x78>;
 260                 qcom,thermal-node;
 261         };
 262
 263         chan@78 {
 264                 label = "quiet_therm";
 265                 reg = <0x78>;
 266                 qcom,decimation = <0>;
 267                 qcom,pre-div-channel-scaling = <0>;
 268                 qcom,calibration-type = "ratiometric";
 269                 qcom,scale-function = <2>;
 270                 qcom,hw-settle-time = <2>;
 271                 qcom,fast-avg-setup = <0>;
 272                 qcom,btm-channel-number = <0x80>;
 273                 qcom,thermal-node;
 274         };
 275
 276         chan@7c {
 277                 label = "xo_therm_buf";
 278                 reg = <0x7c>;
 279                 qcom,decimation = <0>;
 280                 qcom,pre-div-channel-scaling = <0>;
 281                 qcom,calibration-type = "ratiometric";
 282                 qcom,scale-function = <4>;
 283                 qcom,hw-settle-time = <2>;
 284                 qcom,fast-avg-setup = <0>;
 285                 qcom,btm-channel-number = <0x88>;
 286                 qcom,thermal-node;
 287         };
 288 };
 289
 290 &mdss_hdmi_tx {
 291         pinctrl-names = "hdmi_hpd_active", "hdmi_ddc_active", "hdmi_cec_active",
 292                                 "hdmi_active", "hdmi_sleep";
 293         pinctrl-0 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_suspend
 294                                                 &mdss_hdmi_cec_suspend>;
 295         pinctrl-1 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active
 296                                                 &mdss_hdmi_cec_suspend>;
 297         pinctrl-2 = <&mdss_hdmi_hpd_active &mdss_hdmi_cec_active
 298                                                 &mdss_hdmi_ddc_suspend>;
 299         pinctrl-3 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active
 300                                                 &mdss_hdmi_cec_active>;
 301         pinctrl-4 = <&mdss_hdmi_hpd_suspend &mdss_hdmi_ddc_suspend
 302                                                 &mdss_hdmi_cec_suspend>;
 303 };
 304
 305 #include "msm8996-sde-display.dtsi"
 306
 307 &pmx_mdss {
 308         mdss_dsi_active: mdss_dsi_active {
 309                 mux {
 310                         pins = "gpio8",  "gpio70";
 311                         function = "gpio";
 312                 };
 313
 314                 config {
 315                         pins = "gpio8",  "gpio70";
 316                         drive-strength = <8>; /* 8 mA */
 317                         bias-disable = <0>; /* no pull */
 318                         output-high;
 319                 };
 320         };
 321
 322         mdss_dsi_suspend: mdss_dsi_suspend {
 323                 mux {
 324                         pins = "gpio8",  "gpio70";
 325                         function = "gpio";
 326                 };
 327
 328                 config {
 329                         pins = "gpio8",  "gpio70";
 330                         drive-strength = <2>; /* 2 mA */
 331                         bias-pull-down; /* pull down */
 332                 };
 333         };
 334 };
 335
 336 &sde_kms {
 337         qcom,mdss-pref-prim-intf = "dsi";
 338 };
 339
 340 &dsi_adv_7533_1 {
 341         qcom,dsi-display-active;
 342         qcom,dsi-panel = <&dsi_adv7533_1080p>;
 343
 344         qcom,panel-supply-entries {
 345                 #address-cells = <1>;
 346                 #size-cells = <0>;
 347
 348                 qcom,panel-supply-entry@0 {
 349                         reg = <0>;
 350                         qcom,supply-name = "vdd";
 351                         qcom,supply-min-voltage = <3300000>;
 352                         qcom,supply-max-voltage = <3300000>;
 353                         qcom,supply-enable-load = <100000>;
 354                         qcom,supply-disable-load = <100>;
 355                 };
 356
 357                 qcom,panel-supply-entry@1 {
 358                         reg = <1>;
 359                         qcom,supply-name = "vddio";
 360                         qcom,supply-min-voltage = <1800000>;
 361                         qcom,supply-max-voltage = <1800000>;
 362                         qcom,supply-enable-load = <100000>;
 363                         qcom,supply-disable-load = <100>;
 364                 };
 365         };
 366 };
 367
 368 &dsi_adv_7533_2 {
 369         qcom,dsi-display-active;
 370         qcom,dsi-panel = <&dsi_adv7533_1080p>;
 371
 372         qcom,panel-supply-entries {
 373                 #address-cells = <1>;
 374                 #size-cells = <0>;
 375
 376                 qcom,panel-supply-entry@0 {
 377                         reg = <0>;
 378                         qcom,supply-name = "vdd";
 379                         qcom,supply-min-voltage = <3300000>;
 380                         qcom,supply-max-voltage = <3300000>;
 381                         qcom,supply-enable-load = <100000>;
 382                         qcom,supply-disable-load = <100>;
 383                 };
 384
 385                 qcom,panel-supply-entry@1 {
 386                         reg = <1>;
 387                         qcom,supply-name = "vddio";
 388                         qcom,supply-min-voltage = <1800000>;
 389                         qcom,supply-max-voltage = <1800000>;
 390                         qcom,supply-enable-load = <100000>;
 391                         qcom,supply-disable-load = <100>;
 392                 };
 393         };
 394 };
 395
 396 &sde_hdmi {
 397         qcom,non-pluggable;
 398         qcom,customize-modes {
 399                 qcom,customize-mode-id@0 {
 400                         qcom,mode-name = "1920x1080@60Hz";
 401                         qcom,mode-h-active = <1920>;
 402                         qcom,mode-h-front-porch = <88>;
 403                         qcom,mode-h-pulse-width = <44>;
 404                         qcom,mode-h-back-porch = <148>;
 405                         qcom,mode-h-active-high;
 406                         qcom,mode-v-active = <1080>;
 407                         qcom,mode-v-front-porch = <4>;
 408                         qcom,mode-v-pulse-width = <5>;
 409                         qcom,mode-v-back-porch = <36>;
 410                         qcom,mode-v-active-high;
 411                         qcom,mode-refresh-rate = <60>;
 412                         qcom,mode-clock-in-khz = <148500>;
 413                 };
 414         };
 415 };
 416
 417 &mdss_dsi {
 418         hw-config = "dual_dsi";
 419 };
 420
 421 &mdss_dsi0 {
 422         qcom,dsi-pref-prim-pan = <&dsi_adv7533_1080p>;
 423         pinctrl-names = "mdss_default", "mdss_sleep";
 424         pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
 425         pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
 426         qcom,display-id = "primary";
 427         qcom,bridge-index = <0>;
 428
 429         qcom,panel-supply-entries {
 430                 #address-cells = <1>;
 431                 #size-cells = <0>;
 432
 433                 qcom,panel-supply-entry@0 {
 434                         reg = <0>;
 435                         qcom,supply-name = "vdd";
 436                         qcom,supply-min-voltage = <3300000>;
 437                         qcom,supply-max-voltage = <3300000>;
 438                         qcom,supply-enable-load = <100000>;
 439                         qcom,supply-disable-load = <100>;
 440                 };
 441
 442                 qcom,panel-supply-entry@1 {
 443                         reg = <1>;
 444                         qcom,supply-name = "vddio";
 445                         qcom,supply-min-voltage = <1800000>;
 446                         qcom,supply-max-voltage = <1800000>;
 447                         qcom,supply-enable-load = <100000>;
 448                         qcom,supply-disable-load = <100>;
 449                 };
 450         };
 451 };
 452
 453 &mdss_dsi1 {
 454         qcom,dsi-pref-prim-pan = <&dsi_adv7533_1080p>;
 455         pinctrl-names = "mdss_default", "mdss_sleep";
 456         pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
 457         pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
 458         qcom,display-id = "tertiary";
 459         qcom,bridge-index = <1>;
 460
 461         qcom,panel-supply-entries {
 462                 #address-cells = <1>;
 463                 #size-cells = <0>;
 464
 465                 qcom,panel-supply-entry@0 {
 466                         reg = <0>;
 467                         qcom,supply-name = "vdd";
 468                         qcom,supply-min-voltage = <3300000>;
 469                         qcom,supply-max-voltage = <3300000>;
 470                         qcom,supply-enable-load = <100000>;
 471                         qcom,supply-disable-load = <100>;
 472                 };
 473
 474                 qcom,panel-supply-entry@1 {
 475                         reg = <1>;
 476                         qcom,supply-name = "vddio";
 477                         qcom,supply-min-voltage = <1800000>;
 478                         qcom,supply-max-voltage = <1800000>;
 479                         qcom,supply-enable-load = <100000>;
 480                         qcom,supply-disable-load = <100>;
 481                 };
 482         };
 483 };
 484
 485 &dsi_dual_sharp_video {
 486         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
 487         qcom,mdss-dsi-bl-min-level = <1>;
 488         qcom,mdss-dsi-bl-max-level = <4095>;
 489         qcom,cont-splash-enabled;
 490         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 491 };
 492
 493 &dsi_dual_nt35597_video {
 494         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
 495         qcom,mdss-dsi-bl-min-level = <1>;
 496         qcom,mdss-dsi-bl-max-level = <4095>;
 497         qcom,cont-splash-enabled;
 498         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 499 };
 500
 501 &dsi_dual_nt35597_cmd {
 502         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
 503         qcom,mdss-dsi-bl-min-level = <1>;
 504         qcom,mdss-dsi-bl-max-level = <4095>;
 505         qcom,cont-splash-enabled;
 506         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 507         qcom,partial-update-enabled = "single_roi";
 508         qcom,panel-roi-alignment = <720 128 720 64 720 64>;
 509 };
 510
 511 &dsi_nt35597_dsc_video {
 512         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
 513         qcom,mdss-dsi-bl-min-level = <1>;
 514         qcom,mdss-dsi-bl-max-level = <4095>;
 515         qcom,cont-splash-enabled;
 516         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 517 };
 518
 519 &dsi_nt35597_dsc_cmd {
 520         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
 521         qcom,mdss-dsi-bl-min-level = <1>;
 522         qcom,mdss-dsi-bl-max-level = <4095>;
 523         qcom,cont-splash-enabled;
 524         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 525 };
 526
 527 /{
 528         mtp_batterydata: qcom,battery-data {
 529                 qcom,batt-id-range-pct = <15>;
 530                 #include "batterydata-itech-3000mah.dtsi"
 531         };
 532 };
 533
 534 &pm8994_mpps {
 535         mpp@a100 { /* MPP 2 */
 536                 qcom,mode = <1>;                /* Digital output */
 537                 qcom,output-type = <0>;         /* CMOS logic */
 538                 qcom,vin-sel = <2>;             /* S4 1.8V */
 539                 qcom,src-sel = <0>;             /* Constant */
 540                 qcom,master-en = <1>;           /* Enable GPIO */
 541                 status = "okay";
 542         };
 543
 544         mpp@a300 { /* MPP 4 */
 545                 /* HDMI_5v_vreg regulator enable */
 546                 qcom,mode = <1>;                /* Digital output */
 547                 qcom,output-type = <0>;         /* CMOS logic */
 548                 qcom,vin-sel = <2>;             /* S4 1.8V */
 549                 qcom,src-sel = <0>;             /* Constant */
 550                 qcom,master-en = <1>;           /* Enable GPIO */
 551                 qcom,invert = <0>;
 552                 status = "okay";
 553         };
 554
 555         mpp@a500 { /* MPP 6 */
 556                 qcom,mode = <1>;                /* Digital output */
 557                 qcom,output-type = <0>;         /* CMOS logic */
 558                 qcom,vin-sel = <2>;             /* S4 1.8V */
 559                 qcom,src-sel = <0>;             /* Constant */
 560                 qcom,master-en = <1>;           /* Enable GPIO */
 561                 status = "okay";
 562         };
 563
 564         mpp@a700 { /* MPP 8 */
 565                 /* USB 5V regulator enable */
 566                 qcom,mode = <1>;                /* Digital output */
 567                 qcom,output-type = <0>;         /* CMOS logic */
 568                 qcom,vin-sel = <2>;             /* S4 1.8V */
 569                 qcom,src-sel = <0>;             /* Constant */
 570                 qcom,master-en = <1>;           /* Enable GPIO */
 571                 status = "okay";
 572         };
 573 };
 574
 575 &soc {
 576         qcom,early-cam {
 577                 cell-index = <0>;
 578                 compatible = "qcom,early-cam";
 579                 status = "ok";
 580                 mmagic-supply = <&gdsc_mmagic_camss>;
 581                 gdscr-supply = <&gdsc_camss_top>;
 582                 vfe0-vdd-supply = <&gdsc_vfe0>;
 583                 vfe1-vdd-supply = <&gdsc_vfe1>;
 584                 qcom,cam-vreg-name = "mmagic", "gdscr", "vfe0-vdd", "vfe1-vdd";
 585                 clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
 586                         <&clock_mmss clk_camss_top_ahb_clk>,
 587                         <&clock_mmss clk_cci_clk_src>,
 588                         <&clock_mmss clk_camss_cci_ahb_clk>,
 589                         <&clock_mmss clk_camss_cci_clk>,
 590                         <&clock_mmss clk_camss_ahb_clk>,
 591                         <&clock_mmss clk_mmagic_camss_axi_clk>,
 592                         <&clock_mmss clk_camss_vfe_ahb_clk>,
 593                         <&clock_mmss clk_camss_vfe0_ahb_clk>,
 594                         <&clock_mmss clk_camss_vfe1_ahb_clk>,
 595                         <&clock_mmss clk_camss_vfe_axi_clk>,
 596                         <&clock_mmss clk_smmu_vfe_axi_clk>,
 597                         <&clock_mmss clk_smmu_vfe_ahb_clk>,
 598                         <&clock_mmss clk_vfe0_clk_src>,
 599                         <&clock_mmss clk_vfe1_clk_src>,
 600                         <&clock_mmss clk_camss_vfe0_stream_clk>,
 601                         <&clock_mmss clk_camss_vfe1_stream_clk>,
 602                         <&clock_mmss clk_camss_csi_vfe0_clk>,
 603                         <&clock_mmss clk_camss_csi_vfe1_clk>,
 604                         <&clock_mmss clk_camss_csi2_ahb_clk>,
 605                         <&clock_mmss clk_camss_csi2_clk>,
 606                         <&clock_mmss clk_camss_csi2phy_clk>,
 607                         <&clock_mmss clk_csi2phytimer_clk_src>,
 608                         <&clock_mmss clk_camss_csi2phytimer_clk>,
 609                         <&clock_mmss clk_camss_csi2rdi_clk>,
 610                         <&clock_mmss clk_camss_ispif_ahb_clk>,
 611                         <&clock_mmss clk_camss_vfe0_clk>,
 612                         <&clock_mmss clk_camss_vfe1_clk>;
 613                 clock-names =
 614                         "mmss_mmagic_ahb_clk",
 615                         "camss_top_ahb_clk",
 616                         "cci_clk_src",
 617                         "camss_cci_ahb_clk",
 618                         "camss_cci_clk",
 619                         "camss_ahb_clk",
 620                         "mmagic_camss_axi_clk",
 621                         "camss_vfe_ahb_clk",
 622                         "camss_vfe0_ahb_clk",
 623                         "camss_vfe1_ahb_clk",
 624                         "camss_vfe_axi_clk",
 625                         "smmu_vfe_axi_clk",
 626                         "smmu_vfe_ahb_clk",
 627                         "vfe0_clk_src",
 628                         "vfe1_clk_src",
 629                         "camss_vfe0_stream_clk",
 630                         "camss_vfe1_stream_clk",
 631                         "camss_csi_vfe0_clk",
 632                         "camss_csi_vfe1_clk",
 633                         "camss_csi2_ahb_clk",
 634                         "camss_csi2_clk",
 635                         "camss_csi2phy_clk",
 636                         "csi2phytimer_clk_src",
 637                         "camss_csi2phytimer_clk",
 638                         "camss_csi2rdi_clk",
 639                         "camss_ispif_ahb_clk",
 640                         "clk_camss_vfe0_clk",
 641                         "clk_camss_vfe1_clk";
 642                 qcom,clock-rates = <19200000
 643                                         19200000
 644                                         19200000
 645                                         19200000
 646                                         19200000
 647                                         19200000
 648                                         0
 649                                         0
 650                                         0
 651                                         0
 652                                         320000000
 653                                         0
 654                                         0
 655                                         320000000
 656                                         320000000
 657                                         0
 658                                         0
 659                                         0
 660                                         0
 661                                         0
 662                                         200000000
 663                                         200000000
 664                                         200000000
 665                                         200000000
 666                                         200000000
 667                                         0
 668                                         100000000
 669                                         100000000>;
 670                 qcom,clock-cntl-support;
 671                 qcom,clock-control = "NO_SET_RATE", "NO_SET_RATE",
 672                         "NO_SET_RATE", "NO_SET_RATE",
 673                         "NO_SET_RATE", "NO_SET_RATE",
 674                         "NO_SET_RATE", "NO_SET_RATE",
 675                         "NO_SET_RATE", "NO_SET_RATE",
 676                         "NO_SET_RATE", "NO_SET_RATE",
 677                         "NO_SET_RATE", "INIT_RATE",
 678                         "INIT_RATE", "NO_SET_RATE",
 679                         "NO_SET_RATE", "NO_SET_RATE",
 680                         "NO_SET_RATE","NO_SET_RATE",
 681                         "INIT_RATE","NO_SET_RATE",
 682                         "INIT_RATE", "NO_SET_RATE",
 683                         "NO_SET_RATE","NO_SET_RATE",
 684                         "NO_SET_RATE", "NO_SET_RATE";
 685         };
 686
 687         ntn1: ntn_avb@1 { /* Neutrno device on RC1*/
 688                 compatible = "qcom,ntn_avb";
 689
 690                 ntn-rst-gpio = <&pm8994_gpios 13 0>;
 691                 pinctrl-names = "default";
 692                 pinctrl-0 = <&ntn_clk_sync>;
 693
 694                 vdd-ntn-hsic-supply = <&pm8994_l25>;
 695                 vdd-ntn-pci-supply = <&pm8994_s4>;
 696                 vdd-ntn-io-supply = <&pm8994_s4>;
 697
 698                 qcom,ntn-rst-delay-msec = <100>;
 699                 qcom,ntn-rc-num = <1>;
 700                 qcom,ntn-bus-num = <1>;
 701                 qcom,ntn-mdio-bus-id = <1>;
 702                 qcom,ntn-phy-addr = <7>;
 703
 704                 qcom,msm-bus,name = "ntn";
 705                 qcom,msm-bus,num-cases = <2>;
 706                 qcom,msm-bus,num-paths = <1>;
 707                 qcom,msm-bus,vectors-KBps =
 708                                 <100 512 0 0>,
 709                                 <100 512 207108 14432000>;
 710         };
 711
 712         ntn2: ntn_avb@2 { /*Neutrino device on RC2*/
 713                 compatible = "qcom,ntn_avb";
 714                 qcom,ntn-rst-delay-msec = <100>;
 715                 qcom,ntn-rc-num = <2>;
 716                 qcom,ntn-bus-num = <1>;
 717                 qcom,ntn-mdio-bus-id = <2>;
 718
 719                 qcom,msm-bus,name = "ntn";
 720                 qcom,msm-bus,num-cases = <2>;
 721                 qcom,msm-bus,num-paths = <1>;
 722                 qcom,msm-bus,vectors-KBps =
 723                                 <108 512 0 0>,
 724                                 <108 512 207108 14432000>;
 725         };
 726
 727         i2c@75ba000 {
 728                 synaptics@20 {
 729                         compatible = "synaptics,dsx";
 730                         reg = <0x20>;
 731                         interrupt-parent = <&tlmm>;
 732                         interrupts = <125 0x2008>;
 733                         vdd-supply = <&pm8994_l14>;
 734                         avdd-supply = <&pm8994_l22>;
 735                         pinctrl-names = "pmx_ts_active", "pmx_ts_suspend";
 736                         pinctrl-0 = <&ts_active>;
 737                         pinctrl-1 = <&ts_suspend>;
 738                         synaptics,display-coords = <0 0 1599 2559>;
 739                         synaptics,panel-coords = <0 0 1599 2703>;
 740                         synaptics,reset-gpio = <&tlmm 89 0x00>;
 741                         synaptics,irq-gpio = <&tlmm 125 0x2008>;
 742                         synaptics,disable-gpios;
 743                         synaptics,fw-name = "PR1702898-s3528t_00350002.img";
 744                         /* Underlying clocks used by secure touch */
 745                         clock-names = "iface_clk", "core_clk";
 746                         clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>,
 747                                  <&clock_gcc clk_gcc_blsp2_qup6_i2c_apps_clk>;
 748                 };
 749         };
 750
 751         i2c@75b6000 { /* BLSP8 */
 752                 /* ADV7533 configuration */
 753                 adv7533@3d {
 754                         compatible = "adv7533";
 755                         instance_id = <0>;
 756                         reg = <0x3d>;
 757                         adi,video-mode = <3>; /* 3 = 1080p */
 758                         adi,main-addr = <0x3D>;
 759                         adi,cec-dsi-addr = <0x3E>;
 760                         adi,enable-audio;
 761                         pinctrl-names = "pmx_adv7533_active",
 762                                 "pmx_adv7533_suspend";
 763                         pinctrl-0 = <&adv7533_0_int_active
 764                                 &adv7533_0_hpd_int_active
 765                                 &adv7533_0_switch_active>;
 766                         pinctrl-1 = <&adv7533_0_int_suspend
 767                                 &adv7533_0_hpd_int_suspend
 768                                 &adv7533_0_switch_suspend>;
 769                         adi,irq-gpio = <&tlmm 71 0x2002>;
 770                         adi,switch-gpio = <&tlmm 72 0x1>;
 771                         vddio-supply = <&pm8994_l17>;
 772                         qcom,supply-names = "vddio";
 773                         qcom,min-voltage-level = <1800000>;
 774                         qcom,max-voltage-level = <1800000>;
 775                         qcom,enable-load = <100000>;
 776                         qcom,disable-load = <100>;
 777                         qcom,post-on-sleep = <60>;
 778
 779                 };
 780
 781                 adv7533@39 {
 782                         compatible = "adv7533";
 783                         instance_id = <1>;
 784                         reg = <0x39>;
 785                         adi,video-mode = <3>; /* 3 = 1080p */
 786                         adi,main-addr = <0x39>;
 787                         adi,cec-dsi-addr = <0x3C>;
 788                         adi,enable-audio;
 789                         pinctrl-names = "pmx_adv7533_active",
 790                                 "pmx_adv7533_suspend";
 791                         pinctrl-0 = <&adv7533_1_int_active
 792                                 &adv7533_1_hpd_int_active
 793                                 &adv7533_1_switch_active>;
 794                         pinctrl-1 = <&adv7533_1_int_suspend
 795                                 &adv7533_1_hpd_int_suspend
 796                                 &adv7533_1_switch_suspend>;
 797                         adi,irq-gpio = <&tlmm 73 0x2002>;
 798                         adi,switch-gpio = <&tlmm 74 0x0>;
 799                         vddio-supply = <&pm8994_l17>;
 800                         qcom,supply-names = "vddio";
 801                         qcom,min-voltage-level = <1800000>;
 802                         qcom,max-voltage-level = <1800000>;
 803                         qcom,enable-load = <100000>;
 804                         qcom,disable-load = <100>;
 805
 806                 };
 807         };
 808
 809         pinctrl@01010000 {
 810                 pcie2 {
 811                         pcie2_perst_default: pcie2_perst_default {
 812                                 mux {
 813                                         pins = "gpio90";
 814                                         function = "gpio";
 815                                 };
 816
 817                                 config {
 818                                         pins = "gpio90";
 819                                         drive-strength = <2>;
 820                                         bias-pull-down;
 821                                 };
 822                         };
 823
 824                         pcie2_wake_default: pcie2_wake_default {
 825                                 mux {
 826                                         pins = "gpio54";
 827                                         function = "gpio";
 828                                 };
 829
 830                                 config {
 831                                         pins = "gpio54";
 832                                         drive-strength = <2>;
 833                                         bias-pull-down;
 834                                 };
 835                         };
 836
 837                         pcie2_wake_sleep: pcie2_wake_sleep {
 838                                 mux {
 839                                         pins = "gpio54";
 840                                         function = "gpio";
 841                                 };
 842
 843                                 config {
 844                                         pins = "gpio54";
 845                                         drive-strength = <2>;
 846                                         bias-disable;
 847                                 };
 848                         };
 849                 };
 850         };
 851
 852         gen-vkeys {
 853                 compatible = "qcom,gen-vkeys";
 854                 label = "synaptics_dsx";
 855                 qcom,disp-maxx = <1599>;
 856                 qcom,disp-maxy = <2559>;
 857                 qcom,panel-maxx = <1599>;
 858                 qcom,panel-maxy = <2703>;
 859                 qcom,key-codes = <158 139 102 217>;
 860         };
 861
 862         gpio_keys {
 863                 compatible = "gpio-keys";
 864                 input-name = "gpio-keys";
 865
 866                 vol_up {
 867                         label = "volume_up";
 868                         gpios = <&pm8994_gpios 2 0x1>;
 869                         linux,input-type = <1>;
 870                         linux,code = <115>;
 871                         gpio-key,wakeup;
 872                         debounce-interval = <15>;
 873                 };
 874
 875                 cam_snapshot {
 876                         label = "cam_snapshot";
 877                         gpios = <&pm8994_gpios 4 0x1>;
 878                         linux,input-type = <1>;
 879                         linux,code = <766>;
 880                         gpio-key,wakeup;
 881                         debounce-interval = <15>;
 882                 };
 883
 884                 cam_focus {
 885                         label = "cam_focus";
 886                         gpios = <&pm8994_gpios 5 0x1>;
 887                         linux,input-type = <1>;
 888                         linux,code = <528>;
 889                         gpio-key,wakeup;
 890                         debounce-interval = <15>;
 891                 };
 892         };
 893
 894         sound-9335 {
 895                 status = "disabled";
 896         };
 897
 898         sound-adp-agave {
 899                 compatible = "qcom,apq8096-asoc-snd-adp-agave";
 900                 qcom,model = "apq8096-adp-agave-snd-card";
 901
 902                 asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
 903                                 <&loopback>, <&compress>, <&hostless>,
 904                                 <&afe>, <&lsm>, <&routing>, <&pcmnoirq>,
 905                                 <&loopback1>;
 906                 asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
 907                                 "msm-pcm-dsp.2", "msm-voip-dsp",
 908                                 "msm-pcm-voice", "msm-pcm-loopback",
 909                                 "msm-compress-dsp", "msm-pcm-hostless",
 910                                 "msm-pcm-afe", "msm-lsm-client",
 911                                 "msm-pcm-routing", "msm-pcm-dsp-noirq",
 912                                 "msm-pcm-loopback.1";
 913                 asoc-cpu = <&dai_pri_auxpcm>, <&dai_sec_auxpcm>, <&dai_hdmi>,
 914                                 <&dai_mi2s_sec>, <&dai_mi2s>, <&dai_mi2s_quat>,
 915                                 <&afe_pcm_rx>, <&afe_pcm_tx>,
 916                                 <&afe_proxy_rx>, <&afe_proxy_tx>,
 917                                 <&incall_record_rx>, <&incall_record_tx>,
 918                                 <&incall_music_rx>, <&incall_music2_rx>,
 919                                 <&dai_pri_tdm_tx_0>, <&dai_pri_tdm_tx_1>,
 920                                 <&dai_pri_tdm_tx_2>, <&dai_pri_tdm_tx_3>,
 921                                 <&dai_pri_tdm_rx_0>, <&dai_pri_tdm_rx_1>,
 922                                 <&dai_pri_tdm_rx_2>, <&dai_pri_tdm_rx_3>,
 923                                 <&dai_sec_tdm_rx_0>, <&dai_sec_tdm_rx_1>,
 924                                 <&dai_sec_tdm_rx_2>, <&dai_sec_tdm_rx_3>,
 925                                 <&dai_sec_tdm_tx_0>, <&dai_sec_tdm_tx_1>,
 926                                 <&dai_sec_tdm_tx_2>, <&dai_sec_tdm_tx_3>,
 927                                 <&dai_tert_tdm_rx_0>, <&dai_tert_tdm_rx_1>,
 928                                 <&dai_tert_tdm_rx_2>, <&dai_tert_tdm_rx_3>,
 929                                 <&dai_tert_tdm_rx_4>, <&dai_tert_tdm_tx_0>,
 930                                 <&dai_tert_tdm_tx_1>, <&dai_tert_tdm_tx_2>,
 931                                 <&dai_tert_tdm_tx_3>, <&dai_quat_tdm_rx_0>,
 932                                 <&dai_quat_tdm_rx_1>, <&dai_quat_tdm_rx_2>,
 933                                 <&dai_quat_tdm_rx_3>, <&dai_quat_tdm_tx_0>,
 934                                 <&dai_quat_tdm_tx_1>, <&dai_quat_tdm_tx_2>,
 935                                 <&dai_quat_tdm_tx_3>;
 936                 asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2",
 937                                 "msm-dai-q6-hdmi.8", "msm-dai-q6-mi2s.1",
 938                                 "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
 939                                 "msm-dai-q6-dev.224", "msm-dai-q6-dev.225",
 940                                 "msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
 941                                 "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
 942                                 "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
 943                                 "msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36867",
 944                                 "msm-dai-q6-tdm.36869", "msm-dai-q6-tdm.36871",
 945                                 "msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36866",
 946                                 "msm-dai-q6-tdm.36868", "msm-dai-q6-tdm.36870",
 947                                 "msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36882",
 948                                 "msm-dai-q6-tdm.36884", "msm-dai-q6-tdm.36886",
 949                                 "msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36883",
 950                                 "msm-dai-q6-tdm.36885", "msm-dai-q6-tdm.36887",
 951                                 "msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36898",
 952                                 "msm-dai-q6-tdm.36900", "msm-dai-q6-tdm.36902",
 953                                 "msm-dai-q6-tdm.36904", "msm-dai-q6-tdm.36897",
 954                                 "msm-dai-q6-tdm.36899", "msm-dai-q6-tdm.36901",
 955                                 "msm-dai-q6-tdm.36903", "msm-dai-q6-tdm.36912",
 956                                 "msm-dai-q6-tdm.36914", "msm-dai-q6-tdm.36916",
 957                                 "msm-dai-q6-tdm.36918", "msm-dai-q6-tdm.36913",
 958                                 "msm-dai-q6-tdm.36915", "msm-dai-q6-tdm.36917",
 959                                 "msm-dai-q6-tdm.36919";
 960                 asoc-codec = <&stub_codec>;
 961                 asoc-codec-names = "msm-stub-codec.1";
 962         };
 963
 964         usb_detect: usb_detect {
 965                 compatible = "qcom,gpio-usbdetect";
 966                 qcom,vbus-det-gpio = <&pm8994_gpios 17 0>;
 967                 interrupt-parent = <&spmi_bus>;
 968                 interrupts = <0x0 0x9 0x0 IRQ_TYPE_NONE>;
 969                 interrupt-names ="pmic_id_irq";
 970         };
 971
 972         loopback1: qcom,msm-pcm-loopback-low-latency {
 973                 compatible = "qcom,msm-pcm-loopback";
 974                 qcom,msm-pcm-loopback-low-latency;
 975         };
 976
 977         usb_vbus_vreg: usb_vbus_vreg {
 978                 compatible = "regulator-fixed";
 979                 regulator-name = "usb_vbus_vreg";
 980                 gpio = <&pm8994_mpps 8 0>;
 981                 enable-active-high;
 982         };
 983
 984         usb2_otg_switch: usb2_otg_switch {
 985                 compatible = "regulator-fixed";
 986                 vin-supply = <&usb_vbus_vreg>;
 987                 regulator-name = "usb2_otg_vreg";
 988                 gpio = <&pm8994_gpios 12 0>;
 989                 enable-active-high;
 990         };
 991
 992         qcom,msm-dai-mi2s {
 993                 dai_mi2s_sec: qcom,msm-dai-q6-mi2s-sec {
 994                         qcom,msm-mi2s-rx-lines = <2>;
 995                         qcom,msm-mi2s-tx-lines = <1>;
 996                         pinctrl-names = "default", "sleep";
 997                         pinctrl-0 = <&sec_mi2s_active &sec_mi2s_sd0_active
 998                                 &sec_mi2s_sd1_active>;
 999                         pinctrl-1 = <&sec_mi2s_sleep &sec_mi2s_sd0_sleep
1000                                 &sec_mi2s_sd1_sleep>;
1001                 };
1002
1003                 dai_mi2s_quat: qcom,msm-dai-q6-mi2s-quat {
1004                         pinctrl-names = "default", "sleep";
1005                         pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active>;
1006                         pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep>;
1007                 };
1008         };
1009
1010         qcom,msm-dai-tdm-tert-rx {
1011                 pinctrl-names = "default", "sleep";
1012                 pinctrl-0 = <&tert_tdm_dout_active>;
1013                 pinctrl-1 = <&tert_tdm_dout_sleep>;
1014         };
1015
1016         qcom,msm-dai-tdm-quat-rx {
1017                 pinctrl-names = "default", "sleep";
1018                 pinctrl-0 = <&quat_tdm_dout_active>;
1019                 pinctrl-1 = <&quat_tdm_dout_sleep>;
1020         };
1021 };
1022
1023 &pm8994_gpios {
1024         gpio@c600 { /* GPIO 7 - NFC DWL REQ */
1025                 qcom,mode = <1>;
1026                 qcom,output-type = <0>;
1027                 qcom,pull = <5>;
1028                 qcom,vin-sel = <2>;
1029                 qcom,out-strength = <3>;
1030                 qcom,src-sel = <0>;
1031                 qcom,master-en = <1>;
1032                 status = "okay";
1033         };
1034
1035         gpio@c700 { /* GPIO 8 - WLAN_EN */
1036                 qcom,mode = <1>;                /* Digital output*/
1037                 qcom,pull = <4>;                /* Pulldown 10uA */
1038                 qcom,vin-sel = <2>;             /* VIN2 */
1039                 qcom,src-sel = <0>;             /* GPIO */
1040                 qcom,invert = <0>;              /* Invert */
1041                 qcom,master-en = <1>;           /* Enable GPIO */
1042                 status = "okay";
1043         };
1044
1045         gpio@c800 { /* GPIO 9 - Rome 3.3V control */
1046                 qcom,mode = <1>;                /* Digital output */
1047                 qcom,output-type = <0>;         /* MOS logic */
1048                 qcom,invert = <1>;              /* Output high */
1049                 qcom,vin-sel = <0>;             /* VPH_PWR */
1050                 qcom,src-sel = <0>;             /* Constant */
1051                 qcom,out-strength = <1>;        /* High drive strength */
1052                 qcom,master-en = <1>;           /* Enable GPIO */
1053                 status = "okay";
1054         };
1055
1056         gpio@c900 { /* GPIO 10 - lcd_bklt_reg_en */
1057                 qcom,mode = <1>;        /* DIGITAL OUT */
1058                 qcom,output-type = <0>;         /* CMOS logic */
1059                 qcom,invert = <1>;      /* output hight initially */
1060                 qcom,vin-sel = <2>;     /* 1.8 */
1061                 qcom,src-sel = <0>;     /* CONSTANT */
1062                 qcom,out-strength = <1>;        /* Low drive strength */
1063                 qcom,master-en = <1>;   /* ENABLE GPIO */
1064                 status = "okay";
1065         };
1066         gpio@c100 { /* GPIO 2 */
1067                 qcom,mode = <0>;
1068                 qcom,pull = <0>;
1069                 qcom,vin-sel = <2>;
1070                 qcom,src-sel = <0>;
1071                 status = "okay";
1072         };
1073
1074         gpio@c300 { /* GPIO 4 */
1075                 qcom,mode = <0>;
1076                 qcom,pull = <0>;
1077                 qcom,vin-sel = <2>;
1078                 qcom,src-sel = <0>;
1079                 status = "okay";
1080         };
1081
1082         gpio@c400 { /* GPIO 5 */
1083                 qcom,mode = <0>;
1084                 qcom,pull = <0>;
1085                 qcom,vin-sel = <2>;
1086                 qcom,src-sel = <0>;
1087                 status = "okay";
1088         };
1089
1090         gpio@ca00 { /* GPIO 11 - USB enb1 (otg switch) */
1091                 qcom,mode = <1>;        /* DIGITAL OUT */
1092                 qcom,vin-sel = <2>;     /* 1.8 */
1093                 qcom,src-sel = <0>;     /* GPIO */
1094                 qcom,master-en = <1>;   /* Enable GPIO */
1095                 status = "okay";
1096         };
1097
1098         gpio@cb00 { /* GPIO 12 - USB enb2 (otg switch) */
1099                 qcom,mode = <1>;        /* DIGITAL OUT */
1100                 qcom,vin-sel = <2>;     /* 1.8 */
1101                 qcom,src-sel = <0>;     /* GPIO */
1102                 qcom,master-en = <1>;   /* Enable GPIO */
1103                 status = "okay";
1104         };
1105
1106         gpio@cc00 { /* GPIO 13 - NTN_RST */
1107                 qcom,mode = <1>; /* DIGITAL OUT */
1108                 qcom,output-type = <0>; /* CMOS logic */
1109                 qcom,pull = <5>;
1110                 qcom,vin-sel = <2>; /* 1.8 */
1111                 qcom,out-strength = <1>;
1112                 qcom,src-sel = <0>; /* GPIO */
1113                 qcom,master-en = <0>; /* Disable GPIO */
1114                 status = "okay";
1115         };
1116
1117         gpio@ce00 { /* GPIO 15 */
1118                 qcom,mode = <1>;
1119                 qcom,output-type = <0>;
1120                 qcom,pull = <5>;
1121                 qcom,vin-sel = <2>;
1122                 qcom,out-strength = <1>;
1123                 qcom,src-sel = <2>;
1124                 qcom,master-en = <1>;
1125                 status = "okay";
1126         };
1127
1128         gpio@d000 { /* GPIO 17 - USB1 VBUS detect */
1129                 qcom,mode = <0>;        /* Digital Input*/
1130                 qcom,pull = <5>;        /* No pull */
1131                 qcom,vin-sel = <2>;     /* 1.8 V */
1132                 qcom,src-sel = <0>;     /* GPIO */
1133                 qcom,master-en = <1>;   /* Enable GPIO */
1134                 status = "okay";
1135         };
1136
1137         gpio@d100 { /* GPIO 18 - Rome Sleep Clock */
1138                 qcom,mode = <1>;                /* Digital output */
1139                 qcom,output-type = <0>;         /* CMOS logic */
1140                 qcom,invert = <0>;              /* Output low initially */
1141                 qcom,vin-sel = <2>;             /* VIN 2 */
1142                 qcom,src-sel = <3>;             /* Function 2 */
1143                 qcom,out-strength = <2>;        /* Medium */
1144                 qcom,master-en = <1>;           /* Enable GPIO */
1145                 status = "okay";
1146         };
1147
1148         gpio@d200 { /* GPIO 19 - Rome BT Reset */
1149                 qcom,mode = <1>;                /* Digital output*/
1150                 qcom,pull = <4>;                /* Pulldown 10uA */
1151                 qcom,vin-sel = <2>;             /* VIN2 */
1152                 qcom,src-sel = <0>;             /* GPIO */
1153                 qcom,invert = <0>;              /* Invert */
1154                 qcom,master-en = <1>;           /* Enable GPIO */
1155                 status = "okay";
1156         };
1157 };
1158
1159 &usb2s {
1160         status = "ok";
1161         vbus_dwc3-supply = <&usb2_otg_switch>;
1162         dwc3@7600000 {
1163                 dr_mode = "host";
1164         };
1165 };
1166
1167 &usb3 {
1168         extcon = <&usb_detect>;
1169         vbus_dwc3-supply = <&usb_otg_switch>;
1170         vdda33-supply = <&pm8994_l24>;
1171         vdda18-supply = <&pm8994_l12>;
1172 };
1173
1174 &blsp1_uart2 {
1175         status = "ok";
1176 };
1177
1178 &i2c_6 {
1179         at24@51 {
1180                 compatible = "atmel,24c32";
1181                 reg = <0x51>;
1182         };
1183 };
1184
1185 &i2c_7 {
1186         silabs4705@11 { /* SiLabs FM chip, slave id 0x11*/
1187                 status = "disabled";
1188                 compatible = "silabs,si4705";
1189                 reg = <0x11>;
1190                 vdd-supply = <&pm8994_s4>;
1191                 silabs,vdd-supply-voltage = <1800000 1800000>;
1192                 va-supply = <&rome_vreg>;
1193                 silabs,va-supply-voltage = <3300000 3300000>;
1194                 pinctrl-names = "pmx_fm_active","pmx_fm_suspend";
1195                 pinctrl-0 = <&fm_int_active &fm_status_int_active
1196                                                  &fm_rst_active>;
1197                 pinctrl-1 = <&fm_int_suspend &fm_status_int_suspend
1198                                                 &fm_rst_suspend>;
1199                 silabs,reset-gpio = <&tlmm 39 0>;
1200                 silabs,int-gpio = <&tlmm 38 0>;
1201                 silabs,status-gpio = <&tlmm 78 0>;
1202                 #address-cells = <0>;
1203                 interrupts = <0 1>;
1204                 #interrupt-cells = <1>;
1205                 interrupt-map-mask = <0xffffffff>;
1206                 interrupt-map = <
1207                                   0 &tlmm 38 2
1208                                   1 &tlmm 78 1
1209                                 >;
1210                 interrupt-names = "silabs_fm_int", "silabs_fm_status_int";
1211         };
1212 };
1213
1214 &i2c_8 { /* BLSP2 QUP2 */
1215         nq@28 {
1216                 compatible = "qcom,nq-nci";
1217                 reg = <0x28>;
1218                 qcom,nq-irq = <&tlmm 9 0x00>;
1219                 qcom,nq-ven = <&tlmm 12 0x00>;
1220                 qcom,nq-firm = <&pm8994_gpios 7 0x00>;
1221                 interrupt-parent = <&tlmm>;
1222                 qcom,clk-src = "BBCLK2";
1223                 interrupts = <9 0>;
1224                 interrupt-names = "nfc_irq";
1225                 pinctrl-names = "nfc_active", "nfc_suspend";
1226                 pinctrl-0 = <&nfc_int_active &nfc_disable_active>;
1227                 pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;
1228                 clocks = <&clock_gcc clk_bb_clk2_pin>;
1229                 clock-names = "ref_clk";
1230         };
1231 };
1232
1233 &soc {
1234         sound-9335 {
1235                 /delete-property/ qcom,hph-en1-gpio;
1236         };
1237 };
1238
1239 &slim_msm {
1240         status = "disabled";
1241 };
1242
1243 /delete-node/  &led_flash0;
1244
1245 &mdss_dsi0 {
1246         /delete-property/ lab-supply;
1247         /delete-property/ ibb-supply;
1248 };
1249
1250 &mdss_dsi1 {
1251         /delete-property/ lab-supply;
1252         /delete-property/ ibb-supply;
1253 };
1254
1255 &cci {
1256         qcom,camera@0 {
1257                 /delete-property/ qcom,led-flash-src;
1258         };
1259
1260         qcom,camera@1 {
1261                 /delete-property/ cam_vana-supply;
1262         };
1263 };
1264
1265 &usb_otg_switch {
1266         gpio = <&pm8994_gpios 11 0>;
1267         enable-active-high;
1268         status = "ok";
1269         /delete-property/ vin-supply;
1270 };
1271
1272 &pcie0 {
1273         /delete-property/ qcom,l1-supported;
1274         /delete-property/ qcom,l1ss-supported;
1275         /delete-property/ qcom,aux-clk-sync;
1276 };
1277
1278 &pcie1 {
1279         qcom,msi-gicm-addr = <0x09BD0040>;
1280         qcom,msi-gicm-base = <0x240>;
1281
1282         /delete-property/ qcom,boot-option;
1283         /delete-property/ qcom,l1-supported;
1284         /delete-property/ qcom,l1ss-supported;
1285         /delete-property/ qcom,aux-clk-sync;
1286         /delete-property/ qcom,ep-wakeirq;
1287 };
1288
1289 &pcie2 {
1290         perst-gpio = <&tlmm 90 0>;
1291         wake-gpio = <&tlmm 54 0>;
1292
1293         /delete-property/ qcom,boot-option;
1294         /delete-property/ qcom,l1-supported;
1295         /delete-property/ qcom,l1ss-supported;
1296         /delete-property/ qcom,aux-clk-sync;
1297         /delete-property/ qcom,ep-wakeirq;
1298 };
1299
1300 &wsa881x_211 {
1301         /delete-property/ qcom,spkr-sd-n-gpio;
1302 };
1303
1304 &wsa881x_212 {
1305         /delete-property/ qcom,spkr-sd-n-gpio;
1306 };
1307
1308 &wsa881x_213 {
1309         /delete-property/ qcom,spkr-sd-n-gpio;
1310 };
1311
1312 &wsa881x_214 {
1313         /delete-property/ qcom,spkr-sd-n-gpio;
1314 };
1315
1316 &vfe_smmu {
1317         qcom,no-smr-check;
1318 };
1319
1320 / {
1321         reserved-memory {
1322                 lk_mem: lk_pool@0x91600000 {
1323                         reg = <0 0x91600000 0 0x00600000>;
1324                         label = "lk_pool";
1325                 };
1326
1327                 early_camera_mem: early_camera_mem@b3fff000 {
1328                         reg = <0 0xb3fff000 0 0x800000>;
1329                         label = "early_camera_mem";
1330                 };
1331                 early_audio_mem: early_audio_mem@0xb5fff000 {
1332                         reg = <0x0 0xb5fff000 0x0 0x3FFFFC>;
1333                         label = "early_audio_mem";
1334                 };
1335         };
1336 };
1337