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Merge "i2c-msm-v2: Use "subsys" instead of "arch" initcall"
[sagit-ice-cold/kernel_xiaomi_msm8998.git] / arch / arm / boot / dts / qcom / msm8996-auto-cdp.dtsi
1 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License version 2 and
5  * only version 2 as published by the Free Software Foundation.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  */
12
13 #include "msm8996-pinctrl.dtsi"
14 #include "msm8996-camera-sensor-auto-cdp.dtsi"
15 #include "msm8996-wsa881x.dtsi"
16
17 / {
18         bluetooth: bt_qca6174 {
19                 compatible = "qca,qca6174";
20                 qca,bt-reset-gpio = <&pm8994_gpios 19 0>; /* BT_EN */
21                 qca,bt-vdd-core-supply = <&pm8994_s3>;
22                 qca,bt-vdd-pa-supply = <&rome_vreg>;
23                 qca,bt-vdd-io-supply = <&pm8994_s4>;
24                 qca,bt-vdd-xtal-supply = <&pm8994_l30>;
25                 qca,bt-chip-pwd-voltage-level = <1300000 1300000>;
26                 qca,bt-vdd-io-voltage-level = <1800000 1800000>;
27                 qca,bt-vdd-xtal-voltage-level = <1800000 1800000>;
28         };
29 };
30
31 &ufs_ice {
32         status = "ok";
33 };
34
35 &sdcc1_ice {
36         status = "ok";
37 };
38
39 &ufsphy1 {
40         status = "ok";
41 };
42
43 &ufs1 {
44         status = "ok";
45 };
46
47 &spi_0 {
48         spi_codec@0 {
49                 compatible = "qcom,spi-msm-codec-slave";
50                 reg = <0>;
51                 spi-max-frequency = <2000000>;
52                 spi-cpha;
53         };
54 };
55
56 &uartblsp2dm1 {
57         status = "ok";
58         pinctrl-names = "default";
59         pinctrl-0 = <&uart_console_active>;
60 };
61
62 &sdhc_1 {
63         vdd-supply = <&pm8994_l20>;
64         qcom,vdd-voltage-level = <2950000 2950000>;
65         qcom,vdd-current-level = <200 570000>;
66
67         vdd-io-supply = <&pm8994_s4>;
68         qcom,vdd-io-always-on;
69         qcom,vdd-io-voltage-level = <1800000 1800000>;
70         qcom,vdd-io-current-level = <110 325000>;
71
72         pinctrl-names = "active", "sleep";
73         pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
74         pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
75
76         qcom,clk-rates = <400000 20000000 25000000 50000000
77                                 96000000 192000000 384000000>;
78         qcom,ice-clk-rates = <300000000 150000000>;
79         qcom,nonremovable;
80         qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
81
82         status = "ok";
83 };
84
85 &sdhc_2 {
86         vdd-supply = <&pm8994_l21>;
87         qcom,vdd-voltage-level = <2950000 2950000>;
88         qcom,vdd-current-level = <200 800000>;
89
90         vdd-io-supply = <&pm8994_l13>;
91         qcom,vdd-io-voltage-level = <1800000 2950000>;
92         qcom,vdd-io-current-level = <200 22000>;
93
94         pinctrl-names = "active", "sleep";
95         pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on
96                      &sdc2_cd_on_sbc>;
97         pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off
98                      &sdc2_cd_on_sbc>;
99
100         qcom,clk-rates = <400000 20000000 25000000
101                                 50000000 100000000 200000000>;
102         qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
103
104         cd-gpios = <&tlmm 38 0x1>;
105
106         status = "ok";
107 };
108
109 &pm8994_vadc {
110         chan@5 {
111                 label = "vcoin";
112                 reg = <5>;
113                 qcom,decimation = <0>;
114                 qcom,pre-div-channel-scaling = <1>;
115                 qcom,calibration-type = "absolute";
116                 qcom,scale-function = <0>;
117                 qcom,hw-settle-time = <0>;
118                 qcom,fast-avg-setup = <0>;
119         };
120
121         chan@7 {
122                 label = "vph_pwr";
123                 reg = <7>;
124                 qcom,decimation = <0>;
125                 qcom,pre-div-channel-scaling = <1>;
126                 qcom,calibration-type = "absolute";
127                 qcom,scale-function = <0>;
128                 qcom,hw-settle-time = <0>;
129                 qcom,fast-avg-setup = <0>;
130         };
131
132         chan@73 {
133                 label = "msm_therm";
134                 reg = <0x73>;
135                 qcom,decimation = <0>;
136                 qcom,pre-div-channel-scaling = <0>;
137                 qcom,calibration-type = "ratiometric";
138                 qcom,scale-function = <2>;
139                 qcom,hw-settle-time = <2>;
140                 qcom,fast-avg-setup = <0>;
141         };
142
143         chan@74 {
144                 label = "emmc_therm";
145                 reg = <0x74>;
146                 qcom,decimation = <0>;
147                 qcom,pre-div-channel-scaling = <0>;
148                 qcom,calibration-type = "ratiometric";
149                 qcom,scale-function = <2>;
150                 qcom,hw-settle-time = <2>;
151                 qcom,fast-avg-setup = <0>;
152         };
153
154         chan@75 {
155                 label = "pa_therm0";
156                 reg = <0x75>;
157                 qcom,decimation = <0>;
158                 qcom,pre-div-channel-scaling = <0>;
159                 qcom,calibration-type = "ratiometric";
160                 qcom,scale-function = <2>;
161                 qcom,hw-settle-time = <2>;
162                 qcom,fast-avg-setup = <0>;
163         };
164
165         chan@77 {
166                 label = "pa_therm1";
167                 reg = <0x77>;
168                 qcom,decimation = <0>;
169                 qcom,pre-div-channel-scaling = <0>;
170                 qcom,calibration-type = "ratiometric";
171                 qcom,scale-function = <2>;
172                 qcom,hw-settle-time = <2>;
173                 qcom,fast-avg-setup = <0>;
174         };
175
176         chan@78 {
177                 label = "quiet_therm";
178                 reg = <0x78>;
179                 qcom,decimation = <0>;
180                 qcom,pre-div-channel-scaling = <0>;
181                 qcom,calibration-type = "ratiometric";
182                 qcom,scale-function = <2>;
183                 qcom,hw-settle-time = <2>;
184                 qcom,fast-avg-setup = <0>;
185         };
186
187         chan@7c {
188                 label = "xo_therm_buf";
189                 reg = <0x7c>;
190                 qcom,decimation = <0>;
191                 qcom,pre-div-channel-scaling = <0>;
192                 qcom,calibration-type = "ratiometric";
193                 qcom,scale-function = <4>;
194                 qcom,hw-settle-time = <2>;
195                 qcom,fast-avg-setup = <0>;
196         };
197
198         chan@7c {
199                 label = "xo_therm_buf";
200                 reg = <0x7c>;
201                 qcom,decimation = <0>;
202                 qcom,pre-div-channel-scaling = <0>;
203                 qcom,calibration-type = "ratiometric";
204                 qcom,scale-function = <4>;
205                 qcom,hw-settle-time = <2>;
206                 qcom,fast-avg-setup = <0>;
207         };
208 };
209
210 &pm8994_adc_tm {
211         chan@73 {
212                 label = "msm_therm";
213                 reg = <0x73>;
214                 qcom,decimation = <0>;
215                 qcom,pre-div-channel-scaling = <0>;
216                 qcom,calibration-type = "ratiometric";
217                 qcom,scale-function = <2>;
218                 qcom,hw-settle-time = <2>;
219                 qcom,fast-avg-setup = <0>;
220                 qcom,btm-channel-number = <0x48>;
221                 qcom,thermal-node;
222         };
223
224         chan@74 {
225                 label = "emmc_therm";
226                 reg = <0x74>;
227                 qcom,decimation = <0>;
228                 qcom,pre-div-channel-scaling = <0>;
229                 qcom,calibration-type = "ratiometric";
230                 qcom,scale-function = <2>;
231                 qcom,hw-settle-time = <2>;
232                 qcom,fast-avg-setup = <0>;
233                 qcom,btm-channel-number = <0x68>;
234                 qcom,thermal-node;
235         };
236
237         chan@75 {
238                 label = "pa_therm0";
239                 reg = <0x75>;
240                 qcom,decimation = <0>;
241                 qcom,pre-div-channel-scaling = <0>;
242                 qcom,calibration-type = "ratiometric";
243                 qcom,scale-function = <2>;
244                 qcom,hw-settle-time = <2>;
245                 qcom,fast-avg-setup = <0>;
246                 qcom,btm-channel-number = <0x70>;
247                 qcom,thermal-node;
248         };
249
250         chan@77 {
251                 label = "pa_therm1";
252                 reg = <0x77>;
253                 qcom,decimation = <0>;
254                 qcom,pre-div-channel-scaling = <0>;
255                 qcom,calibration-type = "ratiometric";
256                 qcom,scale-function = <2>;
257                 qcom,hw-settle-time = <2>;
258                 qcom,fast-avg-setup = <0>;
259                 qcom,btm-channel-number = <0x78>;
260                 qcom,thermal-node;
261         };
262
263         chan@78 {
264                 label = "quiet_therm";
265                 reg = <0x78>;
266                 qcom,decimation = <0>;
267                 qcom,pre-div-channel-scaling = <0>;
268                 qcom,calibration-type = "ratiometric";
269                 qcom,scale-function = <2>;
270                 qcom,hw-settle-time = <2>;
271                 qcom,fast-avg-setup = <0>;
272                 qcom,btm-channel-number = <0x80>;
273                 qcom,thermal-node;
274         };
275
276         chan@7c {
277                 label = "xo_therm_buf";
278                 reg = <0x7c>;
279                 qcom,decimation = <0>;
280                 qcom,pre-div-channel-scaling = <0>;
281                 qcom,calibration-type = "ratiometric";
282                 qcom,scale-function = <4>;
283                 qcom,hw-settle-time = <2>;
284                 qcom,fast-avg-setup = <0>;
285                 qcom,btm-channel-number = <0x88>;
286                 qcom,thermal-node;
287         };
288 };
289
290 &mdss_hdmi_tx {
291         pinctrl-names = "hdmi_hpd_active", "hdmi_ddc_active", "hdmi_cec_active",
292                                 "hdmi_active", "hdmi_sleep";
293         pinctrl-0 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_suspend
294                                                 &mdss_hdmi_cec_suspend>;
295         pinctrl-1 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active
296                                                 &mdss_hdmi_cec_suspend>;
297         pinctrl-2 = <&mdss_hdmi_hpd_active &mdss_hdmi_cec_active
298                                                 &mdss_hdmi_ddc_suspend>;
299         pinctrl-3 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active
300                                                 &mdss_hdmi_cec_active>;
301         pinctrl-4 = <&mdss_hdmi_hpd_suspend &mdss_hdmi_ddc_suspend
302                                                 &mdss_hdmi_cec_suspend>;
303 };
304
305 #include "msm8996-sde-display.dtsi"
306
307 &pmx_mdss {
308         mdss_dsi_active: mdss_dsi_active {
309                 mux {
310                         pins = "gpio8",  "gpio70";
311                         function = "gpio";
312                 };
313
314                 config {
315                         pins = "gpio8",  "gpio70";
316                         drive-strength = <8>; /* 8 mA */
317                         bias-disable = <0>; /* no pull */
318                         output-high;
319                 };
320         };
321
322         mdss_dsi_suspend: mdss_dsi_suspend {
323                 mux {
324                         pins = "gpio8",  "gpio70";
325                         function = "gpio";
326                 };
327
328                 config {
329                         pins = "gpio8",  "gpio70";
330                         drive-strength = <2>; /* 2 mA */
331                         bias-pull-down; /* pull down */
332                 };
333         };
334 };
335
336 &sde_kms {
337         qcom,mdss-pref-prim-intf = "dsi";
338 };
339
340 &dsi_adv_7533_1 {
341         qcom,dsi-display-active;
342         qcom,dsi-panel = <&dsi_adv7533_1080p>;
343
344         qcom,panel-supply-entries {
345                 #address-cells = <1>;
346                 #size-cells = <0>;
347
348                 qcom,panel-supply-entry@0 {
349                         reg = <0>;
350                         qcom,supply-name = "vdd";
351                         qcom,supply-min-voltage = <3300000>;
352                         qcom,supply-max-voltage = <3300000>;
353                         qcom,supply-enable-load = <100000>;
354                         qcom,supply-disable-load = <100>;
355                 };
356
357                 qcom,panel-supply-entry@1 {
358                         reg = <1>;
359                         qcom,supply-name = "vddio";
360                         qcom,supply-min-voltage = <1800000>;
361                         qcom,supply-max-voltage = <1800000>;
362                         qcom,supply-enable-load = <100000>;
363                         qcom,supply-disable-load = <100>;
364                 };
365         };
366 };
367
368 &dsi_adv_7533_2 {
369         qcom,dsi-display-active;
370         qcom,dsi-panel = <&dsi_adv7533_1080p>;
371
372         qcom,panel-supply-entries {
373                 #address-cells = <1>;
374                 #size-cells = <0>;
375
376                 qcom,panel-supply-entry@0 {
377                         reg = <0>;
378                         qcom,supply-name = "vdd";
379                         qcom,supply-min-voltage = <3300000>;
380                         qcom,supply-max-voltage = <3300000>;
381                         qcom,supply-enable-load = <100000>;
382                         qcom,supply-disable-load = <100>;
383                 };
384
385                 qcom,panel-supply-entry@1 {
386                         reg = <1>;
387                         qcom,supply-name = "vddio";
388                         qcom,supply-min-voltage = <1800000>;
389                         qcom,supply-max-voltage = <1800000>;
390                         qcom,supply-enable-load = <100000>;
391                         qcom,supply-disable-load = <100>;
392                 };
393         };
394 };
395
396 &sde_hdmi {
397         qcom,non-pluggable;
398         qcom,customize-modes {
399                 qcom,customize-mode-id@0 {
400                         qcom,mode-name = "1920x1080@60Hz";
401                         qcom,mode-h-active = <1920>;
402                         qcom,mode-h-front-porch = <88>;
403                         qcom,mode-h-pulse-width = <44>;
404                         qcom,mode-h-back-porch = <148>;
405                         qcom,mode-h-active-high;
406                         qcom,mode-v-active = <1080>;
407                         qcom,mode-v-front-porch = <4>;
408                         qcom,mode-v-pulse-width = <5>;
409                         qcom,mode-v-back-porch = <36>;
410                         qcom,mode-v-active-high;
411                         qcom,mode-refresh-rate = <60>;
412                         qcom,mode-clock-in-khz = <148500>;
413                 };
414         };
415 };
416
417 &mdss_dsi {
418         hw-config = "dual_dsi";
419 };
420
421 &mdss_dsi0 {
422         qcom,dsi-pref-prim-pan = <&dsi_adv7533_1080p>;
423         pinctrl-names = "mdss_default", "mdss_sleep";
424         pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
425         pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
426         qcom,display-id = "primary";
427         qcom,bridge-index = <0>;
428
429         qcom,panel-supply-entries {
430                 #address-cells = <1>;
431                 #size-cells = <0>;
432
433                 qcom,panel-supply-entry@0 {
434                         reg = <0>;
435                         qcom,supply-name = "vdd";
436                         qcom,supply-min-voltage = <3300000>;
437                         qcom,supply-max-voltage = <3300000>;
438                         qcom,supply-enable-load = <100000>;
439                         qcom,supply-disable-load = <100>;
440                 };
441
442                 qcom,panel-supply-entry@1 {
443                         reg = <1>;
444                         qcom,supply-name = "vddio";
445                         qcom,supply-min-voltage = <1800000>;
446                         qcom,supply-max-voltage = <1800000>;
447                         qcom,supply-enable-load = <100000>;
448                         qcom,supply-disable-load = <100>;
449                 };
450         };
451 };
452
453 &mdss_dsi1 {
454         qcom,dsi-pref-prim-pan = <&dsi_adv7533_1080p>;
455         pinctrl-names = "mdss_default", "mdss_sleep";
456         pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
457         pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
458         qcom,display-id = "tertiary";
459         qcom,bridge-index = <1>;
460
461         qcom,panel-supply-entries {
462                 #address-cells = <1>;
463                 #size-cells = <0>;
464
465                 qcom,panel-supply-entry@0 {
466                         reg = <0>;
467                         qcom,supply-name = "vdd";
468                         qcom,supply-min-voltage = <3300000>;
469                         qcom,supply-max-voltage = <3300000>;
470                         qcom,supply-enable-load = <100000>;
471                         qcom,supply-disable-load = <100>;
472                 };
473
474                 qcom,panel-supply-entry@1 {
475                         reg = <1>;
476                         qcom,supply-name = "vddio";
477                         qcom,supply-min-voltage = <1800000>;
478                         qcom,supply-max-voltage = <1800000>;
479                         qcom,supply-enable-load = <100000>;
480                         qcom,supply-disable-load = <100>;
481                 };
482         };
483 };
484
485 &dsi_dual_sharp_video {
486         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
487         qcom,mdss-dsi-bl-min-level = <1>;
488         qcom,mdss-dsi-bl-max-level = <4095>;
489         qcom,cont-splash-enabled;
490         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
491 };
492
493 &dsi_dual_nt35597_video {
494         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
495         qcom,mdss-dsi-bl-min-level = <1>;
496         qcom,mdss-dsi-bl-max-level = <4095>;
497         qcom,cont-splash-enabled;
498         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
499 };
500
501 &dsi_dual_nt35597_cmd {
502         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
503         qcom,mdss-dsi-bl-min-level = <1>;
504         qcom,mdss-dsi-bl-max-level = <4095>;
505         qcom,cont-splash-enabled;
506         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
507         qcom,partial-update-enabled = "single_roi";
508         qcom,panel-roi-alignment = <720 128 720 64 720 64>;
509 };
510
511 &dsi_nt35597_dsc_video {
512         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
513         qcom,mdss-dsi-bl-min-level = <1>;
514         qcom,mdss-dsi-bl-max-level = <4095>;
515         qcom,cont-splash-enabled;
516         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
517 };
518
519 &dsi_nt35597_dsc_cmd {
520         qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
521         qcom,mdss-dsi-bl-min-level = <1>;
522         qcom,mdss-dsi-bl-max-level = <4095>;
523         qcom,cont-splash-enabled;
524         qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
525 };
526
527 /{
528         mtp_batterydata: qcom,battery-data {
529                 qcom,batt-id-range-pct = <15>;
530                 #include "batterydata-itech-3000mah.dtsi"
531         };
532 };
533
534 &pm8994_mpps {
535         mpp@a100 { /* MPP 2 */
536                 qcom,mode = <1>;                /* Digital output */
537                 qcom,output-type = <0>;         /* CMOS logic */
538                 qcom,vin-sel = <2>;             /* S4 1.8V */
539                 qcom,src-sel = <0>;             /* Constant */
540                 qcom,master-en = <1>;           /* Enable GPIO */
541                 status = "okay";
542         };
543
544         mpp@a300 { /* MPP 4 */
545                 /* HDMI_5v_vreg regulator enable */
546                 qcom,mode = <1>;                /* Digital output */
547                 qcom,output-type = <0>;         /* CMOS logic */
548                 qcom,vin-sel = <2>;             /* S4 1.8V */
549                 qcom,src-sel = <0>;             /* Constant */
550                 qcom,master-en = <1>;           /* Enable GPIO */
551                 qcom,invert = <0>;
552                 status = "okay";
553         };
554
555         mpp@a500 { /* MPP 6 */
556                 qcom,mode = <1>;                /* Digital output */
557                 qcom,output-type = <0>;         /* CMOS logic */
558                 qcom,vin-sel = <2>;             /* S4 1.8V */
559                 qcom,src-sel = <0>;             /* Constant */
560                 qcom,master-en = <1>;           /* Enable GPIO */
561                 status = "okay";
562         };
563
564         mpp@a700 { /* MPP 8 */
565                 /* USB 5V regulator enable */
566                 qcom,mode = <1>;                /* Digital output */
567                 qcom,output-type = <0>;         /* CMOS logic */
568                 qcom,vin-sel = <2>;             /* S4 1.8V */
569                 qcom,src-sel = <0>;             /* Constant */
570                 qcom,master-en = <1>;           /* Enable GPIO */
571                 status = "okay";
572         };
573 };
574
575 &soc {
576         qcom,early-cam {
577                 cell-index = <0>;
578                 compatible = "qcom,early-cam";
579                 status = "ok";
580                 mmagic-supply = <&gdsc_mmagic_camss>;
581                 gdscr-supply = <&gdsc_camss_top>;
582                 vfe0-vdd-supply = <&gdsc_vfe0>;
583                 vfe1-vdd-supply = <&gdsc_vfe1>;
584                 qcom,cam-vreg-name = "mmagic", "gdscr", "vfe0-vdd", "vfe1-vdd";
585                 clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
586                         <&clock_mmss clk_camss_top_ahb_clk>,
587                         <&clock_mmss clk_cci_clk_src>,
588                         <&clock_mmss clk_camss_cci_ahb_clk>,
589                         <&clock_mmss clk_camss_cci_clk>,
590                         <&clock_mmss clk_camss_ahb_clk>,
591                         <&clock_mmss clk_mmagic_camss_axi_clk>,
592                         <&clock_mmss clk_camss_vfe_ahb_clk>,
593                         <&clock_mmss clk_camss_vfe0_ahb_clk>,
594                         <&clock_mmss clk_camss_vfe1_ahb_clk>,
595                         <&clock_mmss clk_camss_vfe_axi_clk>,
596                         <&clock_mmss clk_camss_vfe0_stream_clk>,
597                         <&clock_mmss clk_camss_vfe1_stream_clk>,
598                         <&clock_mmss clk_smmu_vfe_axi_clk>,
599                         <&clock_mmss clk_smmu_vfe_ahb_clk>,
600                         <&clock_mmss clk_camss_csi_vfe0_clk>,
601                         <&clock_mmss clk_camss_csi_vfe1_clk>,
602                         <&clock_mmss clk_vfe0_clk_src>,
603                         <&clock_mmss clk_vfe1_clk_src>,
604                         <&clock_mmss clk_camss_csi_vfe0_clk>,
605                         <&clock_mmss clk_camss_csi2_ahb_clk>,
606                         <&clock_mmss clk_camss_csi2_clk>,
607                         <&clock_mmss clk_camss_csi2phy_clk>,
608                         <&clock_mmss clk_csi2phytimer_clk_src>,
609                         <&clock_mmss clk_camss_csi2phytimer_clk>,
610                         <&clock_mmss clk_camss_csi2rdi_clk>,
611                         <&clock_mmss clk_camss_ispif_ahb_clk>,
612                         <&clock_mmss clk_camss_vfe0_clk>,
613                         <&clock_mmss clk_camss_vfe1_clk>;
614                 clock-names =
615                         "mmss_mmagic_ahb_clk",
616                         "camss_top_ahb_clk",
617                         "cci_clk_src",
618                         "camss_cci_ahb_clk",
619                         "camss_cci_clk",
620                         "camss_ahb_clk",
621                         "mmagic_camss_axi_clk",
622                         "camss_vfe_ahb_clk",
623                         "camss_vfe0_ahb_clk",
624                         "camss_vfe1_ahb_clk",
625                         "camss_vfe_axi_clk",
626                         "camss_vfe0_stream_clk",
627                         "camss_vfe1_stream_clk",
628                         "smmu_vfe_axi_clk",
629                         "smmu_vfe_ahb_clk",
630                         "camss_csi_vfe0_clk",
631                         "camss_csi_vfe1_clk",
632                         "vfe0_clk_src",
633                         "vfe1_clk_src",
634                         "camss_csi_vfe0_clk",
635                         "camss_csi2_ahb_clk",
636                         "camss_csi2_clk",
637                         "camss_csi2phy_clk",
638                         "csi2phytimer_clk_src",
639                         "camss_csi2phytimer_clk",
640                         "camss_csi2rdi_clk",
641                         "camss_ispif_ahb_clk",
642                         "clk_camss_vfe0_clk",
643                         "clk_camss_vfe1_clk";
644
645                 qcom,clock-rates = <19200000
646                                         19200000
647                                         19200000
648                                         19200000
649                                         19200000
650                                         19200000
651                                         0
652                                         0
653                                         0
654                                         0
655                                         320000000
656                                         0
657                                         0
658                                         0
659                                         0
660                                         0
661                                         0
662                                         320000000
663                                         320000000
664                                         0
665                                         0
666                                         200000000
667                                         200000000
668                                         200000000
669                                         200000000
670                                         200000000
671                                         0
672                                         100000000
673                                         100000000>;
674         };
675
676         ntn1: ntn_avb@1 { /* Neutrno device on RC1*/
677                 compatible = "qcom,ntn_avb";
678
679                 ntn-rst-gpio = <&pm8994_gpios 13 0>;
680                 pinctrl-names = "default";
681                 pinctrl-0 = <&ntn_clk_sync>;
682
683                 vdd-ntn-hsic-supply = <&pm8994_l25>;
684                 vdd-ntn-pci-supply = <&pm8994_s4>;
685                 vdd-ntn-io-supply = <&pm8994_s4>;
686
687                 qcom,ntn-rst-delay-msec = <100>;
688                 qcom,ntn-rc-num = <1>;
689                 qcom,ntn-bus-num = <1>;
690                 qcom,ntn-mdio-bus-id = <1>;
691                 qcom,ntn-phy-addr = <7>;
692
693                 qcom,msm-bus,name = "ntn";
694                 qcom,msm-bus,num-cases = <2>;
695                 qcom,msm-bus,num-paths = <1>;
696                 qcom,msm-bus,vectors-KBps =
697                                 <100 512 0 0>,
698                                 <100 512 207108 14432000>;
699         };
700
701         ntn2: ntn_avb@2 { /*Neutrino device on RC2*/
702                 compatible = "qcom,ntn_avb";
703                 qcom,ntn-rst-delay-msec = <100>;
704                 qcom,ntn-rc-num = <2>;
705                 qcom,ntn-bus-num = <1>;
706                 qcom,ntn-mdio-bus-id = <2>;
707
708                 qcom,msm-bus,name = "ntn";
709                 qcom,msm-bus,num-cases = <2>;
710                 qcom,msm-bus,num-paths = <1>;
711                 qcom,msm-bus,vectors-KBps =
712                                 <108 512 0 0>,
713                                 <108 512 207108 14432000>;
714         };
715
716         i2c@75ba000 {
717                 synaptics@20 {
718                         compatible = "synaptics,dsx";
719                         reg = <0x20>;
720                         interrupt-parent = <&tlmm>;
721                         interrupts = <125 0x2008>;
722                         vdd-supply = <&pm8994_l14>;
723                         avdd-supply = <&pm8994_l22>;
724                         pinctrl-names = "pmx_ts_active", "pmx_ts_suspend";
725                         pinctrl-0 = <&ts_active>;
726                         pinctrl-1 = <&ts_suspend>;
727                         synaptics,display-coords = <0 0 1599 2559>;
728                         synaptics,panel-coords = <0 0 1599 2703>;
729                         synaptics,reset-gpio = <&tlmm 89 0x00>;
730                         synaptics,irq-gpio = <&tlmm 125 0x2008>;
731                         synaptics,disable-gpios;
732                         synaptics,fw-name = "PR1702898-s3528t_00350002.img";
733                         /* Underlying clocks used by secure touch */
734                         clock-names = "iface_clk", "core_clk";
735                         clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>,
736                                  <&clock_gcc clk_gcc_blsp2_qup6_i2c_apps_clk>;
737                 };
738         };
739
740         i2c@75b6000 { /* BLSP8 */
741                 /* ADV7533 configuration */
742                 adv7533@3d {
743                         compatible = "adv7533";
744                         instance_id = <0>;
745                         reg = <0x3d>;
746                         adi,video-mode = <3>; /* 3 = 1080p */
747                         adi,main-addr = <0x3D>;
748                         adi,cec-dsi-addr = <0x3E>;
749                         adi,enable-audio;
750                         pinctrl-names = "pmx_adv7533_active",
751                                 "pmx_adv7533_suspend";
752                         pinctrl-0 = <&adv7533_0_int_active
753                                 &adv7533_0_hpd_int_active
754                                 &adv7533_0_switch_active>;
755                         pinctrl-1 = <&adv7533_0_int_suspend
756                                 &adv7533_0_hpd_int_suspend
757                                 &adv7533_0_switch_suspend>;
758                         adi,irq-gpio = <&tlmm 71 0x2002>;
759                         adi,switch-gpio = <&tlmm 72 0x1>;
760                         vddio-supply = <&pm8994_l17>;
761                         qcom,supply-names = "vddio";
762                         qcom,min-voltage-level = <1800000>;
763                         qcom,max-voltage-level = <1800000>;
764                         qcom,enable-load = <100000>;
765                         qcom,disable-load = <100>;
766                         qcom,post-on-sleep = <60>;
767
768                 };
769
770                 adv7533@39 {
771                         compatible = "adv7533";
772                         instance_id = <1>;
773                         reg = <0x39>;
774                         adi,video-mode = <3>; /* 3 = 1080p */
775                         adi,main-addr = <0x39>;
776                         adi,cec-dsi-addr = <0x3C>;
777                         adi,enable-audio;
778                         pinctrl-names = "pmx_adv7533_active",
779                                 "pmx_adv7533_suspend";
780                         pinctrl-0 = <&adv7533_1_int_active
781                                 &adv7533_1_hpd_int_active
782                                 &adv7533_1_switch_active>;
783                         pinctrl-1 = <&adv7533_1_int_suspend
784                                 &adv7533_1_hpd_int_suspend
785                                 &adv7533_1_switch_suspend>;
786                         adi,irq-gpio = <&tlmm 73 0x2002>;
787                         adi,switch-gpio = <&tlmm 74 0x0>;
788                         vddio-supply = <&pm8994_l17>;
789                         qcom,supply-names = "vddio";
790                         qcom,min-voltage-level = <1800000>;
791                         qcom,max-voltage-level = <1800000>;
792                         qcom,enable-load = <100000>;
793                         qcom,disable-load = <100>;
794
795                 };
796         };
797
798         pinctrl@01010000 {
799                 pcie2 {
800                         pcie2_perst_default: pcie2_perst_default {
801                                 mux {
802                                         pins = "gpio90";
803                                         function = "gpio";
804                                 };
805
806                                 config {
807                                         pins = "gpio90";
808                                         drive-strength = <2>;
809                                         bias-pull-down;
810                                 };
811                         };
812
813                         pcie2_wake_default: pcie2_wake_default {
814                                 mux {
815                                         pins = "gpio54";
816                                         function = "gpio";
817                                 };
818
819                                 config {
820                                         pins = "gpio54";
821                                         drive-strength = <2>;
822                                         bias-pull-down;
823                                 };
824                         };
825
826                         pcie2_wake_sleep: pcie2_wake_sleep {
827                                 mux {
828                                         pins = "gpio54";
829                                         function = "gpio";
830                                 };
831
832                                 config {
833                                         pins = "gpio54";
834                                         drive-strength = <2>;
835                                         bias-disable;
836                                 };
837                         };
838                 };
839         };
840
841         gen-vkeys {
842                 compatible = "qcom,gen-vkeys";
843                 label = "synaptics_dsx";
844                 qcom,disp-maxx = <1599>;
845                 qcom,disp-maxy = <2559>;
846                 qcom,panel-maxx = <1599>;
847                 qcom,panel-maxy = <2703>;
848                 qcom,key-codes = <158 139 102 217>;
849         };
850
851         gpio_keys {
852                 compatible = "gpio-keys";
853                 input-name = "gpio-keys";
854
855                 vol_up {
856                         label = "volume_up";
857                         gpios = <&pm8994_gpios 2 0x1>;
858                         linux,input-type = <1>;
859                         linux,code = <115>;
860                         gpio-key,wakeup;
861                         debounce-interval = <15>;
862                 };
863
864                 cam_snapshot {
865                         label = "cam_snapshot";
866                         gpios = <&pm8994_gpios 4 0x1>;
867                         linux,input-type = <1>;
868                         linux,code = <766>;
869                         gpio-key,wakeup;
870                         debounce-interval = <15>;
871                 };
872
873                 cam_focus {
874                         label = "cam_focus";
875                         gpios = <&pm8994_gpios 5 0x1>;
876                         linux,input-type = <1>;
877                         linux,code = <528>;
878                         gpio-key,wakeup;
879                         debounce-interval = <15>;
880                 };
881         };
882
883         sound-9335 {
884                 status = "disabled";
885         };
886
887         sound-adp-agave {
888                 compatible = "qcom,apq8096-asoc-snd-adp-agave";
889                 qcom,model = "apq8096-adp-agave-snd-card";
890
891                 asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
892                                 <&loopback>, <&compress>, <&hostless>,
893                                 <&afe>, <&lsm>, <&routing>, <&pcmnoirq>,
894                                 <&loopback1>;
895                 asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
896                                 "msm-pcm-dsp.2", "msm-voip-dsp",
897                                 "msm-pcm-voice", "msm-pcm-loopback",
898                                 "msm-compress-dsp", "msm-pcm-hostless",
899                                 "msm-pcm-afe", "msm-lsm-client",
900                                 "msm-pcm-routing", "msm-pcm-dsp-noirq",
901                                 "msm-pcm-loopback.1";
902                 asoc-cpu = <&dai_pri_auxpcm>, <&dai_sec_auxpcm>, <&dai_hdmi>,
903                                 <&dai_mi2s_sec>, <&dai_mi2s>, <&dai_mi2s_quat>,
904                                 <&afe_pcm_rx>, <&afe_pcm_tx>,
905                                 <&afe_proxy_rx>, <&afe_proxy_tx>,
906                                 <&incall_record_rx>, <&incall_record_tx>,
907                                 <&incall_music_rx>, <&incall_music2_rx>,
908                                 <&dai_pri_tdm_tx_0>, <&dai_pri_tdm_tx_1>,
909                                 <&dai_pri_tdm_tx_2>, <&dai_pri_tdm_tx_3>,
910                                 <&dai_pri_tdm_rx_0>, <&dai_pri_tdm_rx_1>,
911                                 <&dai_pri_tdm_rx_2>, <&dai_pri_tdm_rx_3>,
912                                 <&dai_sec_tdm_rx_0>, <&dai_sec_tdm_rx_1>,
913                                 <&dai_sec_tdm_rx_2>, <&dai_sec_tdm_rx_3>,
914                                 <&dai_sec_tdm_tx_0>, <&dai_sec_tdm_tx_1>,
915                                 <&dai_sec_tdm_tx_2>, <&dai_sec_tdm_tx_3>,
916                                 <&dai_tert_tdm_rx_0>, <&dai_tert_tdm_rx_1>,
917                                 <&dai_tert_tdm_rx_2>, <&dai_tert_tdm_rx_3>,
918                                 <&dai_tert_tdm_rx_4>, <&dai_tert_tdm_tx_0>,
919                                 <&dai_tert_tdm_tx_1>, <&dai_tert_tdm_tx_2>,
920                                 <&dai_tert_tdm_tx_3>, <&dai_quat_tdm_rx_0>,
921                                 <&dai_quat_tdm_rx_1>, <&dai_quat_tdm_rx_2>,
922                                 <&dai_quat_tdm_rx_3>, <&dai_quat_tdm_tx_0>,
923                                 <&dai_quat_tdm_tx_1>, <&dai_quat_tdm_tx_2>,
924                                 <&dai_quat_tdm_tx_3>;
925                 asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2",
926                                 "msm-dai-q6-hdmi.8", "msm-dai-q6-mi2s.1",
927                                 "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
928                                 "msm-dai-q6-dev.224", "msm-dai-q6-dev.225",
929                                 "msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
930                                 "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
931                                 "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
932                                 "msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36867",
933                                 "msm-dai-q6-tdm.36869", "msm-dai-q6-tdm.36871",
934                                 "msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36866",
935                                 "msm-dai-q6-tdm.36868", "msm-dai-q6-tdm.36870",
936                                 "msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36882",
937                                 "msm-dai-q6-tdm.36884", "msm-dai-q6-tdm.36886",
938                                 "msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36883",
939                                 "msm-dai-q6-tdm.36885", "msm-dai-q6-tdm.36887",
940                                 "msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36898",
941                                 "msm-dai-q6-tdm.36900", "msm-dai-q6-tdm.36902",
942                                 "msm-dai-q6-tdm.36904", "msm-dai-q6-tdm.36897",
943                                 "msm-dai-q6-tdm.36899", "msm-dai-q6-tdm.36901",
944                                 "msm-dai-q6-tdm.36903", "msm-dai-q6-tdm.36912",
945                                 "msm-dai-q6-tdm.36914", "msm-dai-q6-tdm.36916",
946                                 "msm-dai-q6-tdm.36918", "msm-dai-q6-tdm.36913",
947                                 "msm-dai-q6-tdm.36915", "msm-dai-q6-tdm.36917",
948                                 "msm-dai-q6-tdm.36919";
949                 asoc-codec = <&stub_codec>;
950                 asoc-codec-names = "msm-stub-codec.1";
951         };
952
953         usb_detect: usb_detect {
954                 compatible = "qcom,gpio-usbdetect";
955                 qcom,vbus-det-gpio = <&pm8994_gpios 17 0>;
956                 interrupt-parent = <&spmi_bus>;
957                 interrupts = <0x0 0x9 0x0 IRQ_TYPE_NONE>;
958                 interrupt-names ="pmic_id_irq";
959         };
960
961         loopback1: qcom,msm-pcm-loopback-low-latency {
962                 compatible = "qcom,msm-pcm-loopback";
963                 qcom,msm-pcm-loopback-low-latency;
964         };
965
966         usb_vbus_vreg: usb_vbus_vreg {
967                 compatible = "regulator-fixed";
968                 regulator-name = "usb_vbus_vreg";
969                 gpio = <&pm8994_mpps 8 0>;
970                 enable-active-high;
971         };
972
973         usb2_otg_switch: usb2_otg_switch {
974                 compatible = "regulator-fixed";
975                 vin-supply = <&usb_vbus_vreg>;
976                 regulator-name = "usb2_otg_vreg";
977                 gpio = <&pm8994_gpios 12 0>;
978                 enable-active-high;
979         };
980
981         qcom,msm-dai-mi2s {
982                 dai_mi2s_sec: qcom,msm-dai-q6-mi2s-sec {
983                         qcom,msm-mi2s-rx-lines = <2>;
984                         qcom,msm-mi2s-tx-lines = <1>;
985                         pinctrl-names = "default", "sleep";
986                         pinctrl-0 = <&sec_mi2s_active &sec_mi2s_sd0_active
987                                 &sec_mi2s_sd1_active>;
988                         pinctrl-1 = <&sec_mi2s_sleep &sec_mi2s_sd0_sleep
989                                 &sec_mi2s_sd1_sleep>;
990                 };
991
992                 dai_mi2s_quat: qcom,msm-dai-q6-mi2s-quat {
993                         pinctrl-names = "default", "sleep";
994                         pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active>;
995                         pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep>;
996                 };
997         };
998
999         qcom,msm-dai-tdm-tert-rx {
1000                 pinctrl-names = "default", "sleep";
1001                 pinctrl-0 = <&tert_tdm_dout_active>;
1002                 pinctrl-1 = <&tert_tdm_dout_sleep>;
1003         };
1004
1005         qcom,msm-dai-tdm-quat-rx {
1006                 pinctrl-names = "default", "sleep";
1007                 pinctrl-0 = <&quat_tdm_dout_active>;
1008                 pinctrl-1 = <&quat_tdm_dout_sleep>;
1009         };
1010 };
1011
1012 &pm8994_gpios {
1013         gpio@c600 { /* GPIO 7 - NFC DWL REQ */
1014                 qcom,mode = <1>;
1015                 qcom,output-type = <0>;
1016                 qcom,pull = <5>;
1017                 qcom,vin-sel = <2>;
1018                 qcom,out-strength = <3>;
1019                 qcom,src-sel = <0>;
1020                 qcom,master-en = <1>;
1021                 status = "okay";
1022         };
1023
1024         gpio@c700 { /* GPIO 8 - WLAN_EN */
1025                 qcom,mode = <1>;                /* Digital output*/
1026                 qcom,pull = <4>;                /* Pulldown 10uA */
1027                 qcom,vin-sel = <2>;             /* VIN2 */
1028                 qcom,src-sel = <0>;             /* GPIO */
1029                 qcom,invert = <0>;              /* Invert */
1030                 qcom,master-en = <1>;           /* Enable GPIO */
1031                 status = "okay";
1032         };
1033
1034         gpio@c800 { /* GPIO 9 - Rome 3.3V control */
1035                 qcom,mode = <1>;                /* Digital output */
1036                 qcom,output-type = <0>;         /* MOS logic */
1037                 qcom,invert = <1>;              /* Output high */
1038                 qcom,vin-sel = <0>;             /* VPH_PWR */
1039                 qcom,src-sel = <0>;             /* Constant */
1040                 qcom,out-strength = <1>;        /* High drive strength */
1041                 qcom,master-en = <1>;           /* Enable GPIO */
1042                 status = "okay";
1043         };
1044
1045         gpio@c900 { /* GPIO 10 - lcd_bklt_reg_en */
1046                 qcom,mode = <1>;        /* DIGITAL OUT */
1047                 qcom,output-type = <0>;         /* CMOS logic */
1048                 qcom,invert = <1>;      /* output hight initially */
1049                 qcom,vin-sel = <2>;     /* 1.8 */
1050                 qcom,src-sel = <0>;     /* CONSTANT */
1051                 qcom,out-strength = <1>;        /* Low drive strength */
1052                 qcom,master-en = <1>;   /* ENABLE GPIO */
1053                 status = "okay";
1054         };
1055         gpio@c100 { /* GPIO 2 */
1056                 qcom,mode = <0>;
1057                 qcom,pull = <0>;
1058                 qcom,vin-sel = <2>;
1059                 qcom,src-sel = <0>;
1060                 status = "okay";
1061         };
1062
1063         gpio@c300 { /* GPIO 4 */
1064                 qcom,mode = <0>;
1065                 qcom,pull = <0>;
1066                 qcom,vin-sel = <2>;
1067                 qcom,src-sel = <0>;
1068                 status = "okay";
1069         };
1070
1071         gpio@c400 { /* GPIO 5 */
1072                 qcom,mode = <0>;
1073                 qcom,pull = <0>;
1074                 qcom,vin-sel = <2>;
1075                 qcom,src-sel = <0>;
1076                 status = "okay";
1077         };
1078
1079         gpio@ca00 { /* GPIO 11 - USB enb1 (otg switch) */
1080                 qcom,mode = <1>;        /* DIGITAL OUT */
1081                 qcom,vin-sel = <2>;     /* 1.8 */
1082                 qcom,src-sel = <0>;     /* GPIO */
1083                 qcom,master-en = <1>;   /* Enable GPIO */
1084                 status = "okay";
1085         };
1086
1087         gpio@cb00 { /* GPIO 12 - USB enb2 (otg switch) */
1088                 qcom,mode = <1>;        /* DIGITAL OUT */
1089                 qcom,vin-sel = <2>;     /* 1.8 */
1090                 qcom,src-sel = <0>;     /* GPIO */
1091                 qcom,master-en = <1>;   /* Enable GPIO */
1092                 status = "okay";
1093         };
1094
1095         gpio@cc00 { /* GPIO 13 - NTN_RST */
1096                 qcom,mode = <1>; /* DIGITAL OUT */
1097                 qcom,output-type = <0>; /* CMOS logic */
1098                 qcom,pull = <5>;
1099                 qcom,vin-sel = <2>; /* 1.8 */
1100                 qcom,out-strength = <1>;
1101                 qcom,src-sel = <0>; /* GPIO */
1102                 qcom,master-en = <0>; /* Disable GPIO */
1103                 status = "okay";
1104         };
1105
1106         gpio@ce00 { /* GPIO 15 */
1107                 qcom,mode = <1>;
1108                 qcom,output-type = <0>;
1109                 qcom,pull = <5>;
1110                 qcom,vin-sel = <2>;
1111                 qcom,out-strength = <1>;
1112                 qcom,src-sel = <2>;
1113                 qcom,master-en = <1>;
1114                 status = "okay";
1115         };
1116
1117         gpio@d000 { /* GPIO 17 - USB1 VBUS detect */
1118                 qcom,mode = <0>;        /* Digital Input*/
1119                 qcom,pull = <5>;        /* No pull */
1120                 qcom,vin-sel = <2>;     /* 1.8 V */
1121                 qcom,src-sel = <0>;     /* GPIO */
1122                 qcom,master-en = <1>;   /* Enable GPIO */
1123                 status = "okay";
1124         };
1125
1126         gpio@d100 { /* GPIO 18 - Rome Sleep Clock */
1127                 qcom,mode = <1>;                /* Digital output */
1128                 qcom,output-type = <0>;         /* CMOS logic */
1129                 qcom,invert = <0>;              /* Output low initially */
1130                 qcom,vin-sel = <2>;             /* VIN 2 */
1131                 qcom,src-sel = <3>;             /* Function 2 */
1132                 qcom,out-strength = <2>;        /* Medium */
1133                 qcom,master-en = <1>;           /* Enable GPIO */
1134                 status = "okay";
1135         };
1136
1137         gpio@d200 { /* GPIO 19 - Rome BT Reset */
1138                 qcom,mode = <1>;                /* Digital output*/
1139                 qcom,pull = <4>;                /* Pulldown 10uA */
1140                 qcom,vin-sel = <2>;             /* VIN2 */
1141                 qcom,src-sel = <0>;             /* GPIO */
1142                 qcom,invert = <0>;              /* Invert */
1143                 qcom,master-en = <1>;           /* Enable GPIO */
1144                 status = "okay";
1145         };
1146 };
1147
1148 &usb2s {
1149         status = "ok";
1150         vbus_dwc3-supply = <&usb2_otg_switch>;
1151         dwc3@7600000 {
1152                 dr_mode = "host";
1153         };
1154 };
1155
1156 &usb3 {
1157         extcon = <&usb_detect>;
1158         vbus_dwc3-supply = <&usb_otg_switch>;
1159         vdda33-supply = <&pm8994_l24>;
1160         vdda18-supply = <&pm8994_l12>;
1161 };
1162
1163 &blsp1_uart2 {
1164         status = "ok";
1165 };
1166
1167 &i2c_6 {
1168         at24@51 {
1169                 compatible = "atmel,24c32";
1170                 reg = <0x51>;
1171         };
1172 };
1173
1174 &i2c_7 {
1175         silabs4705@11 { /* SiLabs FM chip, slave id 0x11*/
1176                 status = "disabled";
1177                 compatible = "silabs,si4705";
1178                 reg = <0x11>;
1179                 vdd-supply = <&pm8994_s4>;
1180                 silabs,vdd-supply-voltage = <1800000 1800000>;
1181                 va-supply = <&rome_vreg>;
1182                 silabs,va-supply-voltage = <3300000 3300000>;
1183                 pinctrl-names = "pmx_fm_active","pmx_fm_suspend";
1184                 pinctrl-0 = <&fm_int_active &fm_status_int_active
1185                                                  &fm_rst_active>;
1186                 pinctrl-1 = <&fm_int_suspend &fm_status_int_suspend
1187                                                 &fm_rst_suspend>;
1188                 silabs,reset-gpio = <&tlmm 39 0>;
1189                 silabs,int-gpio = <&tlmm 38 0>;
1190                 silabs,status-gpio = <&tlmm 78 0>;
1191                 #address-cells = <0>;
1192                 interrupts = <0 1>;
1193                 #interrupt-cells = <1>;
1194                 interrupt-map-mask = <0xffffffff>;
1195                 interrupt-map = <
1196                                   0 &tlmm 38 2
1197                                   1 &tlmm 78 1
1198                                 >;
1199                 interrupt-names = "silabs_fm_int", "silabs_fm_status_int";
1200         };
1201 };
1202
1203 &i2c_8 { /* BLSP2 QUP2 */
1204         nq@28 {
1205                 compatible = "qcom,nq-nci";
1206                 reg = <0x28>;
1207                 qcom,nq-irq = <&tlmm 9 0x00>;
1208                 qcom,nq-ven = <&tlmm 12 0x00>;
1209                 qcom,nq-firm = <&pm8994_gpios 7 0x00>;
1210                 interrupt-parent = <&tlmm>;
1211                 qcom,clk-src = "BBCLK2";
1212                 interrupts = <9 0>;
1213                 interrupt-names = "nfc_irq";
1214                 pinctrl-names = "nfc_active", "nfc_suspend";
1215                 pinctrl-0 = <&nfc_int_active &nfc_disable_active>;
1216                 pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;
1217                 clocks = <&clock_gcc clk_bb_clk2_pin>;
1218                 clock-names = "ref_clk";
1219         };
1220 };
1221
1222 &soc {
1223         sound-9335 {
1224                 /delete-property/ qcom,hph-en1-gpio;
1225         };
1226 };
1227
1228 &slim_msm {
1229         status = "disabled";
1230 };
1231
1232 /delete-node/  &led_flash0;
1233
1234 &mdss_dsi0 {
1235         /delete-property/ lab-supply;
1236         /delete-property/ ibb-supply;
1237 };
1238
1239 &mdss_dsi1 {
1240         /delete-property/ lab-supply;
1241         /delete-property/ ibb-supply;
1242 };
1243
1244 &cci {
1245         qcom,camera@0 {
1246                 /delete-property/ qcom,led-flash-src;
1247         };
1248
1249         qcom,camera@1 {
1250                 /delete-property/ cam_vana-supply;
1251         };
1252 };
1253
1254 &usb_otg_switch {
1255         gpio = <&pm8994_gpios 11 0>;
1256         enable-active-high;
1257         status = "ok";
1258         /delete-property/ vin-supply;
1259 };
1260
1261 &pcie0 {
1262         /delete-property/ qcom,l1-supported;
1263         /delete-property/ qcom,l1ss-supported;
1264         /delete-property/ qcom,aux-clk-sync;
1265 };
1266
1267 &pcie1 {
1268         qcom,msi-gicm-addr = <0x09BD0040>;
1269         qcom,msi-gicm-base = <0x240>;
1270
1271         /delete-property/ qcom,boot-option;
1272         /delete-property/ qcom,l1-supported;
1273         /delete-property/ qcom,l1ss-supported;
1274         /delete-property/ qcom,aux-clk-sync;
1275         /delete-property/ qcom,ep-wakeirq;
1276 };
1277
1278 &pcie2 {
1279         perst-gpio = <&tlmm 90 0>;
1280         wake-gpio = <&tlmm 54 0>;
1281
1282         /delete-property/ qcom,boot-option;
1283         /delete-property/ qcom,l1-supported;
1284         /delete-property/ qcom,l1ss-supported;
1285         /delete-property/ qcom,aux-clk-sync;
1286         /delete-property/ qcom,ep-wakeirq;
1287 };
1288
1289 &wsa881x_211 {
1290         /delete-property/ qcom,spkr-sd-n-gpio;
1291 };
1292
1293 &wsa881x_212 {
1294         /delete-property/ qcom,spkr-sd-n-gpio;
1295 };
1296
1297 &wsa881x_213 {
1298         /delete-property/ qcom,spkr-sd-n-gpio;
1299 };
1300
1301 &wsa881x_214 {
1302         /delete-property/ qcom,spkr-sd-n-gpio;
1303 };
1304
1305 &vfe_smmu {
1306         qcom,no-smr-check;
1307 };
1308
1309 / {
1310         reserved-memory {
1311                 lk_mem: lk_pool@0x91600000 {
1312                         reg = <0 0x91600000 0 0x00600000>;
1313                         label = "lk_pool";
1314                 };
1315
1316                 early_camera_mem: early_camera_mem@b3fff000 {
1317                         reg = <0 0xb3fff000 0 0x800000>;
1318                         label = "early_camera_mem";
1319                 };
1320                 early_audio_mem: early_audio_mem@0xb5fff000 {
1321                         reg = <0x0 0xb5fff000 0x0 0x3FFFFC>;
1322                         label = "early_audio_mem";
1323                 };
1324         };
1325 };
1326