arch/arm/boot/dts/qcom/msm8998-v2.dtsi

   1 /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12
  13 /*
  14  * As a general rule, only version-specific property overrides should be placed
  15  * inside this file. Common device definitions should be placed inside the
  16  * msm8998.dtsi file.
  17  */
  18
  19 #include "msm8998.dtsi"
  20 #include "msm8998-v2-camera.dtsi"
  21
  22 / {
  23         model = "Qualcomm Technologies, Inc. MSM8998 v2";
  24         qcom,msm-id = <292 0x20000>;
  25 };
  26
  27 &clock_cpu {
  28         compatible = "qcom,cpu-clock-osm-msm8998-v2";
  29         reg = <0x179c0000 0x4000>,
  30               <0x17916000 0x1000>,
  31               <0x17816000 0x1000>,
  32               <0x179d1000 0x1000>,
  33               <0x17914800 0x800>,
  34               <0x17814800 0x800>,
  35               <0x00784130 0x8>,
  36               <0x1791101c 0x8>;
  37         reg-names = "osm", "pwrcl_pll", "perfcl_pll",
  38                     "apcs_common", "pwrcl_acd", "perfcl_acd",
  39                     "perfcl_efuse", "debug";
  40
  41         qcom,acdtd-val = <0x00009611 0x00009611>;
  42         qcom,acdcr-val = <0x002b5ffd 0x002b5ffd>;
  43         qcom,acdsscr-val = <0x00000501 0x00000501>;
  44         qcom,acdextint0-val = <0x2cf9ae8 0x2cf9ae8>;
  45         qcom,acdextint1-val = <0x2cf9afe 0x2cf9afe>;
  46         qcom,acdautoxfer-val = <0x00000015 0x00000015>;
  47         qcom,pwrcl-apcs-mem-acc-threshold-voltage = <852000>;
  48         qcom,perfcl-apcs-mem-acc-threshold-voltage = <852000>;
  49         qcom,apm-threshold-voltage = <800000>;
  50
  51         /delete-property/ qcom,llm-sw-overr;
  52         qcom,pwrcl-speedbin0-v0 =
  53                 <   300000000 0x0004000f 0x01200020 0x1 1 >,
  54                 <   364800000 0x05040013 0x01200020 0x1 2 >,
  55                 <   441600000 0x05040017 0x02200020 0x1 3 >,
  56                 <   518400000 0x0504001b 0x02200020 0x1 4 >,
  57                 <   595200000 0x0504001f 0x02200020 0x1 5 >,
  58                 <   672000000 0x05040023 0x03200020 0x1 6 >,
  59                 <   748800000 0x05040027 0x03200020 0x1 7 >,
  60                 <   825600000 0x0404002b 0x03220022 0x1 8 >,
  61                 <   883200000 0x0404002e 0x04250025 0x1 9 >,
  62                 <   960000000 0x04040032 0x04280028 0x1 10 >,
  63                 <  1036800000 0x04040036 0x042b002b 0x1 11 >,
  64                 <  1094400000 0x04040039 0x052e002e 0x2 12 >,
  65                 <  1171200000 0x0404003d 0x05310031 0x2 13 >,
  66                 <  1248000000 0x04040041 0x05340034 0x2 14 >,
  67                 <  1324800000 0x04040045 0x06370037 0x2 15 >,
  68                 <  1401600000 0x04040049 0x063a003a 0x2 16 >,
  69                 <  1478400000 0x0404004d 0x073e003e 0x2 17 >,
  70                 <  1555200000 0x04040051 0x07410041 0x2 18 >,
  71                 <  1670400000 0x04040057 0x08460046 0x2 19 >,
  72                 <  1747200000 0x0404005b 0x08490049 0x2 20 >,
  73                 <  1824000000 0x0404005f 0x084c004c 0x3 21 >,
  74                 <  1900800000 0x04040063 0x094f004f 0x3 22 >;
  75
  76         qcom,perfcl-speedbin0-v0 =
  77                 <   300000000 0x0004000f 0x01200020 0x1 1 >,
  78                 <   345600000 0x05040012 0x01200020 0x1 2 >,
  79                 <   422400000 0x05040016 0x02200020 0x1 3 >,
  80                 <   499200000 0x0504001a 0x02200020 0x1 4 >,
  81                 <   576000000 0x0504001e 0x02200020 0x1 5 >,
  82                 <   652800000 0x05040022 0x03200020 0x1 6 >,
  83                 <   729600000 0x05040026 0x03200020 0x1 7 >,
  84                 <   806400000 0x0504002a 0x03220022 0x1 8 >,
  85                 <   902400000 0x0404002f 0x04260026 0x1 9 >,
  86                 <   979200000 0x04040033 0x04290029 0x1 10 >,
  87                 <  1056000000 0x04040037 0x052c002c 0x1 11 >,
  88                 <  1132800000 0x0404003b 0x052f002f 0x1 12 >,
  89                 <  1190400000 0x0404003e 0x05320032 0x2 13 >,
  90                 <  1267200000 0x04040042 0x06350035 0x2 14 >,
  91                 <  1344000000 0x04040046 0x06380038 0x2 15 >,
  92                 <  1420800000 0x0404004a 0x063b003b 0x2 16 >,
  93                 <  1497600000 0x0404004e 0x073e003e 0x2 17 >,
  94                 <  1574400000 0x04040052 0x07420042 0x2 18 >,
  95                 <  1651200000 0x04040056 0x07450045 0x2 19 >,
  96                 <  1728000000 0x0404005a 0x08480048 0x2 20 >,
  97                 <  1804800000 0x0404005e 0x084b004b 0x2 21 >,
  98                 <  1881600000 0x04040062 0x094e004e 0x2 22 >,
  99                 <  1958400000 0x04040066 0x09520052 0x2 23 >,
 100                 <  2035200000 0x0404006a 0x09550055 0x3 24 >,
 101                 <  2112000000 0x0404006e 0x0a580058 0x3 25 >,
 102                 <  2208000000 0x04040073 0x0a5c005c 0x3 26 >,
 103                 <  2265600000 0x04010076 0x0a5e005e 0x3 26 >,
 104                 <  2265600000 0x04040076 0x0a5e005e 0x3 27 >,
 105                 <  2342400000 0x0401007a 0x0a620062 0x3 27 >,
 106                 <  2342400000 0x0404007a 0x0a620062 0x3 28 >,
 107                 <  2419200000 0x0401007e 0x0a650065 0x3 28 >,
 108                 <  2419200000 0x0404007e 0x0a650065 0x3 29 >,
 109                 <  2496000000 0x04010082 0x0a680068 0x3 29 >,
 110                 <  2457600000 0x04040080 0x0a660066 0x3 30 >,
 111                 <  2553600000 0x04010085 0x0a6a006a 0x3 30 >,
 112                 <  2476800000 0x04040081 0x0a670067 0x3 31 >,
 113                 <  2572800000 0x04010086 0x0a6b006b 0x3 31 >,
 114                 <  2496000000 0x04040082 0x0a680068 0x3 32 >,
 115                 <  2592000000 0x04010087 0x0a6c006c 0x3 32 >;
 116
 117         qcom,perfcl-speedbin1-v0 =
 118                 <   300000000 0x0004000f 0x01200020 0x1 1 >,
 119                 <   345600000 0x05040012 0x01200020 0x1 2 >,
 120                 <   422400000 0x05040016 0x02200020 0x1 3 >,
 121                 <   499200000 0x0504001a 0x02200020 0x1 4 >,
 122                 <   576000000 0x0504001e 0x02200020 0x1 5 >,
 123                 <   652800000 0x05040022 0x03200020 0x1 6 >,
 124                 <   729600000 0x05040026 0x03200020 0x1 7 >,
 125                 <   806400000 0x0504002a 0x03220022 0x1 8 >,
 126                 <   902400000 0x0404002f 0x04260026 0x1 9 >,
 127                 <   979200000 0x04040033 0x04290029 0x1 10 >,
 128                 <  1056000000 0x04040037 0x052c002c 0x1 11 >,
 129                 <  1132800000 0x0404003b 0x052f002f 0x1 12 >,
 130                 <  1190400000 0x0404003e 0x05320032 0x2 13 >,
 131                 <  1267200000 0x04040042 0x06350035 0x2 14 >,
 132                 <  1344000000 0x04040046 0x06380038 0x2 15 >,
 133                 <  1420800000 0x0404004a 0x063b003b 0x2 16 >,
 134                 <  1497600000 0x0404004e 0x073e003e 0x2 17 >,
 135                 <  1574400000 0x04040052 0x07420042 0x2 18 >,
 136                 <  1651200000 0x04040056 0x07450045 0x2 19 >,
 137                 <  1728000000 0x0404005a 0x08480048 0x2 20 >,
 138                 <  1804800000 0x0404005e 0x084b004b 0x2 21 >,
 139                 <  1881600000 0x04040062 0x094e004e 0x2 22 >,
 140                 <  1958400000 0x04040066 0x09520052 0x2 23 >,
 141                 <  2035200000 0x0404006a 0x09550055 0x3 24 >,
 142                 <  2112000000 0x0404006e 0x0a580058 0x3 25 >,
 143                 <  2208000000 0x04040073 0x0a5c005c 0x3 26 >,
 144                 <  2304000000 0x04010078 0x0a600060 0x3 26 >;
 145
 146         qcom,perfcl-speedbin2-v0 =
 147                 <   300000000 0x0004000f 0x01200020 0x1 1 >,
 148                 <   345600000 0x05040012 0x01200020 0x1 2 >,
 149                 <   422400000 0x05040016 0x02200020 0x1 3 >,
 150                 <   499200000 0x0504001a 0x02200020 0x1 4 >,
 151                 <   576000000 0x0504001e 0x02200020 0x1 5 >,
 152                 <   652800000 0x05040022 0x03200020 0x1 6 >,
 153                 <   729600000 0x05040026 0x03200020 0x1 7 >,
 154                 <   806400000 0x0504002a 0x03220022 0x1 8 >,
 155                 <   902400000 0x0404002f 0x04260026 0x1 9 >,
 156                 <   979200000 0x04040033 0x04290029 0x1 10 >,
 157                 <  1056000000 0x04040037 0x052c002c 0x1 11 >,
 158                 <  1132800000 0x0404003b 0x052f002f 0x1 12 >,
 159                 <  1190400000 0x0404003e 0x05320032 0x2 13 >,
 160                 <  1267200000 0x04040042 0x06350035 0x2 14 >,
 161                 <  1344000000 0x04040046 0x06380038 0x2 15 >,
 162                 <  1420800000 0x0404004a 0x063b003b 0x2 16 >,
 163                 <  1497600000 0x0404004e 0x073e003e 0x2 17 >,
 164                 <  1574400000 0x04040052 0x07420042 0x2 18 >,
 165                 <  1651200000 0x04040056 0x07450045 0x2 19 >,
 166                 <  1728000000 0x0404005a 0x08480048 0x2 20 >,
 167                 <  1804800000 0x0404005e 0x084b004b 0x2 21 >,
 168                 <  1881600000 0x04040062 0x094e004e 0x2 22 >,
 169                 <  1958400000 0x04040066 0x09520052 0x2 23 >,
 170                 <  2035200000 0x0404006a 0x09550055 0x3 24 >,
 171                 <  2112000000 0x0404006e 0x0a580058 0x3 25 >,
 172                 <  2208000000 0x04040073 0x0a5c005c 0x3 26 >,
 173                 <  2265600000 0x04010076 0x0a5e005e 0x3 26 >,
 174                 <  2265600000 0x04040076 0x0a5e005e 0x3 27 >,
 175                 <  2342400000 0x0401007a 0x0a620062 0x3 27 >,
 176                 <  2323200000 0x04040079 0x0a610061 0x3 28 >,
 177                 <  2419200000 0x0401007e 0x0a650065 0x3 28 >,
 178                 <  2342400000 0x0404007a 0x0a620062 0x3 29 >,
 179                 <  2438400000 0x0401007f 0x0a660066 0x3 29 >,
 180                 <  2361600000 0x0404007b 0x0a620062 0x3 30 >,
 181                 <  2457600000 0x04010080 0x0a660066 0x3 30 >;
 182
 183         qcom,perfcl-speedbin3-v0 =
 184                 <   300000000 0x0004000f 0x01200020 0x1 1 >,
 185                 <   345600000 0x05040012 0x01200020 0x1 2 >,
 186                 <   422400000 0x05040016 0x02200020 0x1 3 >,
 187                 <   499200000 0x0504001a 0x02200020 0x1 4 >,
 188                 <   576000000 0x0504001e 0x02200020 0x1 5 >,
 189                 <   652800000 0x05040022 0x03200020 0x1 6 >,
 190                 <   729600000 0x05040026 0x03200020 0x1 7 >,
 191                 <   806400000 0x0504002a 0x03220022 0x1 8 >,
 192                 <   902400000 0x0404002f 0x04260026 0x1 9 >,
 193                 <   979200000 0x04040033 0x04290029 0x1 10 >,
 194                 <  1056000000 0x04040037 0x052c002c 0x1 11 >,
 195                 <  1132800000 0x0404003b 0x052f002f 0x1 12 >,
 196                 <  1190400000 0x0404003e 0x05320032 0x2 13 >,
 197                 <  1267200000 0x04040042 0x06350035 0x2 14 >,
 198                 <  1344000000 0x04040046 0x06380038 0x2 15 >,
 199                 <  1420800000 0x0404004a 0x063b003b 0x2 16 >,
 200                 <  1497600000 0x0404004e 0x073e003e 0x2 17 >,
 201                 <  1574400000 0x04040052 0x07420042 0x2 18 >,
 202                 <  1651200000 0x04040056 0x07450045 0x2 19 >,
 203                 <  1728000000 0x0404005a 0x08480048 0x2 20 >,
 204                 <  1804800000 0x0404005e 0x084b004b 0x2 21 >,
 205                 <  1881600000 0x04040062 0x094e004e 0x2 22 >,
 206                 <  1958400000 0x04040066 0x09520052 0x2 23 >,
 207                 <  2035200000 0x0404006a 0x09550055 0x3 24 >,
 208                 <  2112000000 0x0404006e 0x0a580058 0x3 25 >,
 209                 <  2208000000 0x04040073 0x0a5c005c 0x3 26 >,
 210                 <  2265600000 0x04010076 0x0a5e005e 0x3 26 >,
 211                 <  2265600000 0x04040076 0x0a5e005e 0x3 27 >,
 212                 <  2342400000 0x0401007a 0x0a620062 0x3 27 >,
 213                 <  2323200000 0x04040079 0x0a610061 0x3 28 >,
 214                 <  2419200000 0x0401007e 0x0a650065 0x3 28 >,
 215                 <  2342400000 0x0404007a 0x0a620062 0x3 29 >,
 216                 <  2438400000 0x0401007f 0x0a660066 0x3 29 >,
 217                 <  2361600000 0x0404007b 0x0a620062 0x3 30 >,
 218                 <  2457600000 0x04010080 0x0a660066 0x3 30 >;
 219 };
 220
 221 &msm_cpufreq {
 222         qcom,cpufreq-table-0 =
 223                 <   300000 >,
 224                 <   364800 >,
 225                 <   441600 >,
 226                 <   518400 >,
 227                 <   595200 >,
 228                 <   672000 >,
 229                 <   748800 >,
 230                 <   825600 >,
 231                 <   883200 >,
 232                 <   960000 >,
 233                 <  1036800 >,
 234                 <  1094400 >,
 235                 <  1171200 >,
 236                 <  1248000 >,
 237                 <  1324800 >,
 238                 <  1401600 >,
 239                 <  1478400 >,
 240                 <  1555200 >,
 241                 <  1670400 >,
 242                 <  1747200 >,
 243                 <  1824000 >,
 244                 <  1900800 >;
 245
 246         qcom,cpufreq-table-4 =
 247                 <   300000 >,
 248                 <   345600 >,
 249                 <   422400 >,
 250                 <   499200 >,
 251                 <   576000 >,
 252                 <   652800 >,
 253                 <   729600 >,
 254                 <   806400 >,
 255                 <   902400 >,
 256                 <   979200 >,
 257                 <  1056000 >,
 258                 <  1132800 >,
 259                 <  1190400 >,
 260                 <  1267200 >,
 261                 <  1344000 >,
 262                 <  1420800 >,
 263                 <  1497600 >,
 264                 <  1574400 >,
 265                 <  1651200 >,
 266                 <  1728000 >,
 267                 <  1804800 >,
 268                 <  1881600 >,
 269                 <  1958400 >,
 270                 <  2035200 >,
 271                 <  2112000 >,
 272                 <  2208000 >,
 273                 <  2265600 >,
 274                 <  2304000 >,
 275                 <  2323200 >,
 276                 <  2342400 >,
 277                 <  2361600 >,
 278                 <  2419200 >,
 279                 <  2457600 >,
 280                 <  2476800 >,
 281                 <  2496000 >,
 282                 <  2592000 >;
 283 };
 284
 285 &bwmon {
 286         compatible = "qcom,bimc-bwmon4";
 287         qcom,hw-timer-hz = <19200000>;
 288 };
 289
 290 &devfreq_cpufreq {
 291         mincpubw-cpufreq {
 292                 cpu-to-dev-map-0 =
 293                         < 1900800 1525 >;
 294                 cpu-to-dev-map-4 =
 295                         < 2112000 1525 >,
 296                         < 2342400 5195 >,
 297                         < 2496000 13763 >;
 298                 };
 299 };
 300
 301 &devfreq_memlat_0 {
 302         qcom,core-dev-table =
 303                 <  300000 1525 >,
 304                 <  595200 3143 >,
 305                 < 1324800 4173 >,
 306                 < 1555200 5859 >,
 307                 < 1747200 5859 >,
 308                 < 1900800 7759 >;
 309 };
 310
 311 &devfreq_memlat_4 {
 312         qcom,core-dev-table =
 313                 <  576000  3143 >,
 314                 < 1132800  4173 >,
 315                 < 1344000  5859 >,
 316                 < 1728000  7759 >,
 317                 < 1958400 11863 >,
 318                 < 2208000 13763 >;
 319 };
 320 &clock_gcc {
 321         compatible = "qcom,gcc-8998-v2";
 322 };
 323
 324 &clock_mmss {
 325         compatible = "qcom,mmsscc-8998-v2";
 326 };
 327
 328 &clock_gpu {
 329         compatible = "qcom,gpucc-8998-v2";
 330 };
 331
 332 &clock_gfx {
 333         compatible = "qcom,gfxcc-8998-v2";
 334         qcom,gfxfreq-speedbin0 =
 335                 <         0 0                           0 >,
 336                 < 180000000 1 RPM_SMD_REGULATOR_LEVEL_SVS >,
 337                 < 257000000 2 RPM_SMD_REGULATOR_LEVEL_SVS >,
 338                 < 342000000 3 RPM_SMD_REGULATOR_LEVEL_SVS >,
 339                 < 414000000 4 RPM_SMD_REGULATOR_LEVEL_SVS >,
 340                 < 515000000 5 RPM_SMD_REGULATOR_LEVEL_NOM >,
 341                 < 596000000 6 RPM_SMD_REGULATOR_LEVEL_NOM >,
 342                 < 670000000 7 RPM_SMD_REGULATOR_LEVEL_TURBO >,
 343                 < 710000000 8 RPM_SMD_REGULATOR_LEVEL_TURBO >;
 344         qcom,gfxfreq-mx-speedbin0 =
 345                 <         0                           0 >,
 346                 < 180000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
 347                 < 257000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
 348                 < 342000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
 349                 < 414000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
 350                 < 515000000 RPM_SMD_REGULATOR_LEVEL_NOM >,
 351                 < 596000000 RPM_SMD_REGULATOR_LEVEL_NOM >,
 352                 < 670000000 RPM_SMD_REGULATOR_LEVEL_TURBO >,
 353                 < 710000000 RPM_SMD_REGULATOR_LEVEL_TURBO >;
 354 };
 355
 356 &mdss_mdp {
 357         qcom,vbif-settings = <0x00d0 0x00002020>;
 358         qcom,max-bandwidth-low-kbps = <9400000>;
 359         qcom,max-bandwidth-high-kbps = <9400000>;
 360         qcom,max-bandwidth-per-pipe-kbps = <4700000>;
 361 };
 362
 363 &pm8998_s10 {
 364         regulator-min-microvolt = <568000>;
 365         regulator-max-microvolt = <1056000>;
 366 };
 367
 368 &pm8998_s13 {
 369         regulator-min-microvolt = <568000>;
 370         regulator-max-microvolt = <1136000>;
 371 };
 372
 373 &pcie0 {
 374         qcom,phy-sequence = <0x804 0x01 0x00
 375                                 0x034 0x14 0x00
 376                                 0x138 0x30 0x00
 377                                 0x048 0x0f 0x00
 378                                 0x15c 0x06 0x00
 379                                 0x090 0x01 0x00
 380                                 0x088 0x20 0x00
 381                                 0x0f0 0x00 0x00
 382                                 0x0f8 0x01 0x00
 383                                 0x0f4 0xc9 0x00
 384                                 0x11c 0xff 0x00
 385                                 0x120 0x3f 0x00
 386                                 0x164 0x01 0x00
 387                                 0x154 0x00 0x00
 388                                 0x148 0x0a 0x00
 389                                 0x05C 0x19 0x00
 390                                 0x038 0x90 0x00
 391                                 0x0b0 0x82 0x00
 392                                 0x0c0 0x03 0x00
 393                                 0x0bc 0x55 0x00
 394                                 0x0b8 0x55 0x00
 395                                 0x0a0 0x00 0x00
 396                                 0x09c 0x0d 0x00
 397                                 0x098 0x04 0x00
 398                                 0x13c 0x00 0x00
 399                                 0x060 0x08 0x00
 400                                 0x068 0x16 0x00
 401                                 0x070 0x34 0x00
 402                                 0x15c 0x06 0x00
 403                                 0x138 0x33 0x00
 404                                 0x03c 0x02 0x00
 405                                 0x040 0x07 0x00
 406                                 0x080 0x04 0x00
 407                                 0x0dc 0x00 0x00
 408                                 0x0d8 0x3f 0x00
 409                                 0x00c 0x09 0x00
 410                                 0x010 0x01 0x00
 411                                 0x01c 0x40 0x00
 412                                 0x020 0x01 0x00
 413                                 0x014 0x02 0x00
 414                                 0x018 0x00 0x00
 415                                 0x024 0x7e 0x00
 416                                 0x028 0x15 0x00
 417                                 0x244 0x02 0x00
 418                                 0x2a4 0x12 0x00
 419                                 0x260 0x10 0x00
 420                                 0x28c 0x06 0x00
 421                                 0x504 0x03 0x00
 422                                 0x500 0x1c 0x00
 423                                 0x50c 0x14 0x00
 424                                 0x4d4 0x0a 0x00
 425                                 0x4d8 0x04 0x00
 426                                 0x4dc 0x1a 0x00
 427                                 0x434 0x4b 0x00
 428                                 0x414 0x04 0x00
 429                                 0x40c 0x04 0x00
 430                                 0x4f8 0x00 0x00
 431                                 0x4fc 0x80 0x00
 432                                 0x51c 0x40 0x00
 433                                 0x444 0x71 0x00
 434                                 0x43c 0x40 0x00
 435                                 0x854 0x04 0x00
 436                                 0x62c 0x52 0x00
 437                                 0x9ac 0x00 0x00
 438                                 0x8a0 0x01 0x00
 439                                 0x9e0 0x00 0x00
 440                                 0x9dc 0x20 0x00
 441                                 0x9a8 0x00 0x00
 442                                 0x8a4 0x01 0x00
 443                                 0x8a8 0x73 0x00
 444                                 0x9d8 0x99 0x00
 445                                 0x9b0 0x03 0x00
 446                                 0x804 0x03 0x00
 447                                 0x800 0x00 0x00
 448                                 0x808 0x03 0x00>;
 449 };
 450
 451 &apc0_cpr {
 452         compatible = "qcom,cprh-msm8998-v2-kbss-regulator";
 453         qcom,cpr-corner-switch-delay-time = <1042>;
 454         qcom,cpr-aging-ref-voltage = <1056000>;
 455         qcom,apm-threshold-voltage = <800000>;
 456         qcom,apm-hysteresis-voltage = <0>;
 457         qcom,mem-acc-threshold-voltage = <852000>;
 458         qcom,mem-acc-crossover-voltage = <852000>;
 459 };
 460
 461 &apc0_pwrcl_vreg {
 462         regulator-max-microvolt = <23>;
 463
 464         qcom,cpr-fuse-combos = <32>;
 465         qcom,cpr-speed-bins = <4>;
 466         qcom,cpr-speed-bin-corners = <22 22 22 22>;
 467         qcom,cpr-corners = <22>;
 468
 469         qcom,cpr-corner-fmax-map = <8 11 18 22>;
 470
 471         qcom,cpr-voltage-ceiling =
 472                 <828000  828000  828000  828000  828000
 473                  828000  828000  828000  828000  828000
 474                  828000  900000  900000  900000  900000
 475                  900000  900000  900000  952000  952000
 476                 1056000 1056000>;
 477
 478         qcom,cpr-voltage-floor =
 479                 <568000  568000  568000  568000  568000
 480                  568000  568000  568000  568000  568000
 481                  568000  632000  632000  632000  632000
 482                  632000  632000  632000  712000  712000
 483                  772000  772000>;
 484
 485         qcom,cpr-floor-to-ceiling-max-range =
 486                 <32000  32000  32000  32000
 487                  32000  32000  32000  32000
 488                  32000  32000  32000  32000
 489                  32000  32000  32000  32000
 490                  32000  32000  40000  40000
 491                  40000  40000>;
 492
 493         qcom,corner-frequencies =
 494                 <300000000  364800000  441600000
 495                  518400000  595200000  672000000
 496                  748800000  825600000  883200000
 497                  960000000 1036800000 1094400000
 498                 1171200000 1248000000 1324800000
 499                 1401600000 1478400000 1555200000
 500                 1670400000 1747200000 1824000000
 501                 1900800000>;
 502
 503         qcom,cpr-ro-scaling-factor =
 504                 <2595 2794 2577 2762 2471 2674 2199
 505                  2553 3189 3255 3192 2962 3054 2982
 506                  2042 2945>,
 507                 <2595 2794 2577 2762 2471 2674 2199
 508                  2553 3189 3255 3192 2962 3054 2982
 509                  2042 2945>,
 510                 <2391 2550 2483 2638 2382 2564 2259
 511                  2555 2766 3041 2988 2935 2873 2688
 512                  2013 2784>,
 513                 <2066 2153 2300 2434 2220 2386 2288
 514                  2465 2028 2511 2487 2734 2554 2117
 515                  1892 2377>;
 516
 517         qcom,cpr-open-loop-voltage-fuse-adjustment =
 518                 /* Speed bin 0 */
 519                 <40000  24000   12000  30000>,
 520                 <40000  24000   12000  30000>,
 521                 <40000  24000   12000  30000>,
 522                 <40000  24000   12000  30000>,
 523                 <40000  24000   12000  30000>,
 524                 <40000  24000   12000  30000>,
 525                 <40000  24000   12000  30000>,
 526                 <40000  24000   12000  30000>,
 527                 /* Speed bin 1 */
 528                 <40000  24000   12000  30000>,
 529                 <40000  24000   12000  30000>,
 530                 <40000  24000   12000  30000>,
 531                 <40000  24000   12000  30000>,
 532                 <40000  24000   12000  30000>,
 533                 <40000  24000   12000  30000>,
 534                 <40000  24000   12000  30000>,
 535                 <40000  24000   12000  30000>,
 536                 /* Speed bin 2 */
 537                 <40000  24000   12000  30000>,
 538                 <40000  24000   12000  30000>,
 539                 <40000  24000   12000  30000>,
 540                 <40000  24000   12000  30000>,
 541                 <40000  24000   12000  30000>,
 542                 <40000  24000   12000  30000>,
 543                 <40000  24000   12000  30000>,
 544                 <40000  24000   12000  30000>,
 545                 /* Speed bin 3 */
 546                 <40000  24000   12000  30000>,
 547                 <40000  24000   12000  30000>,
 548                 <40000  24000   12000  30000>,
 549                 <40000  24000   12000  30000>,
 550                 <40000  24000   12000  30000>,
 551                 <40000  24000   12000  30000>,
 552                 <40000  24000   12000  30000>,
 553                 <40000  24000   12000  30000>;
 554
 555         qcom,cpr-closed-loop-voltage-fuse-adjustment =
 556                 /* Speed bin 0 */
 557                 <20000  26000   12000  30000>,
 558                 <20000  26000   12000  30000>,
 559                 <20000  26000   12000  30000>,
 560                 <20000  26000   12000  30000>,
 561                 <20000  26000   12000  30000>,
 562                 <20000  26000   12000  30000>,
 563                 <20000  26000   12000  30000>,
 564                 <20000  26000   12000  30000>,
 565                 /* Speed bin 1 */
 566                 <20000  26000   12000  30000>,
 567                 <20000  26000   12000  30000>,
 568                 <20000  26000   12000  30000>,
 569                 <20000  26000   12000  30000>,
 570                 <20000  26000   12000  30000>,
 571                 <20000  26000   12000  30000>,
 572                 <20000  26000   12000  30000>,
 573                 <20000  26000   12000  30000>,
 574                 /* Speed bin 2 */
 575                 <20000  26000   12000  30000>,
 576                 <20000  26000   12000  30000>,
 577                 <20000  26000   12000  30000>,
 578                 <20000  26000   12000  30000>,
 579                 <20000  26000   12000  30000>,
 580                 <20000  26000   12000  30000>,
 581                 <20000  26000   12000  30000>,
 582                 <20000  26000   12000  30000>,
 583                 /* Speed bin 3 */
 584                 <20000  26000   12000  30000>,
 585                 <20000  26000   12000  30000>,
 586                 <20000  26000   12000  30000>,
 587                 <20000  26000   12000  30000>,
 588                 <20000  26000   12000  30000>,
 589                 <20000  26000   12000  30000>,
 590                 <20000  26000   12000  30000>,
 591                 <20000  26000   12000  30000>;
 592
 593         qcom,cpr-open-loop-voltage-adjustment =
 594                 /* Speed bin 0 */
 595                 <     0        0        0        0        0
 596                       0        0        0        0        0
 597                       0  (-12000) (-12000) (-12000) (-12000)
 598                 (-12000) (-16000) (-16000) (-20000) (-24000)
 599                 (-28000) (-28000)>,
 600                 /* Speed bin 1 */
 601                 <     0        0        0        0        0
 602                       0        0        0        0        0
 603                       0  (-12000) (-12000) (-12000) (-12000)
 604                 (-12000) (-16000) (-16000) (-20000) (-24000)
 605                 (-28000) (-28000)>,
 606                 /* Speed bin 2 */
 607                 <     0        0        0        0        0
 608                       0        0        0        0        0
 609                       0  (-12000) (-12000) (-12000) (-12000)
 610                 (-12000) (-16000) (-16000) (-20000) (-24000)
 611                 (-28000) (-28000)>,
 612                 /* Speed bin 3 */
 613                 <     0        0        0        0        0
 614                       0        0        0        0        0
 615                       0  (-12000) (-12000) (-12000) (-12000)
 616                 (-12000) (-16000) (-16000) (-20000) (-24000)
 617                 (-28000) (-28000)>;
 618
 619         qcom,cpr-closed-loop-voltage-adjustment =
 620                 /* Speed bin 0 */
 621                 <     0        0        0        0        0
 622                       0        0        0        0        0
 623                       0  (-10000) (-11000) (-12000) (-13000)
 624                 (-14000) (-14000) (-15000) (-21000) (-24000)
 625                 (-26000) (-28000)>,
 626                 /* Speed bin 1 */
 627                 <     0        0        0        0        0
 628                       0        0        0        0        0
 629                       0  (-10000) (-11000) (-12000) (-13000)
 630                 (-14000) (-14000) (-15000) (-21000) (-24000)
 631                 (-26000) (-28000)>,
 632                 /* Speed bin 2 */
 633                 <     0        0        0        0        0
 634                       0        0        0        0        0
 635                       0  (-10000) (-11000) (-12000) (-13000)
 636                 (-14000) (-14000) (-15000) (-21000) (-24000)
 637                 (-26000) (-28000)>,
 638                 /* Speed bin 3 */
 639                 <     0        0        0        0        0
 640                       0        0        0        0        0
 641                       0  (-10000) (-11000) (-12000) (-13000)
 642                 (-14000) (-14000) (-15000) (-21000) (-24000)
 643                 (-26000) (-28000)>;
 644
 645         qcom,allow-voltage-interpolation;
 646         qcom,allow-quotient-interpolation;
 647         qcom,cpr-scaled-open-loop-voltage-as-ceiling;
 648
 649         qcom,cpr-aging-ref-corner = <22>;
 650         qcom,cpr-aging-ro-scaling-factor = <1620>;
 651         qcom,allow-aging-voltage-adjustment = <0>;
 652 };
 653
 654 &apc1_cpr {
 655         compatible = "qcom,cprh-msm8998-v2-kbss-regulator";
 656         qcom,cpr-corner-switch-delay-time = <1042>;
 657         qcom,cpr-aging-ref-voltage = <1136000>;
 658         qcom,apm-threshold-voltage = <800000>;
 659         qcom,apm-hysteresis-voltage = <0>;
 660         qcom,mem-acc-threshold-voltage = <852000>;
 661         qcom,mem-acc-crossover-voltage = <852000>;
 662 };
 663
 664 &apc1_perfcl_vreg {
 665         regulator-max-microvolt = <34>;
 666
 667         qcom,cpr-fuse-combos = <32>;
 668         qcom,cpr-speed-bins = <4>;
 669         qcom,cpr-speed-bin-corners = <32 26 30 31>;
 670         qcom,cpr-corners =
 671                 /* Speed bin 0 */
 672                 <32 32 32 32 32 32 32 32>,
 673                 /* Speed bin 1 */
 674                 <26 26 26 26 26 26 26 26>,
 675                 /* Speed bin 2 */
 676                 <30 30 30 30 30 30 30 30>,
 677                 /* Speed bin 3 */
 678                 <31 31 31 31 31 31 31 31>;
 679
 680         qcom,cpr-corner-fmax-map =
 681                 /* Speed bin 0 */
 682                 <8 12 20 32>,
 683                 /* Speed bin 1 */
 684                 <8 12 20 26>,
 685                 /* Speed bin 2 */
 686                 <8 12 20 30>,
 687                 /* Speed bin 3 */
 688                 <8 12 20 31>;
 689
 690         qcom,cpr-voltage-ceiling =
 691                 /* Speed bin 0 */
 692                 <828000  828000  828000  828000  828000
 693                  828000  828000  828000  828000  828000
 694                  828000  828000  900000  900000  900000
 695                  900000  900000  900000  900000  900000
 696                  952000  952000  952000 1136000 1136000
 697                 1136000 1136000 1136000 1136000 1136000
 698                 1136000 1136000>,
 699                 /* Speed bin 1 */
 700                 <828000  828000  828000  828000  828000
 701                  828000  828000  828000  828000  828000
 702                  828000  828000  900000  900000  900000
 703                  900000  900000  900000  900000  900000
 704                  952000  952000  952000 1136000 1136000
 705                 1136000>,
 706                 /* Speed bin 2 */
 707                 <828000  828000  828000  828000  828000
 708                  828000  828000  828000  828000  828000
 709                  828000  828000  900000  900000  900000
 710                  900000  900000  900000  900000  900000
 711                  952000  952000  952000 1136000 1136000
 712                 1136000 1136000 1136000 1136000 1136000>,
 713                 /* Speed bin 3 */
 714                 <828000  828000  828000  828000  828000
 715                  828000  828000  828000  828000  828000
 716                  828000  828000  900000  900000  900000
 717                  900000  900000  900000  900000  900000
 718                  952000  952000  952000 1136000 1136000
 719                 1136000 1136000 1136000 1136000 1136000
 720                 1136000>;
 721
 722         qcom,cpr-voltage-floor =
 723                 /* Speed bin 0 */
 724                 <568000  568000  568000  568000  568000
 725                  568000  568000  568000  568000  568000
 726                  568000  568000  632000  632000  632000
 727                  632000  632000  632000  632000  632000
 728                  712000  712000  712000  772000  772000
 729                  772000  772000  772000  772000  772000
 730                  772000  772000>,
 731                 /* Speed bin 1 */
 732                 <568000  568000  568000  568000  568000
 733                  568000  568000  568000  568000  568000
 734                  568000  568000  632000  632000  632000
 735                  632000  632000  632000  632000  632000
 736                  712000  712000  712000  772000  772000
 737                  772000>,
 738                 /* Speed bin 2 */
 739                 <568000  568000  568000  568000  568000
 740                  568000  568000  568000  568000  568000
 741                  568000  568000  632000  632000  632000
 742                  632000  632000  632000  632000  632000
 743                  712000  712000  712000  772000  772000
 744                  772000  772000  772000  772000  772000>,
 745                 /* Speed bin 3 */
 746                 <568000  568000  568000  568000  568000
 747                  568000  568000  568000  568000  568000
 748                  568000  568000  632000  632000  632000
 749                  632000  632000  632000  632000  632000
 750                  712000  712000  712000  772000  772000
 751                  772000  772000  772000  772000  772000
 752                  772000>;
 753
 754         qcom,cpr-floor-to-ceiling-max-range =
 755                 /* Speed bin 0 */
 756                 <32000  32000  32000  32000
 757                  32000  32000  32000  32000
 758                  32000  32000  32000  32000
 759                  32000  32000  32000  32000
 760                  32000  32000  32000  32000
 761                  40000  40000  40000  40000
 762                  40000  40000  40000  40000
 763                  40000  40000  40000  40000>,
 764                 /* Speed bin 1 */
 765                 <32000  32000  32000  32000
 766                  32000  32000  32000  32000
 767                  32000  32000  32000  32000
 768                  32000  32000  32000  32000
 769                  32000  32000  32000  32000
 770                  40000  40000  40000  40000
 771                  40000  40000>,
 772                 /* Speed bin 2 */
 773                 <32000  32000  32000  32000
 774                  32000  32000  32000  32000
 775                  32000  32000  32000  32000
 776                  32000  32000  32000  32000
 777                  32000  32000  32000  32000
 778                  40000  40000  40000  40000
 779                  40000  40000  40000  40000
 780                  40000  40000>,
 781                 /* Speed bin 3 */
 782                 <32000  32000  32000  32000
 783                  32000  32000  32000  32000
 784                  32000  32000  32000  32000
 785                  32000  32000  32000  32000
 786                  32000  32000  32000  32000
 787                  40000  40000  40000  40000
 788                  40000  40000  40000  40000
 789                  40000  40000  40000>;
 790
 791         qcom,corner-frequencies =
 792                 /* Speed bin 0 */
 793                 <300000000  345600000  422400000
 794                  499200000  576000000  652800000
 795                  729600000  806400000  902400000
 796                  979200000 1056000000 1132800000
 797                 1190400000 1267200000 1344000000
 798                 1420800000 1497600000 1574400000
 799                 1651200000 1728000000 1804800000
 800                 1881600000 1958400000 2035200000
 801                 2112000000 2208000000 2265600000
 802                 2342400000 2419200000 2457600000
 803                 2476800000 2496000000>,
 804                 /* Speed bin 1 */
 805                 <300000000  345600000  422400000
 806                  499200000  576000000  652800000
 807                  729600000  806400000  902400000
 808                  979200000 1056000000 1132800000
 809                 1190400000 1267200000 1344000000
 810                 1420800000 1497600000 1574400000
 811                 1651200000 1728000000 1804800000
 812                 1881600000 1958400000 2035200000
 813                 2112000000 2208000000>,
 814                 /* Speed bin 2 */
 815                 <300000000  345600000  422400000
 816                  499200000  576000000  652800000
 817                  729600000  806400000  902400000
 818                  979200000 1056000000 1132800000
 819                 1190400000 1267200000 1344000000
 820                 1420800000 1497600000 1574400000
 821                 1651200000 1728000000 1804800000
 822                 1881600000 1958400000 2035200000
 823                 2112000000 2208000000 2265600000
 824                 2323200000 2342400000 2361600000>,
 825                 /* Speed bin 3 */
 826                 <300000000  345600000  422400000
 827                  499200000  576000000  652800000
 828                  729600000  806400000  902400000
 829                  979200000 1056000000 1132800000
 830                 1190400000 1267200000 1344000000
 831                 1420800000 1497600000 1574400000
 832                 1651200000 1728000000 1804800000
 833                 1881600000 1958400000 2035200000
 834                 2112000000 2208000000 2265600000
 835                 2323200000 2342400000 2361600000
 836                 2457600000>;
 837
 838         qcom,cpr-ro-scaling-factor =
 839                 <2857 3057 2828 2952 2699 2798 2446
 840                  2631 2629 2578 2244 3344 3289 3137
 841                  3164 2655>,
 842                 <2857 3057 2828 2952 2699 2798 2446
 843                  2631 2629 2578 2244 3344 3289 3137
 844                  3164 2655>,
 845                 <2603 2755 2676 2777 2573 2685 2465
 846                  2610 2312 2423 2243 3104 3022 3036
 847                  2740 2303>,
 848                 <1901 2016 2096 2228 2034 2161 2077
 849                  2188 1565 1870 1925 2235 2205 2413
 850                  1762 1478>;
 851
 852         qcom,cpr-open-loop-voltage-fuse-adjustment =
 853                 /* Speed bin 0 */
 854                 <  8000        0   12000  52000>,
 855                 <  8000        0   12000  52000>,
 856                 <  8000        0   12000  52000>,
 857                 <  8000        0   12000  52000>,
 858                 <  8000        0   12000  52000>,
 859                 <  8000        0   12000  52000>,
 860                 <  8000        0   12000  52000>,
 861                 <  8000        0   12000  52000>,
 862                 /* Speed bin 1 */
 863                 <  8000        0   12000  52000>,
 864                 <  8000        0   12000  52000>,
 865                 <  8000        0   12000  52000>,
 866                 <  8000        0   12000  52000>,
 867                 <  8000        0   12000  52000>,
 868                 <  8000        0   12000  52000>,
 869                 <  8000        0   12000  52000>,
 870                 <  8000        0   12000  52000>,
 871                 /* Speed bin 2 */
 872                 <  8000        0   12000  52000>,
 873                 <  8000        0   12000  52000>,
 874                 <  8000        0   12000  52000>,
 875                 <  8000        0   12000  52000>,
 876                 <  8000        0   12000  52000>,
 877                 <  8000        0   12000  52000>,
 878                 <  8000        0   12000  52000>,
 879                 <  8000        0   12000  52000>,
 880                 /* Speed bin 3 */
 881                 <  8000        0   12000  52000>,
 882                 <  8000        0   12000  52000>,
 883                 <  8000        0   12000  52000>,
 884                 <  8000        0   12000  52000>,
 885                 <  8000        0   12000  52000>,
 886                 <  8000        0   12000  52000>,
 887                 <  8000        0   12000  52000>,
 888                 <  8000        0   12000  52000>;
 889
 890         qcom,cpr-closed-loop-voltage-fuse-adjustment =
 891                 /* Speed bin 0 */
 892                 <      0        0   12000  50000>,
 893                 <      0        0   12000  50000>,
 894                 <      0        0   12000  50000>,
 895                 <      0        0   12000  50000>,
 896                 <      0        0   12000  50000>,
 897                 <      0        0   12000  50000>,
 898                 <      0        0   12000  50000>,
 899                 <      0        0   12000  50000>,
 900                 /* Speed bin 1 */
 901                 <      0        0   12000  50000>,
 902                 <      0        0   12000  50000>,
 903                 <      0        0   12000  50000>,
 904                 <      0        0   12000  50000>,
 905                 <      0        0   12000  50000>,
 906                 <      0        0   12000  50000>,
 907                 <      0        0   12000  50000>,
 908                 <      0        0   12000  50000>,
 909                 /* Speed bin 2 */
 910                 <      0        0   12000  50000>,
 911                 <      0        0   12000  50000>,
 912                 <      0        0   12000  50000>,
 913                 <      0        0   12000  50000>,
 914                 <      0        0   12000  50000>,
 915                 <      0        0   12000  50000>,
 916                 <      0        0   12000  50000>,
 917                 <      0        0   12000  50000>,
 918                 /* Speed bin 3 */
 919                 <      0        0   12000  50000>,
 920                 <      0        0   12000  50000>,
 921                 <      0        0   12000  50000>,
 922                 <      0        0   12000  50000>,
 923                 <      0        0   12000  50000>,
 924                 <      0        0   12000  50000>,
 925                 <      0        0   12000  50000>,
 926                 <      0        0   12000  50000>;
 927
 928         qcom,cpr-open-loop-voltage-adjustment =
 929                 /* Speed bin 0 */
 930                 <     0        0        0        0        0
 931                       0        0        0        0        0
 932                       0   (-8000) (-12000) (-12000) (-12000)
 933                 (-12000) (-12000) (-12000) (-16000) (-16000)
 934                 (-20000) (-16000) (-16000) (-16000) (-12000)
 935                 (-28000) (-28000) (-28000) (-28000) (-28000)
 936                 (-28000) (-28000)>,
 937                 /* Speed bin 1 */
 938                 <     0        0        0        0        0
 939                       0        0        0        0        0
 940                       0   (-8000) (-12000) (-12000) (-12000)
 941                 (-12000) (-12000) (-12000) (-16000) (-16000)
 942                 (-20000) (-16000) (-16000) (-16000) (-16000)
 943                 (-28000)>,
 944                 /* Speed bin 2 */
 945                 <     0        0        0        0        0
 946                       0        0        0        0        0
 947                       0   (-8000) (-12000) (-12000) (-12000)
 948                 (-12000) (-12000) (-12000) (-16000) (-16000)
 949                 (-20000) (-16000) (-16000) (-16000) (-12000)
 950                 (-28000) (-28000) (-28000) (-28000) (-28000)>,
 951                 /* Speed bin 3 */
 952                 <     0        0        0        0        0
 953                       0        0        0        0        0
 954                       0   (-8000) (-12000) (-12000) (-12000)
 955                 (-12000) (-12000) (-12000) (-16000) (-16000)
 956                 (-20000) (-16000) (-16000) (-16000) (-12000)
 957                 (-28000) (-28000) (-28000) (-28000) (-28000)
 958                 (-28000)>;
 959
 960         qcom,cpr-closed-loop-voltage-adjustment =
 961                 /* Speed bin 0 */
 962                 <     0        0        0        0        0
 963                       0        0        0        0        0
 964                       0  (-10000) (-10000) (-11000) (-12000)
 965                 (-12000) (-13000) (-14000) (-14000) (-15000)
 966                 (-16000) (-16000) (-17000) (-15000) (-13000)
 967                 (-26000) (-26000) (-27000) (-27000) (-28000)
 968                 (-28000) (-28000)>,
 969                 /* Speed bin 1 */
 970                 <     0        0        0        0        0
 971                       0        0        0        0        0
 972                       0  (-10000) (-10000) (-11000) (-12000)
 973                 (-12000) (-13000) (-14000) (-14000) (-15000)
 974                 (-16000) (-16000) (-17000) (-16000) (-15000)
 975                 (-28000)>,
 976                 /* Speed bin 2 */
 977                 <     0        0        0        0        0
 978                       0        0        0        0        0
 979                       0  (-10000) (-10000) (-11000) (-12000)
 980                 (-12000) (-13000) (-14000) (-14000) (-15000)
 981                 (-16000) (-16000) (-17000) (-15000) (-14000)
 982                 (-27000) (-27000) (-28000) (-28000) (-28000)>,
 983                 /* Speed bin 3 */
 984                 <     0        0        0        0        0
 985                       0        0        0        0        0
 986                       0  (-10000) (-10000) (-11000) (-12000)
 987                 (-12000) (-13000) (-14000) (-14000) (-15000)
 988                 (-16000) (-16000) (-17000) (-15000) (-14000)
 989                 (-26000) (-27000) (-27000) (-28000) (-28000)
 990                 (-28000)>;
 991
 992         qcom,allow-voltage-interpolation;
 993         qcom,allow-quotient-interpolation;
 994         qcom,cpr-scaled-open-loop-voltage-as-ceiling;
 995
 996         qcom,cpr-aging-ref-corner = <32 26 30 31>;
 997         qcom,cpr-aging-ro-scaling-factor = <1700>;
 998         qcom,allow-aging-voltage-adjustment = <0>;
 999 };
1000
1001 &pm8005_s1 {
1002         regulator-min-microvolt = <516000>;
1003         regulator-max-microvolt = <1088000>;
1004 };
1005
1006 &gfx_cpr {
1007         compatible = "qcom,cpr4-msm8998-v2-mmss-regulator";
1008         qcom,cpr-aging-ref-voltage = <1088000>;
1009 };
1010
1011 &gfx_vreg {
1012         regulator-min-microvolt = <1>;
1013         regulator-max-microvolt = <8>;
1014
1015         qcom,cpr-fuse-corners = <4>;
1016         qcom,cpr-fuse-combos = <8>;
1017         qcom,cpr-corners = <8>;
1018
1019         qcom,cpr-corner-fmax-map = <1 3 5 8>;
1020
1021         qcom,cpr-voltage-ceiling =
1022                 <716000 716000 772000 880000 908000 948000 1016000 1088000>,
1023                 <724000 724000 772000 832000 916000 968000 1024000 1088000>,
1024                 <724000 724000 772000 832000 916000 968000 1024000 1088000>,
1025                 <724000 724000 772000 832000 916000 968000 1024000 1088000>,
1026                 <724000 724000 772000 832000 916000 968000 1024000 1088000>,
1027                 <724000 724000 772000 832000 916000 968000 1024000 1088000>,
1028                 <724000 724000 772000 832000 916000 968000 1024000 1088000>,
1029                 <724000 724000 772000 832000 916000 968000 1024000 1088000>;
1030
1031         qcom,cpr-voltage-floor =
1032                 <516000 516000 532000 584000 632000 672000 712000 756000>;
1033
1034         qcom,mem-acc-voltage = <1 1 1 2 2 2 2 2>;
1035
1036         qcom,corner-frequencies =
1037                 <180000000 257000000 342000000 414000000
1038                  515000000 596000000 670000000 710000000>;
1039
1040         qcom,cpr-target-quotients =
1041                 <   0    0    0    0  331  357    0    0
1042                     0    0    0    0    0    0  115    0>,
1043                 <   0    0    0    0  467  500    0    0
1044                     0    0    0    0    0    0  199    0>,
1045                 <   0    0    0    0  628  665    0    0
1046                     0    0    0    0    0    0  290    0>,
1047                 <   0    0    0    0  762  805    0    0
1048                     0    0    0    0    0    0  397    0>,
1049                 <   0    0    0    0  964 1013    0    0
1050                     0    0 1143    0 1138 1055    0    0>,
1051                 <   0    0    0    0    0    0    0    0
1052                     0    0 1306    0 1289 1168    0    0>,
1053                 <   0    0    0    0    0    0    0    0
1054                     0    0 1468    0 1429 1256    0    0>,
1055                 <   0    0    0    0    0    0    0    0
1056                     0    0 1627    0 1578 1353    0    0>;
1057
1058         qcom,cpr-ro-scaling-factor =
1059                 <   0    0    0    0 2377 2571    0    0
1060                     0    0 2168    0 2209 1849 1997    0>,
1061                 <   0    0    0    0 2377 2571    0    0
1062                     0    0 2168    0 2209 1849 1997    0>,
1063                 <   0    0    0    0 2377 2571    0    0
1064                     0    0 2168    0 2209 1849 1997    0>,
1065                 <   0    0    0    0 2377 2571    0    0
1066                     0    0 2168    0 2209 1849 1997    0>,
1067                 <   0    0    0    0 2377 2571    0    0
1068                     0    0 2168    0 2209 1849 1997    0>,
1069                 <   0    0    0    0 2377 2571    0    0
1070                     0    0 2168    0 2209 1849 1997    0>,
1071                 <   0    0    0    0 2377 2571    0    0
1072                     0    0 2168    0 2209 1849 1997    0>,
1073                 <   0    0    0    0 2377 2571    0    0
1074                     0    0 2168    0 2209 1849 1997    0>;
1075
1076         qcom,cpr-open-loop-voltage-fuse-adjustment =
1077                 <   60000        0        0        0>,
1078                 <   60000        0        0        0>,
1079                 <   60000        0        0        0>,
1080                 <   60000        0        0        0>,
1081                 <   60000        0        0        0>,
1082                 <   60000        0        0        0>,
1083                 <   60000        0        0        0>,
1084                 <   60000        0        0        0>;
1085
1086         qcom,cpr-closed-loop-voltage-adjustment =
1087                 <   90000    38000    28000     8000
1088                         0    29000    11000        0>,
1089                 <   90000    38000    28000     8000
1090                         0    29000    11000        0>,
1091                 <   90000    38000    28000     8000
1092                         0    29000    11000        0>,
1093                 <   90000    38000    28000     8000
1094                         0    29000    11000        0>,
1095                 <   90000    38000    28000     8000
1096                         0    29000    11000        0>,
1097                 <   90000    38000    28000     8000
1098                         0    29000    11000        0>,
1099                 <   90000    38000    28000     8000
1100                         0    29000    11000        0>,
1101                 <   90000    38000    28000     8000
1102                         0    29000    11000        0>;
1103
1104         qcom,cpr-floor-to-ceiling-max-range =
1105                <40000 40000 40000 40000 40000 40000 50000 50000>;
1106
1107         qcom,cpr-fused-closed-loop-voltage-adjustment-map =
1108                 <0 0 0 0 1 2 3 4>;
1109
1110         qcom,allow-voltage-interpolation;
1111         qcom,cpr-scaled-open-loop-voltage-as-ceiling;
1112
1113         qcom,cpr-aging-max-voltage-adjustment = <15000>;
1114         qcom,cpr-aging-ref-corner = <8>;
1115         qcom,cpr-aging-ro-scaling-factor = <1620>;
1116         qcom,allow-aging-voltage-adjustment = <0>;
1117 };
1118
1119 &qusb_phy0 {
1120         reg = <0x0c012000 0x2a8>,
1121               <0x01fcb24c 0x4>,
1122               <0x00784238 0x4>;
1123         reg-names = "qusb_phy_base",
1124                         "tcsr_clamp_dig_n_1p8",
1125                         "efuse_addr";
1126         qcom,efuse-bit-pos = <16>;
1127         qcom,efuse-num-bits = <4>;
1128         qcom,qusb-phy-init-seq =
1129                         /* <value reg_offset> */
1130                                 <0x13 0x04 /* analog_controls_two */
1131                                 0x7c 0x18c /* pll_clock_inverter */
1132                                 0x80 0x2c /* pll_cmode */
1133                                 0x0a 0x184 /* pll_lock_delay */
1134                                 0xa5 0x23c /* tune1 */
1135                                 0x09 0x240 /* tune2 */
1136                                 0x19 0xb4>; /* digital_timers_two */
1137 };
1138
1139 &msm_vidc {
1140         qcom,load-freq-tbl =
1141                 /* Encoders */
1142                 <1105920 533000000 0x55555555>, /* 4kx2304@30 */ /*TURBO*/
1143                 <1036800 444000000 0x55555555>, /* 720p@240, 1080p@120,1440p@60,
1144                                                  * UHD@30 */ /*NOMINAL*/
1145                 < 829440 355200000 0x55555555>, /* UHD/4096x2160@30 SVSL1 */
1146                 < 489600 269330000 0x55555555>, /* 1080p@60, 720p@120 SVS */
1147                 < 345600 200000000 0x55555555>, /* 2560x1440@24, 1080p@30 */
1148                                                 /* SVS2 */
1149
1150                 /* Decoders */
1151                 <2211840 533000000 0xffffffff>, /* 4kx2304@60, 1080p@240 */
1152                                                 /* TURBO */
1153                 <1728000 444000000 0xffffffff>, /* 2560x1440@120 */
1154                                                 /* NOMINAL */
1155                 <1675472 355200000 0xffffffff>, /* 4kx2304@44 */ /*SVSL1*/
1156                 <1105920 269330000 0xffffffff>, /* UHD/4k2304@30, 1080p@120 */
1157                                                 /* SVS */
1158                 < 829440 200000000 0xffffffff>; /* 720p@120, 1080p@60 */
1159                                                 /* SVS2 */
1160
1161         qcom,imem-ab-tbl =
1162                 <200000000 1560000>,/* imem @ svs2 freq 75 Mhz */
1163                 <269330000 3570000>,/* imem @ svs freq 171 Mhz */
1164                 <355200000 3570000>,/* imem @ svs freq 171 Mhz */
1165                 <444000000 6750000>,/* imem @ nom freq 323 Mhz */
1166                 <533000000 8490000>;/* imem @ turbo freq 406 Mhz */
1167
1168         qcom,dcvs-tbl = /* minLoad LoadLow LoadHigh CodecCheck */
1169                 /* Decode */
1170                 /* Load > Nominal, Nominal <-> Turbo Eg.3840x2160@60 */
1171                 <1728000 1728000 2211840 0x3f00000c>,
1172                 /* Encoder */
1173                 /* Load > Nominal, Nominal <-> Turbo Eg. 4kx2304@30 */
1174                 <1036800 1036800 1105920 0x04000004>,
1175                 /* Load > SVSL1, SVSL1<-> Nominal Eg. 3840x2160@30 */
1176                 < 829440  829440 1036800 0x04000004>,
1177                 /* Load > SVS , SVS <-> SVSL1 Eg. 4kx2304@24 */
1178                 < 489600  489600  829440 0x04000004>;
1179
1180         qcom,dcvs-limit = /* Min Frame size, Min MBs/sec */
1181                 <32400 30>, /* Encoder 3840x2160@30 */
1182                 <32400 60>; /* Decoder 3840x2160@60 */
1183
1184 };
1185
1186 &soc {
1187         /* Gold L2 SAW */
1188         qcom,spm@178120000 {
1189                 qcom,saw2-avs-limit = <0x4700470>;
1190         };
1191
1192         /* Silver L2 SAW */
1193         qcom,spm@179120000 {
1194                 qcom,saw2-avs-limit = <0x4200420>;
1195         };
1196 };
1197
1198 /* GPU overrides */
1199 &msm_gpu {
1200         /* Updated chip ID */
1201         qcom,chipid = <0x05040001>;
1202         qcom,initial-pwrlevel = <6>;
1203
1204         qcom,gpu-pwrlevels {
1205                 #address-cells = <1>;
1206                 #size-cells = <0>;
1207
1208                 compatible = "qcom,gpu-pwrlevels";
1209
1210                 qcom,gpu-pwrlevel@0 {
1211                         reg = <0>;
1212                         qcom,gpu-freq = <710000000>;
1213                         qcom,bus-freq = <12>;
1214                         qcom,bus-min = <12>;
1215                         qcom,bus-max = <12>;
1216                 };
1217
1218                 qcom,gpu-pwrlevel@1 {
1219                         reg = <1>;
1220                         qcom,gpu-freq = <670000000>;
1221                         qcom,bus-freq = <12>;
1222                         qcom,bus-min = <11>;
1223                         qcom,bus-max = <12>;
1224                 };
1225
1226                 qcom,gpu-pwrlevel@2 {
1227                         reg = <2>;
1228                         qcom,gpu-freq = <596000000>;
1229                         qcom,bus-freq = <11>;
1230                         qcom,bus-min = <9>;
1231                         qcom,bus-max = <12>;
1232                 };
1233
1234                 qcom,gpu-pwrlevel@3 {
1235                         reg = <3>;
1236                         qcom,gpu-freq = <515000000>;
1237                         qcom,bus-freq = <11>;
1238                         qcom,bus-min = <9>;
1239                         qcom,bus-max = <12>;
1240                 };
1241
1242                 qcom,gpu-pwrlevel@4 {
1243                         reg = <4>;
1244                         qcom,gpu-freq = <414000000>;
1245                         qcom,bus-freq = <9>;
1246                         qcom,bus-min = <8>;
1247                         qcom,bus-max = <11>;
1248                 };
1249
1250                 qcom,gpu-pwrlevel@5 {
1251                         reg = <5>;
1252                         qcom,gpu-freq = <342000000>;
1253                         qcom,bus-freq = <8>;
1254                         qcom,bus-min = <5>;
1255                         qcom,bus-max = <9>;
1256                 };
1257
1258                 qcom,gpu-pwrlevel@6 {
1259                         reg = <6>;
1260                         qcom,gpu-freq = <257000000>;
1261                         qcom,bus-freq = <5>;
1262                         qcom,bus-min = <3>;
1263                         qcom,bus-max = <8>;
1264                 };
1265
1266                 qcom,gpu-pwrlevel@7 {
1267                         reg = <7>;
1268                         qcom,gpu-freq = <27000000>;
1269                         qcom,bus-freq = <0>;
1270                         qcom,bus-min = <0>;
1271                         qcom,bus-max = <0>;
1272                 };
1273         };
1274 };
1275
1276 &spss_utils {
1277         qcom,spss-test-firmware-name = "spss2t";        /* 8 chars max */
1278         qcom,spss-prod-firmware-name = "spss2p";        /* 8 chars max */
1279         qcom,spss-hybr-firmware-name = "spss2h";        /* 8 chars max */
1280 };
1281
1282 &ufs1 {
1283         clock-names =
1284                 "core_clk",
1285                 "bus_aggr_clk",
1286                 "iface_clk",
1287                 "core_clk_unipro",
1288                 "core_clk_ice",
1289                 "ref_clk",
1290                 "tx_lane0_sync_clk",
1291                 "rx_lane0_sync_clk",
1292                 "rx_lane1_sync_clk";
1293         clocks =
1294                 <&clock_gcc clk_gcc_ufs_axi_hw_ctl_clk>,
1295                 <&clock_gcc clk_gcc_aggre1_ufs_axi_clk>,
1296                 <&clock_gcc clk_gcc_ufs_ahb_clk>,
1297                 <&clock_gcc clk_gcc_ufs_unipro_core_hw_ctl_clk>,
1298                 <&clock_gcc clk_gcc_ufs_ice_core_hw_ctl_clk>,
1299                 <&clock_gcc clk_ln_bb_clk1>,
1300                 <&clock_gcc clk_gcc_ufs_tx_symbol_0_clk>,
1301                 <&clock_gcc clk_gcc_ufs_rx_symbol_0_clk>,
1302                 <&clock_gcc clk_gcc_ufs_rx_symbol_1_clk>;
1303         freq-table-hz =
1304                 <50000000 200000000>,
1305                 <0 0>,
1306                 <0 0>,
1307                 <37500000 150000000>,
1308                 <75000000 300000000>,
1309                 <0 0>,
1310                 <0 0>,
1311                 <0 0>,
1312                 <0 0>;
1313
1314         lanes-per-direction = <2>;
1315 };
1316
1317 &ssc_sensors {
1318         qcom,firmware-name = "slpi_v2";
1319 };