arch/arm/boot/dts/vf-colibri.dtsi

   1 /*
   2  * Copyright 2014 Toradex AG
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License
  11  *     version 2 as published by the Free Software Foundation.
  12  *
  13  *     This file is distributed in the hope that it will be useful
  14  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *     GNU General Public License for more details.
  17  *
  18  * Or, alternatively
  19  *
  20  *  b) Permission is hereby granted, free of charge, to any person
  21  *     obtaining a copy of this software and associated documentation
  22  *     files (the "Software"), to deal in the Software without
  23  *     restriction, including without limitation the rights to use
  24  *     copy, modify, merge, publish, distribute, sublicense, and/or
  25  *     sell copies of the Software, and to permit persons to whom the
  26  *     Software is furnished to do so, subject to the following
  27  *     conditions:
  28  *
  29  *     The above copyright notice and this permission notice shall be
  30  *     included in all copies or substantial portions of the Software.
  31  *
  32  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  33  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  34  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  35  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  36  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  37  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  38  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  39  *     OTHER DEALINGS IN THE SOFTWARE.
  40  */
  41
  42 / {
  43         bl: backlight {
  44                 compatible = "pwm-backlight";
  45                 pinctrl-names = "default";
  46                 pinctrl-0 = <&pinctrl_gpio_bl_on>;
  47                 pwms = <&pwm0 0 5000000 0>;
  48                 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
  49                 status = "disabled";
  50         };
  51
  52         reg_module_3v3: regulator-module-3v3 {
  53                 compatible = "regulator-fixed";
  54                 regulator-name = "+V3.3";
  55                 regulator-min-microvolt = <3300000>;
  56                 regulator-max-microvolt = <3300000>;
  57         };
  58
  59         reg_module_3v3_avdd: regulator-module-3v3-avdd {
  60                 compatible = "regulator-fixed";
  61                 regulator-name = "+V3.3_AVDD_AUDIO";
  62                 regulator-min-microvolt = <3300000>;
  63                 regulator-max-microvolt = <3300000>;
  64         };
  65 };
  66
  67 &adc0 {
  68         status = "okay";
  69         vref-supply = <&reg_module_3v3_avdd>;
  70 };
  71
  72 &adc1 {
  73         status = "okay";
  74         vref-supply = <&reg_module_3v3_avdd>;
  75 };
  76
  77 &can0 {
  78         pinctrl-names = "default";
  79         pinctrl-0 = <&pinctrl_flexcan0>;
  80         status = "disabled";
  81 };
  82
  83 &can1 {
  84         pinctrl-names = "default";
  85         pinctrl-0 = <&pinctrl_flexcan1>;
  86         status = "disabled";
  87 };
  88
  89 &clks {
  90         assigned-clocks = <&clks VF610_CLK_ENET_SEL>,
  91                           <&clks VF610_CLK_ENET_TS_SEL>;
  92         assigned-clock-parents = <&clks VF610_CLK_ENET_50M>,
  93                                  <&clks VF610_CLK_ENET_50M>;
  94 };
  95
  96 &dspi1 {
  97         bus-num = <1>;
  98         pinctrl-names = "default";
  99         pinctrl-0 = <&pinctrl_dspi1>;
 100 };
 101
 102 &edma0 {
 103         status = "okay";
 104 };
 105
 106 &esdhc1 {
 107         pinctrl-names = "default";
 108         pinctrl-0 = <&pinctrl_esdhc1>;
 109         bus-width = <4>;
 110         cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
 111         disable-wp;
 112 };
 113
 114 &fec1 {
 115         phy-mode = "rmii";
 116         phy-supply = <&reg_module_3v3>;
 117         pinctrl-names = "default";
 118         pinctrl-0 = <&pinctrl_fec1>;
 119 };
 120
 121 &i2c0 {
 122         clock-frequency = <400000>;
 123         pinctrl-names = "default";
 124         pinctrl-0 = <&pinctrl_i2c0>;
 125 };
 126
 127 &nfc {
 128         assigned-clocks = <&clks VF610_CLK_NFC>;
 129         assigned-clock-rates = <33000000>;
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&pinctrl_nfc>;
 132         status = "okay";
 133
 134         nand@0 {
 135                 compatible = "fsl,vf610-nfc-nandcs";
 136                 reg = <0>;
 137                 #address-cells = <1>;
 138                 #size-cells = <1>;
 139                 nand-bus-width = <8>;
 140                 nand-ecc-mode = "hw";
 141                 nand-ecc-strength = <32>;
 142                 nand-ecc-step-size = <2048>;
 143                 nand-on-flash-bbt;
 144         };
 145 };
 146
 147 &pwm0 {
 148         pinctrl-names = "default";
 149         pinctrl-0 = <&pinctrl_pwm0>;
 150 };
 151
 152 &pwm1 {
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&pinctrl_pwm1>;
 155 };
 156
 157 &uart0 {
 158         pinctrl-names = "default";
 159         pinctrl-0 = <&pinctrl_uart0>;
 160 };
 161
 162 &uart1 {
 163         pinctrl-names = "default";
 164         pinctrl-0 = <&pinctrl_uart1>;
 165 };
 166
 167 &uart2 {
 168         pinctrl-names = "default";
 169         pinctrl-0 = <&pinctrl_uart2>;
 170 };
 171
 172 &usbdev0 {
 173         disable-over-current;
 174         status = "okay";
 175 };
 176
 177 &usbh1 {
 178         disable-over-current;
 179         status = "okay";
 180 };
 181
 182 &usbmisc0 {
 183         status = "okay";
 184 };
 185
 186 &usbmisc1 {
 187         status = "okay";
 188 };
 189
 190 &usbphy0 {
 191         status = "okay";
 192 };
 193
 194 &usbphy1 {
 195         status = "okay";
 196 };
 197
 198 &iomuxc {
 199         vf610-colibri {
 200                 pinctrl_flexcan0: can0grp {
 201                         fsl,pins = <
 202                                 VF610_PAD_PTB14__CAN0_RX        0x31F1
 203                                 VF610_PAD_PTB15__CAN0_TX        0x31F2
 204                         >;
 205                 };
 206
 207                 pinctrl_flexcan1: can1grp {
 208                         fsl,pins = <
 209                                 VF610_PAD_PTB16__CAN1_RX        0x31F1
 210                                 VF610_PAD_PTB17__CAN1_TX        0x31F2
 211                         >;
 212                 };
 213
 214                 pinctrl_gpio_ext: gpio_ext {
 215                         fsl,pins = <
 216                                 VF610_PAD_PTD10__GPIO_89        0x22ed /* EXT_IO_0 */
 217                                 VF610_PAD_PTD9__GPIO_88         0x22ed /* EXT_IO_1 */
 218                                 VF610_PAD_PTD26__GPIO_68        0x22ed /* EXT_IO_2 */
 219                         >;
 220                 };
 221
 222                 pinctrl_dspi1: dspi1grp {
 223                         fsl,pins = <
 224                                 VF610_PAD_PTD5__DSPI1_CS0               0x33e2
 225                                 VF610_PAD_PTD6__DSPI1_SIN               0x33e1
 226                                 VF610_PAD_PTD7__DSPI1_SOUT              0x33e2
 227                                 VF610_PAD_PTD8__DSPI1_SCK               0x33e2
 228                         >;
 229                 };
 230
 231                 pinctrl_esdhc1: esdhc1grp {
 232                         fsl,pins = <
 233                                 VF610_PAD_PTA24__ESDHC1_CLK     0x31ef
 234                                 VF610_PAD_PTA25__ESDHC1_CMD     0x31ef
 235                                 VF610_PAD_PTA26__ESDHC1_DAT0    0x31ef
 236                                 VF610_PAD_PTA27__ESDHC1_DAT1    0x31ef
 237                                 VF610_PAD_PTA28__ESDHC1_DATA2   0x31ef
 238                                 VF610_PAD_PTA29__ESDHC1_DAT3    0x31ef
 239                                 VF610_PAD_PTB20__GPIO_42        0x219d
 240                         >;
 241                 };
 242
 243                 pinctrl_fec1: fec1grp {
 244                         fsl,pins = <
 245                                 VF610_PAD_PTA6__RMII_CLKOUT             0x30d2
 246                                 VF610_PAD_PTC9__ENET_RMII1_MDC          0x30d2
 247                                 VF610_PAD_PTC10__ENET_RMII1_MDIO        0x30d3
 248                                 VF610_PAD_PTC11__ENET_RMII1_CRS         0x30d1
 249                                 VF610_PAD_PTC12__ENET_RMII1_RXD1        0x30d1
 250                                 VF610_PAD_PTC13__ENET_RMII1_RXD0        0x30d1
 251                                 VF610_PAD_PTC14__ENET_RMII1_RXER        0x30d1
 252                                 VF610_PAD_PTC15__ENET_RMII1_TXD1        0x30d2
 253                                 VF610_PAD_PTC16__ENET_RMII1_TXD0        0x30d2
 254                                 VF610_PAD_PTC17__ENET_RMII1_TXEN        0x30d2
 255                         >;
 256                 };
 257
 258                 pinctrl_gpio_bl_on: gpio_bl_on {
 259                         fsl,pins = <
 260                                 VF610_PAD_PTC0__GPIO_45         0x22ef
 261                         >;
 262                 };
 263
 264                 pinctrl_i2c0: i2c0grp {
 265                         fsl,pins = <
 266                                 VF610_PAD_PTB14__I2C0_SCL               0x37ff
 267                                 VF610_PAD_PTB15__I2C0_SDA               0x37ff
 268                         >;
 269                 };
 270
 271                 pinctrl_nfc: nfcgrp {
 272                         fsl,pins = <
 273                                 VF610_PAD_PTD23__NF_IO7         0x28df
 274                                 VF610_PAD_PTD22__NF_IO6         0x28df
 275                                 VF610_PAD_PTD21__NF_IO5         0x28df
 276                                 VF610_PAD_PTD20__NF_IO4         0x28df
 277                                 VF610_PAD_PTD19__NF_IO3         0x28df
 278                                 VF610_PAD_PTD18__NF_IO2         0x28df
 279                                 VF610_PAD_PTD17__NF_IO1         0x28df
 280                                 VF610_PAD_PTD16__NF_IO0         0x28df
 281                                 VF610_PAD_PTB24__NF_WE_B        0x28c2
 282                                 VF610_PAD_PTB25__NF_CE0_B       0x28c2
 283                                 VF610_PAD_PTB27__NF_RE_B        0x28c2
 284                                 VF610_PAD_PTC26__NF_RB_B        0x283d
 285                                 VF610_PAD_PTC27__NF_ALE         0x28c2
 286                                 VF610_PAD_PTC28__NF_CLE         0x28c2
 287                         >;
 288                 };
 289
 290                 pinctrl_pwm0: pwm0grp {
 291                         fsl,pins = <
 292                                 VF610_PAD_PTB0__FTM0_CH0                0x1182
 293                                 VF610_PAD_PTB1__FTM0_CH1                0x1182
 294                         >;
 295                 };
 296
 297                 pinctrl_pwm1: pwm1grp {
 298                         fsl,pins = <
 299                                 VF610_PAD_PTB8__FTM1_CH0                0x1182
 300                                 VF610_PAD_PTB9__FTM1_CH1                0x1182
 301                         >;
 302                 };
 303
 304                 pinctrl_uart0: uart0grp {
 305                         fsl,pins = <
 306                                 VF610_PAD_PTB10__UART0_TX               0x21a2
 307                                 VF610_PAD_PTB11__UART0_RX               0x21a1
 308                                 VF610_PAD_PTB12__UART0_RTS              0x21a2
 309                                 VF610_PAD_PTB13__UART0_CTS              0x21a1
 310                         >;
 311                 };
 312
 313                 pinctrl_uart1: uart1grp {
 314                         fsl,pins = <
 315                                 VF610_PAD_PTB4__UART1_TX                0x21a2
 316                                 VF610_PAD_PTB5__UART1_RX                0x21a1
 317                         >;
 318                 };
 319
 320                 pinctrl_uart2: uart2grp {
 321                         fsl,pins = <
 322                                 VF610_PAD_PTD0__UART2_TX                0x21a2
 323                                 VF610_PAD_PTD1__UART2_RX                0x21a1
 324                                 VF610_PAD_PTD2__UART2_RTS               0x21a2
 325                                 VF610_PAD_PTD3__UART2_CTS               0x21a1
 326                         >;
 327                 };
 328
 329                 pinctrl_usbh1_reg: gpio_usb_vbus {
 330                         fsl,pins = <
 331                                 VF610_PAD_PTD4__GPIO_83                 0x22ed
 332                         >;
 333                 };
 334         };
 335 };