2 * TI DaVinci EVM board support
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/gpio/machine.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_data/pcf857x.h>
19 #include <linux/platform_data/at24.h>
20 #include <linux/platform_data/gpio-davinci.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/rawnand.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/mtd/physmap.h>
25 #include <linux/nvmem-provider.h>
26 #include <linux/phy.h>
27 #include <linux/clk.h>
28 #include <linux/videodev2.h>
29 #include <linux/v4l2-dv-timings.h>
30 #include <linux/export.h>
31 #include <linux/leds.h>
33 #include <media/i2c/tvp514x.h>
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
38 #include <mach/common.h>
39 #include <linux/platform_data/i2c-davinci.h>
40 #include <mach/serial.h>
42 #include <linux/platform_data/mtd-davinci.h>
43 #include <linux/platform_data/mmc-davinci.h>
44 #include <linux/platform_data/usb-davinci.h>
45 #include <linux/platform_data/mtd-davinci-aemif.h>
46 #include <linux/platform_data/ti-aemif.h>
50 #define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
51 #define LXT971_PHY_ID (0x001378e2)
52 #define LXT971_PHY_MASK (0xfffffff0)
54 static struct mtd_partition davinci_evm_norflash_partitions[] = {
55 /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
60 .mask_flags = MTD_WRITEABLE, /* force read-only */
62 /* bootloader params in the next 1 sectors */
65 .offset = MTDPART_OFS_APPEND,
72 .offset = MTDPART_OFS_APPEND,
79 .offset = MTDPART_OFS_APPEND,
80 .size = MTDPART_SIZ_FULL,
85 static struct physmap_flash_data davinci_evm_norflash_data = {
87 .parts = davinci_evm_norflash_partitions,
88 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
91 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
92 * limits addresses to 16M, so using addresses past 16M will wrap */
93 static struct resource davinci_evm_norflash_resource = {
94 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
95 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
96 .flags = IORESOURCE_MEM,
99 static struct platform_device davinci_evm_norflash_device = {
100 .name = "physmap-flash",
103 .platform_data = &davinci_evm_norflash_data,
106 .resource = &davinci_evm_norflash_resource,
109 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
110 * It may used instead of the (default) NOR chip to boot, using TI's
111 * tools to install the secondary boot loader (UBL) and U-Boot.
113 static struct mtd_partition davinci_evm_nandflash_partition[] = {
114 /* Bootloader layout depends on whose u-boot is installed, but we
115 * can hide all the details.
116 * - block 0 for u-boot environment ... in mainline u-boot
117 * - block 1 for UBL (plus up to four backup copies in blocks 2..5)
118 * - blocks 6...? for u-boot
119 * - blocks 16..23 for u-boot environment ... in TI's u-boot
122 .name = "bootloader",
124 .size = SZ_256K + SZ_128K,
125 .mask_flags = MTD_WRITEABLE, /* force read-only */
130 .offset = MTDPART_OFS_APPEND,
134 /* File system (older GIT kernels started this on the 5MB mark) */
136 .name = "filesystem",
137 .offset = MTDPART_OFS_APPEND,
138 .size = MTDPART_SIZ_FULL,
141 /* A few blocks at end hold a flash BBT ... created by TI's CCS
142 * using flashwriter_nand.out, but ignored by TI's versions of
143 * Linux and u-boot. We boot faster by using them.
147 static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
157 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
159 .parts = davinci_evm_nandflash_partition,
160 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
161 .ecc_mode = NAND_ECC_HW,
163 .bbt_options = NAND_BBT_USE_FLASH,
164 .timing = &davinci_evm_nandflash_timing,
167 static struct resource davinci_evm_nandflash_resource[] = {
169 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
170 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
171 .flags = IORESOURCE_MEM,
173 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
174 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
175 .flags = IORESOURCE_MEM,
179 static struct resource davinci_evm_aemif_resource[] = {
181 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
182 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
183 .flags = IORESOURCE_MEM,
187 static struct aemif_abus_data davinci_evm_aemif_abus_data[] = {
193 static struct platform_device davinci_evm_nandflash_devices[] = {
195 .name = "davinci_nand",
198 .platform_data = &davinci_evm_nandflash_data,
200 .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
201 .resource = davinci_evm_nandflash_resource,
205 static struct aemif_platform_data davinci_evm_aemif_pdata = {
206 .abus_data = davinci_evm_aemif_abus_data,
207 .num_abus_data = ARRAY_SIZE(davinci_evm_aemif_abus_data),
208 .sub_devices = davinci_evm_nandflash_devices,
209 .num_sub_devices = ARRAY_SIZE(davinci_evm_nandflash_devices),
212 static struct platform_device davinci_evm_aemif_device = {
216 .platform_data = &davinci_evm_aemif_pdata,
218 .resource = davinci_evm_aemif_resource,
219 .num_resources = ARRAY_SIZE(davinci_evm_aemif_resource),
222 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
224 static struct platform_device davinci_fb_device = {
228 .dma_mask = &davinci_fb_dma_mask,
229 .coherent_dma_mask = DMA_BIT_MASK(32),
234 static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
240 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
241 /* Inputs available at the TVP5146 */
242 static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
246 .type = V4L2_INPUT_TYPE_CAMERA,
247 .std = TVP514X_STD_ALL,
252 .type = V4L2_INPUT_TYPE_CAMERA,
253 .std = TVP514X_STD_ALL,
258 * this is the route info for connecting each input to decoder
259 * ouput that goes to vpfe. There is a one to one correspondence
260 * with tvp5146_inputs
262 static struct vpfe_route dm644xevm_tvp5146_routes[] = {
264 .input = INPUT_CVBS_VI2B,
265 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
268 .input = INPUT_SVIDEO_VI2C_VI1C,
269 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
273 static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
277 .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
278 .inputs = dm644xevm_tvp5146_inputs,
279 .routes = dm644xevm_tvp5146_routes,
282 .if_type = VPFE_BT656,
283 .hdpol = VPFE_PINPOL_POSITIVE,
284 .vdpol = VPFE_PINPOL_POSITIVE,
287 I2C_BOARD_INFO("tvp5146", 0x5d),
288 .platform_data = &dm644xevm_tvp5146_pdata,
293 static struct vpfe_config dm644xevm_capture_cfg = {
294 .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
296 .sub_devs = dm644xevm_vpfe_sub_devs,
297 .card_name = "DM6446 EVM",
298 .ccdc = "DM6446 CCDC",
301 static struct platform_device rtc_dev = {
302 .name = "rtc_davinci_evm",
306 /*----------------------------------------------------------------------*/
312 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
317 static struct gpio_led evm_leds[] = {
318 { .name = "DS8", .active_low = 1,
319 .default_trigger = "heartbeat", },
320 { .name = "DS7", .active_low = 1, },
321 { .name = "DS6", .active_low = 1, },
322 { .name = "DS5", .active_low = 1, },
323 { .name = "DS4", .active_low = 1, },
324 { .name = "DS3", .active_low = 1, },
325 { .name = "DS2", .active_low = 1,
326 .default_trigger = "mmc0", },
327 { .name = "DS1", .active_low = 1,
328 .default_trigger = "disk-activity", },
331 static const struct gpio_led_platform_data evm_led_data = {
332 .num_leds = ARRAY_SIZE(evm_leds),
336 static struct platform_device *evm_led_dev;
339 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
341 struct gpio_led *leds = evm_leds;
349 /* what an extremely annoying way to be forced to handle
350 * device unregistration ...
352 evm_led_dev = platform_device_alloc("leds-gpio", 0);
353 platform_device_add_data(evm_led_dev,
354 &evm_led_data, sizeof evm_led_data);
356 evm_led_dev->dev.parent = &client->dev;
357 status = platform_device_add(evm_led_dev);
359 platform_device_put(evm_led_dev);
366 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
369 platform_device_unregister(evm_led_dev);
375 static struct pcf857x_platform_data pcf_data_u2 = {
376 .gpio_base = PCF_Uxx_BASE(0),
377 .setup = evm_led_setup,
378 .teardown = evm_led_teardown,
382 /* U18 - A/V clock generator and user switch */
387 sw_show(struct device *d, struct device_attribute *a, char *buf)
389 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
395 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
398 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
402 /* export dip switch option */
404 status = gpio_request(sw_gpio, "user_sw");
406 status = gpio_direction_input(sw_gpio);
408 status = device_create_file(&client->dev, &dev_attr_user_sw);
414 /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
415 gpio_request(gpio + 3, "pll_fs2");
416 gpio_direction_output(gpio + 3, 0);
418 gpio_request(gpio + 2, "pll_fs1");
419 gpio_direction_output(gpio + 2, 0);
421 gpio_request(gpio + 1, "pll_sr");
422 gpio_direction_output(gpio + 1, 0);
428 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
435 device_remove_file(&client->dev, &dev_attr_user_sw);
441 static struct pcf857x_platform_data pcf_data_u18 = {
442 .gpio_base = PCF_Uxx_BASE(1),
443 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
444 .setup = evm_u18_setup,
445 .teardown = evm_u18_teardown,
449 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
452 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
454 /* p0 = nDRV_VBUS (initial: don't supply it) */
455 gpio_request(gpio + 0, "nDRV_VBUS");
456 gpio_direction_output(gpio + 0, 1);
459 gpio_request(gpio + 1, "VDDIMX_EN");
460 gpio_direction_output(gpio + 1, 1);
463 gpio_request(gpio + 2, "VLYNQ_EN");
464 gpio_direction_output(gpio + 2, 1);
466 /* p3 = n3V3_CF_RESET (initial: stay in reset) */
467 gpio_request(gpio + 3, "nCF_RESET");
468 gpio_direction_output(gpio + 3, 0);
472 /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
473 gpio_request(gpio + 5, "WLAN_RESET");
474 gpio_direction_output(gpio + 5, 1);
476 /* p6 = nATA_SEL (initial: select) */
477 gpio_request(gpio + 6, "nATA_SEL");
478 gpio_direction_output(gpio + 6, 0);
480 /* p7 = nCF_SEL (initial: deselect) */
481 gpio_request(gpio + 7, "nCF_SEL");
482 gpio_direction_output(gpio + 7, 1);
488 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
500 static struct pcf857x_platform_data pcf_data_u35 = {
501 .gpio_base = PCF_Uxx_BASE(2),
502 .setup = evm_u35_setup,
503 .teardown = evm_u35_teardown,
506 /*----------------------------------------------------------------------*/
508 /* Most of this EEPROM is unused, but U-Boot uses some data:
509 * - 0x7f00, 6 bytes Ethernet Address
510 * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
511 * - ... newer boards may have more
514 static struct nvmem_cell_info dm644evm_nvmem_cells[] = {
522 static struct nvmem_cell_table dm644evm_nvmem_cell_table = {
523 .nvmem_name = "1-00500",
524 .cells = dm644evm_nvmem_cells,
525 .ncells = ARRAY_SIZE(dm644evm_nvmem_cells),
528 static struct nvmem_cell_lookup dm644evm_nvmem_cell_lookup = {
529 .nvmem_name = "1-00500",
530 .cell_name = "macaddr",
531 .dev_id = "davinci_emac.1",
532 .con_id = "mac-address",
535 static struct at24_platform_data eeprom_info = {
536 .byte_len = (256*1024) / 8,
538 .flags = AT24_FLAG_ADDR16,
539 .setup = davinci_get_mac_addr,
540 .context = (void *)0x7f00,
544 * MSP430 supports RTC, card detection, input from IR remote, and
545 * a bit more. It triggers interrupts on GPIO(7) from pressing
546 * buttons on the IR remote, and for card detect switches.
548 static struct i2c_client *dm6446evm_msp;
550 static int dm6446evm_msp_probe(struct i2c_client *client,
551 const struct i2c_device_id *id)
553 dm6446evm_msp = client;
557 static int dm6446evm_msp_remove(struct i2c_client *client)
559 dm6446evm_msp = NULL;
563 static const struct i2c_device_id dm6446evm_msp_ids[] = {
564 { "dm6446evm_msp", 0, },
565 { /* end of list */ },
568 static struct i2c_driver dm6446evm_msp_driver = {
569 .driver.name = "dm6446evm_msp",
570 .id_table = dm6446evm_msp_ids,
571 .probe = dm6446evm_msp_probe,
572 .remove = dm6446evm_msp_remove,
575 static int dm6444evm_msp430_get_pins(void)
577 static const char txbuf[2] = { 2, 4, };
579 struct i2c_msg msg[2] = {
583 .buf = (void __force *)txbuf,
596 msg[0].addr = dm6446evm_msp->addr;
597 msg[1].addr = dm6446evm_msp->addr;
599 /* Command 4 == get input state, returns port 2 and port3 data
600 * S Addr W [A] len=2 [A] cmd=4 [A]
601 * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
603 status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
607 dev_dbg(&dm6446evm_msp->dev, "PINS: %4ph\n", buf);
609 return (buf[3] << 8) | buf[2];
612 static int dm6444evm_mmc_get_cd(int module)
614 int status = dm6444evm_msp430_get_pins();
616 return (status < 0) ? status : !(status & BIT(1));
619 static int dm6444evm_mmc_get_ro(int module)
621 int status = dm6444evm_msp430_get_pins();
623 return (status < 0) ? status : status & BIT(6 + 8);
626 static struct davinci_mmc_config dm6446evm_mmc_config = {
627 .get_cd = dm6444evm_mmc_get_cd,
628 .get_ro = dm6444evm_mmc_get_ro,
632 static struct i2c_board_info __initdata i2c_info[] = {
634 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
637 I2C_BOARD_INFO("pcf8574", 0x38),
638 .platform_data = &pcf_data_u2,
641 I2C_BOARD_INFO("pcf8574", 0x39),
642 .platform_data = &pcf_data_u18,
645 I2C_BOARD_INFO("pcf8574", 0x3a),
646 .platform_data = &pcf_data_u35,
649 I2C_BOARD_INFO("24c256", 0x50),
650 .platform_data = &eeprom_info,
653 I2C_BOARD_INFO("tlv320aic33", 0x1b),
657 #define DM644X_I2C_SDA_PIN GPIO_TO_PIN(2, 12)
658 #define DM644X_I2C_SCL_PIN GPIO_TO_PIN(2, 11)
660 static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
661 .dev_id = "i2c_davinci.1",
663 GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SDA_PIN, "sda",
664 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
665 GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SCL_PIN, "scl",
666 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
670 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
671 * which requires 100 usec of idle bus after i2c writes sent to it.
673 static struct davinci_i2c_platform_data i2c_pdata = {
674 .bus_freq = 20 /* kHz */,
675 .bus_delay = 100 /* usec */,
676 .gpio_recovery = true,
679 static void __init evm_init_i2c(void)
681 gpiod_add_lookup_table(&i2c_recovery_gpiod_table);
682 davinci_init_i2c(&i2c_pdata);
683 i2c_add_driver(&dm6446evm_msp_driver);
684 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
688 #define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
690 /* venc standard timings */
691 static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
694 .timings_type = VPBE_ENC_STD,
695 .std_id = V4L2_STD_NTSC,
700 .fps = {30000, 1001},
702 .upper_margin = 0x10,
706 .timings_type = VPBE_ENC_STD,
707 .std_id = V4L2_STD_PAL,
714 .upper_margin = 0x16,
718 /* venc dv preset timings */
719 static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
722 .timings_type = VPBE_ENC_DV_TIMINGS,
723 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
730 .upper_margin = 0x20,
734 .timings_type = VPBE_ENC_DV_TIMINGS,
735 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
742 .upper_margin = 0x30,
747 * The outputs available from VPBE + encoders. Keep the order same
748 * as that of encoders. First those from venc followed by that from
749 * encoders. Index in the output refers to index on a particular encoder.
750 * Driver uses this index to pass it to encoder when it supports more
751 * than one output. Userspace applications use index of the array to
754 static struct vpbe_output dm644xevm_vpbe_outputs[] = {
759 .type = V4L2_OUTPUT_TYPE_ANALOG,
761 .capabilities = V4L2_OUT_CAP_STD,
763 .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
764 .default_mode = "ntsc",
765 .num_modes = ARRAY_SIZE(dm644xevm_enc_std_timing),
766 .modes = dm644xevm_enc_std_timing,
772 .type = V4L2_OUTPUT_TYPE_ANALOG,
773 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
775 .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
776 .default_mode = "480p59_94",
777 .num_modes = ARRAY_SIZE(dm644xevm_enc_preset_timing),
778 .modes = dm644xevm_enc_preset_timing,
782 static struct vpbe_config dm644xevm_display_cfg = {
783 .module_name = "dm644x-vpbe-display",
786 .module_name = DM644X_VPBE_OSD_SUBDEV_NAME,
789 .module_name = DM644X_VPBE_VENC_SUBDEV_NAME,
791 .num_outputs = ARRAY_SIZE(dm644xevm_vpbe_outputs),
792 .outputs = dm644xevm_vpbe_outputs,
795 static struct platform_device *davinci_evm_devices[] __initdata = {
801 davinci_evm_map_io(void)
806 static int davinci_phy_fixup(struct phy_device *phydev)
808 unsigned int control;
809 /* CRITICAL: Fix for increasing PHY signal drive strength for
810 * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
811 * signal strength was low causing TX to fail randomly. The
812 * fix is to Set bit 11 (Increased MII drive strength) of PHY
813 * register 26 (Digital Config register) on this phy. */
814 control = phy_read(phydev, 26);
815 phy_write(phydev, 26, (control | 0x800));
819 #define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
820 IS_ENABLED(CONFIG_PATA_BK3710))
822 #define HAS_NOR IS_ENABLED(CONFIG_MTD_PHYSMAP)
824 #define HAS_NAND IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
826 static __init void davinci_evm_init(void)
829 struct clk *aemif_clk;
830 struct davinci_soc_info *soc_info = &davinci_soc_info;
832 dm644x_register_clocks();
834 dm644x_init_devices();
836 ret = dm644x_gpio_register();
838 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
840 aemif_clk = clk_get(NULL, "aemif");
841 clk_prepare_enable(aemif_clk);
844 if (HAS_NAND || HAS_NOR)
845 pr_warn("WARNING: both IDE and Flash are enabled, but they share AEMIF pins\n"
846 "\tDisable IDE for NAND/NOR support\n");
848 } else if (HAS_NAND || HAS_NOR) {
849 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
850 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
852 /* only one device will be jumpered and detected */
854 platform_device_register(&davinci_evm_aemif_device);
856 evm_leds[7].default_trigger = "nand-disk";
859 pr_warn("WARNING: both NAND and NOR flash are enabled; disable one of them.\n");
861 platform_device_register(&davinci_evm_norflash_device);
864 platform_add_devices(davinci_evm_devices,
865 ARRAY_SIZE(davinci_evm_devices));
867 nvmem_add_cell_table(&dm644evm_nvmem_cell_table);
868 nvmem_add_cell_lookups(&dm644evm_nvmem_cell_lookup, 1);
870 davinci_setup_mmc(0, &dm6446evm_mmc_config);
872 dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
874 davinci_serial_init(dm644x_serial_device);
877 /* irlml6401 switches over 1A, in under 8 msec */
878 davinci_setup_usb(1000, 8);
880 if (IS_BUILTIN(CONFIG_PHYLIB)) {
881 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
882 /* Register the fixup for PHY on DaVinci */
883 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
888 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
889 /* Maintainer: MontaVista Software <source@mvista.com> */
890 .atag_offset = 0x100,
891 .map_io = davinci_evm_map_io,
892 .init_irq = davinci_irq_init,
893 .init_time = dm644x_init_time,
894 .init_machine = davinci_evm_init,
895 .init_late = davinci_init_late,
896 .dma_zone_size = SZ_128M,