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[uclinux-h8/linux.git] / arch / arm / mach-davinci / board-dm644x-evm.c
1 /*
2  * TI DaVinci EVM board support
3  *
4  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5  *
6  * 2007 (c) MontaVista Software, Inc. This file is licensed under
7  * the terms of the GNU General Public License version 2. This program
8  * is licensed "as is" without any warranty of any kind, whether express
9  * or implied.
10  */
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/gpio/machine.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_data/pcf857x.h>
19 #include <linux/platform_data/at24.h>
20 #include <linux/platform_data/gpio-davinci.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/rawnand.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/mtd/physmap.h>
25 #include <linux/nvmem-provider.h>
26 #include <linux/phy.h>
27 #include <linux/clk.h>
28 #include <linux/videodev2.h>
29 #include <linux/v4l2-dv-timings.h>
30 #include <linux/export.h>
31 #include <linux/leds.h>
32
33 #include <media/i2c/tvp514x.h>
34
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37
38 #include <mach/common.h>
39 #include <linux/platform_data/i2c-davinci.h>
40 #include <mach/serial.h>
41 #include <mach/mux.h>
42 #include <linux/platform_data/mtd-davinci.h>
43 #include <linux/platform_data/mmc-davinci.h>
44 #include <linux/platform_data/usb-davinci.h>
45 #include <linux/platform_data/mtd-davinci-aemif.h>
46 #include <linux/platform_data/ti-aemif.h>
47
48 #include "davinci.h"
49
50 #define DM644X_EVM_PHY_ID               "davinci_mdio-0:01"
51 #define LXT971_PHY_ID   (0x001378e2)
52 #define LXT971_PHY_MASK (0xfffffff0)
53
54 static struct mtd_partition davinci_evm_norflash_partitions[] = {
55         /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
56         {
57                 .name           = "bootloader",
58                 .offset         = 0,
59                 .size           = 5 * SZ_64K,
60                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
61         },
62         /* bootloader params in the next 1 sectors */
63         {
64                 .name           = "params",
65                 .offset         = MTDPART_OFS_APPEND,
66                 .size           = SZ_64K,
67                 .mask_flags     = 0,
68         },
69         /* kernel */
70         {
71                 .name           = "kernel",
72                 .offset         = MTDPART_OFS_APPEND,
73                 .size           = SZ_2M,
74                 .mask_flags     = 0
75         },
76         /* file system */
77         {
78                 .name           = "filesystem",
79                 .offset         = MTDPART_OFS_APPEND,
80                 .size           = MTDPART_SIZ_FULL,
81                 .mask_flags     = 0
82         }
83 };
84
85 static struct physmap_flash_data davinci_evm_norflash_data = {
86         .width          = 2,
87         .parts          = davinci_evm_norflash_partitions,
88         .nr_parts       = ARRAY_SIZE(davinci_evm_norflash_partitions),
89 };
90
91 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
92  * limits addresses to 16M, so using addresses past 16M will wrap */
93 static struct resource davinci_evm_norflash_resource = {
94         .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
95         .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
96         .flags          = IORESOURCE_MEM,
97 };
98
99 static struct platform_device davinci_evm_norflash_device = {
100         .name           = "physmap-flash",
101         .id             = 0,
102         .dev            = {
103                 .platform_data  = &davinci_evm_norflash_data,
104         },
105         .num_resources  = 1,
106         .resource       = &davinci_evm_norflash_resource,
107 };
108
109 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
110  * It may used instead of the (default) NOR chip to boot, using TI's
111  * tools to install the secondary boot loader (UBL) and U-Boot.
112  */
113 static struct mtd_partition davinci_evm_nandflash_partition[] = {
114         /* Bootloader layout depends on whose u-boot is installed, but we
115          * can hide all the details.
116          *  - block 0 for u-boot environment ... in mainline u-boot
117          *  - block 1 for UBL (plus up to four backup copies in blocks 2..5)
118          *  - blocks 6...? for u-boot
119          *  - blocks 16..23 for u-boot environment ... in TI's u-boot
120          */
121         {
122                 .name           = "bootloader",
123                 .offset         = 0,
124                 .size           = SZ_256K + SZ_128K,
125                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
126         },
127         /* Kernel */
128         {
129                 .name           = "kernel",
130                 .offset         = MTDPART_OFS_APPEND,
131                 .size           = SZ_4M,
132                 .mask_flags     = 0,
133         },
134         /* File system (older GIT kernels started this on the 5MB mark) */
135         {
136                 .name           = "filesystem",
137                 .offset         = MTDPART_OFS_APPEND,
138                 .size           = MTDPART_SIZ_FULL,
139                 .mask_flags     = 0,
140         }
141         /* A few blocks at end hold a flash BBT ... created by TI's CCS
142          * using flashwriter_nand.out, but ignored by TI's versions of
143          * Linux and u-boot.  We boot faster by using them.
144          */
145 };
146
147 static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
148         .wsetup         = 20,
149         .wstrobe        = 40,
150         .whold          = 20,
151         .rsetup         = 10,
152         .rstrobe        = 40,
153         .rhold          = 10,
154         .ta             = 40,
155 };
156
157 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
158         .core_chipsel   = 0,
159         .parts          = davinci_evm_nandflash_partition,
160         .nr_parts       = ARRAY_SIZE(davinci_evm_nandflash_partition),
161         .ecc_mode       = NAND_ECC_HW,
162         .ecc_bits       = 1,
163         .bbt_options    = NAND_BBT_USE_FLASH,
164         .timing         = &davinci_evm_nandflash_timing,
165 };
166
167 static struct resource davinci_evm_nandflash_resource[] = {
168         {
169                 .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
170                 .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
171                 .flags          = IORESOURCE_MEM,
172         }, {
173                 .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
174                 .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
175                 .flags          = IORESOURCE_MEM,
176         },
177 };
178
179 static struct resource davinci_evm_aemif_resource[] = {
180         {
181                 .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
182                 .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
183                 .flags          = IORESOURCE_MEM,
184         },
185 };
186
187 static struct aemif_abus_data davinci_evm_aemif_abus_data[] = {
188         {
189                 .cs             = 1,
190         },
191 };
192
193 static struct platform_device davinci_evm_nandflash_devices[] = {
194         {
195                 .name           = "davinci_nand",
196                 .id             = 0,
197                 .dev            = {
198                         .platform_data  = &davinci_evm_nandflash_data,
199                 },
200                 .num_resources  = ARRAY_SIZE(davinci_evm_nandflash_resource),
201                 .resource       = davinci_evm_nandflash_resource,
202         },
203 };
204
205 static struct aemif_platform_data davinci_evm_aemif_pdata = {
206         .abus_data = davinci_evm_aemif_abus_data,
207         .num_abus_data = ARRAY_SIZE(davinci_evm_aemif_abus_data),
208         .sub_devices = davinci_evm_nandflash_devices,
209         .num_sub_devices = ARRAY_SIZE(davinci_evm_nandflash_devices),
210 };
211
212 static struct platform_device davinci_evm_aemif_device = {
213         .name                   = "ti-aemif",
214         .id                     = -1,
215         .dev = {
216                 .platform_data  = &davinci_evm_aemif_pdata,
217         },
218         .resource               = davinci_evm_aemif_resource,
219         .num_resources          = ARRAY_SIZE(davinci_evm_aemif_resource),
220 };
221
222 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
223
224 static struct platform_device davinci_fb_device = {
225         .name           = "davincifb",
226         .id             = -1,
227         .dev = {
228                 .dma_mask               = &davinci_fb_dma_mask,
229                 .coherent_dma_mask      = DMA_BIT_MASK(32),
230         },
231         .num_resources = 0,
232 };
233
234 static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
235         .clk_polarity = 0,
236         .hs_polarity = 1,
237         .vs_polarity = 1
238 };
239
240 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
241 /* Inputs available at the TVP5146 */
242 static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
243         {
244                 .index = 0,
245                 .name = "Composite",
246                 .type = V4L2_INPUT_TYPE_CAMERA,
247                 .std = TVP514X_STD_ALL,
248         },
249         {
250                 .index = 1,
251                 .name = "S-Video",
252                 .type = V4L2_INPUT_TYPE_CAMERA,
253                 .std = TVP514X_STD_ALL,
254         },
255 };
256
257 /*
258  * this is the route info for connecting each input to decoder
259  * ouput that goes to vpfe. There is a one to one correspondence
260  * with tvp5146_inputs
261  */
262 static struct vpfe_route dm644xevm_tvp5146_routes[] = {
263         {
264                 .input = INPUT_CVBS_VI2B,
265                 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
266         },
267         {
268                 .input = INPUT_SVIDEO_VI2C_VI1C,
269                 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
270         },
271 };
272
273 static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
274         {
275                 .name = "tvp5146",
276                 .grp_id = 0,
277                 .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
278                 .inputs = dm644xevm_tvp5146_inputs,
279                 .routes = dm644xevm_tvp5146_routes,
280                 .can_route = 1,
281                 .ccdc_if_params = {
282                         .if_type = VPFE_BT656,
283                         .hdpol = VPFE_PINPOL_POSITIVE,
284                         .vdpol = VPFE_PINPOL_POSITIVE,
285                 },
286                 .board_info = {
287                         I2C_BOARD_INFO("tvp5146", 0x5d),
288                         .platform_data = &dm644xevm_tvp5146_pdata,
289                 },
290         },
291 };
292
293 static struct vpfe_config dm644xevm_capture_cfg = {
294         .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
295         .i2c_adapter_id = 1,
296         .sub_devs = dm644xevm_vpfe_sub_devs,
297         .card_name = "DM6446 EVM",
298         .ccdc = "DM6446 CCDC",
299 };
300
301 static struct platform_device rtc_dev = {
302         .name           = "rtc_davinci_evm",
303         .id             = -1,
304 };
305
306 /*----------------------------------------------------------------------*/
307 #ifdef CONFIG_I2C
308 /*
309  * I2C GPIO expanders
310  */
311
312 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
313
314
315 /* U2 -- LEDs */
316
317 static struct gpio_led evm_leds[] = {
318         { .name = "DS8", .active_low = 1,
319                 .default_trigger = "heartbeat", },
320         { .name = "DS7", .active_low = 1, },
321         { .name = "DS6", .active_low = 1, },
322         { .name = "DS5", .active_low = 1, },
323         { .name = "DS4", .active_low = 1, },
324         { .name = "DS3", .active_low = 1, },
325         { .name = "DS2", .active_low = 1,
326                 .default_trigger = "mmc0", },
327         { .name = "DS1", .active_low = 1,
328                 .default_trigger = "disk-activity", },
329 };
330
331 static const struct gpio_led_platform_data evm_led_data = {
332         .num_leds       = ARRAY_SIZE(evm_leds),
333         .leds           = evm_leds,
334 };
335
336 static struct platform_device *evm_led_dev;
337
338 static int
339 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
340 {
341         struct gpio_led *leds = evm_leds;
342         int status;
343
344         while (ngpio--) {
345                 leds->gpio = gpio++;
346                 leds++;
347         }
348
349         /* what an extremely annoying way to be forced to handle
350          * device unregistration ...
351          */
352         evm_led_dev = platform_device_alloc("leds-gpio", 0);
353         platform_device_add_data(evm_led_dev,
354                         &evm_led_data, sizeof evm_led_data);
355
356         evm_led_dev->dev.parent = &client->dev;
357         status = platform_device_add(evm_led_dev);
358         if (status < 0) {
359                 platform_device_put(evm_led_dev);
360                 evm_led_dev = NULL;
361         }
362         return status;
363 }
364
365 static int
366 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
367 {
368         if (evm_led_dev) {
369                 platform_device_unregister(evm_led_dev);
370                 evm_led_dev = NULL;
371         }
372         return 0;
373 }
374
375 static struct pcf857x_platform_data pcf_data_u2 = {
376         .gpio_base      = PCF_Uxx_BASE(0),
377         .setup          = evm_led_setup,
378         .teardown       = evm_led_teardown,
379 };
380
381
382 /* U18 - A/V clock generator and user switch */
383
384 static int sw_gpio;
385
386 static ssize_t
387 sw_show(struct device *d, struct device_attribute *a, char *buf)
388 {
389         char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
390
391         strcpy(buf, s);
392         return strlen(s);
393 }
394
395 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
396
397 static int
398 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
399 {
400         int     status;
401
402         /* export dip switch option */
403         sw_gpio = gpio + 7;
404         status = gpio_request(sw_gpio, "user_sw");
405         if (status == 0)
406                 status = gpio_direction_input(sw_gpio);
407         if (status == 0)
408                 status = device_create_file(&client->dev, &dev_attr_user_sw);
409         else
410                 gpio_free(sw_gpio);
411         if (status != 0)
412                 sw_gpio = -EINVAL;
413
414         /* audio PLL:  48 kHz (vs 44.1 or 32), single rate (vs double) */
415         gpio_request(gpio + 3, "pll_fs2");
416         gpio_direction_output(gpio + 3, 0);
417
418         gpio_request(gpio + 2, "pll_fs1");
419         gpio_direction_output(gpio + 2, 0);
420
421         gpio_request(gpio + 1, "pll_sr");
422         gpio_direction_output(gpio + 1, 0);
423
424         return 0;
425 }
426
427 static int
428 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
429 {
430         gpio_free(gpio + 1);
431         gpio_free(gpio + 2);
432         gpio_free(gpio + 3);
433
434         if (sw_gpio > 0) {
435                 device_remove_file(&client->dev, &dev_attr_user_sw);
436                 gpio_free(sw_gpio);
437         }
438         return 0;
439 }
440
441 static struct pcf857x_platform_data pcf_data_u18 = {
442         .gpio_base      = PCF_Uxx_BASE(1),
443         .n_latch        = (1 << 3) | (1 << 2) | (1 << 1),
444         .setup          = evm_u18_setup,
445         .teardown       = evm_u18_teardown,
446 };
447
448
449 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
450
451 static int
452 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
453 {
454         /* p0 = nDRV_VBUS (initial:  don't supply it) */
455         gpio_request(gpio + 0, "nDRV_VBUS");
456         gpio_direction_output(gpio + 0, 1);
457
458         /* p1 = VDDIMX_EN */
459         gpio_request(gpio + 1, "VDDIMX_EN");
460         gpio_direction_output(gpio + 1, 1);
461
462         /* p2 = VLYNQ_EN */
463         gpio_request(gpio + 2, "VLYNQ_EN");
464         gpio_direction_output(gpio + 2, 1);
465
466         /* p3 = n3V3_CF_RESET (initial: stay in reset) */
467         gpio_request(gpio + 3, "nCF_RESET");
468         gpio_direction_output(gpio + 3, 0);
469
470         /* (p4 unused) */
471
472         /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
473         gpio_request(gpio + 5, "WLAN_RESET");
474         gpio_direction_output(gpio + 5, 1);
475
476         /* p6 = nATA_SEL (initial: select) */
477         gpio_request(gpio + 6, "nATA_SEL");
478         gpio_direction_output(gpio + 6, 0);
479
480         /* p7 = nCF_SEL (initial: deselect) */
481         gpio_request(gpio + 7, "nCF_SEL");
482         gpio_direction_output(gpio + 7, 1);
483
484         return 0;
485 }
486
487 static int
488 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
489 {
490         gpio_free(gpio + 7);
491         gpio_free(gpio + 6);
492         gpio_free(gpio + 5);
493         gpio_free(gpio + 3);
494         gpio_free(gpio + 2);
495         gpio_free(gpio + 1);
496         gpio_free(gpio + 0);
497         return 0;
498 }
499
500 static struct pcf857x_platform_data pcf_data_u35 = {
501         .gpio_base      = PCF_Uxx_BASE(2),
502         .setup          = evm_u35_setup,
503         .teardown       = evm_u35_teardown,
504 };
505
506 /*----------------------------------------------------------------------*/
507
508 /* Most of this EEPROM is unused, but U-Boot uses some data:
509  *  - 0x7f00, 6 bytes Ethernet Address
510  *  - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
511  *  - ... newer boards may have more
512  */
513
514 static struct nvmem_cell_info dm644evm_nvmem_cells[] = {
515         {
516                 .name           = "macaddr",
517                 .offset         = 0x7f00,
518                 .bytes          = ETH_ALEN,
519         }
520 };
521
522 static struct nvmem_cell_table dm644evm_nvmem_cell_table = {
523         .nvmem_name     = "1-00500",
524         .cells          = dm644evm_nvmem_cells,
525         .ncells         = ARRAY_SIZE(dm644evm_nvmem_cells),
526 };
527
528 static struct nvmem_cell_lookup dm644evm_nvmem_cell_lookup = {
529         .nvmem_name     = "1-00500",
530         .cell_name      = "macaddr",
531         .dev_id         = "davinci_emac.1",
532         .con_id         = "mac-address",
533 };
534
535 static struct at24_platform_data eeprom_info = {
536         .byte_len       = (256*1024) / 8,
537         .page_size      = 64,
538         .flags          = AT24_FLAG_ADDR16,
539         .setup          = davinci_get_mac_addr,
540         .context        = (void *)0x7f00,
541 };
542
543 /*
544  * MSP430 supports RTC, card detection, input from IR remote, and
545  * a bit more.  It triggers interrupts on GPIO(7) from pressing
546  * buttons on the IR remote, and for card detect switches.
547  */
548 static struct i2c_client *dm6446evm_msp;
549
550 static int dm6446evm_msp_probe(struct i2c_client *client,
551                 const struct i2c_device_id *id)
552 {
553         dm6446evm_msp = client;
554         return 0;
555 }
556
557 static int dm6446evm_msp_remove(struct i2c_client *client)
558 {
559         dm6446evm_msp = NULL;
560         return 0;
561 }
562
563 static const struct i2c_device_id dm6446evm_msp_ids[] = {
564         { "dm6446evm_msp", 0, },
565         { /* end of list */ },
566 };
567
568 static struct i2c_driver dm6446evm_msp_driver = {
569         .driver.name    = "dm6446evm_msp",
570         .id_table       = dm6446evm_msp_ids,
571         .probe          = dm6446evm_msp_probe,
572         .remove         = dm6446evm_msp_remove,
573 };
574
575 static int dm6444evm_msp430_get_pins(void)
576 {
577         static const char txbuf[2] = { 2, 4, };
578         char buf[4];
579         struct i2c_msg msg[2] = {
580                 {
581                         .flags = 0,
582                         .len = 2,
583                         .buf = (void __force *)txbuf,
584                 },
585                 {
586                         .flags = I2C_M_RD,
587                         .len = 4,
588                         .buf = buf,
589                 },
590         };
591         int status;
592
593         if (!dm6446evm_msp)
594                 return -ENXIO;
595
596         msg[0].addr = dm6446evm_msp->addr;
597         msg[1].addr = dm6446evm_msp->addr;
598
599         /* Command 4 == get input state, returns port 2 and port3 data
600          *   S Addr W [A] len=2 [A] cmd=4 [A]
601          *   RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
602          */
603         status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
604         if (status < 0)
605                 return status;
606
607         dev_dbg(&dm6446evm_msp->dev, "PINS: %4ph\n", buf);
608
609         return (buf[3] << 8) | buf[2];
610 }
611
612 static int dm6444evm_mmc_get_cd(int module)
613 {
614         int status = dm6444evm_msp430_get_pins();
615
616         return (status < 0) ? status : !(status & BIT(1));
617 }
618
619 static int dm6444evm_mmc_get_ro(int module)
620 {
621         int status = dm6444evm_msp430_get_pins();
622
623         return (status < 0) ? status : status & BIT(6 + 8);
624 }
625
626 static struct davinci_mmc_config dm6446evm_mmc_config = {
627         .get_cd         = dm6444evm_mmc_get_cd,
628         .get_ro         = dm6444evm_mmc_get_ro,
629         .wires          = 4,
630 };
631
632 static struct i2c_board_info __initdata i2c_info[] =  {
633         {
634                 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
635         },
636         {
637                 I2C_BOARD_INFO("pcf8574", 0x38),
638                 .platform_data  = &pcf_data_u2,
639         },
640         {
641                 I2C_BOARD_INFO("pcf8574", 0x39),
642                 .platform_data  = &pcf_data_u18,
643         },
644         {
645                 I2C_BOARD_INFO("pcf8574", 0x3a),
646                 .platform_data  = &pcf_data_u35,
647         },
648         {
649                 I2C_BOARD_INFO("24c256", 0x50),
650                 .platform_data  = &eeprom_info,
651         },
652         {
653                 I2C_BOARD_INFO("tlv320aic33", 0x1b),
654         },
655 };
656
657 #define DM644X_I2C_SDA_PIN      GPIO_TO_PIN(2, 12)
658 #define DM644X_I2C_SCL_PIN      GPIO_TO_PIN(2, 11)
659
660 static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
661         .dev_id = "i2c_davinci.1",
662         .table = {
663                 GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SDA_PIN, "sda",
664                             GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
665                 GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SCL_PIN, "scl",
666                             GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
667         },
668 };
669
670 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
671  * which requires 100 usec of idle bus after i2c writes sent to it.
672  */
673 static struct davinci_i2c_platform_data i2c_pdata = {
674         .bus_freq       = 20 /* kHz */,
675         .bus_delay      = 100 /* usec */,
676         .gpio_recovery  = true,
677 };
678
679 static void __init evm_init_i2c(void)
680 {
681         gpiod_add_lookup_table(&i2c_recovery_gpiod_table);
682         davinci_init_i2c(&i2c_pdata);
683         i2c_add_driver(&dm6446evm_msp_driver);
684         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
685 }
686 #endif
687
688 #define VENC_STD_ALL    (V4L2_STD_NTSC | V4L2_STD_PAL)
689
690 /* venc standard timings */
691 static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
692         {
693                 .name           = "ntsc",
694                 .timings_type   = VPBE_ENC_STD,
695                 .std_id         = V4L2_STD_NTSC,
696                 .interlaced     = 1,
697                 .xres           = 720,
698                 .yres           = 480,
699                 .aspect         = {11, 10},
700                 .fps            = {30000, 1001},
701                 .left_margin    = 0x79,
702                 .upper_margin   = 0x10,
703         },
704         {
705                 .name           = "pal",
706                 .timings_type   = VPBE_ENC_STD,
707                 .std_id         = V4L2_STD_PAL,
708                 .interlaced     = 1,
709                 .xres           = 720,
710                 .yres           = 576,
711                 .aspect         = {54, 59},
712                 .fps            = {25, 1},
713                 .left_margin    = 0x7e,
714                 .upper_margin   = 0x16,
715         },
716 };
717
718 /* venc dv preset timings */
719 static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
720         {
721                 .name           = "480p59_94",
722                 .timings_type   = VPBE_ENC_DV_TIMINGS,
723                 .dv_timings     = V4L2_DV_BT_CEA_720X480P59_94,
724                 .interlaced     = 0,
725                 .xres           = 720,
726                 .yres           = 480,
727                 .aspect         = {1, 1},
728                 .fps            = {5994, 100},
729                 .left_margin    = 0x80,
730                 .upper_margin   = 0x20,
731         },
732         {
733                 .name           = "576p50",
734                 .timings_type   = VPBE_ENC_DV_TIMINGS,
735                 .dv_timings     = V4L2_DV_BT_CEA_720X576P50,
736                 .interlaced     = 0,
737                 .xres           = 720,
738                 .yres           = 576,
739                 .aspect         = {1, 1},
740                 .fps            = {50, 1},
741                 .left_margin    = 0x7e,
742                 .upper_margin   = 0x30,
743         },
744 };
745
746 /*
747  * The outputs available from VPBE + encoders. Keep the order same
748  * as that of encoders. First those from venc followed by that from
749  * encoders. Index in the output refers to index on a particular encoder.
750  * Driver uses this index to pass it to encoder when it supports more
751  * than one output. Userspace applications use index of the array to
752  * set an output.
753  */
754 static struct vpbe_output dm644xevm_vpbe_outputs[] = {
755         {
756                 .output         = {
757                         .index          = 0,
758                         .name           = "Composite",
759                         .type           = V4L2_OUTPUT_TYPE_ANALOG,
760                         .std            = VENC_STD_ALL,
761                         .capabilities   = V4L2_OUT_CAP_STD,
762                 },
763                 .subdev_name    = DM644X_VPBE_VENC_SUBDEV_NAME,
764                 .default_mode   = "ntsc",
765                 .num_modes      = ARRAY_SIZE(dm644xevm_enc_std_timing),
766                 .modes          = dm644xevm_enc_std_timing,
767         },
768         {
769                 .output         = {
770                         .index          = 1,
771                         .name           = "Component",
772                         .type           = V4L2_OUTPUT_TYPE_ANALOG,
773                         .capabilities   = V4L2_OUT_CAP_DV_TIMINGS,
774                 },
775                 .subdev_name    = DM644X_VPBE_VENC_SUBDEV_NAME,
776                 .default_mode   = "480p59_94",
777                 .num_modes      = ARRAY_SIZE(dm644xevm_enc_preset_timing),
778                 .modes          = dm644xevm_enc_preset_timing,
779         },
780 };
781
782 static struct vpbe_config dm644xevm_display_cfg = {
783         .module_name    = "dm644x-vpbe-display",
784         .i2c_adapter_id = 1,
785         .osd            = {
786                 .module_name    = DM644X_VPBE_OSD_SUBDEV_NAME,
787         },
788         .venc           = {
789                 .module_name    = DM644X_VPBE_VENC_SUBDEV_NAME,
790         },
791         .num_outputs    = ARRAY_SIZE(dm644xevm_vpbe_outputs),
792         .outputs        = dm644xevm_vpbe_outputs,
793 };
794
795 static struct platform_device *davinci_evm_devices[] __initdata = {
796         &davinci_fb_device,
797         &rtc_dev,
798 };
799
800 static void __init
801 davinci_evm_map_io(void)
802 {
803         dm644x_init();
804 }
805
806 static int davinci_phy_fixup(struct phy_device *phydev)
807 {
808         unsigned int control;
809         /* CRITICAL: Fix for increasing PHY signal drive strength for
810          * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
811          * signal strength was low causing  TX to fail randomly. The
812          * fix is to Set bit 11 (Increased MII drive strength) of PHY
813          * register 26 (Digital Config register) on this phy. */
814         control = phy_read(phydev, 26);
815         phy_write(phydev, 26, (control | 0x800));
816         return 0;
817 }
818
819 #define HAS_ATA         (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
820                          IS_ENABLED(CONFIG_PATA_BK3710))
821
822 #define HAS_NOR         IS_ENABLED(CONFIG_MTD_PHYSMAP)
823
824 #define HAS_NAND        IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
825
826 static __init void davinci_evm_init(void)
827 {
828         int ret;
829         struct clk *aemif_clk;
830         struct davinci_soc_info *soc_info = &davinci_soc_info;
831
832         dm644x_register_clocks();
833
834         dm644x_init_devices();
835
836         ret = dm644x_gpio_register();
837         if (ret)
838                 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
839
840         aemif_clk = clk_get(NULL, "aemif");
841         clk_prepare_enable(aemif_clk);
842
843         if (HAS_ATA) {
844                 if (HAS_NAND || HAS_NOR)
845                         pr_warn("WARNING: both IDE and Flash are enabled, but they share AEMIF pins\n"
846                                 "\tDisable IDE for NAND/NOR support\n");
847                 davinci_init_ide();
848         } else if (HAS_NAND || HAS_NOR) {
849                 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
850                 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
851
852                 /* only one device will be jumpered and detected */
853                 if (HAS_NAND) {
854                         platform_device_register(&davinci_evm_aemif_device);
855 #ifdef CONFIG_I2C
856                         evm_leds[7].default_trigger = "nand-disk";
857 #endif
858                         if (HAS_NOR)
859                                 pr_warn("WARNING: both NAND and NOR flash are enabled; disable one of them.\n");
860                 } else if (HAS_NOR)
861                         platform_device_register(&davinci_evm_norflash_device);
862         }
863
864         platform_add_devices(davinci_evm_devices,
865                              ARRAY_SIZE(davinci_evm_devices));
866 #ifdef CONFIG_I2C
867         nvmem_add_cell_table(&dm644evm_nvmem_cell_table);
868         nvmem_add_cell_lookups(&dm644evm_nvmem_cell_lookup, 1);
869         evm_init_i2c();
870         davinci_setup_mmc(0, &dm6446evm_mmc_config);
871 #endif
872         dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
873
874         davinci_serial_init(dm644x_serial_device);
875         dm644x_init_asp();
876
877         /* irlml6401 switches over 1A, in under 8 msec */
878         davinci_setup_usb(1000, 8);
879
880         if (IS_BUILTIN(CONFIG_PHYLIB)) {
881                 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
882                 /* Register the fixup for PHY on DaVinci */
883                 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
884                                                 davinci_phy_fixup);
885         }
886 }
887
888 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
889         /* Maintainer: MontaVista Software <source@mvista.com> */
890         .atag_offset  = 0x100,
891         .map_io       = davinci_evm_map_io,
892         .init_irq     = davinci_irq_init,
893         .init_time      = dm644x_init_time,
894         .init_machine = davinci_evm_init,
895         .init_late      = davinci_init_late,
896         .dma_zone_size  = SZ_128M,
897 MACHINE_END