2 * arch/arm/mach-kirkwood/common.c
4 * Core functions for Marvell Kirkwood SoCs
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/ata_platform.h>
16 #include <linux/mtd/nand.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/clk-provider.h>
19 #include <linux/spinlock.h>
22 #include <asm/timex.h>
23 #include <asm/kexec.h>
24 #include <asm/mach/map.h>
25 #include <asm/mach/time.h>
26 #include <mach/kirkwood.h>
27 #include <mach/bridge-regs.h>
28 #include <plat/audio.h>
29 #include <plat/cache-feroceon-l2.h>
30 #include <plat/mvsdio.h>
31 #include <plat/orion_nand.h>
32 #include <plat/ehci-orion.h>
33 #include <plat/common.h>
34 #include <plat/time.h>
35 #include <plat/addr-map.h>
36 #include <plat/mv_xor.h>
39 /*****************************************************************************
41 ****************************************************************************/
42 static struct map_desc kirkwood_io_desc[] __initdata = {
44 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
45 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
46 .length = KIRKWOOD_PCIE_IO_SIZE,
49 .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE,
50 .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
51 .length = KIRKWOOD_PCIE1_IO_SIZE,
54 .virtual = KIRKWOOD_REGS_VIRT_BASE,
55 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
56 .length = KIRKWOOD_REGS_SIZE,
61 void __init kirkwood_map_io(void)
63 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
67 * Default clock control bits. Any bit _not_ set in this variable
68 * will be cleared from the hardware after platform devices have been
69 * registered. Some reserved bits must be set to 1.
71 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
74 /*****************************************************************************
76 ****************************************************************************/
77 static DEFINE_SPINLOCK(gating_lock);
78 static struct clk *tclk;
80 static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
82 return clk_register_gate(NULL, name, "tclk", CLK_IGNORE_UNUSED,
83 (void __iomem *)CLOCK_GATING_CTRL,
84 bit_idx, 0, &gating_lock);
87 void __init kirkwood_clk_init(void)
89 struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio;
92 tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
93 CLK_IS_ROOT, kirkwood_tclk);
95 runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT);
96 ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0);
97 ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1);
98 sata0 = kirkwood_register_gate("sata0", CGC_BIT_SATA0);
99 sata1 = kirkwood_register_gate("sata1", CGC_BIT_SATA1);
100 usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0);
101 sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO);
102 crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
103 kirkwood_register_gate("xor0", CGC_BIT_XOR0);
104 kirkwood_register_gate("xor1", CGC_BIT_XOR1);
105 kirkwood_register_gate("pex0", CGC_BIT_PEX0);
106 kirkwood_register_gate("pex1", CGC_BIT_PEX1);
107 kirkwood_register_gate("audio", CGC_BIT_AUDIO);
108 kirkwood_register_gate("tdm", CGC_BIT_TDM);
109 kirkwood_register_gate("tsu", CGC_BIT_TSU);
111 /* clkdev entries, mapping clks to devices */
112 orion_clkdev_add(NULL, "orion_spi.0", runit);
113 orion_clkdev_add(NULL, "orion_spi.1", runit);
114 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0);
115 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1);
116 orion_clkdev_add(NULL, "orion_wdt", tclk);
117 orion_clkdev_add("0", "sata_mv.0", sata0);
118 orion_clkdev_add("1", "sata_mv.0", sata1);
119 orion_clkdev_add(NULL, "orion-ehci.0", usb0);
120 orion_clkdev_add(NULL, "orion_nand", runit);
121 orion_clkdev_add(NULL, "mvsdio", sdio);
122 orion_clkdev_add(NULL, "mv_crypto", crypto);
125 /*****************************************************************************
127 ****************************************************************************/
128 void __init kirkwood_ehci_init(void)
130 kirkwood_clk_ctrl |= CGC_USB0;
131 orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
135 /*****************************************************************************
137 ****************************************************************************/
138 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
140 kirkwood_clk_ctrl |= CGC_GE0;
142 orion_ge00_init(eth_data,
143 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
144 IRQ_KIRKWOOD_GE00_ERR);
148 /*****************************************************************************
150 ****************************************************************************/
151 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
154 kirkwood_clk_ctrl |= CGC_GE1;
156 orion_ge01_init(eth_data,
157 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
158 IRQ_KIRKWOOD_GE01_ERR);
162 /*****************************************************************************
164 ****************************************************************************/
165 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
167 orion_ge00_switch_init(d, irq);
171 /*****************************************************************************
173 ****************************************************************************/
174 static struct resource kirkwood_nand_resource = {
175 .flags = IORESOURCE_MEM,
176 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
177 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
178 KIRKWOOD_NAND_MEM_SIZE - 1,
181 static struct orion_nand_data kirkwood_nand_data = {
187 static struct platform_device kirkwood_nand_flash = {
188 .name = "orion_nand",
191 .platform_data = &kirkwood_nand_data,
193 .resource = &kirkwood_nand_resource,
197 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
200 kirkwood_clk_ctrl |= CGC_RUNIT;
201 kirkwood_nand_data.parts = parts;
202 kirkwood_nand_data.nr_parts = nr_parts;
203 kirkwood_nand_data.chip_delay = chip_delay;
204 platform_device_register(&kirkwood_nand_flash);
207 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
208 int (*dev_ready)(struct mtd_info *))
210 kirkwood_clk_ctrl |= CGC_RUNIT;
211 kirkwood_nand_data.parts = parts;
212 kirkwood_nand_data.nr_parts = nr_parts;
213 kirkwood_nand_data.dev_ready = dev_ready;
214 platform_device_register(&kirkwood_nand_flash);
217 /*****************************************************************************
219 ****************************************************************************/
220 static void __init kirkwood_rtc_init(void)
222 orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
226 /*****************************************************************************
228 ****************************************************************************/
229 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
231 kirkwood_clk_ctrl |= CGC_SATA0;
232 if (sata_data->n_ports > 1)
233 kirkwood_clk_ctrl |= CGC_SATA1;
235 orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
239 /*****************************************************************************
241 ****************************************************************************/
242 static struct resource mvsdio_resources[] = {
244 .start = SDIO_PHYS_BASE,
245 .end = SDIO_PHYS_BASE + SZ_1K - 1,
246 .flags = IORESOURCE_MEM,
249 .start = IRQ_KIRKWOOD_SDIO,
250 .end = IRQ_KIRKWOOD_SDIO,
251 .flags = IORESOURCE_IRQ,
255 static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
257 static struct platform_device kirkwood_sdio = {
261 .dma_mask = &mvsdio_dmamask,
262 .coherent_dma_mask = DMA_BIT_MASK(32),
264 .num_resources = ARRAY_SIZE(mvsdio_resources),
265 .resource = mvsdio_resources,
268 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
272 kirkwood_pcie_id(&dev, &rev);
273 if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
274 mvsdio_data->clock = 100000000;
276 mvsdio_data->clock = 200000000;
277 kirkwood_clk_ctrl |= CGC_SDIO;
278 kirkwood_sdio.dev.platform_data = mvsdio_data;
279 platform_device_register(&kirkwood_sdio);
283 /*****************************************************************************
285 ****************************************************************************/
286 void __init kirkwood_spi_init()
288 kirkwood_clk_ctrl |= CGC_RUNIT;
289 orion_spi_init(SPI_PHYS_BASE);
293 /*****************************************************************************
295 ****************************************************************************/
296 void __init kirkwood_i2c_init(void)
298 orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
302 /*****************************************************************************
304 ****************************************************************************/
306 void __init kirkwood_uart0_init(void)
308 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
309 IRQ_KIRKWOOD_UART_0, tclk);
313 /*****************************************************************************
315 ****************************************************************************/
316 void __init kirkwood_uart1_init(void)
318 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
319 IRQ_KIRKWOOD_UART_1, tclk);
322 /*****************************************************************************
323 * Cryptographic Engines and Security Accelerator (CESA)
324 ****************************************************************************/
325 void __init kirkwood_crypto_init(void)
327 kirkwood_clk_ctrl |= CGC_CRYPTO;
328 orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
329 KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
333 /*****************************************************************************
335 ****************************************************************************/
336 void __init kirkwood_xor0_init(void)
338 kirkwood_clk_ctrl |= CGC_XOR0;
340 orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
341 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
345 /*****************************************************************************
347 ****************************************************************************/
348 void __init kirkwood_xor1_init(void)
350 kirkwood_clk_ctrl |= CGC_XOR1;
352 orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
353 IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
357 /*****************************************************************************
359 ****************************************************************************/
360 void __init kirkwood_wdt_init(void)
366 /*****************************************************************************
368 ****************************************************************************/
369 void __init kirkwood_init_early(void)
371 orion_time_set_base(TIMER_VIRT_BASE);
376 static int __init kirkwood_find_tclk(void)
380 kirkwood_pcie_id(&dev, &rev);
382 if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
383 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
389 static void __init kirkwood_timer_init(void)
391 kirkwood_tclk = kirkwood_find_tclk();
393 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
394 IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
397 struct sys_timer kirkwood_timer = {
398 .init = kirkwood_timer_init,
401 /*****************************************************************************
403 ****************************************************************************/
404 static struct resource kirkwood_i2s_resources[] = {
406 .start = AUDIO_PHYS_BASE,
407 .end = AUDIO_PHYS_BASE + SZ_16K - 1,
408 .flags = IORESOURCE_MEM,
411 .start = IRQ_KIRKWOOD_I2S,
412 .end = IRQ_KIRKWOOD_I2S,
413 .flags = IORESOURCE_IRQ,
417 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
421 static struct platform_device kirkwood_i2s_device = {
422 .name = "kirkwood-i2s",
424 .num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
425 .resource = kirkwood_i2s_resources,
427 .platform_data = &kirkwood_i2s_data,
431 static struct platform_device kirkwood_pcm_device = {
432 .name = "kirkwood-pcm-audio",
436 void __init kirkwood_audio_init(void)
438 kirkwood_clk_ctrl |= CGC_AUDIO;
439 platform_device_register(&kirkwood_i2s_device);
440 platform_device_register(&kirkwood_pcm_device);
443 /*****************************************************************************
445 ****************************************************************************/
447 * Identify device ID and revision.
449 char * __init kirkwood_id(void)
453 kirkwood_pcie_id(&dev, &rev);
455 if (dev == MV88F6281_DEV_ID) {
456 if (rev == MV88F6281_REV_Z0)
457 return "MV88F6281-Z0";
458 else if (rev == MV88F6281_REV_A0)
459 return "MV88F6281-A0";
460 else if (rev == MV88F6281_REV_A1)
461 return "MV88F6281-A1";
463 return "MV88F6281-Rev-Unsupported";
464 } else if (dev == MV88F6192_DEV_ID) {
465 if (rev == MV88F6192_REV_Z0)
466 return "MV88F6192-Z0";
467 else if (rev == MV88F6192_REV_A0)
468 return "MV88F6192-A0";
469 else if (rev == MV88F6192_REV_A1)
470 return "MV88F6192-A1";
472 return "MV88F6192-Rev-Unsupported";
473 } else if (dev == MV88F6180_DEV_ID) {
474 if (rev == MV88F6180_REV_A0)
475 return "MV88F6180-Rev-A0";
476 else if (rev == MV88F6180_REV_A1)
477 return "MV88F6180-Rev-A1";
479 return "MV88F6180-Rev-Unsupported";
480 } else if (dev == MV88F6282_DEV_ID) {
481 if (rev == MV88F6282_REV_A0)
482 return "MV88F6282-Rev-A0";
483 else if (rev == MV88F6282_REV_A1)
484 return "MV88F6282-Rev-A1";
486 return "MV88F6282-Rev-Unsupported";
488 return "Device-Unknown";
492 void __init kirkwood_l2_init(void)
494 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
495 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
498 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
503 void __init kirkwood_init(void)
505 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
506 kirkwood_id(), kirkwood_tclk);
509 * Disable propagation of mbus errors to the CPU local bus,
510 * as this causes mbus errors (which can occur for example
511 * for PCI aborts) to throw CPU aborts, which we're not set
514 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
516 kirkwood_setup_cpu_mbus();
518 #ifdef CONFIG_CACHE_FEROCEON_L2
522 /* Setup root of clk tree */
525 /* internal devices that every board has */
528 kirkwood_xor0_init();
529 kirkwood_xor1_init();
530 kirkwood_crypto_init();
533 kexec_reinit = kirkwood_enable_pcie;
537 static int __init kirkwood_clock_gate(void)
539 unsigned int curr = readl(CLOCK_GATING_CTRL);
542 kirkwood_pcie_id(&dev, &rev);
543 printk(KERN_DEBUG "Gating clock of unused units\n");
544 printk(KERN_DEBUG "before: 0x%08x\n", curr);
546 /* Make sure those units are accessible */
547 writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
549 /* For SATA: first shutdown the phy */
550 if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
551 /* Disable PLL and IVREF */
552 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
554 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
556 if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
557 /* Disable PLL and IVREF */
558 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
560 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
563 /* For PCIe: first shutdown the phy */
564 if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
565 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
567 if (readl(PCIE_STATUS) & 0x1)
569 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
572 /* For PCIe 1: first shutdown the phy */
573 if (dev == MV88F6282_DEV_ID) {
574 if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
575 writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
577 if (readl(PCIE1_STATUS) & 0x1)
579 writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
581 } else /* keep this bit set for devices that don't have PCIe1 */
582 kirkwood_clk_ctrl |= CGC_PEX1;
584 /* Now gate clock the required units */
585 writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
586 printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
590 late_initcall(kirkwood_clock_gate);
592 void kirkwood_restart(char mode, const char *cmd)
595 * Enable soft reset to assert RSTOUTn.
597 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
602 writel(SOFT_RESET, SYSTEM_SOFT_RESET);