2 * arch/arm/mach-kirkwood/common.c
4 * Core functions for Marvell Kirkwood SoCs
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/ata_platform.h>
16 #include <linux/mtd/nand.h>
17 #include <linux/dma-mapping.h>
21 #include <asm/timex.h>
22 #include <asm/kexec.h>
23 #include <asm/mach/map.h>
24 #include <asm/mach/time.h>
25 #include <mach/kirkwood.h>
26 #include <mach/bridge-regs.h>
27 #include <plat/audio.h>
28 #include <plat/cache-feroceon-l2.h>
29 #include <plat/mvsdio.h>
30 #include <plat/orion_nand.h>
31 #include <plat/ehci-orion.h>
32 #include <plat/common.h>
33 #include <plat/time.h>
34 #include <plat/addr-map.h>
37 /*****************************************************************************
39 ****************************************************************************/
40 static struct map_desc kirkwood_io_desc[] __initdata = {
42 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
43 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
44 .length = KIRKWOOD_PCIE_IO_SIZE,
47 .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE,
48 .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
49 .length = KIRKWOOD_PCIE1_IO_SIZE,
52 .virtual = KIRKWOOD_REGS_VIRT_BASE,
53 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
54 .length = KIRKWOOD_REGS_SIZE,
59 void __init kirkwood_map_io(void)
61 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
65 * Default clock control bits. Any bit _not_ set in this variable
66 * will be cleared from the hardware after platform devices have been
67 * registered. Some reserved bits must be set to 1.
69 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
72 /*****************************************************************************
74 ****************************************************************************/
75 void __init kirkwood_ehci_init(void)
77 kirkwood_clk_ctrl |= CGC_USB0;
78 orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
82 /*****************************************************************************
84 ****************************************************************************/
85 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
87 kirkwood_clk_ctrl |= CGC_GE0;
89 orion_ge00_init(eth_data,
90 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
91 IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
95 /*****************************************************************************
97 ****************************************************************************/
98 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
101 kirkwood_clk_ctrl |= CGC_GE1;
103 orion_ge01_init(eth_data,
104 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
105 IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
109 /*****************************************************************************
111 ****************************************************************************/
112 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
114 orion_ge00_switch_init(d, irq);
118 /*****************************************************************************
120 ****************************************************************************/
121 static struct resource kirkwood_nand_resource = {
122 .flags = IORESOURCE_MEM,
123 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
124 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
125 KIRKWOOD_NAND_MEM_SIZE - 1,
128 static struct orion_nand_data kirkwood_nand_data = {
134 static struct platform_device kirkwood_nand_flash = {
135 .name = "orion_nand",
138 .platform_data = &kirkwood_nand_data,
140 .resource = &kirkwood_nand_resource,
144 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
147 kirkwood_clk_ctrl |= CGC_RUNIT;
148 kirkwood_nand_data.parts = parts;
149 kirkwood_nand_data.nr_parts = nr_parts;
150 kirkwood_nand_data.chip_delay = chip_delay;
151 platform_device_register(&kirkwood_nand_flash);
154 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
155 int (*dev_ready)(struct mtd_info *))
157 kirkwood_clk_ctrl |= CGC_RUNIT;
158 kirkwood_nand_data.parts = parts;
159 kirkwood_nand_data.nr_parts = nr_parts;
160 kirkwood_nand_data.dev_ready = dev_ready;
161 platform_device_register(&kirkwood_nand_flash);
164 /*****************************************************************************
166 ****************************************************************************/
167 static void __init kirkwood_rtc_init(void)
169 orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
173 /*****************************************************************************
175 ****************************************************************************/
176 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
178 kirkwood_clk_ctrl |= CGC_SATA0;
179 if (sata_data->n_ports > 1)
180 kirkwood_clk_ctrl |= CGC_SATA1;
182 orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
186 /*****************************************************************************
188 ****************************************************************************/
189 static struct resource mvsdio_resources[] = {
191 .start = SDIO_PHYS_BASE,
192 .end = SDIO_PHYS_BASE + SZ_1K - 1,
193 .flags = IORESOURCE_MEM,
196 .start = IRQ_KIRKWOOD_SDIO,
197 .end = IRQ_KIRKWOOD_SDIO,
198 .flags = IORESOURCE_IRQ,
202 static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
204 static struct platform_device kirkwood_sdio = {
208 .dma_mask = &mvsdio_dmamask,
209 .coherent_dma_mask = DMA_BIT_MASK(32),
211 .num_resources = ARRAY_SIZE(mvsdio_resources),
212 .resource = mvsdio_resources,
215 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
219 kirkwood_pcie_id(&dev, &rev);
220 if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
221 mvsdio_data->clock = 100000000;
223 mvsdio_data->clock = 200000000;
224 kirkwood_clk_ctrl |= CGC_SDIO;
225 kirkwood_sdio.dev.platform_data = mvsdio_data;
226 platform_device_register(&kirkwood_sdio);
230 /*****************************************************************************
232 ****************************************************************************/
233 void __init kirkwood_spi_init()
235 kirkwood_clk_ctrl |= CGC_RUNIT;
236 orion_spi_init(SPI_PHYS_BASE, kirkwood_tclk);
240 /*****************************************************************************
242 ****************************************************************************/
243 void __init kirkwood_i2c_init(void)
245 orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
249 /*****************************************************************************
251 ****************************************************************************/
253 void __init kirkwood_uart0_init(void)
255 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
256 IRQ_KIRKWOOD_UART_0, kirkwood_tclk);
260 /*****************************************************************************
262 ****************************************************************************/
263 void __init kirkwood_uart1_init(void)
265 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
266 IRQ_KIRKWOOD_UART_1, kirkwood_tclk);
269 /*****************************************************************************
270 * Cryptographic Engines and Security Accelerator (CESA)
271 ****************************************************************************/
272 void __init kirkwood_crypto_init(void)
274 kirkwood_clk_ctrl |= CGC_CRYPTO;
275 orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
276 KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
280 /*****************************************************************************
282 ****************************************************************************/
283 void __init kirkwood_xor0_init(void)
285 kirkwood_clk_ctrl |= CGC_XOR0;
287 orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
288 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
292 /*****************************************************************************
294 ****************************************************************************/
295 void __init kirkwood_xor1_init(void)
297 kirkwood_clk_ctrl |= CGC_XOR1;
299 orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
300 IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
304 /*****************************************************************************
306 ****************************************************************************/
307 void __init kirkwood_wdt_init(void)
309 orion_wdt_init(kirkwood_tclk);
313 /*****************************************************************************
315 ****************************************************************************/
316 void __init kirkwood_init_early(void)
318 orion_time_set_base(TIMER_VIRT_BASE);
323 static int __init kirkwood_find_tclk(void)
327 kirkwood_pcie_id(&dev, &rev);
329 if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
330 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
336 static void __init kirkwood_timer_init(void)
338 kirkwood_tclk = kirkwood_find_tclk();
340 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
341 IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
344 struct sys_timer kirkwood_timer = {
345 .init = kirkwood_timer_init,
348 /*****************************************************************************
350 ****************************************************************************/
351 static struct resource kirkwood_i2s_resources[] = {
353 .start = AUDIO_PHYS_BASE,
354 .end = AUDIO_PHYS_BASE + SZ_16K - 1,
355 .flags = IORESOURCE_MEM,
358 .start = IRQ_KIRKWOOD_I2S,
359 .end = IRQ_KIRKWOOD_I2S,
360 .flags = IORESOURCE_IRQ,
364 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
368 static struct platform_device kirkwood_i2s_device = {
369 .name = "kirkwood-i2s",
371 .num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
372 .resource = kirkwood_i2s_resources,
374 .platform_data = &kirkwood_i2s_data,
378 static struct platform_device kirkwood_pcm_device = {
379 .name = "kirkwood-pcm-audio",
383 void __init kirkwood_audio_init(void)
385 kirkwood_clk_ctrl |= CGC_AUDIO;
386 platform_device_register(&kirkwood_i2s_device);
387 platform_device_register(&kirkwood_pcm_device);
390 /*****************************************************************************
392 ****************************************************************************/
394 * Identify device ID and revision.
396 char * __init kirkwood_id(void)
400 kirkwood_pcie_id(&dev, &rev);
402 if (dev == MV88F6281_DEV_ID) {
403 if (rev == MV88F6281_REV_Z0)
404 return "MV88F6281-Z0";
405 else if (rev == MV88F6281_REV_A0)
406 return "MV88F6281-A0";
407 else if (rev == MV88F6281_REV_A1)
408 return "MV88F6281-A1";
410 return "MV88F6281-Rev-Unsupported";
411 } else if (dev == MV88F6192_DEV_ID) {
412 if (rev == MV88F6192_REV_Z0)
413 return "MV88F6192-Z0";
414 else if (rev == MV88F6192_REV_A0)
415 return "MV88F6192-A0";
416 else if (rev == MV88F6192_REV_A1)
417 return "MV88F6192-A1";
419 return "MV88F6192-Rev-Unsupported";
420 } else if (dev == MV88F6180_DEV_ID) {
421 if (rev == MV88F6180_REV_A0)
422 return "MV88F6180-Rev-A0";
423 else if (rev == MV88F6180_REV_A1)
424 return "MV88F6180-Rev-A1";
426 return "MV88F6180-Rev-Unsupported";
427 } else if (dev == MV88F6282_DEV_ID) {
428 if (rev == MV88F6282_REV_A0)
429 return "MV88F6282-Rev-A0";
430 else if (rev == MV88F6282_REV_A1)
431 return "MV88F6282-Rev-A1";
433 return "MV88F6282-Rev-Unsupported";
435 return "Device-Unknown";
439 void __init kirkwood_l2_init(void)
441 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
442 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
445 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
450 void __init kirkwood_init(void)
452 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
453 kirkwood_id(), kirkwood_tclk);
456 * Disable propagation of mbus errors to the CPU local bus,
457 * as this causes mbus errors (which can occur for example
458 * for PCI aborts) to throw CPU aborts, which we're not set
461 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
463 kirkwood_setup_cpu_mbus();
465 #ifdef CONFIG_CACHE_FEROCEON_L2
469 /* internal devices that every board has */
472 kirkwood_xor0_init();
473 kirkwood_xor1_init();
474 kirkwood_crypto_init();
477 kexec_reinit = kirkwood_enable_pcie;
481 static int __init kirkwood_clock_gate(void)
483 unsigned int curr = readl(CLOCK_GATING_CTRL);
487 struct device_node *np;
489 kirkwood_pcie_id(&dev, &rev);
490 printk(KERN_DEBUG "Gating clock of unused units\n");
491 printk(KERN_DEBUG "before: 0x%08x\n", curr);
493 /* Make sure those units are accessible */
494 writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
497 np = of_find_compatible_node(NULL, NULL, "mrvl,orion-nand");
498 if (np && of_device_is_available(np)) {
499 kirkwood_clk_ctrl |= CGC_RUNIT;
504 /* For SATA: first shutdown the phy */
505 if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
506 /* Disable PLL and IVREF */
507 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
509 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
511 if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
512 /* Disable PLL and IVREF */
513 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
515 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
518 /* For PCIe: first shutdown the phy */
519 if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
520 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
522 if (readl(PCIE_STATUS) & 0x1)
524 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
527 /* For PCIe 1: first shutdown the phy */
528 if (dev == MV88F6282_DEV_ID) {
529 if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
530 writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
532 if (readl(PCIE1_STATUS) & 0x1)
534 writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
536 } else /* keep this bit set for devices that don't have PCIe1 */
537 kirkwood_clk_ctrl |= CGC_PEX1;
539 /* Now gate clock the required units */
540 writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
541 printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
545 late_initcall(kirkwood_clock_gate);
547 void kirkwood_restart(char mode, const char *cmd)
550 * Enable soft reset to assert RSTOUTn.
552 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
557 writel(SOFT_RESET, SYSTEM_SOFT_RESET);