2 * arch/arm/mach-spear3xx/include/mach/spear.h
4 * SPEAr3xx Machine family specific definition
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #ifndef __MACH_SPEAR3XX_H
15 #define __MACH_SPEAR3XX_H
17 #include <asm/memory.h>
19 /* ICM1 - Low speed connection */
20 #define SPEAR3XX_ICM1_2_BASE UL(0xD0000000)
21 #define VA_SPEAR3XX_ICM1_2_BASE UL(0xFD000000)
22 #define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000)
23 #define VA_SPEAR3XX_ICM1_UART_BASE (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE)
24 #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
26 /* ML1 - Multi Layer CPU Subsystem */
27 #define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000)
28 #define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
29 #define SPEAR3XX_CPU_TMR_BASE UL(0xF0000000)
31 /* ICM3 - Basic Subsystem */
32 #define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
33 #define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
34 #define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000)
35 #define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
36 #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE)
37 #define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
38 #define VA_SPEAR3XX_ICM3_MISC_REG_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE)
40 /* Debug uart for linux, will be used for debug and uncompress messages */
41 #define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE
42 #define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE
44 /* Sysctl base for spear platform */
45 #define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE
46 #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
48 #endif /* __MACH_SPEAR3XX_H */