arch/arm/mach-tegra/cpuidle-tegra30.c

   1 /*
   2  * CPU idle driver for Tegra CPUs
   3  *
   4  * Copyright (c) 2010-2012, NVIDIA Corporation.
   5  * Copyright (c) 2011 Google, Inc.
   6  * Author: Colin Cross <ccross@android.com>
   7  *         Gary King <gking@nvidia.com>
   8  *
   9  * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/cpuidle.h>
  25 #include <linux/cpu_pm.h>
  26 #include <linux/clockchips.h>
  27 #include <linux/clk/tegra.h>
  28
  29 #include <asm/cpuidle.h>
  30 #include <asm/proc-fns.h>
  31 #include <asm/suspend.h>
  32 #include <asm/smp_plat.h>
  33
  34 #include "pm.h"
  35 #include "sleep.h"
  36
  37 #ifdef CONFIG_PM_SLEEP
  38 static int tegra30_idle_lp2(struct cpuidle_device *dev,
  39                             struct cpuidle_driver *drv,
  40                             int index);
  41 #endif
  42
  43 static struct cpuidle_driver tegra_idle_driver = {
  44         .name = "tegra_idle",
  45         .owner = THIS_MODULE,
  46 #ifdef CONFIG_PM_SLEEP
  47         .state_count = 2,
  48 #else
  49         .state_count = 1,
  50 #endif
  51         .states = {
  52                 [0] = ARM_CPUIDLE_WFI_STATE_PWR(600),
  53 #ifdef CONFIG_PM_SLEEP
  54                 [1] = {
  55                         .enter                  = tegra30_idle_lp2,
  56                         .exit_latency           = 2000,
  57                         .target_residency       = 2200,
  58                         .power_usage            = 0,
  59                         .flags                  = CPUIDLE_FLAG_TIME_VALID,
  60                         .name                   = "powered-down",
  61                         .desc                   = "CPU power gated",
  62                 },
  63 #endif
  64         },
  65 };
  66
  67 static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device);
  68
  69 #ifdef CONFIG_PM_SLEEP
  70 static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev,
  71                                            struct cpuidle_driver *drv,
  72                                            int index)
  73 {
  74         struct cpuidle_state *state = &drv->states[index];
  75         u32 cpu_on_time = state->exit_latency;
  76         u32 cpu_off_time = state->target_residency - state->exit_latency;
  77
  78         /* All CPUs entering LP2 is not working.
  79          * Don't let CPU0 enter LP2 when any secondary CPU is online.
  80          */
  81         if (num_online_cpus() > 1 || !tegra_cpu_rail_off_ready()) {
  82                 cpu_do_idle();
  83                 return false;
  84         }
  85
  86         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
  87
  88         tegra_idle_lp2_last(cpu_on_time, cpu_off_time);
  89
  90         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
  91
  92         return true;
  93 }
  94
  95 #ifdef CONFIG_SMP
  96 static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev,
  97                                         struct cpuidle_driver *drv,
  98                                         int index)
  99 {
 100         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
 101
 102         smp_wmb();
 103
 104         save_cpu_arch_register();
 105
 106         cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
 107
 108         restore_cpu_arch_register();
 109
 110         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
 111
 112         return true;
 113 }
 114 #else
 115 static inline bool tegra30_cpu_core_power_down(struct cpuidle_device *dev,
 116                                                struct cpuidle_driver *drv,
 117                                                int index)
 118 {
 119         return true;
 120 }
 121 #endif
 122
 123 static int tegra30_idle_lp2(struct cpuidle_device *dev,
 124                             struct cpuidle_driver *drv,
 125                             int index)
 126 {
 127         u32 cpu = is_smp() ? cpu_logical_map(dev->cpu) : dev->cpu;
 128         bool entered_lp2 = false;
 129         bool last_cpu;
 130
 131         local_fiq_disable();
 132
 133         last_cpu = tegra_set_cpu_in_lp2(cpu);
 134         cpu_pm_enter();
 135
 136         if (cpu == 0) {
 137                 if (last_cpu)
 138                         entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv,
 139                                                                      index);
 140                 else
 141                         cpu_do_idle();
 142         } else {
 143                 entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index);
 144         }
 145
 146         cpu_pm_exit();
 147         tegra_clear_cpu_in_lp2(cpu);
 148
 149         local_fiq_enable();
 150
 151         smp_rmb();
 152
 153         return (entered_lp2) ? index : 0;
 154 }
 155 #endif
 156
 157 int __init tegra30_cpuidle_init(void)
 158 {
 159         int ret;
 160         unsigned int cpu;
 161         struct cpuidle_device *dev;
 162         struct cpuidle_driver *drv = &tegra_idle_driver;
 163
 164 #ifdef CONFIG_PM_SLEEP
 165         tegra_tear_down_cpu = tegra30_tear_down_cpu;
 166 #endif
 167
 168         ret = cpuidle_register_driver(&tegra_idle_driver);
 169         if (ret) {
 170                 pr_err("CPUidle driver registration failed\n");
 171                 return ret;
 172         }
 173
 174         for_each_possible_cpu(cpu) {
 175                 dev = &per_cpu(tegra_idle_device, cpu);
 176                 dev->cpu = cpu;
 177
 178                 ret = cpuidle_register_device(dev);
 179                 if (ret) {
 180                         pr_err("CPU%u: CPUidle device registration failed\n",
 181                                 cpu);
 182                         return ret;
 183                 }
 184         }
 185         return 0;
 186 }