2 * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #ifndef __ASM_CPUFEATURE_H
10 #define __ASM_CPUFEATURE_H
12 #include <asm/hwcap.h>
13 #include <asm/sysreg.h>
16 * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
17 * in the kernel and for user space to keep track of which optional features
18 * are supported by the current system. So let's map feature 'x' to HWCAP_x.
19 * Note that HWCAP_x constants are bit fields so we need to take the log.
22 #define MAX_CPU_FEATURES (8 * sizeof(elf_hwcap))
23 #define cpu_feature(x) ilog2(HWCAP_ ## x)
25 #define ARM64_WORKAROUND_CLEAN_CACHE 0
26 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1
27 #define ARM64_WORKAROUND_845719 2
28 #define ARM64_HAS_SYSREG_GIC_CPUIF 3
29 #define ARM64_HAS_PAN 4
30 #define ARM64_HAS_LSE_ATOMICS 5
31 #define ARM64_WORKAROUND_CAVIUM_23154 6
32 #define ARM64_WORKAROUND_834220 7
33 #define ARM64_HAS_NO_HW_PREFETCH 8
34 #define ARM64_HAS_UAO 9
35 #define ARM64_ALT_PAN_NOT_UAO 10
37 #define ARM64_WORKAROUND_CAVIUM_27456 11
38 #define ARM64_HAS_VIRT_HOST_EXTN 12
39 #define ARM64_HARDEN_BRANCH_PREDICTOR 13
40 #define ARM64_UNMAP_KERNEL_AT_EL0 14
41 #define ARM64_HAS_32BIT_EL0 15
42 #define ARM64_NCAPS 16
46 #include <linux/kernel.h>
48 extern const char *machine_name;
50 /* CPU feature register tracking */
52 FTR_EXACT, /* Use a predefined safe value */
53 FTR_LOWER_SAFE, /* Smaller value is safe */
54 FTR_HIGHER_SAFE, /* Bigger value is safe */
55 FTR_HIGHER_OR_ZERO_SAFE, /* Bigger value is safe, but 0 is biggest */
58 #define FTR_STRICT true /* SANITY check strict matching required */
59 #define FTR_NONSTRICT false /* SANITY check ignored */
61 #define FTR_SIGNED true /* Value should be treated as signed */
62 #define FTR_UNSIGNED false /* Value should be treated as unsigned */
64 struct arm64_ftr_bits {
65 bool sign; /* Value is signed ? */
66 bool strict; /* CPU Sanity check: strict matching required ? */
70 s64 safe_val; /* safe value for discrete features */
74 * @arm64_ftr_reg - Feature register
75 * @strict_mask Bits which should match across all CPUs for sanity.
76 * @sys_val Safe value across the CPUs (system view)
78 struct arm64_ftr_reg {
83 struct arm64_ftr_bits *ftr_bits;
86 struct arm64_cpu_capabilities {
89 bool (*matches)(const struct arm64_cpu_capabilities *);
90 int (*enable)(void *); /* Called on all active CPUs */
92 struct { /* To be used for erratum handling only */
94 u32 midr_range_min, midr_range_max;
97 struct { /* Feature register checking */
107 extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
109 static inline bool cpu_have_feature(unsigned int num)
111 return elf_hwcap & (1UL << num);
114 static inline bool cpus_have_cap(unsigned int num)
116 if (num >= ARM64_NCAPS)
118 return test_bit(num, cpu_hwcaps);
121 static inline void cpus_set_cap(unsigned int num)
123 if (num >= ARM64_NCAPS)
124 pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
127 __set_bit(num, cpu_hwcaps);
130 static inline int __attribute_const__
131 cpuid_feature_extract_field_width(u64 features, int field, int width)
133 return (s64)(features << (64 - width - field)) >> (64 - width);
136 static inline int __attribute_const__
137 cpuid_feature_extract_field(u64 features, int field)
139 return cpuid_feature_extract_field_width(features, field, 4);
142 static inline unsigned int __attribute_const__
143 cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
145 return (u64)(features << (64 - width - field)) >> (64 - width);
148 static inline unsigned int __attribute_const__
149 cpuid_feature_extract_unsigned_field(u64 features, int field)
151 return cpuid_feature_extract_unsigned_field_width(features, field, 4);
154 static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
156 return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
159 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
162 cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) :
163 cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width);
166 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
168 return cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
169 cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
172 void __init setup_cpu_features(void);
174 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
176 void enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps);
177 void check_local_cpu_errata(void);
178 void __init enable_errata_workarounds(void);
180 #ifdef CONFIG_HOTPLUG_CPU
181 void verify_local_cpu_capabilities(void);
183 static inline void verify_local_cpu_capabilities(void)
188 u64 read_system_reg(u32 id);
190 static inline bool cpu_supports_mixed_endian_el0(void)
192 return id_aa64mmfr0_mixed_endian_el0(read_cpuid(SYS_ID_AA64MMFR0_EL1));
195 static inline bool system_supports_32bit_el0(void)
197 return cpus_have_cap(ARM64_HAS_32BIT_EL0);
200 static inline bool system_supports_mixed_endian_el0(void)
202 return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
205 static inline bool system_uses_ttbr0_pan(void)
207 return IS_ENABLED(CONFIG_ARM64_SW_TTBR0_PAN) &&
208 !cpus_have_cap(ARM64_HAS_PAN);
211 #endif /* __ASSEMBLY__ */