arch/arm64/include/asm/processor.h

   1 /*
   2  * Based on arch/arm/include/asm/processor.h
   3  *
   4  * Copyright (C) 1995-1999 Russell King
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #ifndef __ASM_PROCESSOR_H
  20 #define __ASM_PROCESSOR_H
  21
  22 #define KERNEL_DS               UL(-1)
  23 #define USER_DS                 ((UL(1) << MAX_USER_VA_BITS) - 1)
  24
  25 /*
  26  * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
  27  * no point in shifting all network buffers by 2 bytes just to make some IP
  28  * header fields appear aligned in memory, potentially sacrificing some DMA
  29  * performance on some platforms.
  30  */
  31 #define NET_IP_ALIGN    0
  32
  33 #ifndef __ASSEMBLY__
  34 #ifdef __KERNEL__
  35
  36 #include <linux/build_bug.h>
  37 #include <linux/cache.h>
  38 #include <linux/init.h>
  39 #include <linux/stddef.h>
  40 #include <linux/string.h>
  41
  42 #include <asm/alternative.h>
  43 #include <asm/cpufeature.h>
  44 #include <asm/hw_breakpoint.h>
  45 #include <asm/lse.h>
  46 #include <asm/pgtable-hwdef.h>
  47 #include <asm/ptrace.h>
  48 #include <asm/types.h>
  49
  50 /*
  51  * TASK_SIZE - the maximum size of a user space task.
  52  * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
  53  */
  54
  55 #define DEFAULT_MAP_WINDOW_64   (UL(1) << VA_BITS)
  56 #define TASK_SIZE_64            (UL(1) << vabits_user)
  57
  58 #ifdef CONFIG_COMPAT
  59 #define TASK_SIZE_32            UL(0x100000000)
  60 #define TASK_SIZE               (test_thread_flag(TIF_32BIT) ? \
  61                                 TASK_SIZE_32 : TASK_SIZE_64)
  62 #define TASK_SIZE_OF(tsk)       (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
  63                                 TASK_SIZE_32 : TASK_SIZE_64)
  64 #define DEFAULT_MAP_WINDOW      (test_thread_flag(TIF_32BIT) ? \
  65                                 TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
  66 #else
  67 #define TASK_SIZE               TASK_SIZE_64
  68 #define DEFAULT_MAP_WINDOW      DEFAULT_MAP_WINDOW_64
  69 #endif /* CONFIG_COMPAT */
  70
  71 #ifdef CONFIG_ARM64_FORCE_52BIT
  72 #define STACK_TOP_MAX           TASK_SIZE_64
  73 #define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 4))
  74 #else
  75 #define STACK_TOP_MAX           DEFAULT_MAP_WINDOW_64
  76 #define TASK_UNMAPPED_BASE      (PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
  77 #endif /* CONFIG_ARM64_FORCE_52BIT */
  78
  79 #ifdef CONFIG_COMPAT
  80 #define AARCH32_VECTORS_BASE    0xffff0000
  81 #define STACK_TOP               (test_thread_flag(TIF_32BIT) ? \
  82                                 AARCH32_VECTORS_BASE : STACK_TOP_MAX)
  83 #else
  84 #define STACK_TOP               STACK_TOP_MAX
  85 #endif /* CONFIG_COMPAT */
  86
  87 #ifndef CONFIG_ARM64_FORCE_52BIT
  88 #define arch_get_mmap_end(addr) ((addr > DEFAULT_MAP_WINDOW) ? TASK_SIZE :\
  89                                 DEFAULT_MAP_WINDOW)
  90
  91 #define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
  92                                         base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
  93                                         base)
  94 #endif /* CONFIG_ARM64_FORCE_52BIT */
  95
  96 extern phys_addr_t arm64_dma_phys_limit;
  97 #define ARCH_LOW_ADDRESS_LIMIT  (arm64_dma_phys_limit - 1)
  98
  99 struct debug_info {
 100 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 101         /* Have we suspended stepping by a debugger? */
 102         int                     suspended_step;
 103         /* Allow breakpoints and watchpoints to be disabled for this thread. */
 104         int                     bps_disabled;
 105         int                     wps_disabled;
 106         /* Hardware breakpoints pinned to this task. */
 107         struct perf_event       *hbp_break[ARM_MAX_BRP];
 108         struct perf_event       *hbp_watch[ARM_MAX_WRP];
 109 #endif
 110 };
 111
 112 struct cpu_context {
 113         unsigned long x19;
 114         unsigned long x20;
 115         unsigned long x21;
 116         unsigned long x22;
 117         unsigned long x23;
 118         unsigned long x24;
 119         unsigned long x25;
 120         unsigned long x26;
 121         unsigned long x27;
 122         unsigned long x28;
 123         unsigned long fp;
 124         unsigned long sp;
 125         unsigned long pc;
 126 };
 127
 128 struct thread_struct {
 129         struct cpu_context      cpu_context;    /* cpu context */
 130
 131         /*
 132          * Whitelisted fields for hardened usercopy:
 133          * Maintainers must ensure manually that this contains no
 134          * implicit padding.
 135          */
 136         struct {
 137                 unsigned long   tp_value;       /* TLS register */
 138                 unsigned long   tp2_value;
 139                 struct user_fpsimd_state fpsimd_state;
 140         } uw;
 141
 142         unsigned int            fpsimd_cpu;
 143         void                    *sve_state;     /* SVE registers, if any */
 144         unsigned int            sve_vl;         /* SVE vector length */
 145         unsigned int            sve_vl_onexec;  /* SVE vl after next exec */
 146         unsigned long           fault_address;  /* fault info */
 147         unsigned long           fault_code;     /* ESR_EL1 value */
 148         struct debug_info       debug;          /* debugging */
 149 };
 150
 151 static inline void arch_thread_struct_whitelist(unsigned long *offset,
 152                                                 unsigned long *size)
 153 {
 154         /* Verify that there is no padding among the whitelisted fields: */
 155         BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
 156                      sizeof_field(struct thread_struct, uw.tp_value) +
 157                      sizeof_field(struct thread_struct, uw.tp2_value) +
 158                      sizeof_field(struct thread_struct, uw.fpsimd_state));
 159
 160         *offset = offsetof(struct thread_struct, uw);
 161         *size = sizeof_field(struct thread_struct, uw);
 162 }
 163
 164 #ifdef CONFIG_COMPAT
 165 #define task_user_tls(t)                                                \
 166 ({                                                                      \
 167         unsigned long *__tls;                                           \
 168         if (is_compat_thread(task_thread_info(t)))                      \
 169                 __tls = &(t)->thread.uw.tp2_value;                      \
 170         else                                                            \
 171                 __tls = &(t)->thread.uw.tp_value;                       \
 172         __tls;                                                          \
 173  })
 174 #else
 175 #define task_user_tls(t)        (&(t)->thread.uw.tp_value)
 176 #endif
 177
 178 /* Sync TPIDR_EL0 back to thread_struct for current */
 179 void tls_preserve_current_state(void);
 180
 181 #define INIT_THREAD {                           \
 182         .fpsimd_cpu = NR_CPUS,                  \
 183 }
 184
 185 static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
 186 {
 187         memset(regs, 0, sizeof(*regs));
 188         forget_syscall(regs);
 189         regs->pc = pc;
 190 }
 191
 192 static inline void start_thread(struct pt_regs *regs, unsigned long pc,
 193                                 unsigned long sp)
 194 {
 195         start_thread_common(regs, pc);
 196         regs->pstate = PSR_MODE_EL0t;
 197
 198         if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)
 199                 regs->pstate |= PSR_SSBS_BIT;
 200
 201         regs->sp = sp;
 202 }
 203
 204 #ifdef CONFIG_COMPAT
 205 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
 206                                        unsigned long sp)
 207 {
 208         start_thread_common(regs, pc);
 209         regs->pstate = PSR_AA32_MODE_USR;
 210         if (pc & 1)
 211                 regs->pstate |= PSR_AA32_T_BIT;
 212
 213 #ifdef __AARCH64EB__
 214         regs->pstate |= PSR_AA32_E_BIT;
 215 #endif
 216
 217         if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)
 218                 regs->pstate |= PSR_AA32_SSBS_BIT;
 219
 220         regs->compat_sp = sp;
 221 }
 222 #endif
 223
 224 /* Forward declaration, a strange C thing */
 225 struct task_struct;
 226
 227 /* Free all resources held by a thread. */
 228 extern void release_thread(struct task_struct *);
 229
 230 unsigned long get_wchan(struct task_struct *p);
 231
 232 static inline void cpu_relax(void)
 233 {
 234         asm volatile("yield" ::: "memory");
 235 }
 236
 237 /* Thread switching */
 238 extern struct task_struct *cpu_switch_to(struct task_struct *prev,
 239                                          struct task_struct *next);
 240
 241 #define task_pt_regs(p) \
 242         ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
 243
 244 #define KSTK_EIP(tsk)   ((unsigned long)task_pt_regs(tsk)->pc)
 245 #define KSTK_ESP(tsk)   user_stack_pointer(task_pt_regs(tsk))
 246
 247 /*
 248  * Prefetching support
 249  */
 250 #define ARCH_HAS_PREFETCH
 251 static inline void prefetch(const void *ptr)
 252 {
 253         asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
 254 }
 255
 256 #define ARCH_HAS_PREFETCHW
 257 static inline void prefetchw(const void *ptr)
 258 {
 259         asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
 260 }
 261
 262 #define ARCH_HAS_SPINLOCK_PREFETCH
 263 static inline void spin_lock_prefetch(const void *ptr)
 264 {
 265         asm volatile(ARM64_LSE_ATOMIC_INSN(
 266                      "prfm pstl1strm, %a0",
 267                      "nop") : : "p" (ptr));
 268 }
 269
 270 #define HAVE_ARCH_PICK_MMAP_LAYOUT
 271
 272 #endif
 273
 274 extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
 275 extern void __init minsigstksz_setup(void);
 276
 277 /*
 278  * Not at the top of the file due to a direct #include cycle between
 279  * <asm/fpsimd.h> and <asm/processor.h>.  Deferring this #include
 280  * ensures that contents of processor.h are visible to fpsimd.h even if
 281  * processor.h is included first.
 282  *
 283  * These prctl helpers are the only things in this file that require
 284  * fpsimd.h.  The core code expects them to be in this header.
 285  */
 286 #include <asm/fpsimd.h>
 287
 288 /* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
 289 #define SVE_SET_VL(arg) sve_set_current_vl(arg)
 290 #define SVE_GET_VL()    sve_get_current_vl()
 291
 292 /*
 293  * For CONFIG_GCC_PLUGIN_STACKLEAK
 294  *
 295  * These need to be macros because otherwise we get stuck in a nightmare
 296  * of header definitions for the use of task_stack_page.
 297  */
 298
 299 #define current_top_of_stack()                                                  \
 300 ({                                                                              \
 301         struct stack_info _info;                                                \
 302         BUG_ON(!on_accessible_stack(current, current_stack_pointer, &_info));   \
 303         _info.high;                                                             \
 304 })
 305 #define on_thread_stack()       (on_task_stack(current, current_stack_pointer, NULL))
 306
 307 #endif /* __ASSEMBLY__ */
 308 #endif /* __ASM_PROCESSOR_H */