2 * Low-level exception handling code
4 * Copyright (C) 2012 ARM Ltd.
5 * Authors: Catalin Marinas <catalin.marinas@arm.com>
6 * Will Deacon <will.deacon@arm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/init.h>
22 #include <linux/linkage.h>
24 #include <asm/alternative.h>
25 #include <asm/assembler.h>
26 #include <asm/asm-offsets.h>
27 #include <asm/cpufeature.h>
28 #include <asm/errno.h>
31 #include <asm/memory.h>
33 #include <asm/processor.h>
34 #include <asm/thread_info.h>
35 #include <asm/asm-uaccess.h>
36 #include <asm/unistd.h>
37 #include <asm/kernel-pgtable.h>
40 * Context tracking subsystem. Used to instrument transitions
41 * between user and kernel mode.
43 .macro ct_user_exit, syscall = 0
44 #ifdef CONFIG_CONTEXT_TRACKING
45 bl context_tracking_user_exit
48 * Save/restore needed during syscalls. Restore syscall arguments from
49 * the values already saved on stack during kernel_entry.
52 ldp x2, x3, [sp, #S_X2]
53 ldp x4, x5, [sp, #S_X4]
54 ldp x6, x7, [sp, #S_X6]
60 #ifdef CONFIG_CONTEXT_TRACKING
61 bl context_tracking_user_enter
74 .macro kernel_ventry, el, label, regsize = 64
76 #ifdef CONFIG_UNMAP_KERNEL_AT_EL0
77 alternative_if ARM64_UNMAP_KERNEL_AT_EL0
86 alternative_else_nop_endif
89 sub sp, sp, #S_FRAME_SIZE
93 .macro tramp_alias, dst, sym
94 mov_q \dst, TRAMP_VALIAS
95 add \dst, \dst, #(\sym - .entry.tramp.text)
98 .macro kernel_entry, el, regsize = 64
100 mov w0, w0 // zero upper 32 bits of x0
102 stp x0, x1, [sp, #16 * 0]
103 stp x2, x3, [sp, #16 * 1]
104 stp x4, x5, [sp, #16 * 2]
105 stp x6, x7, [sp, #16 * 3]
106 stp x8, x9, [sp, #16 * 4]
107 stp x10, x11, [sp, #16 * 5]
108 stp x12, x13, [sp, #16 * 6]
109 stp x14, x15, [sp, #16 * 7]
110 stp x16, x17, [sp, #16 * 8]
111 stp x18, x19, [sp, #16 * 9]
112 stp x20, x21, [sp, #16 * 10]
113 stp x22, x23, [sp, #16 * 11]
114 stp x24, x25, [sp, #16 * 12]
115 stp x26, x27, [sp, #16 * 13]
116 stp x28, x29, [sp, #16 * 14]
121 and tsk, tsk, #~(THREAD_SIZE - 1) // Ensure MDSCR_EL1.SS is clear,
122 ldr x19, [tsk, #TI_FLAGS] // since we can unmask debug
123 disable_step_tsk x19, x20 // exceptions when scheduling.
125 mov x29, xzr // fp pointed to user-space
127 add x21, sp, #S_FRAME_SIZE
129 /* Save the task's original addr_limit and set USER_DS */
130 ldr x20, [tsk, #TI_ADDR_LIMIT]
131 str x20, [sp, #S_ORIG_ADDR_LIMIT]
133 str x20, [tsk, #TI_ADDR_LIMIT]
134 /* No need to reset PSTATE.UAO, hardware's already set it to 0 for us */
135 .endif /* \el == 0 */
138 stp lr, x21, [sp, #S_LR]
139 stp x22, x23, [sp, #S_PC]
142 * Set syscallno to -1 by default (overridden later if real syscall).
146 str x21, [sp, #S_SYSCALLNO]
150 * Set sp_el0 to current thread_info.
157 * Registers that may be useful after this macro is invoked:
161 * x23 - aborted PSTATE
165 .macro kernel_exit, el
167 /* Restore the task's original addr_limit. */
168 ldr x20, [sp, #S_ORIG_ADDR_LIMIT]
169 str x20, [tsk, #TI_ADDR_LIMIT]
171 /* No need to restore UAO, it will be restored from SPSR_EL1 */
174 ldp x21, x22, [sp, #S_PC] // load ELR, SPSR
177 ldr x23, [sp, #S_SP] // load return stack pointer
179 tst x22, #PSR_MODE32_BIT // native task?
182 #ifdef CONFIG_ARM64_ERRATUM_845719
183 alternative_if ARM64_WORKAROUND_845719
184 #ifdef CONFIG_PID_IN_CONTEXTIDR
185 mrs x29, contextidr_el1
186 msr contextidr_el1, x29
188 msr contextidr_el1, xzr
190 alternative_else_nop_endif
194 msr elr_el1, x21 // set up the return data
196 ldp x0, x1, [sp, #16 * 0]
197 ldp x2, x3, [sp, #16 * 1]
198 ldp x4, x5, [sp, #16 * 2]
199 ldp x6, x7, [sp, #16 * 3]
200 ldp x8, x9, [sp, #16 * 4]
201 ldp x10, x11, [sp, #16 * 5]
202 ldp x12, x13, [sp, #16 * 6]
203 ldp x14, x15, [sp, #16 * 7]
204 ldp x16, x17, [sp, #16 * 8]
205 ldp x18, x19, [sp, #16 * 9]
206 ldp x20, x21, [sp, #16 * 10]
207 ldp x22, x23, [sp, #16 * 11]
208 ldp x24, x25, [sp, #16 * 12]
209 ldp x26, x27, [sp, #16 * 13]
210 ldp x28, x29, [sp, #16 * 14]
212 add sp, sp, #S_FRAME_SIZE // restore sp
215 alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0
216 #ifdef CONFIG_UNMAP_KERNEL_AT_EL0
219 tramp_alias x30, tramp_exit_native
222 tramp_alias x30, tramp_exit_compat
230 .macro get_thread_info, rd
234 .macro irq_stack_entry
235 mov x19, sp // preserve the original sp
238 * Compare sp with the current thread_info, if the top
239 * ~(THREAD_SIZE - 1) bits match, we are on a task stack, and
240 * should switch to the irq stack.
242 and x25, x19, #~(THREAD_SIZE - 1)
246 this_cpu_ptr irq_stack, x25, x26
247 mov x26, #IRQ_STACK_START_SP
250 /* switch to the irq stack */
254 * Add a dummy stack frame, this non-standard format is fixed up
257 stp x29, x19, [sp, #-16]!
264 * x19 should be preserved between irq_stack_entry and
267 .macro irq_stack_exit
272 * These are the registers used in the syscall handler, and allow us to
273 * have in theory up to 7 arguments to a function - x0 to x6.
275 * x7 is reserved for the system call number in 32-bit mode.
277 sc_nr .req x25 // number of system calls
278 scno .req x26 // syscall number
279 stbl .req x27 // syscall table pointer
280 tsk .req x28 // current thread_info
283 * Interrupt handling.
286 ldr_l x1, handle_arch_irq
298 .pushsection ".entry.text", "ax"
302 kernel_ventry 1, sync_invalid // Synchronous EL1t
303 kernel_ventry 1, irq_invalid // IRQ EL1t
304 kernel_ventry 1, fiq_invalid // FIQ EL1t
305 kernel_ventry 1, error_invalid // Error EL1t
307 kernel_ventry 1, sync // Synchronous EL1h
308 kernel_ventry 1, irq // IRQ EL1h
309 kernel_ventry 1, fiq_invalid // FIQ EL1h
310 kernel_ventry 1, error_invalid // Error EL1h
312 kernel_ventry 0, sync // Synchronous 64-bit EL0
313 kernel_ventry 0, irq // IRQ 64-bit EL0
314 kernel_ventry 0, fiq_invalid // FIQ 64-bit EL0
315 kernel_ventry 0, error_invalid // Error 64-bit EL0
318 kernel_ventry 0, sync_compat, 32 // Synchronous 32-bit EL0
319 kernel_ventry 0, irq_compat, 32 // IRQ 32-bit EL0
320 kernel_ventry 0, fiq_invalid_compat, 32 // FIQ 32-bit EL0
321 kernel_ventry 0, error_invalid_compat, 32 // Error 32-bit EL0
323 kernel_ventry 0, sync_invalid, 32 // Synchronous 32-bit EL0
324 kernel_ventry 0, irq_invalid, 32 // IRQ 32-bit EL0
325 kernel_ventry 0, fiq_invalid, 32 // FIQ 32-bit EL0
326 kernel_ventry 0, error_invalid, 32 // Error 32-bit EL0
331 * Invalid mode handlers
333 .macro inv_entry, el, reason, regsize = 64
334 kernel_entry \el, \regsize
342 inv_entry 0, BAD_SYNC
343 ENDPROC(el0_sync_invalid)
347 ENDPROC(el0_irq_invalid)
351 ENDPROC(el0_fiq_invalid)
354 inv_entry 0, BAD_ERROR
355 ENDPROC(el0_error_invalid)
358 el0_fiq_invalid_compat:
359 inv_entry 0, BAD_FIQ, 32
360 ENDPROC(el0_fiq_invalid_compat)
362 el0_error_invalid_compat:
363 inv_entry 0, BAD_ERROR, 32
364 ENDPROC(el0_error_invalid_compat)
368 inv_entry 1, BAD_SYNC
369 ENDPROC(el1_sync_invalid)
373 ENDPROC(el1_irq_invalid)
377 ENDPROC(el1_fiq_invalid)
380 inv_entry 1, BAD_ERROR
381 ENDPROC(el1_error_invalid)
389 mrs x1, esr_el1 // read the syndrome register
390 lsr x24, x1, #ESR_ELx_EC_SHIFT // exception class
391 cmp x24, #ESR_ELx_EC_DABT_CUR // data abort in EL1
393 cmp x24, #ESR_ELx_EC_IABT_CUR // instruction abort in EL1
395 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
397 cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
399 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
401 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL1
403 cmp x24, #ESR_ELx_EC_BREAKPT_CUR // debug exception in EL1
409 * Fall through to the Data abort case
413 * Data abort handling
417 // re-enable interrupts if they were enabled in the aborted context
418 tbnz x23, #7, 1f // PSR_I_BIT
421 clear_address_tag x0, x3
422 mov x2, sp // struct pt_regs
425 // disable interrupts before pulling preserved data off the stack
430 * Stack or PC alignment exception handling
438 * Undefined instruction
445 * Debug exception handling
447 cmp x24, #ESR_ELx_EC_BRK64 // if BRK64
448 cinc x24, x24, eq // set bit '0'
449 tbz x24, #0, el1_inv // EL1 only
451 mov x2, sp // struct pt_regs
452 bl do_debug_exception
455 // TODO: add support for undefined instructions in kernel mode
467 #ifdef CONFIG_TRACE_IRQFLAGS
468 bl trace_hardirqs_off
473 #ifdef CONFIG_PREEMPT
474 ldr w24, [tsk, #TI_PREEMPT] // get preempt count
475 cbnz w24, 1f // preempt count != 0
476 ldr x0, [tsk, #TI_FLAGS] // get flags
477 tbz x0, #TIF_NEED_RESCHED, 1f // needs rescheduling?
481 #ifdef CONFIG_TRACE_IRQFLAGS
487 #ifdef CONFIG_PREEMPT
490 1: bl preempt_schedule_irq // irq en/disable is done inside
491 ldr x0, [tsk, #TI_FLAGS] // get new tasks TI_FLAGS
492 tbnz x0, #TIF_NEED_RESCHED, 1b // needs rescheduling?
502 mrs x25, esr_el1 // read the syndrome register
503 lsr x24, x25, #ESR_ELx_EC_SHIFT // exception class
504 cmp x24, #ESR_ELx_EC_SVC64 // SVC in 64-bit state
506 cmp x24, #ESR_ELx_EC_DABT_LOW // data abort in EL0
508 cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
510 cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
512 cmp x24, #ESR_ELx_EC_FP_EXC64 // FP/ASIMD exception
514 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
516 cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
518 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
520 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
522 cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0
530 mrs x25, esr_el1 // read the syndrome register
531 lsr x24, x25, #ESR_ELx_EC_SHIFT // exception class
532 cmp x24, #ESR_ELx_EC_SVC32 // SVC in 32-bit state
534 cmp x24, #ESR_ELx_EC_DABT_LOW // data abort in EL0
536 cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
538 cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
540 cmp x24, #ESR_ELx_EC_FP_EXC32 // FP/ASIMD exception
542 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
544 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
546 cmp x24, #ESR_ELx_EC_CP15_32 // CP15 MRC/MCR trap
548 cmp x24, #ESR_ELx_EC_CP15_64 // CP15 MRRC/MCRR trap
550 cmp x24, #ESR_ELx_EC_CP14_MR // CP14 MRC/MCR trap
552 cmp x24, #ESR_ELx_EC_CP14_LS // CP14 LDC/STC trap
554 cmp x24, #ESR_ELx_EC_CP14_64 // CP14 MRRC/MCRR trap
556 cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0
561 * AArch32 syscall handling
563 adrp stbl, compat_sys_call_table // load compat syscall table pointer
564 uxtw scno, w7 // syscall number in w7 (r7)
565 mov sc_nr, #__NR_compat_syscalls
576 * Data abort handling
579 // enable interrupts before calling the main handler
582 clear_address_tag x0, x26
589 * Instruction abort handling
592 msr daifclr, #(8 | 4 | 1)
593 #ifdef CONFIG_TRACE_IRQFLAGS
594 bl trace_hardirqs_off
600 bl do_el0_ia_bp_hardening
604 * Floating Point or Advanced SIMD access
614 * Floating Point or Advanced SIMD exception
624 * Stack or PC alignment exception handling
628 #ifdef CONFIG_TRACE_IRQFLAGS
629 bl trace_hardirqs_off
639 * Undefined instruction
641 // enable interrupts before calling the main handler
649 * System instructions, for trapped cache maintenance instructions
659 * Debug exception handling
661 tbnz x24, #0, el0_inv // EL0 only
665 bl do_debug_exception
684 #ifdef CONFIG_TRACE_IRQFLAGS
685 bl trace_hardirqs_off
689 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
691 bl do_el0_irq_bp_hardening
696 #ifdef CONFIG_TRACE_IRQFLAGS
703 * Register switch for AArch64. The callee-saved registers need to be saved
704 * and restored. On entry:
705 * x0 = previous task_struct (must be preserved across the switch)
706 * x1 = next task_struct
707 * Previous and next are guaranteed not to be the same.
711 mov x10, #THREAD_CPU_CONTEXT
714 stp x19, x20, [x8], #16 // store callee-saved registers
715 stp x21, x22, [x8], #16
716 stp x23, x24, [x8], #16
717 stp x25, x26, [x8], #16
718 stp x27, x28, [x8], #16
719 stp x29, x9, [x8], #16
722 ldp x19, x20, [x8], #16 // restore callee-saved registers
723 ldp x21, x22, [x8], #16
724 ldp x23, x24, [x8], #16
725 ldp x25, x26, [x8], #16
726 ldp x27, x28, [x8], #16
727 ldp x29, x9, [x8], #16
730 and x9, x9, #~(THREAD_SIZE - 1)
733 ENDPROC(cpu_switch_to)
736 * This is the fast syscall return path. We do as little as possible here,
737 * and this includes saving x0 back into the kernel stack.
740 disable_irq // disable interrupts
741 str x0, [sp, #S_X0] // returned x0
742 ldr x1, [tsk, #TI_FLAGS] // re-check for syscall tracing
743 and x2, x1, #_TIF_SYSCALL_WORK
744 cbnz x2, ret_fast_syscall_trace
745 and x2, x1, #_TIF_WORK_MASK
746 cbnz x2, work_pending
747 enable_step_tsk x1, x2
749 ret_fast_syscall_trace:
750 enable_irq // enable interrupts
751 b __sys_trace_return_skipped // we already saved x0
754 * Ok, we need to do extra processing, enter the slow path.
759 #ifdef CONFIG_TRACE_IRQFLAGS
760 bl trace_hardirqs_on // enabled while in userspace
762 ldr x1, [tsk, #TI_FLAGS] // re-check for single-step
765 * "slow" syscall return path.
768 disable_irq // disable interrupts
769 ldr x1, [tsk, #TI_FLAGS]
770 and x2, x1, #_TIF_WORK_MASK
771 cbnz x2, work_pending
773 enable_step_tsk x1, x2
778 * This is how we return from a fork.
782 cbz x19, 1f // not a kernel thread
785 1: get_thread_info tsk
787 ENDPROC(ret_from_fork)
794 adrp stbl, sys_call_table // load syscall table pointer
795 uxtw scno, w8 // syscall number in w8
796 mov sc_nr, #__NR_syscalls
797 el0_svc_naked: // compat entry point
798 stp x0, scno, [sp, #S_ORIG_X0] // save the original x0 and syscall number
802 ldr x16, [tsk, #TI_FLAGS] // check for syscall hooks
803 tst x16, #_TIF_SYSCALL_WORK
805 cmp scno, sc_nr // check upper syscall limit
807 mask_nospec64 scno, sc_nr, x19 // enforce bounds for syscall number
808 ldr x16, [stbl, scno, lsl #3] // address in the syscall table
809 blr x16 // call sys_* routine
818 * This is the really slow path. We're going to be doing context
819 * switches, and waiting for our parent to respond.
822 mov w0, #-1 // set default errno for
823 cmp scno, x0 // user-issued syscall(-1)
828 bl syscall_trace_enter
829 cmp w0, #-1 // skip the syscall?
830 b.eq __sys_trace_return_skipped
831 uxtw scno, w0 // syscall number (possibly new)
832 mov x1, sp // pointer to regs
833 cmp scno, sc_nr // check upper syscall limit
835 ldp x0, x1, [sp] // restore the syscall args
836 ldp x2, x3, [sp, #S_X2]
837 ldp x4, x5, [sp, #S_X4]
838 ldp x6, x7, [sp, #S_X6]
839 ldr x16, [stbl, scno, lsl #3] // address in the syscall table
840 blr x16 // call sys_* routine
843 str x0, [sp, #S_X0] // save returned x0
844 __sys_trace_return_skipped:
846 bl syscall_trace_exit
854 .popsection // .entry.text
856 #ifdef CONFIG_UNMAP_KERNEL_AT_EL0
858 * Exception vectors trampoline.
860 .pushsection ".entry.tramp.text", "ax"
862 .macro tramp_map_kernel, tmp
864 sub \tmp, \tmp, #SWAPPER_DIR_SIZE
865 bic \tmp, \tmp, #USER_ASID_FLAG
869 .macro tramp_unmap_kernel, tmp
871 add \tmp, \tmp, #SWAPPER_DIR_SIZE
872 orr \tmp, \tmp, #USER_ASID_FLAG
875 * We avoid running the post_ttbr_update_workaround here because
876 * it's only needed by Cavium ThunderX, which requires KPTI to be
881 .macro tramp_ventry, regsize = 64
885 msr tpidrro_el0, x30 // Restored in kernel_ventry
888 * Defend against branch aliasing attacks by pushing a dummy
889 * entry onto the return stack and using a RET instruction to
890 * enter the full-fat kernel vectors.
896 #ifdef CONFIG_RANDOMIZE_BASE
897 adr x30, tramp_vectors + PAGE_SIZE
903 prfm plil1strm, [x30, #(1b - tramp_vectors)]
905 add x30, x30, #(1b - tramp_vectors)
910 .macro tramp_exit, regsize = 64
911 adr x30, tramp_vectors
913 tramp_unmap_kernel x30
935 ENTRY(tramp_exit_native)
937 END(tramp_exit_native)
939 ENTRY(tramp_exit_compat)
941 END(tramp_exit_compat)
944 .popsection // .entry.tramp.text
945 #ifdef CONFIG_RANDOMIZE_BASE
946 .pushsection ".rodata", "a"
948 .globl __entry_tramp_data_start
949 __entry_tramp_data_start:
951 .popsection // .rodata
952 #endif /* CONFIG_RANDOMIZE_BASE */
953 #endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
956 * Special system call wrappers.
958 ENTRY(sys_rt_sigreturn_wrapper)
961 ENDPROC(sys_rt_sigreturn_wrapper)