2 * Based on arch/arm/kernel/ptrace.c
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
7 * Copyright (C) 2012 ARM Ltd.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/audit.h>
23 #include <linux/compat.h>
24 #include <linux/kernel.h>
25 #include <linux/sched/signal.h>
26 #include <linux/sched/task_stack.h>
28 #include <linux/nospec.h>
29 #include <linux/smp.h>
30 #include <linux/ptrace.h>
31 #include <linux/user.h>
32 #include <linux/seccomp.h>
33 #include <linux/security.h>
34 #include <linux/init.h>
35 #include <linux/signal.h>
36 #include <linux/string.h>
37 #include <linux/uaccess.h>
38 #include <linux/perf_event.h>
39 #include <linux/hw_breakpoint.h>
40 #include <linux/regset.h>
41 #include <linux/tracehook.h>
42 #include <linux/elf.h>
44 #include <asm/compat.h>
45 #include <asm/cpufeature.h>
46 #include <asm/debug-monitors.h>
47 #include <asm/fpsimd.h>
48 #include <asm/pgtable.h>
49 #include <asm/stacktrace.h>
50 #include <asm/syscall.h>
51 #include <asm/traps.h>
52 #include <asm/system_misc.h>
54 #define CREATE_TRACE_POINTS
55 #include <trace/events/syscalls.h>
57 struct pt_regs_offset {
62 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
63 #define REG_OFFSET_END {.name = NULL, .offset = 0}
64 #define GPR_OFFSET_NAME(r) \
65 {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
67 static const struct pt_regs_offset regoffset_table[] = {
99 {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
102 REG_OFFSET_NAME(pstate),
107 * regs_query_register_offset() - query register offset from its name
108 * @name: the name of a register
110 * regs_query_register_offset() returns the offset of a register in struct
111 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
113 int regs_query_register_offset(const char *name)
115 const struct pt_regs_offset *roff;
117 for (roff = regoffset_table; roff->name != NULL; roff++)
118 if (!strcmp(roff->name, name))
124 * regs_within_kernel_stack() - check the address in the stack
125 * @regs: pt_regs which contains kernel stack pointer.
126 * @addr: address which is checked.
128 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
129 * If @addr is within the kernel stack, it returns true. If not, returns false.
131 static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
133 return ((addr & ~(THREAD_SIZE - 1)) ==
134 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
139 * regs_get_kernel_stack_nth() - get Nth entry of the stack
140 * @regs: pt_regs which contains kernel stack pointer.
141 * @n: stack entry number.
143 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
144 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
147 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
149 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
152 if (regs_within_kernel_stack(regs, (unsigned long)addr))
159 * TODO: does not yet catch signals sent when the child dies.
160 * in exit.c or in signal.c.
164 * Called by kernel/ptrace.c when detaching..
166 void ptrace_disable(struct task_struct *child)
169 * This would be better off in core code, but PTRACE_DETACH has
170 * grown its fair share of arch-specific worts and changing it
171 * is likely to cause regressions on obscure architectures.
173 user_disable_single_step(child);
176 #ifdef CONFIG_HAVE_HW_BREAKPOINT
178 * Handle hitting a HW-breakpoint.
180 static void ptrace_hbptriggered(struct perf_event *bp,
181 struct perf_sample_data *data,
182 struct pt_regs *regs)
184 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
187 clear_siginfo(&info);
188 info.si_signo = SIGTRAP;
190 info.si_code = TRAP_HWBKPT;
191 info.si_addr = (void __user *)(bkpt->trigger);
194 if (is_compat_task()) {
198 for (i = 0; i < ARM_MAX_BRP; ++i) {
199 if (current->thread.debug.hbp_break[i] == bp) {
200 si_errno = (i << 1) + 1;
205 for (i = 0; i < ARM_MAX_WRP; ++i) {
206 if (current->thread.debug.hbp_watch[i] == bp) {
207 si_errno = -((i << 1) + 1);
211 force_sig_ptrace_errno_trap(si_errno, (void __user *)bkpt->trigger);
214 arm64_force_sig_info(&info, "Hardware breakpoint trap (ptrace)", current);
218 * Unregister breakpoints from this task and reset the pointers in
221 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
224 struct thread_struct *t = &tsk->thread;
226 for (i = 0; i < ARM_MAX_BRP; i++) {
227 if (t->debug.hbp_break[i]) {
228 unregister_hw_breakpoint(t->debug.hbp_break[i]);
229 t->debug.hbp_break[i] = NULL;
233 for (i = 0; i < ARM_MAX_WRP; i++) {
234 if (t->debug.hbp_watch[i]) {
235 unregister_hw_breakpoint(t->debug.hbp_watch[i]);
236 t->debug.hbp_watch[i] = NULL;
241 void ptrace_hw_copy_thread(struct task_struct *tsk)
243 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
246 static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
247 struct task_struct *tsk,
250 struct perf_event *bp = ERR_PTR(-EINVAL);
253 case NT_ARM_HW_BREAK:
254 if (idx >= ARM_MAX_BRP)
256 idx = array_index_nospec(idx, ARM_MAX_BRP);
257 bp = tsk->thread.debug.hbp_break[idx];
259 case NT_ARM_HW_WATCH:
260 if (idx >= ARM_MAX_WRP)
262 idx = array_index_nospec(idx, ARM_MAX_WRP);
263 bp = tsk->thread.debug.hbp_watch[idx];
271 static int ptrace_hbp_set_event(unsigned int note_type,
272 struct task_struct *tsk,
274 struct perf_event *bp)
279 case NT_ARM_HW_BREAK:
280 if (idx < ARM_MAX_BRP) {
281 tsk->thread.debug.hbp_break[idx] = bp;
285 case NT_ARM_HW_WATCH:
286 if (idx < ARM_MAX_WRP) {
287 tsk->thread.debug.hbp_watch[idx] = bp;
296 static struct perf_event *ptrace_hbp_create(unsigned int note_type,
297 struct task_struct *tsk,
300 struct perf_event *bp;
301 struct perf_event_attr attr;
305 case NT_ARM_HW_BREAK:
306 type = HW_BREAKPOINT_X;
308 case NT_ARM_HW_WATCH:
309 type = HW_BREAKPOINT_RW;
312 return ERR_PTR(-EINVAL);
315 ptrace_breakpoint_init(&attr);
318 * Initialise fields to sane defaults
319 * (i.e. values that will pass validation).
322 attr.bp_len = HW_BREAKPOINT_LEN_4;
326 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
330 err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
337 static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
338 struct arch_hw_breakpoint_ctrl ctrl,
339 struct perf_event_attr *attr)
341 int err, len, type, offset, disabled = !ctrl.enabled;
343 attr->disabled = disabled;
347 err = arch_bp_generic_fields(ctrl, &len, &type, &offset);
352 case NT_ARM_HW_BREAK:
353 if ((type & HW_BREAKPOINT_X) != type)
356 case NT_ARM_HW_WATCH:
357 if ((type & HW_BREAKPOINT_RW) != type)
365 attr->bp_type = type;
366 attr->bp_addr += offset;
371 static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
377 case NT_ARM_HW_BREAK:
378 num = hw_breakpoint_slots(TYPE_INST);
380 case NT_ARM_HW_WATCH:
381 num = hw_breakpoint_slots(TYPE_DATA);
387 reg |= debug_monitors_arch();
395 static int ptrace_hbp_get_ctrl(unsigned int note_type,
396 struct task_struct *tsk,
400 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
405 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
409 static int ptrace_hbp_get_addr(unsigned int note_type,
410 struct task_struct *tsk,
414 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
419 *addr = bp ? counter_arch_bp(bp)->address : 0;
423 static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
424 struct task_struct *tsk,
427 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
430 bp = ptrace_hbp_create(note_type, tsk, idx);
435 static int ptrace_hbp_set_ctrl(unsigned int note_type,
436 struct task_struct *tsk,
441 struct perf_event *bp;
442 struct perf_event_attr attr;
443 struct arch_hw_breakpoint_ctrl ctrl;
445 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
452 decode_ctrl_reg(uctrl, &ctrl);
453 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
457 return modify_user_hw_breakpoint(bp, &attr);
460 static int ptrace_hbp_set_addr(unsigned int note_type,
461 struct task_struct *tsk,
466 struct perf_event *bp;
467 struct perf_event_attr attr;
469 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
477 err = modify_user_hw_breakpoint(bp, &attr);
481 #define PTRACE_HBP_ADDR_SZ sizeof(u64)
482 #define PTRACE_HBP_CTRL_SZ sizeof(u32)
483 #define PTRACE_HBP_PAD_SZ sizeof(u32)
485 static int hw_break_get(struct task_struct *target,
486 const struct user_regset *regset,
487 unsigned int pos, unsigned int count,
488 void *kbuf, void __user *ubuf)
490 unsigned int note_type = regset->core_note_type;
491 int ret, idx = 0, offset, limit;
496 ret = ptrace_hbp_get_resource_info(note_type, &info);
500 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
506 offset = offsetof(struct user_hwdebug_state, pad);
507 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
508 offset + PTRACE_HBP_PAD_SZ);
512 /* (address, ctrl) registers */
513 offset = offsetof(struct user_hwdebug_state, dbg_regs);
514 limit = regset->n * regset->size;
515 while (count && offset < limit) {
516 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
519 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
520 offset, offset + PTRACE_HBP_ADDR_SZ);
523 offset += PTRACE_HBP_ADDR_SZ;
525 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
528 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
529 offset, offset + PTRACE_HBP_CTRL_SZ);
532 offset += PTRACE_HBP_CTRL_SZ;
534 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
536 offset + PTRACE_HBP_PAD_SZ);
539 offset += PTRACE_HBP_PAD_SZ;
546 static int hw_break_set(struct task_struct *target,
547 const struct user_regset *regset,
548 unsigned int pos, unsigned int count,
549 const void *kbuf, const void __user *ubuf)
551 unsigned int note_type = regset->core_note_type;
552 int ret, idx = 0, offset, limit;
556 /* Resource info and pad */
557 offset = offsetof(struct user_hwdebug_state, dbg_regs);
558 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
562 /* (address, ctrl) registers */
563 limit = regset->n * regset->size;
564 while (count && offset < limit) {
565 if (count < PTRACE_HBP_ADDR_SZ)
567 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
568 offset, offset + PTRACE_HBP_ADDR_SZ);
571 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
574 offset += PTRACE_HBP_ADDR_SZ;
578 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
579 offset, offset + PTRACE_HBP_CTRL_SZ);
582 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
585 offset += PTRACE_HBP_CTRL_SZ;
587 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
589 offset + PTRACE_HBP_PAD_SZ);
592 offset += PTRACE_HBP_PAD_SZ;
598 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
600 static int gpr_get(struct task_struct *target,
601 const struct user_regset *regset,
602 unsigned int pos, unsigned int count,
603 void *kbuf, void __user *ubuf)
605 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
606 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
609 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
610 unsigned int pos, unsigned int count,
611 const void *kbuf, const void __user *ubuf)
614 struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
616 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
620 if (!valid_user_regs(&newregs, target))
623 task_pt_regs(target)->user_regs = newregs;
628 * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
630 static int __fpr_get(struct task_struct *target,
631 const struct user_regset *regset,
632 unsigned int pos, unsigned int count,
633 void *kbuf, void __user *ubuf, unsigned int start_pos)
635 struct user_fpsimd_state *uregs;
637 sve_sync_to_fpsimd(target);
639 uregs = &target->thread.uw.fpsimd_state;
641 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs,
642 start_pos, start_pos + sizeof(*uregs));
645 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
646 unsigned int pos, unsigned int count,
647 void *kbuf, void __user *ubuf)
649 if (target == current)
650 fpsimd_preserve_current_state();
652 return __fpr_get(target, regset, pos, count, kbuf, ubuf, 0);
655 static int __fpr_set(struct task_struct *target,
656 const struct user_regset *regset,
657 unsigned int pos, unsigned int count,
658 const void *kbuf, const void __user *ubuf,
659 unsigned int start_pos)
662 struct user_fpsimd_state newstate;
665 * Ensure target->thread.uw.fpsimd_state is up to date, so that a
666 * short copyin can't resurrect stale data.
668 sve_sync_to_fpsimd(target);
670 newstate = target->thread.uw.fpsimd_state;
672 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate,
673 start_pos, start_pos + sizeof(newstate));
677 target->thread.uw.fpsimd_state = newstate;
682 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
683 unsigned int pos, unsigned int count,
684 const void *kbuf, const void __user *ubuf)
688 ret = __fpr_set(target, regset, pos, count, kbuf, ubuf, 0);
692 sve_sync_from_fpsimd_zeropad(target);
693 fpsimd_flush_task_state(target);
698 static int tls_get(struct task_struct *target, const struct user_regset *regset,
699 unsigned int pos, unsigned int count,
700 void *kbuf, void __user *ubuf)
702 unsigned long *tls = &target->thread.uw.tp_value;
704 if (target == current)
705 tls_preserve_current_state();
707 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
710 static int tls_set(struct task_struct *target, const struct user_regset *regset,
711 unsigned int pos, unsigned int count,
712 const void *kbuf, const void __user *ubuf)
715 unsigned long tls = target->thread.uw.tp_value;
717 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
721 target->thread.uw.tp_value = tls;
725 static int system_call_get(struct task_struct *target,
726 const struct user_regset *regset,
727 unsigned int pos, unsigned int count,
728 void *kbuf, void __user *ubuf)
730 int syscallno = task_pt_regs(target)->syscallno;
732 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
736 static int system_call_set(struct task_struct *target,
737 const struct user_regset *regset,
738 unsigned int pos, unsigned int count,
739 const void *kbuf, const void __user *ubuf)
741 int syscallno = task_pt_regs(target)->syscallno;
744 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
748 task_pt_regs(target)->syscallno = syscallno;
752 #ifdef CONFIG_ARM64_SVE
754 static void sve_init_header_from_task(struct user_sve_header *header,
755 struct task_struct *target)
759 memset(header, 0, sizeof(*header));
761 header->flags = test_tsk_thread_flag(target, TIF_SVE) ?
762 SVE_PT_REGS_SVE : SVE_PT_REGS_FPSIMD;
763 if (test_tsk_thread_flag(target, TIF_SVE_VL_INHERIT))
764 header->flags |= SVE_PT_VL_INHERIT;
766 header->vl = target->thread.sve_vl;
767 vq = sve_vq_from_vl(header->vl);
769 header->max_vl = sve_max_vl;
770 header->size = SVE_PT_SIZE(vq, header->flags);
771 header->max_size = SVE_PT_SIZE(sve_vq_from_vl(header->max_vl),
775 static unsigned int sve_size_from_header(struct user_sve_header const *header)
777 return ALIGN(header->size, SVE_VQ_BYTES);
780 static unsigned int sve_get_size(struct task_struct *target,
781 const struct user_regset *regset)
783 struct user_sve_header header;
785 if (!system_supports_sve())
788 sve_init_header_from_task(&header, target);
789 return sve_size_from_header(&header);
792 static int sve_get(struct task_struct *target,
793 const struct user_regset *regset,
794 unsigned int pos, unsigned int count,
795 void *kbuf, void __user *ubuf)
798 struct user_sve_header header;
800 unsigned long start, end;
802 if (!system_supports_sve())
806 sve_init_header_from_task(&header, target);
807 vq = sve_vq_from_vl(header.vl);
809 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &header,
814 if (target == current)
815 fpsimd_preserve_current_state();
817 /* Registers: FPSIMD-only case */
819 BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
820 if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD)
821 return __fpr_get(target, regset, pos, count, kbuf, ubuf,
822 SVE_PT_FPSIMD_OFFSET);
824 /* Otherwise: full SVE case */
826 BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
827 start = SVE_PT_SVE_OFFSET;
828 end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
829 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
830 target->thread.sve_state,
836 end = SVE_PT_SVE_FPSR_OFFSET(vq);
837 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
843 * Copy fpsr, and fpcr which must follow contiguously in
844 * struct fpsimd_state:
847 end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
848 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
849 &target->thread.uw.fpsimd_state.fpsr,
855 end = sve_size_from_header(&header);
856 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
860 static int sve_set(struct task_struct *target,
861 const struct user_regset *regset,
862 unsigned int pos, unsigned int count,
863 const void *kbuf, const void __user *ubuf)
866 struct user_sve_header header;
868 unsigned long start, end;
870 if (!system_supports_sve())
874 if (count < sizeof(header))
876 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &header,
882 * Apart from PT_SVE_REGS_MASK, all PT_SVE_* flags are consumed by
883 * sve_set_vector_length(), which will also validate them for us:
885 ret = sve_set_vector_length(target, header.vl,
886 ((unsigned long)header.flags & ~SVE_PT_REGS_MASK) << 16);
890 /* Actual VL set may be less than the user asked for: */
891 vq = sve_vq_from_vl(target->thread.sve_vl);
893 /* Registers: FPSIMD-only case */
895 BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
896 if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD) {
897 ret = __fpr_set(target, regset, pos, count, kbuf, ubuf,
898 SVE_PT_FPSIMD_OFFSET);
899 clear_tsk_thread_flag(target, TIF_SVE);
903 /* Otherwise: full SVE case */
906 * If setting a different VL from the requested VL and there is
907 * register data, the data layout will be wrong: don't even
908 * try to set the registers in this case.
910 if (count && vq != sve_vq_from_vl(header.vl)) {
918 * Ensure target->thread.sve_state is up to date with target's
919 * FPSIMD regs, so that a short copyin leaves trailing registers
922 fpsimd_sync_to_sve(target);
923 set_tsk_thread_flag(target, TIF_SVE);
925 BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
926 start = SVE_PT_SVE_OFFSET;
927 end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
928 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
929 target->thread.sve_state,
935 end = SVE_PT_SVE_FPSR_OFFSET(vq);
936 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
942 * Copy fpsr, and fpcr which must follow contiguously in
943 * struct fpsimd_state:
946 end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
947 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
948 &target->thread.uw.fpsimd_state.fpsr,
952 fpsimd_flush_task_state(target);
956 #endif /* CONFIG_ARM64_SVE */
958 enum aarch64_regset {
962 #ifdef CONFIG_HAVE_HW_BREAKPOINT
967 #ifdef CONFIG_ARM64_SVE
972 static const struct user_regset aarch64_regsets[] = {
974 .core_note_type = NT_PRSTATUS,
975 .n = sizeof(struct user_pt_regs) / sizeof(u64),
977 .align = sizeof(u64),
982 .core_note_type = NT_PRFPREG,
983 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
985 * We pretend we have 32-bit registers because the fpsr and
986 * fpcr are 32-bits wide.
989 .align = sizeof(u32),
994 .core_note_type = NT_ARM_TLS,
996 .size = sizeof(void *),
997 .align = sizeof(void *),
1001 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1002 [REGSET_HW_BREAK] = {
1003 .core_note_type = NT_ARM_HW_BREAK,
1004 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1005 .size = sizeof(u32),
1006 .align = sizeof(u32),
1007 .get = hw_break_get,
1008 .set = hw_break_set,
1010 [REGSET_HW_WATCH] = {
1011 .core_note_type = NT_ARM_HW_WATCH,
1012 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1013 .size = sizeof(u32),
1014 .align = sizeof(u32),
1015 .get = hw_break_get,
1016 .set = hw_break_set,
1019 [REGSET_SYSTEM_CALL] = {
1020 .core_note_type = NT_ARM_SYSTEM_CALL,
1022 .size = sizeof(int),
1023 .align = sizeof(int),
1024 .get = system_call_get,
1025 .set = system_call_set,
1027 #ifdef CONFIG_ARM64_SVE
1028 [REGSET_SVE] = { /* Scalable Vector Extension */
1029 .core_note_type = NT_ARM_SVE,
1030 .n = DIV_ROUND_UP(SVE_PT_SIZE(SVE_VQ_MAX, SVE_PT_REGS_SVE),
1032 .size = SVE_VQ_BYTES,
1033 .align = SVE_VQ_BYTES,
1036 .get_size = sve_get_size,
1041 static const struct user_regset_view user_aarch64_view = {
1042 .name = "aarch64", .e_machine = EM_AARCH64,
1043 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
1046 #ifdef CONFIG_COMPAT
1047 enum compat_regset {
1052 static int compat_gpr_get(struct task_struct *target,
1053 const struct user_regset *regset,
1054 unsigned int pos, unsigned int count,
1055 void *kbuf, void __user *ubuf)
1058 unsigned int i, start, num_regs;
1060 /* Calculate the number of AArch32 registers contained in count */
1061 num_regs = count / regset->size;
1063 /* Convert pos into an register number */
1064 start = pos / regset->size;
1066 if (start + num_regs > regset->n)
1069 for (i = 0; i < num_regs; ++i) {
1070 unsigned int idx = start + i;
1075 reg = task_pt_regs(target)->pc;
1078 reg = task_pt_regs(target)->pstate;
1079 reg = pstate_to_compat_psr(reg);
1082 reg = task_pt_regs(target)->orig_x0;
1085 reg = task_pt_regs(target)->regs[idx];
1089 memcpy(kbuf, ®, sizeof(reg));
1090 kbuf += sizeof(reg);
1092 ret = copy_to_user(ubuf, ®, sizeof(reg));
1098 ubuf += sizeof(reg);
1105 static int compat_gpr_set(struct task_struct *target,
1106 const struct user_regset *regset,
1107 unsigned int pos, unsigned int count,
1108 const void *kbuf, const void __user *ubuf)
1110 struct pt_regs newregs;
1112 unsigned int i, start, num_regs;
1114 /* Calculate the number of AArch32 registers contained in count */
1115 num_regs = count / regset->size;
1117 /* Convert pos into an register number */
1118 start = pos / regset->size;
1120 if (start + num_regs > regset->n)
1123 newregs = *task_pt_regs(target);
1125 for (i = 0; i < num_regs; ++i) {
1126 unsigned int idx = start + i;
1130 memcpy(®, kbuf, sizeof(reg));
1131 kbuf += sizeof(reg);
1133 ret = copy_from_user(®, ubuf, sizeof(reg));
1139 ubuf += sizeof(reg);
1147 reg = compat_psr_to_pstate(reg);
1148 newregs.pstate = reg;
1151 newregs.orig_x0 = reg;
1154 newregs.regs[idx] = reg;
1159 if (valid_user_regs(&newregs.user_regs, target))
1160 *task_pt_regs(target) = newregs;
1167 static int compat_vfp_get(struct task_struct *target,
1168 const struct user_regset *regset,
1169 unsigned int pos, unsigned int count,
1170 void *kbuf, void __user *ubuf)
1172 struct user_fpsimd_state *uregs;
1173 compat_ulong_t fpscr;
1174 int ret, vregs_end_pos;
1176 uregs = &target->thread.uw.fpsimd_state;
1178 if (target == current)
1179 fpsimd_preserve_current_state();
1182 * The VFP registers are packed into the fpsimd_state, so they all sit
1183 * nicely together for us. We just need to create the fpscr separately.
1185 vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t);
1186 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs,
1189 if (count && !ret) {
1190 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
1191 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
1193 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &fpscr,
1194 vregs_end_pos, VFP_STATE_SIZE);
1200 static int compat_vfp_set(struct task_struct *target,
1201 const struct user_regset *regset,
1202 unsigned int pos, unsigned int count,
1203 const void *kbuf, const void __user *ubuf)
1205 struct user_fpsimd_state *uregs;
1206 compat_ulong_t fpscr;
1207 int ret, vregs_end_pos;
1209 uregs = &target->thread.uw.fpsimd_state;
1211 vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t);
1212 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
1215 if (count && !ret) {
1216 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fpscr,
1217 vregs_end_pos, VFP_STATE_SIZE);
1219 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
1220 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
1224 fpsimd_flush_task_state(target);
1228 static int compat_tls_get(struct task_struct *target,
1229 const struct user_regset *regset, unsigned int pos,
1230 unsigned int count, void *kbuf, void __user *ubuf)
1232 compat_ulong_t tls = (compat_ulong_t)target->thread.uw.tp_value;
1233 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
1236 static int compat_tls_set(struct task_struct *target,
1237 const struct user_regset *regset, unsigned int pos,
1238 unsigned int count, const void *kbuf,
1239 const void __user *ubuf)
1242 compat_ulong_t tls = target->thread.uw.tp_value;
1244 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
1248 target->thread.uw.tp_value = tls;
1252 static const struct user_regset aarch32_regsets[] = {
1253 [REGSET_COMPAT_GPR] = {
1254 .core_note_type = NT_PRSTATUS,
1255 .n = COMPAT_ELF_NGREG,
1256 .size = sizeof(compat_elf_greg_t),
1257 .align = sizeof(compat_elf_greg_t),
1258 .get = compat_gpr_get,
1259 .set = compat_gpr_set
1261 [REGSET_COMPAT_VFP] = {
1262 .core_note_type = NT_ARM_VFP,
1263 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1264 .size = sizeof(compat_ulong_t),
1265 .align = sizeof(compat_ulong_t),
1266 .get = compat_vfp_get,
1267 .set = compat_vfp_set
1271 static const struct user_regset_view user_aarch32_view = {
1272 .name = "aarch32", .e_machine = EM_ARM,
1273 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
1276 static const struct user_regset aarch32_ptrace_regsets[] = {
1278 .core_note_type = NT_PRSTATUS,
1279 .n = COMPAT_ELF_NGREG,
1280 .size = sizeof(compat_elf_greg_t),
1281 .align = sizeof(compat_elf_greg_t),
1282 .get = compat_gpr_get,
1283 .set = compat_gpr_set
1286 .core_note_type = NT_ARM_VFP,
1287 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1288 .size = sizeof(compat_ulong_t),
1289 .align = sizeof(compat_ulong_t),
1290 .get = compat_vfp_get,
1291 .set = compat_vfp_set
1294 .core_note_type = NT_ARM_TLS,
1296 .size = sizeof(compat_ulong_t),
1297 .align = sizeof(compat_ulong_t),
1298 .get = compat_tls_get,
1299 .set = compat_tls_set,
1301 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1302 [REGSET_HW_BREAK] = {
1303 .core_note_type = NT_ARM_HW_BREAK,
1304 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1305 .size = sizeof(u32),
1306 .align = sizeof(u32),
1307 .get = hw_break_get,
1308 .set = hw_break_set,
1310 [REGSET_HW_WATCH] = {
1311 .core_note_type = NT_ARM_HW_WATCH,
1312 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1313 .size = sizeof(u32),
1314 .align = sizeof(u32),
1315 .get = hw_break_get,
1316 .set = hw_break_set,
1319 [REGSET_SYSTEM_CALL] = {
1320 .core_note_type = NT_ARM_SYSTEM_CALL,
1322 .size = sizeof(int),
1323 .align = sizeof(int),
1324 .get = system_call_get,
1325 .set = system_call_set,
1329 static const struct user_regset_view user_aarch32_ptrace_view = {
1330 .name = "aarch32", .e_machine = EM_ARM,
1331 .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
1334 static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
1335 compat_ulong_t __user *ret)
1342 if (off == COMPAT_PT_TEXT_ADDR)
1343 tmp = tsk->mm->start_code;
1344 else if (off == COMPAT_PT_DATA_ADDR)
1345 tmp = tsk->mm->start_data;
1346 else if (off == COMPAT_PT_TEXT_END_ADDR)
1347 tmp = tsk->mm->end_code;
1348 else if (off < sizeof(compat_elf_gregset_t))
1349 return copy_regset_to_user(tsk, &user_aarch32_view,
1350 REGSET_COMPAT_GPR, off,
1351 sizeof(compat_ulong_t), ret);
1352 else if (off >= COMPAT_USER_SZ)
1357 return put_user(tmp, ret);
1360 static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
1364 mm_segment_t old_fs = get_fs();
1366 if (off & 3 || off >= COMPAT_USER_SZ)
1369 if (off >= sizeof(compat_elf_gregset_t))
1373 ret = copy_regset_from_user(tsk, &user_aarch32_view,
1374 REGSET_COMPAT_GPR, off,
1375 sizeof(compat_ulong_t),
1382 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1385 * Convert a virtual register number into an index for a thread_info
1386 * breakpoint array. Breakpoints are identified using positive numbers
1387 * whilst watchpoints are negative. The registers are laid out as pairs
1388 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
1389 * Register 0 is reserved for describing resource information.
1391 static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
1393 return (abs(num) - 1) >> 1;
1396 static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
1398 u8 num_brps, num_wrps, debug_arch, wp_len;
1401 num_brps = hw_breakpoint_slots(TYPE_INST);
1402 num_wrps = hw_breakpoint_slots(TYPE_DATA);
1404 debug_arch = debug_monitors_arch();
1418 static int compat_ptrace_hbp_get(unsigned int note_type,
1419 struct task_struct *tsk,
1426 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1429 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
1432 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
1439 static int compat_ptrace_hbp_set(unsigned int note_type,
1440 struct task_struct *tsk,
1447 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1451 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
1454 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
1460 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
1461 compat_ulong_t __user *data)
1468 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
1470 } else if (num == 0) {
1471 ret = compat_ptrace_hbp_get_resource_info(&kdata);
1474 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
1478 ret = put_user(kdata, data);
1483 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
1484 compat_ulong_t __user *data)
1492 ret = get_user(kdata, data);
1497 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
1499 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
1503 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1505 long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1506 compat_ulong_t caddr, compat_ulong_t cdata)
1508 unsigned long addr = caddr;
1509 unsigned long data = cdata;
1510 void __user *datap = compat_ptr(data);
1514 case PTRACE_PEEKUSR:
1515 ret = compat_ptrace_read_user(child, addr, datap);
1518 case PTRACE_POKEUSR:
1519 ret = compat_ptrace_write_user(child, addr, data);
1522 case COMPAT_PTRACE_GETREGS:
1523 ret = copy_regset_to_user(child,
1526 0, sizeof(compat_elf_gregset_t),
1530 case COMPAT_PTRACE_SETREGS:
1531 ret = copy_regset_from_user(child,
1534 0, sizeof(compat_elf_gregset_t),
1538 case COMPAT_PTRACE_GET_THREAD_AREA:
1539 ret = put_user((compat_ulong_t)child->thread.uw.tp_value,
1540 (compat_ulong_t __user *)datap);
1543 case COMPAT_PTRACE_SET_SYSCALL:
1544 task_pt_regs(child)->syscallno = data;
1548 case COMPAT_PTRACE_GETVFPREGS:
1549 ret = copy_regset_to_user(child,
1556 case COMPAT_PTRACE_SETVFPREGS:
1557 ret = copy_regset_from_user(child,
1564 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1565 case COMPAT_PTRACE_GETHBPREGS:
1566 ret = compat_ptrace_gethbpregs(child, addr, datap);
1569 case COMPAT_PTRACE_SETHBPREGS:
1570 ret = compat_ptrace_sethbpregs(child, addr, datap);
1575 ret = compat_ptrace_request(child, request, addr,
1582 #endif /* CONFIG_COMPAT */
1584 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1586 #ifdef CONFIG_COMPAT
1588 * Core dumping of 32-bit tasks or compat ptrace requests must use the
1589 * user_aarch32_view compatible with arm32. Native ptrace requests on
1590 * 32-bit children use an extended user_aarch32_ptrace_view to allow
1591 * access to the TLS register.
1593 if (is_compat_task())
1594 return &user_aarch32_view;
1595 else if (is_compat_thread(task_thread_info(task)))
1596 return &user_aarch32_ptrace_view;
1598 return &user_aarch64_view;
1601 long arch_ptrace(struct task_struct *child, long request,
1602 unsigned long addr, unsigned long data)
1604 return ptrace_request(child, request, addr, data);
1607 enum ptrace_syscall_dir {
1608 PTRACE_SYSCALL_ENTER = 0,
1609 PTRACE_SYSCALL_EXIT,
1612 static void tracehook_report_syscall(struct pt_regs *regs,
1613 enum ptrace_syscall_dir dir)
1616 unsigned long saved_reg;
1619 * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
1620 * used to denote syscall entry/exit:
1622 regno = (is_compat_task() ? 12 : 7);
1623 saved_reg = regs->regs[regno];
1624 regs->regs[regno] = dir;
1626 if (dir == PTRACE_SYSCALL_EXIT)
1627 tracehook_report_syscall_exit(regs, 0);
1628 else if (tracehook_report_syscall_entry(regs))
1629 forget_syscall(regs);
1631 regs->regs[regno] = saved_reg;
1634 int syscall_trace_enter(struct pt_regs *regs)
1636 if (test_thread_flag(TIF_SYSCALL_TRACE))
1637 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
1639 /* Do the secure computing after ptrace; failures should be fast. */
1640 if (secure_computing(NULL) == -1)
1643 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1644 trace_sys_enter(regs, regs->syscallno);
1646 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
1647 regs->regs[2], regs->regs[3]);
1649 return regs->syscallno;
1652 void syscall_trace_exit(struct pt_regs *regs)
1654 audit_syscall_exit(regs);
1656 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1657 trace_sys_exit(regs, regs_return_value(regs));
1659 if (test_thread_flag(TIF_SYSCALL_TRACE))
1660 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
1666 * SPSR_ELx bits which are always architecturally RES0 per ARM DDI 0487C.a
1667 * We also take into account DIT (bit 24), which is not yet documented, and
1668 * treat PAN and UAO as RES0 bits, as they are meaningless at EL0, and may be
1669 * allocated an EL0 meaning in future.
1670 * Userspace cannot use these until they have an architectural meaning.
1671 * Note that this follows the SPSR_ELx format, not the AArch32 PSR format.
1672 * We also reserve IL for the kernel; SS is handled dynamically.
1674 #define SPSR_EL1_AARCH64_RES0_BITS \
1675 (GENMASK_ULL(63,32) | GENMASK_ULL(27, 25) | GENMASK_ULL(23, 22) | \
1676 GENMASK_ULL(20, 10) | GENMASK_ULL(5, 5))
1677 #define SPSR_EL1_AARCH32_RES0_BITS \
1678 (GENMASK_ULL(63,32) | GENMASK_ULL(23, 22) | GENMASK_ULL(20,20))
1680 static int valid_compat_regs(struct user_pt_regs *regs)
1682 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
1684 if (!system_supports_mixed_endian_el0()) {
1685 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1686 regs->pstate |= PSR_AA32_E_BIT;
1688 regs->pstate &= ~PSR_AA32_E_BIT;
1691 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
1692 (regs->pstate & PSR_AA32_A_BIT) == 0 &&
1693 (regs->pstate & PSR_AA32_I_BIT) == 0 &&
1694 (regs->pstate & PSR_AA32_F_BIT) == 0) {
1699 * Force PSR to a valid 32-bit EL0t, preserving the same bits as
1702 regs->pstate &= PSR_AA32_N_BIT | PSR_AA32_Z_BIT |
1703 PSR_AA32_C_BIT | PSR_AA32_V_BIT |
1704 PSR_AA32_Q_BIT | PSR_AA32_IT_MASK |
1705 PSR_AA32_GE_MASK | PSR_AA32_E_BIT |
1707 regs->pstate |= PSR_MODE32_BIT;
1712 static int valid_native_regs(struct user_pt_regs *regs)
1714 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
1716 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
1717 (regs->pstate & PSR_D_BIT) == 0 &&
1718 (regs->pstate & PSR_A_BIT) == 0 &&
1719 (regs->pstate & PSR_I_BIT) == 0 &&
1720 (regs->pstate & PSR_F_BIT) == 0) {
1724 /* Force PSR to a valid 64-bit EL0t */
1725 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
1731 * Are the current registers suitable for user mode? (used to maintain
1732 * security in signal handlers)
1734 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
1736 if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))
1737 regs->pstate &= ~DBG_SPSR_SS;
1739 if (is_compat_thread(task_thread_info(task)))
1740 return valid_compat_regs(regs);
1742 return valid_native_regs(regs);