arch/blackfin/kernel/process.c

   1 /*
   2  * Blackfin architecture-dependent process handling
   3  *
   4  * Copyright 2004-2009 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/unistd.h>
  11 #include <linux/user.h>
  12 #include <linux/uaccess.h>
  13 #include <linux/slab.h>
  14 #include <linux/sched.h>
  15 #include <linux/tick.h>
  16 #include <linux/fs.h>
  17 #include <linux/err.h>
  18
  19 #include <asm/blackfin.h>
  20 #include <asm/fixed_code.h>
  21 #include <asm/mem_map.h>
  22 #include <asm/irq.h>
  23
  24 asmlinkage void ret_from_fork(void);
  25
  26 /* Points to the SDRAM backup memory for the stack that is currently in
  27  * L1 scratchpad memory.
  28  */
  29 void *current_l1_stack_save;
  30
  31 /* The number of tasks currently using a L1 stack area.  The SRAM is
  32  * allocated/deallocated whenever this changes from/to zero.
  33  */
  34 int nr_l1stack_tasks;
  35
  36 /* Start and length of the area in L1 scratchpad memory which we've allocated
  37  * for process stacks.
  38  */
  39 void *l1_stack_base;
  40 unsigned long l1_stack_len;
  41
  42 void (*pm_power_off)(void) = NULL;
  43 EXPORT_SYMBOL(pm_power_off);
  44
  45 /*
  46  * The idle loop on BFIN
  47  */
  48 #ifdef CONFIG_IDLE_L1
  49 static void default_idle(void)__attribute__((l1_text));
  50 void cpu_idle(void)__attribute__((l1_text));
  51 #endif
  52
  53 /*
  54  * This is our default idle handler.  We need to disable
  55  * interrupts here to ensure we don't miss a wakeup call.
  56  */
  57 static void default_idle(void)
  58 {
  59 #ifdef CONFIG_IPIPE
  60         ipipe_suspend_domain();
  61 #endif
  62         hard_local_irq_disable();
  63         if (!need_resched())
  64                 idle_with_irq_disabled();
  65
  66         hard_local_irq_enable();
  67 }
  68
  69 /*
  70  * The idle thread.  We try to conserve power, while trying to keep
  71  * overall latency low.  The architecture specific idle is passed
  72  * a value to indicate the level of "idleness" of the system.
  73  */
  74 void cpu_idle(void)
  75 {
  76         /* endless idle loop with no priority at all */
  77         while (1) {
  78
  79 #ifdef CONFIG_HOTPLUG_CPU
  80                 if (cpu_is_offline(smp_processor_id()))
  81                         cpu_die();
  82 #endif
  83                 tick_nohz_idle_enter();
  84                 rcu_idle_enter();
  85                 while (!need_resched())
  86                         default_idle();
  87                 rcu_idle_exit();
  88                 tick_nohz_idle_exit();
  89                 preempt_enable_no_resched();
  90                 schedule();
  91                 preempt_disable();
  92         }
  93 }
  94
  95 /*
  96  * Do necessary setup to start up a newly executed thread.
  97  *
  98  * pass the data segment into user programs if it exists,
  99  * it can't hurt anything as far as I can tell
 100  */
 101 void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
 102 {
 103         regs->pc = new_ip;
 104         if (current->mm)
 105                 regs->p5 = current->mm->start_data;
 106 #ifndef CONFIG_SMP
 107         task_thread_info(current)->l1_task_info.stack_start =
 108                 (void *)current->mm->context.stack_start;
 109         task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
 110         memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
 111                sizeof(*L1_SCRATCH_TASK_INFO));
 112 #endif
 113         wrusp(new_sp);
 114 }
 115 EXPORT_SYMBOL_GPL(start_thread);
 116
 117 void flush_thread(void)
 118 {
 119 }
 120
 121 asmlinkage int bfin_clone(unsigned long clone_flags, unsigned long newsp)
 122 {
 123 #ifdef __ARCH_SYNC_CORE_DCACHE
 124         if (current->nr_cpus_allowed == num_possible_cpus())
 125                 set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id()));
 126 #endif
 127         if (newsp)
 128                 newsp -= 12;
 129         return do_fork(clone_flags, newsp, 0, NULL, NULL);
 130 }
 131
 132 int
 133 copy_thread(unsigned long clone_flags,
 134             unsigned long usp, unsigned long topstk,
 135             struct task_struct *p)
 136 {
 137         struct pt_regs *childregs;
 138         unsigned long *v;
 139
 140         childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
 141         v = ((unsigned long *)childregs) - 2;
 142         if (unlikely(p->flags & PF_KTHREAD)) {
 143                 memset(childregs, 0, sizeof(struct pt_regs));
 144                 v[0] = usp;
 145                 v[1] = topstk;
 146                 childregs->orig_p0 = -1;
 147                 childregs->ipend = 0x8000;
 148                 __asm__ __volatile__("%0 = syscfg;":"=da"(childregs->syscfg):);
 149                 p->thread.usp = 0;
 150         } else {
 151                 *childregs = *current_pt_regs();
 152                 childregs->r0 = 0;
 153                 p->thread.usp = usp ? : rdusp();
 154                 v[0] = v[1] = 0;
 155         }
 156
 157         p->thread.ksp = (unsigned long)v;
 158         p->thread.pc = (unsigned long)ret_from_fork;
 159
 160         return 0;
 161 }
 162
 163 unsigned long get_wchan(struct task_struct *p)
 164 {
 165         unsigned long fp, pc;
 166         unsigned long stack_page;
 167         int count = 0;
 168         if (!p || p == current || p->state == TASK_RUNNING)
 169                 return 0;
 170
 171         stack_page = (unsigned long)p;
 172         fp = p->thread.usp;
 173         do {
 174                 if (fp < stack_page + sizeof(struct thread_info) ||
 175                     fp >= 8184 + stack_page)
 176                         return 0;
 177                 pc = ((unsigned long *)fp)[1];
 178                 if (!in_sched_functions(pc))
 179                         return pc;
 180                 fp = *(unsigned long *)fp;
 181         }
 182         while (count++ < 16);
 183         return 0;
 184 }
 185
 186 void finish_atomic_sections (struct pt_regs *regs)
 187 {
 188         int __user *up0 = (int __user *)regs->p0;
 189
 190         switch (regs->pc) {
 191         default:
 192                 /* not in middle of an atomic step, so resume like normal */
 193                 return;
 194
 195         case ATOMIC_XCHG32 + 2:
 196                 put_user(regs->r1, up0);
 197                 break;
 198
 199         case ATOMIC_CAS32 + 2:
 200         case ATOMIC_CAS32 + 4:
 201                 if (regs->r0 == regs->r1)
 202         case ATOMIC_CAS32 + 6:
 203                         put_user(regs->r2, up0);
 204                 break;
 205
 206         case ATOMIC_ADD32 + 2:
 207                 regs->r0 = regs->r1 + regs->r0;
 208                 /* fall through */
 209         case ATOMIC_ADD32 + 4:
 210                 put_user(regs->r0, up0);
 211                 break;
 212
 213         case ATOMIC_SUB32 + 2:
 214                 regs->r0 = regs->r1 - regs->r0;
 215                 /* fall through */
 216         case ATOMIC_SUB32 + 4:
 217                 put_user(regs->r0, up0);
 218                 break;
 219
 220         case ATOMIC_IOR32 + 2:
 221                 regs->r0 = regs->r1 | regs->r0;
 222                 /* fall through */
 223         case ATOMIC_IOR32 + 4:
 224                 put_user(regs->r0, up0);
 225                 break;
 226
 227         case ATOMIC_AND32 + 2:
 228                 regs->r0 = regs->r1 & regs->r0;
 229                 /* fall through */
 230         case ATOMIC_AND32 + 4:
 231                 put_user(regs->r0, up0);
 232                 break;
 233
 234         case ATOMIC_XOR32 + 2:
 235                 regs->r0 = regs->r1 ^ regs->r0;
 236                 /* fall through */
 237         case ATOMIC_XOR32 + 4:
 238                 put_user(regs->r0, up0);
 239                 break;
 240         }
 241
 242         /*
 243          * We've finished the atomic section, and the only thing left for
 244          * userspace is to do a RTS, so we might as well handle that too
 245          * since we need to update the PC anyways.
 246          */
 247         regs->pc = regs->rets;
 248 }
 249
 250 static inline
 251 int in_mem(unsigned long addr, unsigned long size,
 252            unsigned long start, unsigned long end)
 253 {
 254         return addr >= start && addr + size <= end;
 255 }
 256 static inline
 257 int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off,
 258                      unsigned long const_addr, unsigned long const_size)
 259 {
 260         return const_size &&
 261                in_mem(addr, size, const_addr + off, const_addr + const_size);
 262 }
 263 static inline
 264 int in_mem_const(unsigned long addr, unsigned long size,
 265                  unsigned long const_addr, unsigned long const_size)
 266 {
 267         return in_mem_const_off(addr, size, 0, const_addr, const_size);
 268 }
 269 #ifdef CONFIG_BF60x
 270 #define ASYNC_ENABLED(bnum, bctlnum)    1
 271 #else
 272 #define ASYNC_ENABLED(bnum, bctlnum) \
 273 ({ \
 274         (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \
 275         bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \
 276         1; \
 277 })
 278 #endif
 279 /*
 280  * We can't read EBIU banks that aren't enabled or we end up hanging
 281  * on the access to the async space.  Make sure we validate accesses
 282  * that cross async banks too.
 283  *      0 - found, but unusable
 284  *      1 - found & usable
 285  *      2 - not found
 286  */
 287 static
 288 int in_async(unsigned long addr, unsigned long size)
 289 {
 290         if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) {
 291                 if (!ASYNC_ENABLED(0, 0))
 292                         return 0;
 293                 if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE)
 294                         return 1;
 295                 size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr;
 296                 addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE;
 297         }
 298         if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) {
 299                 if (!ASYNC_ENABLED(1, 0))
 300                         return 0;
 301                 if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE)
 302                         return 1;
 303                 size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr;
 304                 addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE;
 305         }
 306         if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) {
 307                 if (!ASYNC_ENABLED(2, 1))
 308                         return 0;
 309                 if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE)
 310                         return 1;
 311                 size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr;
 312                 addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE;
 313         }
 314         if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
 315                 if (ASYNC_ENABLED(3, 1))
 316                         return 0;
 317                 if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
 318                         return 1;
 319                 return 0;
 320         }
 321
 322         /* not within async bounds */
 323         return 2;
 324 }
 325
 326 int bfin_mem_access_type(unsigned long addr, unsigned long size)
 327 {
 328         int cpu = raw_smp_processor_id();
 329
 330         /* Check that things do not wrap around */
 331         if (addr > ULONG_MAX - size)
 332                 return -EFAULT;
 333
 334         if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end))
 335                 return BFIN_MEM_ACCESS_CORE;
 336
 337         if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
 338                 return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
 339         if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 340                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
 341         if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
 342                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 343         if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
 344                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 345 #ifdef COREB_L1_CODE_START
 346         if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
 347                 return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
 348         if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 349                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
 350         if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
 351                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 352         if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
 353                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 354 #endif
 355         if (in_mem_const(addr, size, L2_START, L2_LENGTH))
 356                 return BFIN_MEM_ACCESS_CORE;
 357
 358         if (addr >= SYSMMR_BASE)
 359                 return BFIN_MEM_ACCESS_CORE_ONLY;
 360
 361         switch (in_async(addr, size)) {
 362         case 0: return -EFAULT;
 363         case 1: return BFIN_MEM_ACCESS_CORE;
 364         case 2: /* fall through */;
 365         }
 366
 367         if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
 368                 return BFIN_MEM_ACCESS_CORE;
 369         if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
 370                 return BFIN_MEM_ACCESS_DMA;
 371
 372         return -EFAULT;
 373 }
 374
 375 #if defined(CONFIG_ACCESS_CHECK)
 376 #ifdef CONFIG_ACCESS_OK_L1
 377 __attribute__((l1_text))
 378 #endif
 379 /* Return 1 if access to memory range is OK, 0 otherwise */
 380 int _access_ok(unsigned long addr, unsigned long size)
 381 {
 382         int aret;
 383
 384         if (size == 0)
 385                 return 1;
 386         /* Check that things do not wrap around */
 387         if (addr > ULONG_MAX - size)
 388                 return 0;
 389         if (segment_eq(get_fs(), KERNEL_DS))
 390                 return 1;
 391 #ifdef CONFIG_MTD_UCLINUX
 392         if (1)
 393 #else
 394         if (0)
 395 #endif
 396         {
 397                 if (in_mem(addr, size, memory_start, memory_end))
 398                         return 1;
 399                 if (in_mem(addr, size, memory_mtd_end, physical_mem_end))
 400                         return 1;
 401 # ifndef CONFIG_ROMFS_ON_MTD
 402                 if (0)
 403 # endif
 404                         /* For XIP, allow user space to use pointers within the ROMFS.  */
 405                         if (in_mem(addr, size, memory_mtd_start, memory_mtd_end))
 406                                 return 1;
 407         } else {
 408                 if (in_mem(addr, size, memory_start, physical_mem_end))
 409                         return 1;
 410         }
 411
 412         if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end))
 413                 return 1;
 414
 415         if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
 416                 return 1;
 417         if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH))
 418                 return 1;
 419         if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH))
 420                 return 1;
 421         if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
 422                 return 1;
 423 #ifdef COREB_L1_CODE_START
 424         if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
 425                 return 1;
 426         if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 427                 return 1;
 428         if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
 429                 return 1;
 430         if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
 431                 return 1;
 432 #endif
 433
 434 #ifndef CONFIG_EXCEPTION_L1_SCRATCH
 435         if (in_mem_const(addr, size, (unsigned long)l1_stack_base, l1_stack_len))
 436                 return 1;
 437 #endif
 438
 439         aret = in_async(addr, size);
 440         if (aret < 2)
 441                 return aret;
 442
 443         if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
 444                 return 1;
 445
 446         if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
 447                 return 1;
 448         if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
 449                 return 1;
 450
 451         return 0;
 452 }
 453 EXPORT_SYMBOL(_access_ok);
 454 #endif /* CONFIG_ACCESS_CHECK */