arch/blackfin/kernel/process.c

   1 /*
   2  * Blackfin architecture-dependent process handling
   3  *
   4  * Copyright 2004-2009 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/unistd.h>
  11 #include <linux/user.h>
  12 #include <linux/uaccess.h>
  13 #include <linux/slab.h>
  14 #include <linux/sched.h>
  15 #include <linux/sched/debug.h>
  16 #include <linux/tick.h>
  17 #include <linux/fs.h>
  18 #include <linux/err.h>
  19
  20 #include <asm/blackfin.h>
  21 #include <asm/fixed_code.h>
  22 #include <asm/mem_map.h>
  23 #include <asm/irq.h>
  24
  25 asmlinkage void ret_from_fork(void);
  26
  27 /* Points to the SDRAM backup memory for the stack that is currently in
  28  * L1 scratchpad memory.
  29  */
  30 void *current_l1_stack_save;
  31
  32 /* The number of tasks currently using a L1 stack area.  The SRAM is
  33  * allocated/deallocated whenever this changes from/to zero.
  34  */
  35 int nr_l1stack_tasks;
  36
  37 /* Start and length of the area in L1 scratchpad memory which we've allocated
  38  * for process stacks.
  39  */
  40 void *l1_stack_base;
  41 unsigned long l1_stack_len;
  42
  43 void (*pm_power_off)(void) = NULL;
  44 EXPORT_SYMBOL(pm_power_off);
  45
  46 /*
  47  * The idle loop on BFIN
  48  */
  49 #ifdef CONFIG_IDLE_L1
  50 void arch_cpu_idle(void)__attribute__((l1_text));
  51 #endif
  52
  53 /*
  54  * This is our default idle handler.  We need to disable
  55  * interrupts here to ensure we don't miss a wakeup call.
  56  */
  57 void arch_cpu_idle(void)
  58 {
  59 #ifdef CONFIG_IPIPE
  60         ipipe_suspend_domain();
  61 #endif
  62         hard_local_irq_disable();
  63         if (!need_resched())
  64                 idle_with_irq_disabled();
  65
  66         hard_local_irq_enable();
  67 }
  68
  69 #ifdef CONFIG_HOTPLUG_CPU
  70 void arch_cpu_idle_dead(void)
  71 {
  72         cpu_die();
  73 }
  74 #endif
  75
  76 /*
  77  * Do necessary setup to start up a newly executed thread.
  78  *
  79  * pass the data segment into user programs if it exists,
  80  * it can't hurt anything as far as I can tell
  81  */
  82 void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
  83 {
  84         regs->pc = new_ip;
  85         if (current->mm)
  86                 regs->p5 = current->mm->start_data;
  87 #ifndef CONFIG_SMP
  88         task_thread_info(current)->l1_task_info.stack_start =
  89                 (void *)current->mm->context.stack_start;
  90         task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
  91         memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
  92                sizeof(*L1_SCRATCH_TASK_INFO));
  93 #endif
  94         wrusp(new_sp);
  95 }
  96 EXPORT_SYMBOL_GPL(start_thread);
  97
  98 void flush_thread(void)
  99 {
 100 }
 101
 102 asmlinkage int bfin_clone(unsigned long clone_flags, unsigned long newsp)
 103 {
 104 #ifdef __ARCH_SYNC_CORE_DCACHE
 105         if (current->nr_cpus_allowed == num_possible_cpus())
 106                 set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id()));
 107 #endif
 108         if (newsp)
 109                 newsp -= 12;
 110         return do_fork(clone_flags, newsp, 0, NULL, NULL);
 111 }
 112
 113 int
 114 copy_thread(unsigned long clone_flags,
 115             unsigned long usp, unsigned long topstk,
 116             struct task_struct *p)
 117 {
 118         struct pt_regs *childregs;
 119         unsigned long *v;
 120
 121         childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
 122         v = ((unsigned long *)childregs) - 2;
 123         if (unlikely(p->flags & PF_KTHREAD)) {
 124                 memset(childregs, 0, sizeof(struct pt_regs));
 125                 v[0] = usp;
 126                 v[1] = topstk;
 127                 childregs->orig_p0 = -1;
 128                 childregs->ipend = 0x8000;
 129                 __asm__ __volatile__("%0 = syscfg;":"=da"(childregs->syscfg):);
 130                 p->thread.usp = 0;
 131         } else {
 132                 *childregs = *current_pt_regs();
 133                 childregs->r0 = 0;
 134                 p->thread.usp = usp ? : rdusp();
 135                 v[0] = v[1] = 0;
 136         }
 137
 138         p->thread.ksp = (unsigned long)v;
 139         p->thread.pc = (unsigned long)ret_from_fork;
 140
 141         return 0;
 142 }
 143
 144 unsigned long get_wchan(struct task_struct *p)
 145 {
 146         unsigned long fp, pc;
 147         unsigned long stack_page;
 148         int count = 0;
 149         if (!p || p == current || p->state == TASK_RUNNING)
 150                 return 0;
 151
 152         stack_page = (unsigned long)p;
 153         fp = p->thread.usp;
 154         do {
 155                 if (fp < stack_page + sizeof(struct thread_info) ||
 156                     fp >= 8184 + stack_page)
 157                         return 0;
 158                 pc = ((unsigned long *)fp)[1];
 159                 if (!in_sched_functions(pc))
 160                         return pc;
 161                 fp = *(unsigned long *)fp;
 162         }
 163         while (count++ < 16);
 164         return 0;
 165 }
 166
 167 void finish_atomic_sections (struct pt_regs *regs)
 168 {
 169         int __user *up0 = (int __user *)regs->p0;
 170
 171         switch (regs->pc) {
 172         default:
 173                 /* not in middle of an atomic step, so resume like normal */
 174                 return;
 175
 176         case ATOMIC_XCHG32 + 2:
 177                 put_user(regs->r1, up0);
 178                 break;
 179
 180         case ATOMIC_CAS32 + 2:
 181         case ATOMIC_CAS32 + 4:
 182                 if (regs->r0 == regs->r1)
 183         case ATOMIC_CAS32 + 6:
 184                         put_user(regs->r2, up0);
 185                 break;
 186
 187         case ATOMIC_ADD32 + 2:
 188                 regs->r0 = regs->r1 + regs->r0;
 189                 /* fall through */
 190         case ATOMIC_ADD32 + 4:
 191                 put_user(regs->r0, up0);
 192                 break;
 193
 194         case ATOMIC_SUB32 + 2:
 195                 regs->r0 = regs->r1 - regs->r0;
 196                 /* fall through */
 197         case ATOMIC_SUB32 + 4:
 198                 put_user(regs->r0, up0);
 199                 break;
 200
 201         case ATOMIC_IOR32 + 2:
 202                 regs->r0 = regs->r1 | regs->r0;
 203                 /* fall through */
 204         case ATOMIC_IOR32 + 4:
 205                 put_user(regs->r0, up0);
 206                 break;
 207
 208         case ATOMIC_AND32 + 2:
 209                 regs->r0 = regs->r1 & regs->r0;
 210                 /* fall through */
 211         case ATOMIC_AND32 + 4:
 212                 put_user(regs->r0, up0);
 213                 break;
 214
 215         case ATOMIC_XOR32 + 2:
 216                 regs->r0 = regs->r1 ^ regs->r0;
 217                 /* fall through */
 218         case ATOMIC_XOR32 + 4:
 219                 put_user(regs->r0, up0);
 220                 break;
 221         }
 222
 223         /*
 224          * We've finished the atomic section, and the only thing left for
 225          * userspace is to do a RTS, so we might as well handle that too
 226          * since we need to update the PC anyways.
 227          */
 228         regs->pc = regs->rets;
 229 }
 230
 231 static inline
 232 int in_mem(unsigned long addr, unsigned long size,
 233            unsigned long start, unsigned long end)
 234 {
 235         return addr >= start && addr + size <= end;
 236 }
 237 static inline
 238 int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off,
 239                      unsigned long const_addr, unsigned long const_size)
 240 {
 241         return const_size &&
 242                in_mem(addr, size, const_addr + off, const_addr + const_size);
 243 }
 244 static inline
 245 int in_mem_const(unsigned long addr, unsigned long size,
 246                  unsigned long const_addr, unsigned long const_size)
 247 {
 248         return in_mem_const_off(addr, size, 0, const_addr, const_size);
 249 }
 250 #ifdef CONFIG_BF60x
 251 #define ASYNC_ENABLED(bnum, bctlnum)    1
 252 #else
 253 #define ASYNC_ENABLED(bnum, bctlnum) \
 254 ({ \
 255         (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \
 256         bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \
 257         1; \
 258 })
 259 #endif
 260 /*
 261  * We can't read EBIU banks that aren't enabled or we end up hanging
 262  * on the access to the async space.  Make sure we validate accesses
 263  * that cross async banks too.
 264  *      0 - found, but unusable
 265  *      1 - found & usable
 266  *      2 - not found
 267  */
 268 static
 269 int in_async(unsigned long addr, unsigned long size)
 270 {
 271         if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) {
 272                 if (!ASYNC_ENABLED(0, 0))
 273                         return 0;
 274                 if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE)
 275                         return 1;
 276                 size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr;
 277                 addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE;
 278         }
 279         if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) {
 280                 if (!ASYNC_ENABLED(1, 0))
 281                         return 0;
 282                 if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE)
 283                         return 1;
 284                 size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr;
 285                 addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE;
 286         }
 287         if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) {
 288                 if (!ASYNC_ENABLED(2, 1))
 289                         return 0;
 290                 if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE)
 291                         return 1;
 292                 size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr;
 293                 addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE;
 294         }
 295         if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
 296                 if (ASYNC_ENABLED(3, 1))
 297                         return 0;
 298                 if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
 299                         return 1;
 300                 return 0;
 301         }
 302
 303         /* not within async bounds */
 304         return 2;
 305 }
 306
 307 int bfin_mem_access_type(unsigned long addr, unsigned long size)
 308 {
 309         int cpu = raw_smp_processor_id();
 310
 311         /* Check that things do not wrap around */
 312         if (addr > ULONG_MAX - size)
 313                 return -EFAULT;
 314
 315         if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end))
 316                 return BFIN_MEM_ACCESS_CORE;
 317
 318         if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
 319                 return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
 320         if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 321                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
 322         if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
 323                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 324         if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
 325                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 326 #ifdef COREB_L1_CODE_START
 327         if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
 328                 return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
 329         if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 330                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
 331         if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
 332                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 333         if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
 334                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 335 #endif
 336         if (in_mem_const(addr, size, L2_START, L2_LENGTH))
 337                 return BFIN_MEM_ACCESS_CORE;
 338
 339         if (addr >= SYSMMR_BASE)
 340                 return BFIN_MEM_ACCESS_CORE_ONLY;
 341
 342         switch (in_async(addr, size)) {
 343         case 0: return -EFAULT;
 344         case 1: return BFIN_MEM_ACCESS_CORE;
 345         case 2: /* fall through */;
 346         }
 347
 348         if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
 349                 return BFIN_MEM_ACCESS_CORE;
 350         if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
 351                 return BFIN_MEM_ACCESS_DMA;
 352
 353         return -EFAULT;
 354 }
 355
 356 #if defined(CONFIG_ACCESS_CHECK)
 357 #ifdef CONFIG_ACCESS_OK_L1
 358 __attribute__((l1_text))
 359 #endif
 360 /* Return 1 if access to memory range is OK, 0 otherwise */
 361 int _access_ok(unsigned long addr, unsigned long size)
 362 {
 363         int aret;
 364
 365         if (size == 0)
 366                 return 1;
 367         /* Check that things do not wrap around */
 368         if (addr > ULONG_MAX - size)
 369                 return 0;
 370         if (segment_eq(get_fs(), KERNEL_DS))
 371                 return 1;
 372 #ifdef CONFIG_MTD_UCLINUX
 373         if (1)
 374 #else
 375         if (0)
 376 #endif
 377         {
 378                 if (in_mem(addr, size, memory_start, memory_end))
 379                         return 1;
 380                 if (in_mem(addr, size, memory_mtd_end, physical_mem_end))
 381                         return 1;
 382 # ifndef CONFIG_ROMFS_ON_MTD
 383                 if (0)
 384 # endif
 385                         /* For XIP, allow user space to use pointers within the ROMFS.  */
 386                         if (in_mem(addr, size, memory_mtd_start, memory_mtd_end))
 387                                 return 1;
 388         } else {
 389                 if (in_mem(addr, size, memory_start, physical_mem_end))
 390                         return 1;
 391         }
 392
 393         if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end))
 394                 return 1;
 395
 396         if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
 397                 return 1;
 398         if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH))
 399                 return 1;
 400         if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH))
 401                 return 1;
 402         if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
 403                 return 1;
 404 #ifdef COREB_L1_CODE_START
 405         if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
 406                 return 1;
 407         if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 408                 return 1;
 409         if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
 410                 return 1;
 411         if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
 412                 return 1;
 413 #endif
 414
 415 #ifndef CONFIG_EXCEPTION_L1_SCRATCH
 416         if (in_mem_const(addr, size, (unsigned long)l1_stack_base, l1_stack_len))
 417                 return 1;
 418 #endif
 419
 420         aret = in_async(addr, size);
 421         if (aret < 2)
 422                 return aret;
 423
 424         if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
 425                 return 1;
 426
 427         if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
 428                 return 1;
 429         if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
 430                 return 1;
 431
 432         return 0;
 433 }
 434 EXPORT_SYMBOL(_access_ok);
 435 #endif /* CONFIG_ACCESS_CHECK */