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[sagit-ice-cold/kernel_xiaomi_msm8998.git] / arch / mips / kernel / process.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
7  * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
8  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9  * Copyright (C) 2004 Thiemo Seufer
10  * Copyright (C) 2013  Imagination Technologies Ltd.
11  */
12 #include <linux/errno.h>
13 #include <linux/sched.h>
14 #include <linux/tick.h>
15 #include <linux/kernel.h>
16 #include <linux/mm.h>
17 #include <linux/stddef.h>
18 #include <linux/unistd.h>
19 #include <linux/export.h>
20 #include <linux/ptrace.h>
21 #include <linux/mman.h>
22 #include <linux/personality.h>
23 #include <linux/sys.h>
24 #include <linux/init.h>
25 #include <linux/completion.h>
26 #include <linux/kallsyms.h>
27 #include <linux/random.h>
28 #include <linux/prctl.h>
29
30 #include <asm/asm.h>
31 #include <asm/bootinfo.h>
32 #include <asm/cpu.h>
33 #include <asm/dsemul.h>
34 #include <asm/dsp.h>
35 #include <asm/fpu.h>
36 #include <asm/irq.h>
37 #include <asm/msa.h>
38 #include <asm/pgtable.h>
39 #include <asm/mipsregs.h>
40 #include <asm/processor.h>
41 #include <asm/reg.h>
42 #include <asm/uaccess.h>
43 #include <asm/io.h>
44 #include <asm/elf.h>
45 #include <asm/isadep.h>
46 #include <asm/inst.h>
47 #include <asm/stacktrace.h>
48 #include <asm/irq_regs.h>
49
50 #ifdef CONFIG_HOTPLUG_CPU
51 void arch_cpu_idle_dead(void)
52 {
53         play_dead();
54 }
55 #endif
56
57 asmlinkage void ret_from_fork(void);
58 asmlinkage void ret_from_kernel_thread(void);
59
60 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
61 {
62         unsigned long status;
63
64         /* New thread loses kernel privileges. */
65         status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
66         status |= KU_USER;
67         regs->cp0_status = status;
68         lose_fpu(0);
69         clear_thread_flag(TIF_MSA_CTX_LIVE);
70         clear_used_math();
71         atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
72         init_dsp();
73         regs->cp0_epc = pc;
74         regs->regs[29] = sp;
75 }
76
77 void exit_thread(struct task_struct *tsk)
78 {
79         /*
80          * User threads may have allocated a delay slot emulation frame.
81          * If so, clean up that allocation.
82          */
83         if (!(current->flags & PF_KTHREAD))
84                 dsemul_thread_cleanup(tsk);
85 }
86
87 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
88 {
89         /*
90          * Save any process state which is live in hardware registers to the
91          * parent context prior to duplication. This prevents the new child
92          * state becoming stale if the parent is preempted before copy_thread()
93          * gets a chance to save the parent's live hardware registers to the
94          * child context.
95          */
96         preempt_disable();
97
98         if (is_msa_enabled())
99                 save_msa(current);
100         else if (is_fpu_owner())
101                 _save_fp(current);
102
103         save_dsp(current);
104
105         preempt_enable();
106
107         *dst = *src;
108         return 0;
109 }
110
111 /*
112  * Copy architecture-specific thread state
113  */
114 int copy_thread(unsigned long clone_flags, unsigned long usp,
115         unsigned long kthread_arg, struct task_struct *p)
116 {
117         struct thread_info *ti = task_thread_info(p);
118         struct pt_regs *childregs, *regs = current_pt_regs();
119         unsigned long childksp;
120
121         childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
122
123         /* set up new TSS. */
124         childregs = (struct pt_regs *) childksp - 1;
125         /*  Put the stack after the struct pt_regs.  */
126         childksp = (unsigned long) childregs;
127         p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
128         if (unlikely(p->flags & PF_KTHREAD)) {
129                 /* kernel thread */
130                 unsigned long status = p->thread.cp0_status;
131                 memset(childregs, 0, sizeof(struct pt_regs));
132                 ti->addr_limit = KERNEL_DS;
133                 p->thread.reg16 = usp; /* fn */
134                 p->thread.reg17 = kthread_arg;
135                 p->thread.reg29 = childksp;
136                 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
137 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
138                 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
139                          ((status & (ST0_KUC | ST0_IEC)) << 2);
140 #else
141                 status |= ST0_EXL;
142 #endif
143                 childregs->cp0_status = status;
144                 return 0;
145         }
146
147         /* user thread */
148         *childregs = *regs;
149         childregs->regs[7] = 0; /* Clear error flag */
150         childregs->regs[2] = 0; /* Child gets zero as return value */
151         if (usp)
152                 childregs->regs[29] = usp;
153         ti->addr_limit = USER_DS;
154
155         p->thread.reg29 = (unsigned long) childregs;
156         p->thread.reg31 = (unsigned long) ret_from_fork;
157
158         /*
159          * New tasks lose permission to use the fpu. This accelerates context
160          * switching for most programs since they don't use the fpu.
161          */
162         childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
163
164         clear_tsk_thread_flag(p, TIF_USEDFPU);
165         clear_tsk_thread_flag(p, TIF_USEDMSA);
166         clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
167
168 #ifdef CONFIG_MIPS_MT_FPAFF
169         clear_tsk_thread_flag(p, TIF_FPUBOUND);
170 #endif /* CONFIG_MIPS_MT_FPAFF */
171
172         atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
173
174         if (clone_flags & CLONE_SETTLS)
175                 ti->tp_value = regs->regs[7];
176
177         return 0;
178 }
179
180 #ifdef CONFIG_CC_STACKPROTECTOR
181 #include <linux/stackprotector.h>
182 unsigned long __stack_chk_guard __read_mostly;
183 EXPORT_SYMBOL(__stack_chk_guard);
184 #endif
185
186 struct mips_frame_info {
187         void            *func;
188         unsigned long   func_size;
189         int             frame_size;
190         int             pc_offset;
191 };
192
193 #define J_TARGET(pc,target)     \
194                 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
195
196 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
197 {
198 #ifdef CONFIG_CPU_MICROMIPS
199         /*
200          * swsp ra,offset
201          * swm16 reglist,offset(sp)
202          * swm32 reglist,offset(sp)
203          * sw32 ra,offset(sp)
204          * jradiussp - NOT SUPPORTED
205          *
206          * microMIPS is way more fun...
207          */
208         if (mm_insn_16bit(ip->halfword[1])) {
209                 switch (ip->mm16_r5_format.opcode) {
210                 case mm_swsp16_op:
211                         if (ip->mm16_r5_format.rt != 31)
212                                 return 0;
213
214                         *poff = ip->mm16_r5_format.simmediate;
215                         *poff = (*poff << 2) / sizeof(ulong);
216                         return 1;
217
218                 case mm_pool16c_op:
219                         switch (ip->mm16_m_format.func) {
220                         case mm_swm16_op:
221                                 *poff = ip->mm16_m_format.imm;
222                                 *poff += 1 + ip->mm16_m_format.rlist;
223                                 *poff = (*poff << 2) / sizeof(ulong);
224                                 return 1;
225
226                         default:
227                                 return 0;
228                         }
229
230                 default:
231                         return 0;
232                 }
233         }
234
235         switch (ip->i_format.opcode) {
236         case mm_sw32_op:
237                 if (ip->i_format.rs != 29)
238                         return 0;
239                 if (ip->i_format.rt != 31)
240                         return 0;
241
242                 *poff = ip->i_format.simmediate / sizeof(ulong);
243                 return 1;
244
245         case mm_pool32b_op:
246                 switch (ip->mm_m_format.func) {
247                 case mm_swm32_func:
248                         if (ip->mm_m_format.rd < 0x10)
249                                 return 0;
250                         if (ip->mm_m_format.base != 29)
251                                 return 0;
252
253                         *poff = ip->mm_m_format.simmediate;
254                         *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
255                         *poff /= sizeof(ulong);
256                         return 1;
257                 default:
258                         return 0;
259                 }
260
261         default:
262                 return 0;
263         }
264 #else
265         /* sw / sd $ra, offset($sp) */
266         if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
267                 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
268                 *poff = ip->i_format.simmediate / sizeof(ulong);
269                 return 1;
270         }
271
272         return 0;
273 #endif
274 }
275
276 static inline int is_jump_ins(union mips_instruction *ip)
277 {
278 #ifdef CONFIG_CPU_MICROMIPS
279         /*
280          * jr16,jrc,jalr16,jalr16
281          * jal
282          * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
283          * jraddiusp - NOT SUPPORTED
284          *
285          * microMIPS is kind of more fun...
286          */
287         if (mm_insn_16bit(ip->halfword[1])) {
288                 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
289                     (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
290                         return 1;
291                 return 0;
292         }
293
294         if (ip->j_format.opcode == mm_j32_op)
295                 return 1;
296         if (ip->j_format.opcode == mm_jal32_op)
297                 return 1;
298         if (ip->r_format.opcode != mm_pool32a_op ||
299                         ip->r_format.func != mm_pool32axf_op)
300                 return 0;
301         return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
302 #else
303         if (ip->j_format.opcode == j_op)
304                 return 1;
305         if (ip->j_format.opcode == jal_op)
306                 return 1;
307         if (ip->r_format.opcode != spec_op)
308                 return 0;
309         return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
310 #endif
311 }
312
313 static inline int is_sp_move_ins(union mips_instruction *ip)
314 {
315 #ifdef CONFIG_CPU_MICROMIPS
316         /*
317          * addiusp -imm
318          * addius5 sp,-imm
319          * addiu32 sp,sp,-imm
320          * jradiussp - NOT SUPPORTED
321          *
322          * microMIPS is not more fun...
323          */
324         if (mm_insn_16bit(ip->halfword[1])) {
325                 return (ip->mm16_r3_format.opcode == mm_pool16d_op &&
326                         ip->mm16_r3_format.simmediate && mm_addiusp_func) ||
327                        (ip->mm16_r5_format.opcode == mm_pool16d_op &&
328                         ip->mm16_r5_format.rt == 29);
329         }
330
331         return ip->mm_i_format.opcode == mm_addiu32_op &&
332                ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
333 #else
334         /* addiu/daddiu sp,sp,-imm */
335         if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
336                 return 0;
337         if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
338                 return 1;
339 #endif
340         return 0;
341 }
342
343 static int get_frame_info(struct mips_frame_info *info)
344 {
345         bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
346         union mips_instruction insn, *ip, *ip_end;
347         const unsigned int max_insns = 128;
348         unsigned int i;
349
350         info->pc_offset = -1;
351         info->frame_size = 0;
352
353         ip = (void *)msk_isa16_mode((ulong)info->func);
354         if (!ip)
355                 goto err;
356
357         ip_end = (void *)ip + info->func_size;
358
359         for (i = 0; i < max_insns && ip < ip_end; i++, ip++) {
360                 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
361                         insn.halfword[0] = 0;
362                         insn.halfword[1] = ip->halfword[0];
363                 } else if (is_mmips) {
364                         insn.halfword[0] = ip->halfword[1];
365                         insn.halfword[1] = ip->halfword[0];
366                 } else {
367                         insn.word = ip->word;
368                 }
369
370                 if (is_jump_ins(&insn))
371                         break;
372
373                 if (!info->frame_size) {
374                         if (is_sp_move_ins(&insn))
375                         {
376 #ifdef CONFIG_CPU_MICROMIPS
377                                 if (mm_insn_16bit(ip->halfword[0]))
378                                 {
379                                         unsigned short tmp;
380
381                                         if (ip->halfword[0] & mm_addiusp_func)
382                                         {
383                                                 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
384                                                 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
385                                         } else {
386                                                 tmp = (ip->halfword[0] >> 1);
387                                                 info->frame_size = -(signed short)(tmp & 0xf);
388                                         }
389                                         ip = (void *) &ip->halfword[1];
390                                         ip--;
391                                 } else
392 #endif
393                                 info->frame_size = - ip->i_format.simmediate;
394                         }
395                         continue;
396                 }
397                 if (info->pc_offset == -1 &&
398                     is_ra_save_ins(&insn, &info->pc_offset))
399                         break;
400         }
401         if (info->frame_size && info->pc_offset >= 0) /* nested */
402                 return 0;
403         if (info->pc_offset < 0) /* leaf */
404                 return 1;
405         /* prologue seems boggus... */
406 err:
407         return -1;
408 }
409
410 static struct mips_frame_info schedule_mfi __read_mostly;
411
412 #ifdef CONFIG_KALLSYMS
413 static unsigned long get___schedule_addr(void)
414 {
415         return kallsyms_lookup_name("__schedule");
416 }
417 #else
418 static unsigned long get___schedule_addr(void)
419 {
420         union mips_instruction *ip = (void *)schedule;
421         int max_insns = 8;
422         int i;
423
424         for (i = 0; i < max_insns; i++, ip++) {
425                 if (ip->j_format.opcode == j_op)
426                         return J_TARGET(ip, ip->j_format.target);
427         }
428         return 0;
429 }
430 #endif
431
432 static int __init frame_info_init(void)
433 {
434         unsigned long size = 0;
435 #ifdef CONFIG_KALLSYMS
436         unsigned long ofs;
437 #endif
438         unsigned long addr;
439
440         addr = get___schedule_addr();
441         if (!addr)
442                 addr = (unsigned long)schedule;
443
444 #ifdef CONFIG_KALLSYMS
445         kallsyms_lookup_size_offset(addr, &size, &ofs);
446 #endif
447         schedule_mfi.func = (void *)addr;
448         schedule_mfi.func_size = size;
449
450         get_frame_info(&schedule_mfi);
451
452         /*
453          * Without schedule() frame info, result given by
454          * thread_saved_pc() and get_wchan() are not reliable.
455          */
456         if (schedule_mfi.pc_offset < 0)
457                 printk("Can't analyze schedule() prologue at %p\n", schedule);
458
459         return 0;
460 }
461
462 arch_initcall(frame_info_init);
463
464 /*
465  * Return saved PC of a blocked thread.
466  */
467 unsigned long thread_saved_pc(struct task_struct *tsk)
468 {
469         struct thread_struct *t = &tsk->thread;
470
471         /* New born processes are a special case */
472         if (t->reg31 == (unsigned long) ret_from_fork)
473                 return t->reg31;
474         if (schedule_mfi.pc_offset < 0)
475                 return 0;
476         return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
477 }
478
479
480 #ifdef CONFIG_KALLSYMS
481 /* generic stack unwinding function */
482 unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
483                                               unsigned long *sp,
484                                               unsigned long pc,
485                                               unsigned long *ra)
486 {
487         unsigned long low, high, irq_stack_high;
488         struct mips_frame_info info;
489         unsigned long size, ofs;
490         struct pt_regs *regs;
491         int leaf;
492
493         if (!stack_page)
494                 return 0;
495
496         /*
497          * IRQ stacks start at IRQ_STACK_START
498          * task stacks at THREAD_SIZE - 32
499          */
500         low = stack_page;
501         if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
502                 high = stack_page + IRQ_STACK_START;
503                 irq_stack_high = high;
504         } else {
505                 high = stack_page + THREAD_SIZE - 32;
506                 irq_stack_high = 0;
507         }
508
509         /*
510          * If we reached the top of the interrupt stack, start unwinding
511          * the interrupted task stack.
512          */
513         if (unlikely(*sp == irq_stack_high)) {
514                 unsigned long task_sp = *(unsigned long *)*sp;
515
516                 /*
517                  * Check that the pointer saved in the IRQ stack head points to
518                  * something within the stack of the current task
519                  */
520                 if (!object_is_on_stack((void *)task_sp))
521                         return 0;
522
523                 /*
524                  * Follow pointer to tasks kernel stack frame where interrupted
525                  * state was saved.
526                  */
527                 regs = (struct pt_regs *)task_sp;
528                 pc = regs->cp0_epc;
529                 if (!user_mode(regs) && __kernel_text_address(pc)) {
530                         *sp = regs->regs[29];
531                         *ra = regs->regs[31];
532                         return pc;
533                 }
534                 return 0;
535         }
536         if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
537                 return 0;
538         /*
539          * Return ra if an exception occurred at the first instruction
540          */
541         if (unlikely(ofs == 0)) {
542                 pc = *ra;
543                 *ra = 0;
544                 return pc;
545         }
546
547         info.func = (void *)(pc - ofs);
548         info.func_size = ofs;   /* analyze from start to ofs */
549         leaf = get_frame_info(&info);
550         if (leaf < 0)
551                 return 0;
552
553         if (*sp < low || *sp + info.frame_size > high)
554                 return 0;
555
556         if (leaf)
557                 /*
558                  * For some extreme cases, get_frame_info() can
559                  * consider wrongly a nested function as a leaf
560                  * one. In that cases avoid to return always the
561                  * same value.
562                  */
563                 pc = pc != *ra ? *ra : 0;
564         else
565                 pc = ((unsigned long *)(*sp))[info.pc_offset];
566
567         *sp += info.frame_size;
568         *ra = 0;
569         return __kernel_text_address(pc) ? pc : 0;
570 }
571 EXPORT_SYMBOL(unwind_stack_by_address);
572
573 /* used by show_backtrace() */
574 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
575                            unsigned long pc, unsigned long *ra)
576 {
577         unsigned long stack_page = 0;
578         int cpu;
579
580         for_each_possible_cpu(cpu) {
581                 if (on_irq_stack(cpu, *sp)) {
582                         stack_page = (unsigned long)irq_stack[cpu];
583                         break;
584                 }
585         }
586
587         if (!stack_page)
588                 stack_page = (unsigned long)task_stack_page(task);
589
590         return unwind_stack_by_address(stack_page, sp, pc, ra);
591 }
592 #endif
593
594 /*
595  * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
596  */
597 unsigned long get_wchan(struct task_struct *task)
598 {
599         unsigned long pc = 0;
600 #ifdef CONFIG_KALLSYMS
601         unsigned long sp;
602         unsigned long ra = 0;
603 #endif
604
605         if (!task || task == current || task->state == TASK_RUNNING)
606                 goto out;
607         if (!task_stack_page(task))
608                 goto out;
609
610         pc = thread_saved_pc(task);
611
612 #ifdef CONFIG_KALLSYMS
613         sp = task->thread.reg29 + schedule_mfi.frame_size;
614
615         while (in_sched_functions(pc))
616                 pc = unwind_stack(task, &sp, pc, &ra);
617 #endif
618
619 out:
620         return pc;
621 }
622
623 /*
624  * Don't forget that the stack pointer must be aligned on a 8 bytes
625  * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
626  */
627 unsigned long arch_align_stack(unsigned long sp)
628 {
629         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
630                 sp -= get_random_int() & ~PAGE_MASK;
631
632         return sp & ALMASK;
633 }
634
635 static DEFINE_PER_CPU(struct call_single_data, backtrace_csd);
636 static struct cpumask backtrace_csd_busy;
637
638 static void arch_dump_stack(void *info)
639 {
640         struct pt_regs *regs;
641         static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED;
642
643         arch_spin_lock(&lock);
644         regs = get_irq_regs();
645
646         if (regs)
647                 show_regs(regs);
648         else
649                 dump_stack();
650         arch_spin_unlock(&lock);
651
652         cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy);
653 }
654
655 void arch_trigger_all_cpu_backtrace(bool include_self)
656 {
657         struct call_single_data *csd;
658         int cpu;
659
660         for_each_cpu(cpu, cpu_online_mask) {
661                 /*
662                  * If we previously sent an IPI to the target CPU & it hasn't
663                  * cleared its bit in the busy cpumask then it didn't handle
664                  * our previous IPI & it's not safe for us to reuse the
665                  * call_single_data_t.
666                  */
667                 if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) {
668                         pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n",
669                                 cpu);
670                         continue;
671                 }
672
673                 csd = &per_cpu(backtrace_csd, cpu);
674                 csd->func = arch_dump_stack;
675                 smp_call_function_single_async(cpu, csd);
676         }
677 }
678
679 int mips_get_process_fp_mode(struct task_struct *task)
680 {
681         int value = 0;
682
683         if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
684                 value |= PR_FP_MODE_FR;
685         if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
686                 value |= PR_FP_MODE_FRE;
687
688         return value;
689 }
690
691 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
692 {
693         const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
694         unsigned long switch_count;
695         struct task_struct *t;
696
697         /* If nothing to change, return right away, successfully.  */
698         if (value == mips_get_process_fp_mode(task))
699                 return 0;
700
701         /* Only accept a mode change if 64-bit FP enabled for o32.  */
702         if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
703                 return -EOPNOTSUPP;
704
705         /* And only for o32 tasks.  */
706         if (IS_ENABLED(CONFIG_64BIT) && !test_thread_flag(TIF_32BIT_REGS))
707                 return -EOPNOTSUPP;
708
709         /* Check the value is valid */
710         if (value & ~known_bits)
711                 return -EOPNOTSUPP;
712
713         /* Setting FRE without FR is not supported.  */
714         if ((value & (PR_FP_MODE_FR | PR_FP_MODE_FRE)) == PR_FP_MODE_FRE)
715                 return -EOPNOTSUPP;
716
717         /* Avoid inadvertently triggering emulation */
718         if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
719             !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
720                 return -EOPNOTSUPP;
721         if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
722                 return -EOPNOTSUPP;
723
724         /* FR = 0 not supported in MIPS R6 */
725         if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
726                 return -EOPNOTSUPP;
727
728         /* Proceed with the mode switch */
729         preempt_disable();
730
731         /* Save FP & vector context, then disable FPU & MSA */
732         if (task->signal == current->signal)
733                 lose_fpu(1);
734
735         /* Prevent any threads from obtaining live FP context */
736         atomic_set(&task->mm->context.fp_mode_switching, 1);
737         smp_mb__after_atomic();
738
739         /*
740          * If there are multiple online CPUs then wait until all threads whose
741          * FP mode is about to change have been context switched. This approach
742          * allows us to only worry about whether an FP mode switch is in
743          * progress when FP is first used in a tasks time slice. Pretty much all
744          * of the mode switch overhead can thus be confined to cases where mode
745          * switches are actually occurring. That is, to here. However for the
746          * thread performing the mode switch it may take a while...
747          */
748         if (num_online_cpus() > 1) {
749                 spin_lock_irq(&task->sighand->siglock);
750
751                 for_each_thread(task, t) {
752                         if (t == current)
753                                 continue;
754
755                         switch_count = t->nvcsw + t->nivcsw;
756
757                         do {
758                                 spin_unlock_irq(&task->sighand->siglock);
759                                 cond_resched();
760                                 spin_lock_irq(&task->sighand->siglock);
761                         } while ((t->nvcsw + t->nivcsw) == switch_count);
762                 }
763
764                 spin_unlock_irq(&task->sighand->siglock);
765         }
766
767         /*
768          * There are now no threads of the process with live FP context, so it
769          * is safe to proceed with the FP mode switch.
770          */
771         for_each_thread(task, t) {
772                 /* Update desired FP register width */
773                 if (value & PR_FP_MODE_FR) {
774                         clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
775                 } else {
776                         set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
777                         clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
778                 }
779
780                 /* Update desired FP single layout */
781                 if (value & PR_FP_MODE_FRE)
782                         set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
783                 else
784                         clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
785         }
786
787         /* Allow threads to use FP again */
788         atomic_set(&task->mm->context.fp_mode_switching, 0);
789         preempt_enable();
790
791         return 0;
792 }