arch/mips/kvm/mips.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * KVM/MIPS: MIPS specific KVM APIs
   7  *
   8  * Copyright (C) 2012  MIPS Technologies, Inc.  All rights reserved.
   9  * Authors: Sanjay Lal <sanjayl@kymasys.com>
  10  */
  11
  12 #include <linux/errno.h>
  13 #include <linux/err.h>
  14 #include <linux/kdebug.h>
  15 #include <linux/module.h>
  16 #include <linux/vmalloc.h>
  17 #include <linux/fs.h>
  18 #include <linux/bootmem.h>
  19 #include <asm/fpu.h>
  20 #include <asm/page.h>
  21 #include <asm/cacheflush.h>
  22 #include <asm/mmu_context.h>
  23 #include <asm/pgtable.h>
  24
  25 #include <linux/kvm_host.h>
  26
  27 #include "interrupt.h"
  28 #include "commpage.h"
  29
  30 #define CREATE_TRACE_POINTS
  31 #include "trace.h"
  32
  33 #ifndef VECTORSPACING
  34 #define VECTORSPACING 0x100     /* for EI/VI mode */
  35 #endif
  36
  37 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x)
  38 struct kvm_stats_debugfs_item debugfs_entries[] = {
  39         { "wait",         VCPU_STAT(wait_exits),         KVM_STAT_VCPU },
  40         { "cache",        VCPU_STAT(cache_exits),        KVM_STAT_VCPU },
  41         { "signal",       VCPU_STAT(signal_exits),       KVM_STAT_VCPU },
  42         { "interrupt",    VCPU_STAT(int_exits),          KVM_STAT_VCPU },
  43         { "cop_unsuable", VCPU_STAT(cop_unusable_exits), KVM_STAT_VCPU },
  44         { "tlbmod",       VCPU_STAT(tlbmod_exits),       KVM_STAT_VCPU },
  45         { "tlbmiss_ld",   VCPU_STAT(tlbmiss_ld_exits),   KVM_STAT_VCPU },
  46         { "tlbmiss_st",   VCPU_STAT(tlbmiss_st_exits),   KVM_STAT_VCPU },
  47         { "addrerr_st",   VCPU_STAT(addrerr_st_exits),   KVM_STAT_VCPU },
  48         { "addrerr_ld",   VCPU_STAT(addrerr_ld_exits),   KVM_STAT_VCPU },
  49         { "syscall",      VCPU_STAT(syscall_exits),      KVM_STAT_VCPU },
  50         { "resvd_inst",   VCPU_STAT(resvd_inst_exits),   KVM_STAT_VCPU },
  51         { "break_inst",   VCPU_STAT(break_inst_exits),   KVM_STAT_VCPU },
  52         { "trap_inst",    VCPU_STAT(trap_inst_exits),    KVM_STAT_VCPU },
  53         { "msa_fpe",      VCPU_STAT(msa_fpe_exits),      KVM_STAT_VCPU },
  54         { "fpe",          VCPU_STAT(fpe_exits),          KVM_STAT_VCPU },
  55         { "msa_disabled", VCPU_STAT(msa_disabled_exits), KVM_STAT_VCPU },
  56         { "flush_dcache", VCPU_STAT(flush_dcache_exits), KVM_STAT_VCPU },
  57         { "halt_successful_poll", VCPU_STAT(halt_successful_poll), KVM_STAT_VCPU },
  58         { "halt_wakeup",  VCPU_STAT(halt_wakeup),        KVM_STAT_VCPU },
  59         {NULL}
  60 };
  61
  62 static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
  63 {
  64         int i;
  65
  66         for_each_possible_cpu(i) {
  67                 vcpu->arch.guest_kernel_asid[i] = 0;
  68                 vcpu->arch.guest_user_asid[i] = 0;
  69         }
  70
  71         return 0;
  72 }
  73
  74 /*
  75  * XXXKYMA: We are simulatoring a processor that has the WII bit set in
  76  * Config7, so we are "runnable" if interrupts are pending
  77  */
  78 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
  79 {
  80         return !!(vcpu->arch.pending_exceptions);
  81 }
  82
  83 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
  84 {
  85         return 1;
  86 }
  87
  88 int kvm_arch_hardware_enable(void)
  89 {
  90         return 0;
  91 }
  92
  93 int kvm_arch_hardware_setup(void)
  94 {
  95         return 0;
  96 }
  97
  98 void kvm_arch_check_processor_compat(void *rtn)
  99 {
 100         *(int *)rtn = 0;
 101 }
 102
 103 static void kvm_mips_init_tlbs(struct kvm *kvm)
 104 {
 105         unsigned long wired;
 106
 107         /*
 108          * Add a wired entry to the TLB, it is used to map the commpage to
 109          * the Guest kernel
 110          */
 111         wired = read_c0_wired();
 112         write_c0_wired(wired + 1);
 113         mtc0_tlbw_hazard();
 114         kvm->arch.commpage_tlb = wired;
 115
 116         kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
 117                   kvm->arch.commpage_tlb);
 118 }
 119
 120 static void kvm_mips_init_vm_percpu(void *arg)
 121 {
 122         struct kvm *kvm = (struct kvm *)arg;
 123
 124         kvm_mips_init_tlbs(kvm);
 125         kvm_mips_callbacks->vm_init(kvm);
 126
 127 }
 128
 129 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
 130 {
 131         if (atomic_inc_return(&kvm_mips_instance) == 1) {
 132                 kvm_debug("%s: 1st KVM instance, setup host TLB parameters\n",
 133                           __func__);
 134                 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
 135         }
 136
 137         return 0;
 138 }
 139
 140 void kvm_mips_free_vcpus(struct kvm *kvm)
 141 {
 142         unsigned int i;
 143         struct kvm_vcpu *vcpu;
 144
 145         /* Put the pages we reserved for the guest pmap */
 146         for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
 147                 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
 148                         kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
 149         }
 150         kfree(kvm->arch.guest_pmap);
 151
 152         kvm_for_each_vcpu(i, vcpu, kvm) {
 153                 kvm_arch_vcpu_free(vcpu);
 154         }
 155
 156         mutex_lock(&kvm->lock);
 157
 158         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
 159                 kvm->vcpus[i] = NULL;
 160
 161         atomic_set(&kvm->online_vcpus, 0);
 162
 163         mutex_unlock(&kvm->lock);
 164 }
 165
 166 static void kvm_mips_uninit_tlbs(void *arg)
 167 {
 168         /* Restore wired count */
 169         write_c0_wired(0);
 170         mtc0_tlbw_hazard();
 171         /* Clear out all the TLBs */
 172         kvm_local_flush_tlb_all();
 173 }
 174
 175 void kvm_arch_destroy_vm(struct kvm *kvm)
 176 {
 177         kvm_mips_free_vcpus(kvm);
 178
 179         /* If this is the last instance, restore wired count */
 180         if (atomic_dec_return(&kvm_mips_instance) == 0) {
 181                 kvm_debug("%s: last KVM instance, restoring TLB parameters\n",
 182                           __func__);
 183                 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
 184         }
 185 }
 186
 187 long kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl,
 188                         unsigned long arg)
 189 {
 190         return -ENOIOCTLCMD;
 191 }
 192
 193 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
 194                             unsigned long npages)
 195 {
 196         return 0;
 197 }
 198
 199 int kvm_arch_prepare_memory_region(struct kvm *kvm,
 200                                    struct kvm_memory_slot *memslot,
 201                                    struct kvm_userspace_memory_region *mem,
 202                                    enum kvm_mr_change change)
 203 {
 204         return 0;
 205 }
 206
 207 void kvm_arch_commit_memory_region(struct kvm *kvm,
 208                                    struct kvm_userspace_memory_region *mem,
 209                                    const struct kvm_memory_slot *old,
 210                                    enum kvm_mr_change change)
 211 {
 212         unsigned long npages = 0;
 213         int i;
 214
 215         kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
 216                   __func__, kvm, mem->slot, mem->guest_phys_addr,
 217                   mem->memory_size, mem->userspace_addr);
 218
 219         /* Setup Guest PMAP table */
 220         if (!kvm->arch.guest_pmap) {
 221                 if (mem->slot == 0)
 222                         npages = mem->memory_size >> PAGE_SHIFT;
 223
 224                 if (npages) {
 225                         kvm->arch.guest_pmap_npages = npages;
 226                         kvm->arch.guest_pmap =
 227                             kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
 228
 229                         if (!kvm->arch.guest_pmap) {
 230                                 kvm_err("Failed to allocate guest PMAP");
 231                                 return;
 232                         }
 233
 234                         kvm_debug("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
 235                                   npages, kvm->arch.guest_pmap);
 236
 237                         /* Now setup the page table */
 238                         for (i = 0; i < npages; i++)
 239                                 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
 240                 }
 241         }
 242 }
 243
 244 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
 245 {
 246         int err, size, offset;
 247         void *gebase;
 248         int i;
 249
 250         struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
 251
 252         if (!vcpu) {
 253                 err = -ENOMEM;
 254                 goto out;
 255         }
 256
 257         err = kvm_vcpu_init(vcpu, kvm, id);
 258
 259         if (err)
 260                 goto out_free_cpu;
 261
 262         kvm_debug("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
 263
 264         /*
 265          * Allocate space for host mode exception handlers that handle
 266          * guest mode exits
 267          */
 268         if (cpu_has_veic || cpu_has_vint)
 269                 size = 0x200 + VECTORSPACING * 64;
 270         else
 271                 size = 0x4000;
 272
 273         /* Save Linux EBASE */
 274         vcpu->arch.host_ebase = (void *)read_c0_ebase();
 275
 276         gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
 277
 278         if (!gebase) {
 279                 err = -ENOMEM;
 280                 goto out_free_cpu;
 281         }
 282         kvm_debug("Allocated %d bytes for KVM Exception Handlers @ %p\n",
 283                   ALIGN(size, PAGE_SIZE), gebase);
 284
 285         /* Save new ebase */
 286         vcpu->arch.guest_ebase = gebase;
 287
 288         /* Copy L1 Guest Exception handler to correct offset */
 289
 290         /* TLB Refill, EXL = 0 */
 291         memcpy(gebase, mips32_exception,
 292                mips32_exceptionEnd - mips32_exception);
 293
 294         /* General Exception Entry point */
 295         memcpy(gebase + 0x180, mips32_exception,
 296                mips32_exceptionEnd - mips32_exception);
 297
 298         /* For vectored interrupts poke the exception code @ all offsets 0-7 */
 299         for (i = 0; i < 8; i++) {
 300                 kvm_debug("L1 Vectored handler @ %p\n",
 301                           gebase + 0x200 + (i * VECTORSPACING));
 302                 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
 303                        mips32_exceptionEnd - mips32_exception);
 304         }
 305
 306         /* General handler, relocate to unmapped space for sanity's sake */
 307         offset = 0x2000;
 308         kvm_debug("Installing KVM Exception handlers @ %p, %#x bytes\n",
 309                   gebase + offset,
 310                   mips32_GuestExceptionEnd - mips32_GuestException);
 311
 312         memcpy(gebase + offset, mips32_GuestException,
 313                mips32_GuestExceptionEnd - mips32_GuestException);
 314
 315         /* Invalidate the icache for these ranges */
 316         local_flush_icache_range((unsigned long)gebase,
 317                                 (unsigned long)gebase + ALIGN(size, PAGE_SIZE));
 318
 319         /*
 320          * Allocate comm page for guest kernel, a TLB will be reserved for
 321          * mapping GVA @ 0xFFFF8000 to this page
 322          */
 323         vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
 324
 325         if (!vcpu->arch.kseg0_commpage) {
 326                 err = -ENOMEM;
 327                 goto out_free_gebase;
 328         }
 329
 330         kvm_debug("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
 331         kvm_mips_commpage_init(vcpu);
 332
 333         /* Init */
 334         vcpu->arch.last_sched_cpu = -1;
 335
 336         /* Start off the timer */
 337         kvm_mips_init_count(vcpu);
 338
 339         return vcpu;
 340
 341 out_free_gebase:
 342         kfree(gebase);
 343
 344 out_free_cpu:
 345         kfree(vcpu);
 346
 347 out:
 348         return ERR_PTR(err);
 349 }
 350
 351 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
 352 {
 353         hrtimer_cancel(&vcpu->arch.comparecount_timer);
 354
 355         kvm_vcpu_uninit(vcpu);
 356
 357         kvm_mips_dump_stats(vcpu);
 358
 359         kfree(vcpu->arch.guest_ebase);
 360         kfree(vcpu->arch.kseg0_commpage);
 361         kfree(vcpu);
 362 }
 363
 364 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
 365 {
 366         kvm_arch_vcpu_free(vcpu);
 367 }
 368
 369 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
 370                                         struct kvm_guest_debug *dbg)
 371 {
 372         return -ENOIOCTLCMD;
 373 }
 374
 375 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
 376 {
 377         int r = 0;
 378         sigset_t sigsaved;
 379
 380         if (vcpu->sigset_active)
 381                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
 382
 383         if (vcpu->mmio_needed) {
 384                 if (!vcpu->mmio_is_write)
 385                         kvm_mips_complete_mmio_load(vcpu, run);
 386                 vcpu->mmio_needed = 0;
 387         }
 388
 389         lose_fpu(1);
 390
 391         local_irq_disable();
 392         /* Check if we have any exceptions/interrupts pending */
 393         kvm_mips_deliver_interrupts(vcpu,
 394                                     kvm_read_c0_guest_cause(vcpu->arch.cop0));
 395
 396         kvm_guest_enter();
 397
 398         /* Disable hardware page table walking while in guest */
 399         htw_stop();
 400
 401         r = __kvm_mips_vcpu_run(run, vcpu);
 402
 403         /* Re-enable HTW before enabling interrupts */
 404         htw_start();
 405
 406         kvm_guest_exit();
 407         local_irq_enable();
 408
 409         if (vcpu->sigset_active)
 410                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
 411
 412         return r;
 413 }
 414
 415 int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
 416                              struct kvm_mips_interrupt *irq)
 417 {
 418         int intr = (int)irq->irq;
 419         struct kvm_vcpu *dvcpu = NULL;
 420
 421         if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
 422                 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
 423                           (int)intr);
 424
 425         if (irq->cpu == -1)
 426                 dvcpu = vcpu;
 427         else
 428                 dvcpu = vcpu->kvm->vcpus[irq->cpu];
 429
 430         if (intr == 2 || intr == 3 || intr == 4) {
 431                 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
 432
 433         } else if (intr == -2 || intr == -3 || intr == -4) {
 434                 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
 435         } else {
 436                 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
 437                         irq->cpu, irq->irq);
 438                 return -EINVAL;
 439         }
 440
 441         dvcpu->arch.wait = 0;
 442
 443         if (waitqueue_active(&dvcpu->wq))
 444                 wake_up_interruptible(&dvcpu->wq);
 445
 446         return 0;
 447 }
 448
 449 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
 450                                     struct kvm_mp_state *mp_state)
 451 {
 452         return -ENOIOCTLCMD;
 453 }
 454
 455 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
 456                                     struct kvm_mp_state *mp_state)
 457 {
 458         return -ENOIOCTLCMD;
 459 }
 460
 461 static u64 kvm_mips_get_one_regs[] = {
 462         KVM_REG_MIPS_R0,
 463         KVM_REG_MIPS_R1,
 464         KVM_REG_MIPS_R2,
 465         KVM_REG_MIPS_R3,
 466         KVM_REG_MIPS_R4,
 467         KVM_REG_MIPS_R5,
 468         KVM_REG_MIPS_R6,
 469         KVM_REG_MIPS_R7,
 470         KVM_REG_MIPS_R8,
 471         KVM_REG_MIPS_R9,
 472         KVM_REG_MIPS_R10,
 473         KVM_REG_MIPS_R11,
 474         KVM_REG_MIPS_R12,
 475         KVM_REG_MIPS_R13,
 476         KVM_REG_MIPS_R14,
 477         KVM_REG_MIPS_R15,
 478         KVM_REG_MIPS_R16,
 479         KVM_REG_MIPS_R17,
 480         KVM_REG_MIPS_R18,
 481         KVM_REG_MIPS_R19,
 482         KVM_REG_MIPS_R20,
 483         KVM_REG_MIPS_R21,
 484         KVM_REG_MIPS_R22,
 485         KVM_REG_MIPS_R23,
 486         KVM_REG_MIPS_R24,
 487         KVM_REG_MIPS_R25,
 488         KVM_REG_MIPS_R26,
 489         KVM_REG_MIPS_R27,
 490         KVM_REG_MIPS_R28,
 491         KVM_REG_MIPS_R29,
 492         KVM_REG_MIPS_R30,
 493         KVM_REG_MIPS_R31,
 494
 495         KVM_REG_MIPS_HI,
 496         KVM_REG_MIPS_LO,
 497         KVM_REG_MIPS_PC,
 498
 499         KVM_REG_MIPS_CP0_INDEX,
 500         KVM_REG_MIPS_CP0_CONTEXT,
 501         KVM_REG_MIPS_CP0_USERLOCAL,
 502         KVM_REG_MIPS_CP0_PAGEMASK,
 503         KVM_REG_MIPS_CP0_WIRED,
 504         KVM_REG_MIPS_CP0_HWRENA,
 505         KVM_REG_MIPS_CP0_BADVADDR,
 506         KVM_REG_MIPS_CP0_COUNT,
 507         KVM_REG_MIPS_CP0_ENTRYHI,
 508         KVM_REG_MIPS_CP0_COMPARE,
 509         KVM_REG_MIPS_CP0_STATUS,
 510         KVM_REG_MIPS_CP0_CAUSE,
 511         KVM_REG_MIPS_CP0_EPC,
 512         KVM_REG_MIPS_CP0_PRID,
 513         KVM_REG_MIPS_CP0_CONFIG,
 514         KVM_REG_MIPS_CP0_CONFIG1,
 515         KVM_REG_MIPS_CP0_CONFIG2,
 516         KVM_REG_MIPS_CP0_CONFIG3,
 517         KVM_REG_MIPS_CP0_CONFIG4,
 518         KVM_REG_MIPS_CP0_CONFIG5,
 519         KVM_REG_MIPS_CP0_CONFIG7,
 520         KVM_REG_MIPS_CP0_ERROREPC,
 521
 522         KVM_REG_MIPS_COUNT_CTL,
 523         KVM_REG_MIPS_COUNT_RESUME,
 524         KVM_REG_MIPS_COUNT_HZ,
 525 };
 526
 527 static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
 528                             const struct kvm_one_reg *reg)
 529 {
 530         struct mips_coproc *cop0 = vcpu->arch.cop0;
 531         struct mips_fpu_struct *fpu = &vcpu->arch.fpu;
 532         int ret;
 533         s64 v;
 534         unsigned int idx;
 535
 536         switch (reg->id) {
 537         /* General purpose registers */
 538         case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
 539                 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
 540                 break;
 541         case KVM_REG_MIPS_HI:
 542                 v = (long)vcpu->arch.hi;
 543                 break;
 544         case KVM_REG_MIPS_LO:
 545                 v = (long)vcpu->arch.lo;
 546                 break;
 547         case KVM_REG_MIPS_PC:
 548                 v = (long)vcpu->arch.pc;
 549                 break;
 550
 551         /* Floating point registers */
 552         case KVM_REG_MIPS_FPR_32(0) ... KVM_REG_MIPS_FPR_32(31):
 553                 if (!kvm_mips_guest_has_fpu(&vcpu->arch))
 554                         return -EINVAL;
 555                 idx = reg->id - KVM_REG_MIPS_FPR_32(0);
 556                 /* Odd singles in top of even double when FR=0 */
 557                 if (kvm_read_c0_guest_status(cop0) & ST0_FR)
 558                         v = get_fpr32(&fpu->fpr[idx], 0);
 559                 else
 560                         v = get_fpr32(&fpu->fpr[idx & ~1], idx & 1);
 561                 break;
 562         case KVM_REG_MIPS_FPR_64(0) ... KVM_REG_MIPS_FPR_64(31):
 563                 if (!kvm_mips_guest_has_fpu(&vcpu->arch))
 564                         return -EINVAL;
 565                 idx = reg->id - KVM_REG_MIPS_FPR_64(0);
 566                 /* Can't access odd doubles in FR=0 mode */
 567                 if (idx & 1 && !(kvm_read_c0_guest_status(cop0) & ST0_FR))
 568                         return -EINVAL;
 569                 v = get_fpr64(&fpu->fpr[idx], 0);
 570                 break;
 571         case KVM_REG_MIPS_FCR_IR:
 572                 if (!kvm_mips_guest_has_fpu(&vcpu->arch))
 573                         return -EINVAL;
 574                 v = boot_cpu_data.fpu_id;
 575                 break;
 576         case KVM_REG_MIPS_FCR_CSR:
 577                 if (!kvm_mips_guest_has_fpu(&vcpu->arch))
 578                         return -EINVAL;
 579                 v = fpu->fcr31;
 580                 break;
 581
 582         /* Co-processor 0 registers */
 583         case KVM_REG_MIPS_CP0_INDEX:
 584                 v = (long)kvm_read_c0_guest_index(cop0);
 585                 break;
 586         case KVM_REG_MIPS_CP0_CONTEXT:
 587                 v = (long)kvm_read_c0_guest_context(cop0);
 588                 break;
 589         case KVM_REG_MIPS_CP0_USERLOCAL:
 590                 v = (long)kvm_read_c0_guest_userlocal(cop0);
 591                 break;
 592         case KVM_REG_MIPS_CP0_PAGEMASK:
 593                 v = (long)kvm_read_c0_guest_pagemask(cop0);
 594                 break;
 595         case KVM_REG_MIPS_CP0_WIRED:
 596                 v = (long)kvm_read_c0_guest_wired(cop0);
 597                 break;
 598         case KVM_REG_MIPS_CP0_HWRENA:
 599                 v = (long)kvm_read_c0_guest_hwrena(cop0);
 600                 break;
 601         case KVM_REG_MIPS_CP0_BADVADDR:
 602                 v = (long)kvm_read_c0_guest_badvaddr(cop0);
 603                 break;
 604         case KVM_REG_MIPS_CP0_ENTRYHI:
 605                 v = (long)kvm_read_c0_guest_entryhi(cop0);
 606                 break;
 607         case KVM_REG_MIPS_CP0_COMPARE:
 608                 v = (long)kvm_read_c0_guest_compare(cop0);
 609                 break;
 610         case KVM_REG_MIPS_CP0_STATUS:
 611                 v = (long)kvm_read_c0_guest_status(cop0);
 612                 break;
 613         case KVM_REG_MIPS_CP0_CAUSE:
 614                 v = (long)kvm_read_c0_guest_cause(cop0);
 615                 break;
 616         case KVM_REG_MIPS_CP0_EPC:
 617                 v = (long)kvm_read_c0_guest_epc(cop0);
 618                 break;
 619         case KVM_REG_MIPS_CP0_PRID:
 620                 v = (long)kvm_read_c0_guest_prid(cop0);
 621                 break;
 622         case KVM_REG_MIPS_CP0_CONFIG:
 623                 v = (long)kvm_read_c0_guest_config(cop0);
 624                 break;
 625         case KVM_REG_MIPS_CP0_CONFIG1:
 626                 v = (long)kvm_read_c0_guest_config1(cop0);
 627                 break;
 628         case KVM_REG_MIPS_CP0_CONFIG2:
 629                 v = (long)kvm_read_c0_guest_config2(cop0);
 630                 break;
 631         case KVM_REG_MIPS_CP0_CONFIG3:
 632                 v = (long)kvm_read_c0_guest_config3(cop0);
 633                 break;
 634         case KVM_REG_MIPS_CP0_CONFIG4:
 635                 v = (long)kvm_read_c0_guest_config4(cop0);
 636                 break;
 637         case KVM_REG_MIPS_CP0_CONFIG5:
 638                 v = (long)kvm_read_c0_guest_config5(cop0);
 639                 break;
 640         case KVM_REG_MIPS_CP0_CONFIG7:
 641                 v = (long)kvm_read_c0_guest_config7(cop0);
 642                 break;
 643         case KVM_REG_MIPS_CP0_ERROREPC:
 644                 v = (long)kvm_read_c0_guest_errorepc(cop0);
 645                 break;
 646         /* registers to be handled specially */
 647         case KVM_REG_MIPS_CP0_COUNT:
 648         case KVM_REG_MIPS_COUNT_CTL:
 649         case KVM_REG_MIPS_COUNT_RESUME:
 650         case KVM_REG_MIPS_COUNT_HZ:
 651                 ret = kvm_mips_callbacks->get_one_reg(vcpu, reg, &v);
 652                 if (ret)
 653                         return ret;
 654                 break;
 655         default:
 656                 return -EINVAL;
 657         }
 658         if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
 659                 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
 660
 661                 return put_user(v, uaddr64);
 662         } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
 663                 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
 664                 u32 v32 = (u32)v;
 665
 666                 return put_user(v32, uaddr32);
 667         } else {
 668                 return -EINVAL;
 669         }
 670 }
 671
 672 static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
 673                             const struct kvm_one_reg *reg)
 674 {
 675         struct mips_coproc *cop0 = vcpu->arch.cop0;
 676         struct mips_fpu_struct *fpu = &vcpu->arch.fpu;
 677         s64 v;
 678         unsigned int idx;
 679
 680         if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
 681                 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
 682
 683                 if (get_user(v, uaddr64) != 0)
 684                         return -EFAULT;
 685         } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
 686                 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
 687                 s32 v32;
 688
 689                 if (get_user(v32, uaddr32) != 0)
 690                         return -EFAULT;
 691                 v = (s64)v32;
 692         } else {
 693                 return -EINVAL;
 694         }
 695
 696         switch (reg->id) {
 697         /* General purpose registers */
 698         case KVM_REG_MIPS_R0:
 699                 /* Silently ignore requests to set $0 */
 700                 break;
 701         case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
 702                 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
 703                 break;
 704         case KVM_REG_MIPS_HI:
 705                 vcpu->arch.hi = v;
 706                 break;
 707         case KVM_REG_MIPS_LO:
 708                 vcpu->arch.lo = v;
 709                 break;
 710         case KVM_REG_MIPS_PC:
 711                 vcpu->arch.pc = v;
 712                 break;
 713
 714         /* Floating point registers */
 715         case KVM_REG_MIPS_FPR_32(0) ... KVM_REG_MIPS_FPR_32(31):
 716                 if (!kvm_mips_guest_has_fpu(&vcpu->arch))
 717                         return -EINVAL;
 718                 idx = reg->id - KVM_REG_MIPS_FPR_32(0);
 719                 /* Odd singles in top of even double when FR=0 */
 720                 if (kvm_read_c0_guest_status(cop0) & ST0_FR)
 721                         set_fpr32(&fpu->fpr[idx], 0, v);
 722                 else
 723                         set_fpr32(&fpu->fpr[idx & ~1], idx & 1, v);
 724                 break;
 725         case KVM_REG_MIPS_FPR_64(0) ... KVM_REG_MIPS_FPR_64(31):
 726                 if (!kvm_mips_guest_has_fpu(&vcpu->arch))
 727                         return -EINVAL;
 728                 idx = reg->id - KVM_REG_MIPS_FPR_64(0);
 729                 /* Can't access odd doubles in FR=0 mode */
 730                 if (idx & 1 && !(kvm_read_c0_guest_status(cop0) & ST0_FR))
 731                         return -EINVAL;
 732                 set_fpr64(&fpu->fpr[idx], 0, v);
 733                 break;
 734         case KVM_REG_MIPS_FCR_IR:
 735                 if (!kvm_mips_guest_has_fpu(&vcpu->arch))
 736                         return -EINVAL;
 737                 /* Read-only */
 738                 break;
 739         case KVM_REG_MIPS_FCR_CSR:
 740                 if (!kvm_mips_guest_has_fpu(&vcpu->arch))
 741                         return -EINVAL;
 742                 fpu->fcr31 = v;
 743                 break;
 744
 745         /* Co-processor 0 registers */
 746         case KVM_REG_MIPS_CP0_INDEX:
 747                 kvm_write_c0_guest_index(cop0, v);
 748                 break;
 749         case KVM_REG_MIPS_CP0_CONTEXT:
 750                 kvm_write_c0_guest_context(cop0, v);
 751                 break;
 752         case KVM_REG_MIPS_CP0_USERLOCAL:
 753                 kvm_write_c0_guest_userlocal(cop0, v);
 754                 break;
 755         case KVM_REG_MIPS_CP0_PAGEMASK:
 756                 kvm_write_c0_guest_pagemask(cop0, v);
 757                 break;
 758         case KVM_REG_MIPS_CP0_WIRED:
 759                 kvm_write_c0_guest_wired(cop0, v);
 760                 break;
 761         case KVM_REG_MIPS_CP0_HWRENA:
 762                 kvm_write_c0_guest_hwrena(cop0, v);
 763                 break;
 764         case KVM_REG_MIPS_CP0_BADVADDR:
 765                 kvm_write_c0_guest_badvaddr(cop0, v);
 766                 break;
 767         case KVM_REG_MIPS_CP0_ENTRYHI:
 768                 kvm_write_c0_guest_entryhi(cop0, v);
 769                 break;
 770         case KVM_REG_MIPS_CP0_STATUS:
 771                 kvm_write_c0_guest_status(cop0, v);
 772                 break;
 773         case KVM_REG_MIPS_CP0_EPC:
 774                 kvm_write_c0_guest_epc(cop0, v);
 775                 break;
 776         case KVM_REG_MIPS_CP0_PRID:
 777                 kvm_write_c0_guest_prid(cop0, v);
 778                 break;
 779         case KVM_REG_MIPS_CP0_ERROREPC:
 780                 kvm_write_c0_guest_errorepc(cop0, v);
 781                 break;
 782         /* registers to be handled specially */
 783         case KVM_REG_MIPS_CP0_COUNT:
 784         case KVM_REG_MIPS_CP0_COMPARE:
 785         case KVM_REG_MIPS_CP0_CAUSE:
 786         case KVM_REG_MIPS_CP0_CONFIG:
 787         case KVM_REG_MIPS_CP0_CONFIG1:
 788         case KVM_REG_MIPS_CP0_CONFIG2:
 789         case KVM_REG_MIPS_CP0_CONFIG3:
 790         case KVM_REG_MIPS_CP0_CONFIG4:
 791         case KVM_REG_MIPS_CP0_CONFIG5:
 792         case KVM_REG_MIPS_COUNT_CTL:
 793         case KVM_REG_MIPS_COUNT_RESUME:
 794         case KVM_REG_MIPS_COUNT_HZ:
 795                 return kvm_mips_callbacks->set_one_reg(vcpu, reg, v);
 796         default:
 797                 return -EINVAL;
 798         }
 799         return 0;
 800 }
 801
 802 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
 803                                      struct kvm_enable_cap *cap)
 804 {
 805         int r = 0;
 806
 807         if (!kvm_vm_ioctl_check_extension(vcpu->kvm, cap->cap))
 808                 return -EINVAL;
 809         if (cap->flags)
 810                 return -EINVAL;
 811         if (cap->args[0])
 812                 return -EINVAL;
 813
 814         switch (cap->cap) {
 815         case KVM_CAP_MIPS_FPU:
 816                 vcpu->arch.fpu_enabled = true;
 817                 break;
 818         default:
 819                 r = -EINVAL;
 820                 break;
 821         }
 822
 823         return r;
 824 }
 825
 826 long kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl,
 827                          unsigned long arg)
 828 {
 829         struct kvm_vcpu *vcpu = filp->private_data;
 830         void __user *argp = (void __user *)arg;
 831         long r;
 832
 833         switch (ioctl) {
 834         case KVM_SET_ONE_REG:
 835         case KVM_GET_ONE_REG: {
 836                 struct kvm_one_reg reg;
 837
 838                 if (copy_from_user(&reg, argp, sizeof(reg)))
 839                         return -EFAULT;
 840                 if (ioctl == KVM_SET_ONE_REG)
 841                         return kvm_mips_set_reg(vcpu, &reg);
 842                 else
 843                         return kvm_mips_get_reg(vcpu, &reg);
 844         }
 845         case KVM_GET_REG_LIST: {
 846                 struct kvm_reg_list __user *user_list = argp;
 847                 u64 __user *reg_dest;
 848                 struct kvm_reg_list reg_list;
 849                 unsigned n;
 850
 851                 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
 852                         return -EFAULT;
 853                 n = reg_list.n;
 854                 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
 855                 if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
 856                         return -EFAULT;
 857                 if (n < reg_list.n)
 858                         return -E2BIG;
 859                 reg_dest = user_list->reg;
 860                 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
 861                                  sizeof(kvm_mips_get_one_regs)))
 862                         return -EFAULT;
 863                 return 0;
 864         }
 865         case KVM_NMI:
 866                 /* Treat the NMI as a CPU reset */
 867                 r = kvm_mips_reset_vcpu(vcpu);
 868                 break;
 869         case KVM_INTERRUPT:
 870                 {
 871                         struct kvm_mips_interrupt irq;
 872
 873                         r = -EFAULT;
 874                         if (copy_from_user(&irq, argp, sizeof(irq)))
 875                                 goto out;
 876
 877                         kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
 878                                   irq.irq);
 879
 880                         r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
 881                         break;
 882                 }
 883         case KVM_ENABLE_CAP: {
 884                 struct kvm_enable_cap cap;
 885
 886                 r = -EFAULT;
 887                 if (copy_from_user(&cap, argp, sizeof(cap)))
 888                         goto out;
 889                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
 890                 break;
 891         }
 892         default:
 893                 r = -ENOIOCTLCMD;
 894         }
 895
 896 out:
 897         return r;
 898 }
 899
 900 /* Get (and clear) the dirty memory log for a memory slot. */
 901 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
 902 {
 903         struct kvm_memory_slot *memslot;
 904         unsigned long ga, ga_end;
 905         int is_dirty = 0;
 906         int r;
 907         unsigned long n;
 908
 909         mutex_lock(&kvm->slots_lock);
 910
 911         r = kvm_get_dirty_log(kvm, log, &is_dirty);
 912         if (r)
 913                 goto out;
 914
 915         /* If nothing is dirty, don't bother messing with page tables. */
 916         if (is_dirty) {
 917                 memslot = &kvm->memslots->memslots[log->slot];
 918
 919                 ga = memslot->base_gfn << PAGE_SHIFT;
 920                 ga_end = ga + (memslot->npages << PAGE_SHIFT);
 921
 922                 kvm_info("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
 923                          ga_end);
 924
 925                 n = kvm_dirty_bitmap_bytes(memslot);
 926                 memset(memslot->dirty_bitmap, 0, n);
 927         }
 928
 929         r = 0;
 930 out:
 931         mutex_unlock(&kvm->slots_lock);
 932         return r;
 933
 934 }
 935
 936 long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
 937 {
 938         long r;
 939
 940         switch (ioctl) {
 941         default:
 942                 r = -ENOIOCTLCMD;
 943         }
 944
 945         return r;
 946 }
 947
 948 int kvm_arch_init(void *opaque)
 949 {
 950         if (kvm_mips_callbacks) {
 951                 kvm_err("kvm: module already exists\n");
 952                 return -EEXIST;
 953         }
 954
 955         return kvm_mips_emulation_init(&kvm_mips_callbacks);
 956 }
 957
 958 void kvm_arch_exit(void)
 959 {
 960         kvm_mips_callbacks = NULL;
 961 }
 962
 963 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
 964                                   struct kvm_sregs *sregs)
 965 {
 966         return -ENOIOCTLCMD;
 967 }
 968
 969 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
 970                                   struct kvm_sregs *sregs)
 971 {
 972         return -ENOIOCTLCMD;
 973 }
 974
 975 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
 976 {
 977 }
 978
 979 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
 980 {
 981         return -ENOIOCTLCMD;
 982 }
 983
 984 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
 985 {
 986         return -ENOIOCTLCMD;
 987 }
 988
 989 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
 990 {
 991         return VM_FAULT_SIGBUS;
 992 }
 993
 994 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
 995 {
 996         int r;
 997
 998         switch (ext) {
 999         case KVM_CAP_ONE_REG:
1000         case KVM_CAP_ENABLE_CAP:
1001                 r = 1;
1002                 break;
1003         case KVM_CAP_COALESCED_MMIO:
1004                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1005                 break;
1006         case KVM_CAP_MIPS_FPU:
1007                 r = !!cpu_has_fpu;
1008                 break;
1009         default:
1010                 r = 0;
1011                 break;
1012         }
1013         return r;
1014 }
1015
1016 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
1017 {
1018         return kvm_mips_pending_timer(vcpu);
1019 }
1020
1021 int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
1022 {
1023         int i;
1024         struct mips_coproc *cop0;
1025
1026         if (!vcpu)
1027                 return -1;
1028
1029         kvm_debug("VCPU Register Dump:\n");
1030         kvm_debug("\tpc = 0x%08lx\n", vcpu->arch.pc);
1031         kvm_debug("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
1032
1033         for (i = 0; i < 32; i += 4) {
1034                 kvm_debug("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
1035                        vcpu->arch.gprs[i],
1036                        vcpu->arch.gprs[i + 1],
1037                        vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
1038         }
1039         kvm_debug("\thi: 0x%08lx\n", vcpu->arch.hi);
1040         kvm_debug("\tlo: 0x%08lx\n", vcpu->arch.lo);
1041
1042         cop0 = vcpu->arch.cop0;
1043         kvm_debug("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
1044                   kvm_read_c0_guest_status(cop0),
1045                   kvm_read_c0_guest_cause(cop0));
1046
1047         kvm_debug("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
1048
1049         return 0;
1050 }
1051
1052 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1053 {
1054         int i;
1055
1056         for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
1057                 vcpu->arch.gprs[i] = regs->gpr[i];
1058         vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
1059         vcpu->arch.hi = regs->hi;
1060         vcpu->arch.lo = regs->lo;
1061         vcpu->arch.pc = regs->pc;
1062
1063         return 0;
1064 }
1065
1066 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1067 {
1068         int i;
1069
1070         for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
1071                 regs->gpr[i] = vcpu->arch.gprs[i];
1072
1073         regs->hi = vcpu->arch.hi;
1074         regs->lo = vcpu->arch.lo;
1075         regs->pc = vcpu->arch.pc;
1076
1077         return 0;
1078 }
1079
1080 static void kvm_mips_comparecount_func(unsigned long data)
1081 {
1082         struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1083
1084         kvm_mips_callbacks->queue_timer_int(vcpu);
1085
1086         vcpu->arch.wait = 0;
1087         if (waitqueue_active(&vcpu->wq))
1088                 wake_up_interruptible(&vcpu->wq);
1089 }
1090
1091 /* low level hrtimer wake routine */
1092 static enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
1093 {
1094         struct kvm_vcpu *vcpu;
1095
1096         vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
1097         kvm_mips_comparecount_func((unsigned long) vcpu);
1098         return kvm_mips_count_timeout(vcpu);
1099 }
1100
1101 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
1102 {
1103         kvm_mips_callbacks->vcpu_init(vcpu);
1104         hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
1105                      HRTIMER_MODE_REL);
1106         vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
1107         return 0;
1108 }
1109
1110 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1111                                   struct kvm_translation *tr)
1112 {
1113         return 0;
1114 }
1115
1116 /* Initial guest state */
1117 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1118 {
1119         return kvm_mips_callbacks->vcpu_setup(vcpu);
1120 }
1121
1122 static void kvm_mips_set_c0_status(void)
1123 {
1124         uint32_t status = read_c0_status();
1125
1126         if (cpu_has_dsp)
1127                 status |= (ST0_MX);
1128
1129         write_c0_status(status);
1130         ehb();
1131 }
1132
1133 /*
1134  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1135  */
1136 int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1137 {
1138         uint32_t cause = vcpu->arch.host_cp0_cause;
1139         uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
1140         uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1141         unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1142         enum emulation_result er = EMULATE_DONE;
1143         int ret = RESUME_GUEST;
1144
1145         /* re-enable HTW before enabling interrupts */
1146         htw_start();
1147
1148         /* Set a default exit reason */
1149         run->exit_reason = KVM_EXIT_UNKNOWN;
1150         run->ready_for_interrupt_injection = 1;
1151
1152         /*
1153          * Set the appropriate status bits based on host CPU features,
1154          * before we hit the scheduler
1155          */
1156         kvm_mips_set_c0_status();
1157
1158         local_irq_enable();
1159
1160         kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1161                         cause, opc, run, vcpu);
1162
1163         /*
1164          * Do a privilege check, if in UM most of these exit conditions end up
1165          * causing an exception to be delivered to the Guest Kernel
1166          */
1167         er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1168         if (er == EMULATE_PRIV_FAIL) {
1169                 goto skip_emul;
1170         } else if (er == EMULATE_FAIL) {
1171                 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1172                 ret = RESUME_HOST;
1173                 goto skip_emul;
1174         }
1175
1176         switch (exccode) {
1177         case T_INT:
1178                 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1179
1180                 ++vcpu->stat.int_exits;
1181                 trace_kvm_exit(vcpu, INT_EXITS);
1182
1183                 if (need_resched())
1184                         cond_resched();
1185
1186                 ret = RESUME_GUEST;
1187                 break;
1188
1189         case T_COP_UNUSABLE:
1190                 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1191
1192                 ++vcpu->stat.cop_unusable_exits;
1193                 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1194                 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1195                 /* XXXKYMA: Might need to return to user space */
1196                 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN)
1197                         ret = RESUME_HOST;
1198                 break;
1199
1200         case T_TLB_MOD:
1201                 ++vcpu->stat.tlbmod_exits;
1202                 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1203                 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1204                 break;
1205
1206         case T_TLB_ST_MISS:
1207                 kvm_debug("TLB ST fault:  cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1208                           cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1209                           badvaddr);
1210
1211                 ++vcpu->stat.tlbmiss_st_exits;
1212                 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1213                 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1214                 break;
1215
1216         case T_TLB_LD_MISS:
1217                 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1218                           cause, opc, badvaddr);
1219
1220                 ++vcpu->stat.tlbmiss_ld_exits;
1221                 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1222                 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1223                 break;
1224
1225         case T_ADDR_ERR_ST:
1226                 ++vcpu->stat.addrerr_st_exits;
1227                 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1228                 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1229                 break;
1230
1231         case T_ADDR_ERR_LD:
1232                 ++vcpu->stat.addrerr_ld_exits;
1233                 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1234                 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1235                 break;
1236
1237         case T_SYSCALL:
1238                 ++vcpu->stat.syscall_exits;
1239                 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1240                 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1241                 break;
1242
1243         case T_RES_INST:
1244                 ++vcpu->stat.resvd_inst_exits;
1245                 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1246                 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1247                 break;
1248
1249         case T_BREAK:
1250                 ++vcpu->stat.break_inst_exits;
1251                 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1252                 ret = kvm_mips_callbacks->handle_break(vcpu);
1253                 break;
1254
1255         case T_TRAP:
1256                 ++vcpu->stat.trap_inst_exits;
1257                 trace_kvm_exit(vcpu, TRAP_INST_EXITS);
1258                 ret = kvm_mips_callbacks->handle_trap(vcpu);
1259                 break;
1260
1261         case T_MSAFPE:
1262                 ++vcpu->stat.msa_fpe_exits;
1263                 trace_kvm_exit(vcpu, MSA_FPE_EXITS);
1264                 ret = kvm_mips_callbacks->handle_msa_fpe(vcpu);
1265                 break;
1266
1267         case T_FPE:
1268                 ++vcpu->stat.fpe_exits;
1269                 trace_kvm_exit(vcpu, FPE_EXITS);
1270                 ret = kvm_mips_callbacks->handle_fpe(vcpu);
1271                 break;
1272
1273         case T_MSADIS:
1274                 ++vcpu->stat.msa_disabled_exits;
1275                 trace_kvm_exit(vcpu, MSA_DISABLED_EXITS);
1276                 ret = kvm_mips_callbacks->handle_msa_disabled(vcpu);
1277                 break;
1278
1279         default:
1280                 kvm_err("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x  BadVaddr: %#lx Status: %#lx\n",
1281                         exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1282                         kvm_read_c0_guest_status(vcpu->arch.cop0));
1283                 kvm_arch_vcpu_dump_regs(vcpu);
1284                 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1285                 ret = RESUME_HOST;
1286                 break;
1287
1288         }
1289
1290 skip_emul:
1291         local_irq_disable();
1292
1293         if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1294                 kvm_mips_deliver_interrupts(vcpu, cause);
1295
1296         if (!(ret & RESUME_HOST)) {
1297                 /* Only check for signals if not already exiting to userspace */
1298                 if (signal_pending(current)) {
1299                         run->exit_reason = KVM_EXIT_INTR;
1300                         ret = (-EINTR << 2) | RESUME_HOST;
1301                         ++vcpu->stat.signal_exits;
1302                         trace_kvm_exit(vcpu, SIGNAL_EXITS);
1303                 }
1304         }
1305
1306         if (ret == RESUME_GUEST) {
1307                 /*
1308                  * If FPU / MSA are enabled (i.e. the guest's FPU / MSA context
1309                  * is live), restore FCR31 / MSACSR.
1310                  *
1311                  * This should be before returning to the guest exception
1312                  * vector, as it may well cause an [MSA] FP exception if there
1313                  * are pending exception bits unmasked. (see
1314                  * kvm_mips_csr_die_notifier() for how that is handled).
1315                  */
1316                 if (kvm_mips_guest_has_fpu(&vcpu->arch) &&
1317                     read_c0_status() & ST0_CU1)
1318                         __kvm_restore_fcsr(&vcpu->arch);
1319
1320                 if (kvm_mips_guest_has_msa(&vcpu->arch) &&
1321                     read_c0_config5() & MIPS_CONF5_MSAEN)
1322                         __kvm_restore_msacsr(&vcpu->arch);
1323         }
1324
1325         /* Disable HTW before returning to guest or host */
1326         htw_stop();
1327
1328         return ret;
1329 }
1330
1331 /* Enable FPU for guest and restore context */
1332 void kvm_own_fpu(struct kvm_vcpu *vcpu)
1333 {
1334         struct mips_coproc *cop0 = vcpu->arch.cop0;
1335         unsigned int sr, cfg5;
1336
1337         preempt_disable();
1338
1339         sr = kvm_read_c0_guest_status(cop0);
1340
1341         /*
1342          * If MSA state is already live, it is undefined how it interacts with
1343          * FR=0 FPU state, and we don't want to hit reserved instruction
1344          * exceptions trying to save the MSA state later when CU=1 && FR=1, so
1345          * play it safe and save it first.
1346          *
1347          * In theory we shouldn't ever hit this case since kvm_lose_fpu() should
1348          * get called when guest CU1 is set, however we can't trust the guest
1349          * not to clobber the status register directly via the commpage.
1350          */
1351         if (cpu_has_msa && sr & ST0_CU1 && !(sr & ST0_FR) &&
1352             vcpu->arch.fpu_inuse & KVM_MIPS_FPU_MSA)
1353                 kvm_lose_fpu(vcpu);
1354
1355         /*
1356          * Enable FPU for guest
1357          * We set FR and FRE according to guest context
1358          */
1359         change_c0_status(ST0_CU1 | ST0_FR, sr);
1360         if (cpu_has_fre) {
1361                 cfg5 = kvm_read_c0_guest_config5(cop0);
1362                 change_c0_config5(MIPS_CONF5_FRE, cfg5);
1363         }
1364         enable_fpu_hazard();
1365
1366         /* If guest FPU state not active, restore it now */
1367         if (!(vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU)) {
1368                 __kvm_restore_fpu(&vcpu->arch);
1369                 vcpu->arch.fpu_inuse |= KVM_MIPS_FPU_FPU;
1370         }
1371
1372         preempt_enable();
1373 }
1374
1375 #ifdef CONFIG_CPU_HAS_MSA
1376 /* Enable MSA for guest and restore context */
1377 void kvm_own_msa(struct kvm_vcpu *vcpu)
1378 {
1379         struct mips_coproc *cop0 = vcpu->arch.cop0;
1380         unsigned int sr, cfg5;
1381
1382         preempt_disable();
1383
1384         /*
1385          * Enable FPU if enabled in guest, since we're restoring FPU context
1386          * anyway. We set FR and FRE according to guest context.
1387          */
1388         if (kvm_mips_guest_has_fpu(&vcpu->arch)) {
1389                 sr = kvm_read_c0_guest_status(cop0);
1390
1391                 /*
1392                  * If FR=0 FPU state is already live, it is undefined how it
1393                  * interacts with MSA state, so play it safe and save it first.
1394                  */
1395                 if (!(sr & ST0_FR) &&
1396                     (vcpu->arch.fpu_inuse & (KVM_MIPS_FPU_FPU |
1397                                 KVM_MIPS_FPU_MSA)) == KVM_MIPS_FPU_FPU)
1398                         kvm_lose_fpu(vcpu);
1399
1400                 change_c0_status(ST0_CU1 | ST0_FR, sr);
1401                 if (sr & ST0_CU1 && cpu_has_fre) {
1402                         cfg5 = kvm_read_c0_guest_config5(cop0);
1403                         change_c0_config5(MIPS_CONF5_FRE, cfg5);
1404                 }
1405         }
1406
1407         /* Enable MSA for guest */
1408         set_c0_config5(MIPS_CONF5_MSAEN);
1409         enable_fpu_hazard();
1410
1411         switch (vcpu->arch.fpu_inuse & (KVM_MIPS_FPU_FPU | KVM_MIPS_FPU_MSA)) {
1412         case KVM_MIPS_FPU_FPU:
1413                 /*
1414                  * Guest FPU state already loaded, only restore upper MSA state
1415                  */
1416                 __kvm_restore_msa_upper(&vcpu->arch);
1417                 vcpu->arch.fpu_inuse |= KVM_MIPS_FPU_MSA;
1418                 break;
1419         case 0:
1420                 /* Neither FPU or MSA already active, restore full MSA state */
1421                 __kvm_restore_msa(&vcpu->arch);
1422                 vcpu->arch.fpu_inuse |= KVM_MIPS_FPU_MSA;
1423                 if (kvm_mips_guest_has_fpu(&vcpu->arch))
1424                         vcpu->arch.fpu_inuse |= KVM_MIPS_FPU_FPU;
1425                 break;
1426         default:
1427                 break;
1428         }
1429
1430         preempt_enable();
1431 }
1432 #endif
1433
1434 /* Drop FPU & MSA without saving it */
1435 void kvm_drop_fpu(struct kvm_vcpu *vcpu)
1436 {
1437         preempt_disable();
1438         if (cpu_has_msa && vcpu->arch.fpu_inuse & KVM_MIPS_FPU_MSA) {
1439                 disable_msa();
1440                 vcpu->arch.fpu_inuse &= ~KVM_MIPS_FPU_MSA;
1441         }
1442         if (vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU) {
1443                 clear_c0_status(ST0_CU1 | ST0_FR);
1444                 vcpu->arch.fpu_inuse &= ~KVM_MIPS_FPU_FPU;
1445         }
1446         preempt_enable();
1447 }
1448
1449 /* Save and disable FPU & MSA */
1450 void kvm_lose_fpu(struct kvm_vcpu *vcpu)
1451 {
1452         /*
1453          * FPU & MSA get disabled in root context (hardware) when it is disabled
1454          * in guest context (software), but the register state in the hardware
1455          * may still be in use. This is why we explicitly re-enable the hardware
1456          * before saving.
1457          */
1458
1459         preempt_disable();
1460         if (cpu_has_msa && vcpu->arch.fpu_inuse & KVM_MIPS_FPU_MSA) {
1461                 set_c0_config5(MIPS_CONF5_MSAEN);
1462                 enable_fpu_hazard();
1463
1464                 __kvm_save_msa(&vcpu->arch);
1465
1466                 /* Disable MSA & FPU */
1467                 disable_msa();
1468                 if (vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU)
1469                         clear_c0_status(ST0_CU1 | ST0_FR);
1470                 vcpu->arch.fpu_inuse &= ~(KVM_MIPS_FPU_FPU | KVM_MIPS_FPU_MSA);
1471         } else if (vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU) {
1472                 set_c0_status(ST0_CU1);
1473                 enable_fpu_hazard();
1474
1475                 __kvm_save_fpu(&vcpu->arch);
1476                 vcpu->arch.fpu_inuse &= ~KVM_MIPS_FPU_FPU;
1477
1478                 /* Disable FPU */
1479                 clear_c0_status(ST0_CU1 | ST0_FR);
1480         }
1481         preempt_enable();
1482 }
1483
1484 /*
1485  * Step over a specific ctc1 to FCSR and a specific ctcmsa to MSACSR which are
1486  * used to restore guest FCSR/MSACSR state and may trigger a "harmless" FP/MSAFP
1487  * exception if cause bits are set in the value being written.
1488  */
1489 static int kvm_mips_csr_die_notify(struct notifier_block *self,
1490                                    unsigned long cmd, void *ptr)
1491 {
1492         struct die_args *args = (struct die_args *)ptr;
1493         struct pt_regs *regs = args->regs;
1494         unsigned long pc;
1495
1496         /* Only interested in FPE and MSAFPE */
1497         if (cmd != DIE_FP && cmd != DIE_MSAFP)
1498                 return NOTIFY_DONE;
1499
1500         /* Return immediately if guest context isn't active */
1501         if (!(current->flags & PF_VCPU))
1502                 return NOTIFY_DONE;
1503
1504         /* Should never get here from user mode */
1505         BUG_ON(user_mode(regs));
1506
1507         pc = instruction_pointer(regs);
1508         switch (cmd) {
1509         case DIE_FP:
1510                 /* match 2nd instruction in __kvm_restore_fcsr */
1511                 if (pc != (unsigned long)&__kvm_restore_fcsr + 4)
1512                         return NOTIFY_DONE;
1513                 break;
1514         case DIE_MSAFP:
1515                 /* match 2nd/3rd instruction in __kvm_restore_msacsr */
1516                 if (!cpu_has_msa ||
1517                     pc < (unsigned long)&__kvm_restore_msacsr + 4 ||
1518                     pc > (unsigned long)&__kvm_restore_msacsr + 8)
1519                         return NOTIFY_DONE;
1520                 break;
1521         }
1522
1523         /* Move PC forward a little and continue executing */
1524         instruction_pointer(regs) += 4;
1525
1526         return NOTIFY_STOP;
1527 }
1528
1529 static struct notifier_block kvm_mips_csr_die_notifier = {
1530         .notifier_call = kvm_mips_csr_die_notify,
1531 };
1532
1533 int __init kvm_mips_init(void)
1534 {
1535         int ret;
1536
1537         ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1538
1539         if (ret)
1540                 return ret;
1541
1542         register_die_notifier(&kvm_mips_csr_die_notifier);
1543
1544         /*
1545          * On MIPS, kernel modules are executed from "mapped space", which
1546          * requires TLBs. The TLB handling code is statically linked with
1547          * the rest of the kernel (tlb.c) to avoid the possibility of
1548          * double faulting. The issue is that the TLB code references
1549          * routines that are part of the the KVM module, which are only
1550          * available once the module is loaded.
1551          */
1552         kvm_mips_gfn_to_pfn = gfn_to_pfn;
1553         kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1554         kvm_mips_is_error_pfn = is_error_pfn;
1555
1556         return 0;
1557 }
1558
1559 void __exit kvm_mips_exit(void)
1560 {
1561         kvm_exit();
1562
1563         kvm_mips_gfn_to_pfn = NULL;
1564         kvm_mips_release_pfn_clean = NULL;
1565         kvm_mips_is_error_pfn = NULL;
1566
1567         unregister_die_notifier(&kvm_mips_csr_die_notifier);
1568 }
1569
1570 module_init(kvm_mips_init);
1571 module_exit(kvm_mips_exit);
1572
1573 EXPORT_TRACEPOINT_SYMBOL(kvm_exit);