2 * Helper routines to scan the device tree for PCI devices and busses
4 * Migrated out of PowerPC architecture pci_64.c file by Grant Likely
5 * <grant.likely@secretlab.ca> so that these routines are available for
8 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
9 * Rework, based on alpha PCI code.
10 * Copyright (c) 2009 Secret Lab Technologies Ltd.
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
17 #include <linux/pci.h>
18 #include <asm/pci-bridge.h>
22 * get_int_prop - Decode a u32 from a device tree property
24 static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
29 prop = of_get_property(np, name, &len);
36 * pci_parse_of_flags - Parse the flags cell of a device tree PCI address
37 * @addr0: value of 1st cell of a device tree PCI address.
38 * @bridge: Set this flag if the address is from a bridge 'ranges' property
40 unsigned int pci_parse_of_flags(u32 addr0, int bridge)
42 unsigned int flags = 0;
44 if (addr0 & 0x02000000) {
45 flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
46 flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
47 flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
48 if (addr0 & 0x40000000)
49 flags |= IORESOURCE_PREFETCH
50 | PCI_BASE_ADDRESS_MEM_PREFETCH;
51 /* Note: We don't know whether the ROM has been left enabled
52 * by the firmware or not. We mark it as disabled (ie, we do
53 * not set the IORESOURCE_ROM_ENABLE flag) for now rather than
54 * do a config space read, it will be force-enabled if needed
56 if (!bridge && (addr0 & 0xff) == 0x30)
57 flags |= IORESOURCE_READONLY;
58 } else if (addr0 & 0x01000000)
59 flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
61 flags |= IORESOURCE_SIZEALIGN;
66 * of_pci_parse_addrs - Parse PCI addresses assigned in the device tree node
67 * @node: device tree node for the PCI device
68 * @dev: pci_dev structure for the device
70 * This function parses the 'assigned-addresses' property of a PCI devices'
71 * device tree node and writes them into the associated pci_dev structure.
73 static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
82 addrs = of_get_property(node, "assigned-addresses", &proplen);
85 pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
86 for (; proplen >= 20; proplen -= 20, addrs += 5) {
87 flags = pci_parse_of_flags(addrs[0], 0);
90 base = of_read_number(&addrs[1], 2);
91 size = of_read_number(&addrs[3], 2);
95 pr_debug(" base: %llx, size: %llx, i: %x\n",
96 (unsigned long long)base,
97 (unsigned long long)size, i);
99 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
100 res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
101 } else if (i == dev->rom_base_reg) {
102 res = &dev->resource[PCI_ROM_RESOURCE];
103 flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
105 printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
109 res->end = base + size - 1;
111 res->name = pci_name(dev);
116 * of_create_pci_dev - Given a device tree node on a pci bus, create a pci_dev
117 * @node: device tree node pointer
118 * @bus: bus the device is sitting on
119 * @devfn: PCI function number, extracted from device tree by caller.
121 struct pci_dev *of_create_pci_dev(struct device_node *node,
122 struct pci_bus *bus, int devfn)
126 struct pci_slot *slot;
128 dev = alloc_pci_dev();
131 type = of_get_property(node, "device_type", NULL);
135 pr_debug(" create device, devfn: %x, type: %s\n", devfn, type);
139 dev->dev.parent = bus->bridge;
140 dev->dev.bus = &pci_bus_type;
142 dev->multifunction = 0; /* maybe a lie? */
143 dev->needs_freset = 0; /* pcie fundamental reset required */
144 set_pcie_port_type(dev);
146 list_for_each_entry(slot, &dev->bus->slots, list)
147 if (PCI_SLOT(dev->devfn) == slot->number)
150 dev->vendor = get_int_prop(node, "vendor-id", 0xffff);
151 dev->device = get_int_prop(node, "device-id", 0xffff);
152 dev->subsystem_vendor = get_int_prop(node, "subsystem-vendor-id", 0);
153 dev->subsystem_device = get_int_prop(node, "subsystem-id", 0);
155 dev->cfg_size = pci_cfg_space_size(dev);
157 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
158 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
159 dev->class = get_int_prop(node, "class-code", 0);
160 dev->revision = get_int_prop(node, "revision-id", 0);
162 pr_debug(" class: 0x%x\n", dev->class);
163 pr_debug(" revision: 0x%x\n", dev->revision);
165 dev->current_state = 4; /* unknown power state */
166 dev->error_state = pci_channel_io_normal;
167 dev->dma_mask = 0xffffffff;
169 /* Early fixups, before probing the BARs */
170 pci_fixup_device(pci_fixup_early, dev);
172 if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
173 /* a PCI-PCI bridge */
174 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
175 dev->rom_base_reg = PCI_ROM_ADDRESS1;
176 set_pcie_hotplug_bridge(dev);
177 } else if (!strcmp(type, "cardbus")) {
178 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
180 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
181 dev->rom_base_reg = PCI_ROM_ADDRESS;
182 /* Maybe do a default OF mapping here */
186 of_pci_parse_addrs(node, dev);
188 pr_debug(" adding to system ...\n");
190 pci_device_add(dev, bus);
194 EXPORT_SYMBOL(of_create_pci_dev);
197 * of_scan_pci_bridge - Set up a PCI bridge and scan for child nodes
198 * @node: device tree node of bridge
199 * @dev: pci_dev structure for the bridge
201 * of_scan_bus() calls this routine for each PCI bridge that it finds, and
202 * this routine in turn call of_scan_bus() recusively to scan for more child
205 void __devinit of_scan_pci_bridge(struct device_node *node,
209 const u32 *busrange, *ranges;
211 struct resource *res;
215 pr_debug("of_scan_pci_bridge(%s)\n", node->full_name);
217 /* parse bus-range property */
218 busrange = of_get_property(node, "bus-range", &len);
219 if (busrange == NULL || len != 8) {
220 printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %s\n",
224 ranges = of_get_property(node, "ranges", &len);
225 if (ranges == NULL) {
226 printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %s\n",
231 bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
233 printk(KERN_ERR "Failed to create pci bus for %s\n",
238 bus->primary = dev->bus->number;
239 bus->subordinate = busrange[1];
243 /* parse ranges property */
244 /* PCI #address-cells == 3 and #size-cells == 2 always */
245 res = &dev->resource[PCI_BRIDGE_RESOURCES];
246 for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
248 bus->resource[i] = res;
252 for (; len >= 32; len -= 32, ranges += 8) {
253 flags = pci_parse_of_flags(ranges[0], 1);
254 size = of_read_number(&ranges[6], 2);
255 if (flags == 0 || size == 0)
257 if (flags & IORESOURCE_IO) {
258 res = bus->resource[0];
260 printk(KERN_ERR "PCI: ignoring extra I/O range"
261 " for bridge %s\n", node->full_name);
265 if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
266 printk(KERN_ERR "PCI: too many memory ranges"
267 " for bridge %s\n", node->full_name);
270 res = bus->resource[i];
273 res->start = of_read_number(&ranges[1], 2);
274 res->end = res->start + size - 1;
277 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
279 pr_debug(" bus name: %s\n", bus->name);
281 mode = PCI_PROBE_NORMAL;
282 if (ppc_md.pci_probe_mode)
283 mode = ppc_md.pci_probe_mode(bus);
284 pr_debug(" probe mode: %d\n", mode);
286 if (mode == PCI_PROBE_DEVTREE)
287 of_scan_bus(node, bus);
288 else if (mode == PCI_PROBE_NORMAL)
289 pci_scan_child_bus(bus);
291 EXPORT_SYMBOL(of_scan_pci_bridge);
294 * __of_scan_bus - given a PCI bus node, setup bus and scan for child devices
295 * @node: device tree node for the PCI bus
296 * @bus: pci_bus structure for the PCI bus
297 * @rescan_existing: Flag indicating bus has already been set up
299 static void __devinit __of_scan_bus(struct device_node *node,
300 struct pci_bus *bus, int rescan_existing)
302 struct device_node *child;
307 pr_debug("of_scan_bus(%s) bus no %d...\n",
308 node->full_name, bus->number);
310 /* Scan direct children */
311 for_each_child_of_node(node, child) {
312 pr_debug(" * %s\n", child->full_name);
313 if (!of_device_is_available(child))
315 reg = of_get_property(child, "reg", ®len);
316 if (reg == NULL || reglen < 20)
318 devfn = (reg[0] >> 8) & 0xff;
320 /* create a new pci_dev for this device */
321 dev = of_create_pci_dev(child, bus, devfn);
324 pr_debug(" dev header type: %x\n", dev->hdr_type);
327 /* Apply all fixups necessary. We don't fixup the bus "self"
328 * for an existing bridge that is being rescanned
330 if (!rescan_existing)
331 pcibios_setup_bus_self(bus);
332 pcibios_setup_bus_devices(bus);
334 /* Now scan child busses */
335 list_for_each_entry(dev, &bus->devices, bus_list) {
336 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
337 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
338 struct device_node *child = pci_device_to_OF_node(dev);
339 of_scan_pci_bridge(child, dev);
345 * of_scan_bus - given a PCI bus node, setup bus and scan for child devices
346 * @node: device tree node for the PCI bus
347 * @bus: pci_bus structure for the PCI bus
349 void __devinit of_scan_bus(struct device_node *node,
352 __of_scan_bus(node, bus, 0);
354 EXPORT_SYMBOL_GPL(of_scan_bus);
357 * of_rescan_bus - given a PCI bus node, scan for child devices
358 * @node: device tree node for the PCI bus
359 * @bus: pci_bus structure for the PCI bus
361 * Same as of_scan_bus, but for a pci_bus structure that has already been
364 void __devinit of_rescan_bus(struct device_node *node,
367 __of_scan_bus(node, bus, 1);
369 EXPORT_SYMBOL_GPL(of_rescan_bus);