2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
18 #include <linux/types.h>
19 #include <linux/string.h>
20 #include <linux/kvm.h>
21 #include <linux/kvm_host.h>
22 #include <linux/highmem.h>
23 #include <linux/gfp.h>
24 #include <linux/slab.h>
25 #include <linux/hugetlb.h>
26 #include <linux/vmalloc.h>
27 #include <linux/srcu.h>
28 #include <linux/anon_inodes.h>
29 #include <linux/file.h>
31 #include <asm/tlbflush.h>
32 #include <asm/kvm_ppc.h>
33 #include <asm/kvm_book3s.h>
34 #include <asm/mmu-hash64.h>
35 #include <asm/hvcall.h>
36 #include <asm/synch.h>
37 #include <asm/ppc-opcode.h>
38 #include <asm/cputable.h>
40 /* POWER7 has 10-bit LPIDs, PPC970 has 6-bit LPIDs */
41 #define MAX_LPID_970 63
43 /* Power architecture requires HPT is at least 256kB */
44 #define PPC_MIN_HPT_ORDER 18
46 static long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags,
47 long pte_index, unsigned long pteh,
48 unsigned long ptel, unsigned long *pte_idx_ret);
49 static void kvmppc_rmap_reset(struct kvm *kvm);
51 long kvmppc_alloc_hpt(struct kvm *kvm, u32 *htab_orderp)
54 struct revmap_entry *rev;
55 struct kvmppc_linear_info *li;
56 long order = kvm_hpt_order;
60 if (order < PPC_MIN_HPT_ORDER)
61 order = PPC_MIN_HPT_ORDER;
65 * If the user wants a different size from default,
66 * try first to allocate it from the kernel page allocator.
69 if (order != kvm_hpt_order) {
70 hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT|
71 __GFP_NOWARN, order - PAGE_SHIFT);
76 /* Next try to allocate from the preallocated pool */
80 hpt = (ulong)li->base_virt;
81 kvm->arch.hpt_li = li;
82 order = kvm_hpt_order;
86 /* Lastly try successively smaller sizes from the page allocator */
87 while (!hpt && order > PPC_MIN_HPT_ORDER) {
88 hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT|
89 __GFP_NOWARN, order - PAGE_SHIFT);
97 kvm->arch.hpt_virt = hpt;
98 kvm->arch.hpt_order = order;
99 /* HPTEs are 2**4 bytes long */
100 kvm->arch.hpt_npte = 1ul << (order - 4);
101 /* 128 (2**7) bytes in each HPTEG */
102 kvm->arch.hpt_mask = (1ul << (order - 7)) - 1;
104 /* Allocate reverse map array */
105 rev = vmalloc(sizeof(struct revmap_entry) * kvm->arch.hpt_npte);
107 pr_err("kvmppc_alloc_hpt: Couldn't alloc reverse map array\n");
110 kvm->arch.revmap = rev;
111 kvm->arch.sdr1 = __pa(hpt) | (order - 18);
113 pr_info("KVM guest htab at %lx (order %ld), LPID %x\n",
114 hpt, order, kvm->arch.lpid);
117 *htab_orderp = order;
121 if (kvm->arch.hpt_li)
122 kvm_release_hpt(kvm->arch.hpt_li);
124 free_pages(hpt, order - PAGE_SHIFT);
128 long kvmppc_alloc_reset_hpt(struct kvm *kvm, u32 *htab_orderp)
133 mutex_lock(&kvm->lock);
134 if (kvm->arch.rma_setup_done) {
135 kvm->arch.rma_setup_done = 0;
136 /* order rma_setup_done vs. vcpus_running */
138 if (atomic_read(&kvm->arch.vcpus_running)) {
139 kvm->arch.rma_setup_done = 1;
143 if (kvm->arch.hpt_virt) {
144 order = kvm->arch.hpt_order;
145 /* Set the entire HPT to 0, i.e. invalid HPTEs */
146 memset((void *)kvm->arch.hpt_virt, 0, 1ul << order);
148 * Reset all the reverse-mapping chains for all memslots
150 kvmppc_rmap_reset(kvm);
152 * Set the whole last_vcpu array to an invalid vcpu number.
153 * This ensures that each vcpu will flush its TLB on next entry.
155 memset(kvm->arch.last_vcpu, 0xff, sizeof(kvm->arch.last_vcpu));
156 *htab_orderp = order;
159 err = kvmppc_alloc_hpt(kvm, htab_orderp);
160 order = *htab_orderp;
163 mutex_unlock(&kvm->lock);
167 void kvmppc_free_hpt(struct kvm *kvm)
169 kvmppc_free_lpid(kvm->arch.lpid);
170 vfree(kvm->arch.revmap);
171 if (kvm->arch.hpt_li)
172 kvm_release_hpt(kvm->arch.hpt_li);
174 free_pages(kvm->arch.hpt_virt,
175 kvm->arch.hpt_order - PAGE_SHIFT);
178 /* Bits in first HPTE dword for pagesize 4k, 64k or 16M */
179 static inline unsigned long hpte0_pgsize_encoding(unsigned long pgsize)
181 return (pgsize > 0x1000) ? HPTE_V_LARGE : 0;
184 /* Bits in second HPTE dword for pagesize 4k, 64k or 16M */
185 static inline unsigned long hpte1_pgsize_encoding(unsigned long pgsize)
187 return (pgsize == 0x10000) ? 0x1000 : 0;
190 void kvmppc_map_vrma(struct kvm_vcpu *vcpu, struct kvm_memory_slot *memslot,
191 unsigned long porder)
194 unsigned long npages;
195 unsigned long hp_v, hp_r;
196 unsigned long addr, hash;
198 unsigned long hp0, hp1;
199 unsigned long idx_ret;
201 struct kvm *kvm = vcpu->kvm;
203 psize = 1ul << porder;
204 npages = memslot->npages >> (porder - PAGE_SHIFT);
206 /* VRMA can't be > 1TB */
207 if (npages > 1ul << (40 - porder))
208 npages = 1ul << (40 - porder);
209 /* Can't use more than 1 HPTE per HPTEG */
210 if (npages > kvm->arch.hpt_mask + 1)
211 npages = kvm->arch.hpt_mask + 1;
213 hp0 = HPTE_V_1TB_SEG | (VRMA_VSID << (40 - 16)) |
214 HPTE_V_BOLTED | hpte0_pgsize_encoding(psize);
215 hp1 = hpte1_pgsize_encoding(psize) |
216 HPTE_R_R | HPTE_R_C | HPTE_R_M | PP_RWXX;
218 for (i = 0; i < npages; ++i) {
220 /* can't use hpt_hash since va > 64 bits */
221 hash = (i ^ (VRMA_VSID ^ (VRMA_VSID << 25))) & kvm->arch.hpt_mask;
223 * We assume that the hash table is empty and no
224 * vcpus are using it at this stage. Since we create
225 * at most one HPTE per HPTEG, we just assume entry 7
226 * is available and use it.
228 hash = (hash << 3) + 7;
229 hp_v = hp0 | ((addr >> 16) & ~0x7fUL);
231 ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, hash, hp_v, hp_r,
233 if (ret != H_SUCCESS) {
234 pr_err("KVM: map_vrma at %lx failed, ret=%ld\n",
241 int kvmppc_mmu_hv_init(void)
243 unsigned long host_lpid, rsvd_lpid;
245 if (!cpu_has_feature(CPU_FTR_HVMODE))
248 /* POWER7 has 10-bit LPIDs, PPC970 and e500mc have 6-bit LPIDs */
249 if (cpu_has_feature(CPU_FTR_ARCH_206)) {
250 host_lpid = mfspr(SPRN_LPID); /* POWER7 */
251 rsvd_lpid = LPID_RSVD;
253 host_lpid = 0; /* PPC970 */
254 rsvd_lpid = MAX_LPID_970;
257 kvmppc_init_lpid(rsvd_lpid + 1);
259 kvmppc_claim_lpid(host_lpid);
260 /* rsvd_lpid is reserved for use in partition switching */
261 kvmppc_claim_lpid(rsvd_lpid);
266 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
270 static void kvmppc_mmu_book3s_64_hv_reset_msr(struct kvm_vcpu *vcpu)
272 kvmppc_set_msr(vcpu, MSR_SF | MSR_ME);
276 * This is called to get a reference to a guest page if there isn't
277 * one already in the memslot->arch.slot_phys[] array.
279 static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,
280 struct kvm_memory_slot *memslot,
285 struct page *page, *hpage, *pages[1];
286 unsigned long s, pgsize;
287 unsigned long *physp;
288 unsigned int is_io, got, pgorder;
289 struct vm_area_struct *vma;
290 unsigned long pfn, i, npages;
292 physp = memslot->arch.slot_phys;
295 if (physp[gfn - memslot->base_gfn])
303 start = gfn_to_hva_memslot(memslot, gfn);
305 /* Instantiate and get the page we want access to */
306 np = get_user_pages_fast(start, 1, 1, pages);
308 /* Look up the vma for the page */
309 down_read(¤t->mm->mmap_sem);
310 vma = find_vma(current->mm, start);
311 if (!vma || vma->vm_start > start ||
312 start + psize > vma->vm_end ||
313 !(vma->vm_flags & VM_PFNMAP))
315 is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot));
316 pfn = vma->vm_pgoff + ((start - vma->vm_start) >> PAGE_SHIFT);
317 /* check alignment of pfn vs. requested page size */
318 if (psize > PAGE_SIZE && (pfn & ((psize >> PAGE_SHIFT) - 1)))
320 up_read(¤t->mm->mmap_sem);
324 got = KVMPPC_GOT_PAGE;
326 /* See if this is a large page */
328 if (PageHuge(page)) {
329 hpage = compound_head(page);
330 s <<= compound_order(hpage);
331 /* Get the whole large page if slot alignment is ok */
332 if (s > psize && slot_is_aligned(memslot, s) &&
333 !(memslot->userspace_addr & (s - 1))) {
343 pfn = page_to_pfn(page);
346 npages = pgsize >> PAGE_SHIFT;
347 pgorder = __ilog2(npages);
348 physp += (gfn - memslot->base_gfn) & ~(npages - 1);
349 spin_lock(&kvm->arch.slot_phys_lock);
350 for (i = 0; i < npages; ++i) {
352 physp[i] = ((pfn + i) << PAGE_SHIFT) +
353 got + is_io + pgorder;
357 spin_unlock(&kvm->arch.slot_phys_lock);
366 up_read(¤t->mm->mmap_sem);
370 long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags,
371 long pte_index, unsigned long pteh,
372 unsigned long ptel, unsigned long *pte_idx_ret)
374 unsigned long psize, gpa, gfn;
375 struct kvm_memory_slot *memslot;
378 if (kvm->arch.using_mmu_notifiers)
381 psize = hpte_page_size(pteh, ptel);
385 pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID);
387 /* Find the memslot (if any) for this address */
388 gpa = (ptel & HPTE_R_RPN) & ~(psize - 1);
389 gfn = gpa >> PAGE_SHIFT;
390 memslot = gfn_to_memslot(kvm, gfn);
391 if (memslot && !(memslot->flags & KVM_MEMSLOT_INVALID)) {
392 if (!slot_is_aligned(memslot, psize))
394 if (kvmppc_get_guest_page(kvm, gfn, memslot, psize) < 0)
399 /* Protect linux PTE lookup from page table destruction */
400 rcu_read_lock_sched(); /* this disables preemption too */
401 ret = kvmppc_do_h_enter(kvm, flags, pte_index, pteh, ptel,
402 current->mm->pgd, false, pte_idx_ret);
403 rcu_read_unlock_sched();
404 if (ret == H_TOO_HARD) {
405 /* this can't happen */
406 pr_err("KVM: Oops, kvmppc_h_enter returned too hard!\n");
407 ret = H_RESOURCE; /* or something */
414 * We come here on a H_ENTER call from the guest when we are not
415 * using mmu notifiers and we don't have the requested page pinned
418 long kvmppc_virtmode_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
419 long pte_index, unsigned long pteh,
422 return kvmppc_virtmode_do_h_enter(vcpu->kvm, flags, pte_index,
423 pteh, ptel, &vcpu->arch.gpr[4]);
426 static struct kvmppc_slb *kvmppc_mmu_book3s_hv_find_slbe(struct kvm_vcpu *vcpu,
432 for (i = 0; i < vcpu->arch.slb_nr; i++) {
433 if (!(vcpu->arch.slb[i].orige & SLB_ESID_V))
436 if (vcpu->arch.slb[i].origv & SLB_VSID_B_1T)
441 if (((vcpu->arch.slb[i].orige ^ eaddr) & mask) == 0)
442 return &vcpu->arch.slb[i];
447 static unsigned long kvmppc_mmu_get_real_addr(unsigned long v, unsigned long r,
450 unsigned long ra_mask;
452 ra_mask = hpte_page_size(v, r) - 1;
453 return (r & HPTE_R_RPN & ~ra_mask) | (ea & ra_mask);
456 static int kvmppc_mmu_book3s_64_hv_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
457 struct kvmppc_pte *gpte, bool data)
459 struct kvm *kvm = vcpu->kvm;
460 struct kvmppc_slb *slbe;
462 unsigned long pp, key;
464 unsigned long *hptep;
466 int virtmode = vcpu->arch.shregs.msr & (data ? MSR_DR : MSR_IR);
470 slbe = kvmppc_mmu_book3s_hv_find_slbe(vcpu, eaddr);
475 /* real mode access */
476 slb_v = vcpu->kvm->arch.vrma_slb_v;
479 /* Find the HPTE in the hash table */
480 index = kvmppc_hv_find_lock_hpte(kvm, eaddr, slb_v,
481 HPTE_V_VALID | HPTE_V_ABSENT);
484 hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4));
485 v = hptep[0] & ~HPTE_V_HVLOCK;
486 gr = kvm->arch.revmap[index].guest_rpte;
488 /* Unlock the HPTE */
489 asm volatile("lwsync" : : : "memory");
493 gpte->vpage = ((v & HPTE_V_AVPN) << 4) | ((eaddr >> 12) & 0xfff);
495 /* Get PP bits and key for permission check */
496 pp = gr & (HPTE_R_PP0 | HPTE_R_PP);
497 key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS;
500 /* Calculate permissions */
501 gpte->may_read = hpte_read_permission(pp, key);
502 gpte->may_write = hpte_write_permission(pp, key);
503 gpte->may_execute = gpte->may_read && !(gr & (HPTE_R_N | HPTE_R_G));
505 /* Storage key permission check for POWER7 */
506 if (data && virtmode && cpu_has_feature(CPU_FTR_ARCH_206)) {
507 int amrfield = hpte_get_skey_perm(gr, vcpu->arch.amr);
514 /* Get the guest physical address */
515 gpte->raddr = kvmppc_mmu_get_real_addr(v, gr, eaddr);
520 * Quick test for whether an instruction is a load or a store.
521 * If the instruction is a load or a store, then this will indicate
522 * which it is, at least on server processors. (Embedded processors
523 * have some external PID instructions that don't follow the rule
524 * embodied here.) If the instruction isn't a load or store, then
525 * this doesn't return anything useful.
527 static int instruction_is_store(unsigned int instr)
532 if ((instr & 0xfc000000) == 0x7c000000)
533 mask = 0x100; /* major opcode 31 */
534 return (instr & mask) != 0;
537 static int kvmppc_hv_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu,
538 unsigned long gpa, gva_t ea, int is_store)
542 unsigned long srr0 = kvmppc_get_pc(vcpu);
544 /* We try to load the last instruction. We don't let
545 * emulate_instruction do it as it doesn't check what
547 * If we fail, we just return to the guest and try executing it again.
549 if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED) {
550 ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false);
551 if (ret != EMULATE_DONE || last_inst == KVM_INST_FETCH_FAILED)
553 vcpu->arch.last_inst = last_inst;
557 * WARNING: We do not know for sure whether the instruction we just
558 * read from memory is the same that caused the fault in the first
559 * place. If the instruction we read is neither an load or a store,
560 * then it can't access memory, so we don't need to worry about
561 * enforcing access permissions. So, assuming it is a load or
562 * store, we just check that its direction (load or store) is
563 * consistent with the original fault, since that's what we
564 * checked the access permissions against. If there is a mismatch
565 * we just return and retry the instruction.
568 if (instruction_is_store(vcpu->arch.last_inst) != !!is_store)
572 * Emulated accesses are emulated by looking at the hash for
573 * translation once, then performing the access later. The
574 * translation could be invalidated in the meantime in which
575 * point performing the subsequent memory access on the old
576 * physical address could possibly be a security hole for the
577 * guest (but not the host).
579 * This is less of an issue for MMIO stores since they aren't
580 * globally visible. It could be an issue for MMIO loads to
581 * a certain extent but we'll ignore it for now.
584 vcpu->arch.paddr_accessed = gpa;
585 vcpu->arch.vaddr_accessed = ea;
586 return kvmppc_emulate_mmio(run, vcpu);
589 int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
590 unsigned long ea, unsigned long dsisr)
592 struct kvm *kvm = vcpu->kvm;
593 unsigned long *hptep, hpte[3], r;
594 unsigned long mmu_seq, psize, pte_size;
595 unsigned long gpa, gfn, hva, pfn;
596 struct kvm_memory_slot *memslot;
598 struct revmap_entry *rev;
599 struct page *page, *pages[1];
600 long index, ret, npages;
602 unsigned int writing, write_ok;
603 struct vm_area_struct *vma;
604 unsigned long rcbits;
607 * Real-mode code has already searched the HPT and found the
608 * entry we're interested in. Lock the entry and check that
609 * it hasn't changed. If it has, just return and re-execute the
612 if (ea != vcpu->arch.pgfault_addr)
614 index = vcpu->arch.pgfault_index;
615 hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4));
616 rev = &kvm->arch.revmap[index];
618 while (!try_lock_hpte(hptep, HPTE_V_HVLOCK))
620 hpte[0] = hptep[0] & ~HPTE_V_HVLOCK;
622 hpte[2] = r = rev->guest_rpte;
623 asm volatile("lwsync" : : : "memory");
627 if (hpte[0] != vcpu->arch.pgfault_hpte[0] ||
628 hpte[1] != vcpu->arch.pgfault_hpte[1])
631 /* Translate the logical address and get the page */
632 psize = hpte_page_size(hpte[0], r);
633 gpa = (r & HPTE_R_RPN & ~(psize - 1)) | (ea & (psize - 1));
634 gfn = gpa >> PAGE_SHIFT;
635 memslot = gfn_to_memslot(kvm, gfn);
637 /* No memslot means it's an emulated MMIO region */
638 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
639 return kvmppc_hv_emulate_mmio(run, vcpu, gpa, ea,
640 dsisr & DSISR_ISSTORE);
642 if (!kvm->arch.using_mmu_notifiers)
643 return -EFAULT; /* should never get here */
645 /* used to check for invalidations in progress */
646 mmu_seq = kvm->mmu_notifier_seq;
652 pte_size = PAGE_SIZE;
653 writing = (dsisr & DSISR_ISSTORE) != 0;
654 /* If writing != 0, then the HPTE must allow writing, if we get here */
656 hva = gfn_to_hva_memslot(memslot, gfn);
657 npages = get_user_pages_fast(hva, 1, writing, pages);
659 /* Check if it's an I/O mapping */
660 down_read(¤t->mm->mmap_sem);
661 vma = find_vma(current->mm, hva);
662 if (vma && vma->vm_start <= hva && hva + psize <= vma->vm_end &&
663 (vma->vm_flags & VM_PFNMAP)) {
664 pfn = vma->vm_pgoff +
665 ((hva - vma->vm_start) >> PAGE_SHIFT);
667 is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot));
668 write_ok = vma->vm_flags & VM_WRITE;
670 up_read(¤t->mm->mmap_sem);
675 if (PageHuge(page)) {
676 page = compound_head(page);
677 pte_size <<= compound_order(page);
679 /* if the guest wants write access, see if that is OK */
680 if (!writing && hpte_is_writable(r)) {
684 * We need to protect against page table destruction
685 * while looking up and updating the pte.
687 rcu_read_lock_sched();
688 ptep = find_linux_pte_or_hugepte(current->mm->pgd,
690 if (ptep && pte_present(*ptep)) {
691 pte = kvmppc_read_update_linux_pte(ptep, 1);
695 rcu_read_unlock_sched();
697 pfn = page_to_pfn(page);
701 if (psize > pte_size)
704 /* Check WIMG vs. the actual page we're accessing */
705 if (!hpte_cache_flags_ok(r, is_io)) {
709 * Allow guest to map emulated device memory as
710 * uncacheable, but actually make it cacheable.
712 r = (r & ~(HPTE_R_W|HPTE_R_I|HPTE_R_G)) | HPTE_R_M;
715 /* Set the HPTE to point to pfn */
716 r = (r & ~(HPTE_R_PP0 - pte_size)) | (pfn << PAGE_SHIFT);
717 if (hpte_is_writable(r) && !write_ok)
718 r = hpte_make_readonly(r);
721 while (!try_lock_hpte(hptep, HPTE_V_HVLOCK))
723 if ((hptep[0] & ~HPTE_V_HVLOCK) != hpte[0] || hptep[1] != hpte[1] ||
724 rev->guest_rpte != hpte[2])
725 /* HPTE has been changed under us; let the guest retry */
727 hpte[0] = (hpte[0] & ~HPTE_V_ABSENT) | HPTE_V_VALID;
729 rmap = &memslot->arch.rmap[gfn - memslot->base_gfn];
732 /* Check if we might have been invalidated; let the guest retry if so */
734 if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) {
739 /* Only set R/C in real HPTE if set in both *rmap and guest_rpte */
740 rcbits = *rmap >> KVMPPC_RMAP_RC_SHIFT;
741 r &= rcbits | ~(HPTE_R_R | HPTE_R_C);
743 if (hptep[0] & HPTE_V_VALID) {
744 /* HPTE was previously valid, so we need to invalidate it */
746 hptep[0] |= HPTE_V_ABSENT;
747 kvmppc_invalidate_hpte(kvm, hptep, index);
748 /* don't lose previous R and C bits */
749 r |= hptep[1] & (HPTE_R_R | HPTE_R_C);
751 kvmppc_add_revmap_chain(kvm, rev, rmap, index, 0);
757 asm volatile("ptesync" : : : "memory");
759 if (page && hpte_is_writable(r))
765 * We drop pages[0] here, not page because page might
766 * have been set to the head page of a compound, but
767 * we have to drop the reference on the correct tail
768 * page to match the get inside gup()
775 hptep[0] &= ~HPTE_V_HVLOCK;
780 static void kvmppc_rmap_reset(struct kvm *kvm)
782 struct kvm_memslots *slots;
783 struct kvm_memory_slot *memslot;
786 srcu_idx = srcu_read_lock(&kvm->srcu);
787 slots = kvm->memslots;
788 kvm_for_each_memslot(memslot, slots) {
790 * This assumes it is acceptable to lose reference and
791 * change bits across a reset.
793 memset(memslot->arch.rmap, 0,
794 memslot->npages * sizeof(*memslot->arch.rmap));
796 srcu_read_unlock(&kvm->srcu, srcu_idx);
799 static int kvm_handle_hva_range(struct kvm *kvm,
802 int (*handler)(struct kvm *kvm,
803 unsigned long *rmapp,
808 struct kvm_memslots *slots;
809 struct kvm_memory_slot *memslot;
811 slots = kvm_memslots(kvm);
812 kvm_for_each_memslot(memslot, slots) {
813 unsigned long hva_start, hva_end;
816 hva_start = max(start, memslot->userspace_addr);
817 hva_end = min(end, memslot->userspace_addr +
818 (memslot->npages << PAGE_SHIFT));
819 if (hva_start >= hva_end)
822 * {gfn(page) | page intersects with [hva_start, hva_end)} =
823 * {gfn, gfn+1, ..., gfn_end-1}.
825 gfn = hva_to_gfn_memslot(hva_start, memslot);
826 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
828 for (; gfn < gfn_end; ++gfn) {
829 gfn_t gfn_offset = gfn - memslot->base_gfn;
831 ret = handler(kvm, &memslot->arch.rmap[gfn_offset], gfn);
839 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
840 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
843 return kvm_handle_hva_range(kvm, hva, hva + 1, handler);
846 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
849 struct revmap_entry *rev = kvm->arch.revmap;
850 unsigned long h, i, j;
851 unsigned long *hptep;
852 unsigned long ptel, psize, rcbits;
856 if (!(*rmapp & KVMPPC_RMAP_PRESENT)) {
862 * To avoid an ABBA deadlock with the HPTE lock bit,
863 * we can't spin on the HPTE lock while holding the
866 i = *rmapp & KVMPPC_RMAP_INDEX;
867 hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4));
868 if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) {
869 /* unlock rmap before spinning on the HPTE lock */
871 while (hptep[0] & HPTE_V_HVLOCK)
877 /* chain is now empty */
878 *rmapp &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX);
880 /* remove i from chain */
884 rev[i].forw = rev[i].back = i;
885 *rmapp = (*rmapp & ~KVMPPC_RMAP_INDEX) | j;
888 /* Now check and modify the HPTE */
889 ptel = rev[i].guest_rpte;
890 psize = hpte_page_size(hptep[0], ptel);
891 if ((hptep[0] & HPTE_V_VALID) &&
892 hpte_rpn(ptel, psize) == gfn) {
893 if (kvm->arch.using_mmu_notifiers)
894 hptep[0] |= HPTE_V_ABSENT;
895 kvmppc_invalidate_hpte(kvm, hptep, i);
896 /* Harvest R and C */
897 rcbits = hptep[1] & (HPTE_R_R | HPTE_R_C);
898 *rmapp |= rcbits << KVMPPC_RMAP_RC_SHIFT;
899 rev[i].guest_rpte = ptel | rcbits;
902 hptep[0] &= ~HPTE_V_HVLOCK;
907 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
909 if (kvm->arch.using_mmu_notifiers)
910 kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
914 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
916 if (kvm->arch.using_mmu_notifiers)
917 kvm_handle_hva_range(kvm, start, end, kvm_unmap_rmapp);
921 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
923 unsigned long *rmapp;
927 rmapp = memslot->arch.rmap;
928 gfn = memslot->base_gfn;
929 for (n = memslot->npages; n; --n) {
931 * Testing the present bit without locking is OK because
932 * the memslot has been marked invalid already, and hence
933 * no new HPTEs referencing this page can be created,
934 * thus the present bit can't go from 0 to 1.
936 if (*rmapp & KVMPPC_RMAP_PRESENT)
937 kvm_unmap_rmapp(kvm, rmapp, gfn);
943 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
946 struct revmap_entry *rev = kvm->arch.revmap;
947 unsigned long head, i, j;
948 unsigned long *hptep;
953 if (*rmapp & KVMPPC_RMAP_REFERENCED) {
954 *rmapp &= ~KVMPPC_RMAP_REFERENCED;
957 if (!(*rmapp & KVMPPC_RMAP_PRESENT)) {
962 i = head = *rmapp & KVMPPC_RMAP_INDEX;
964 hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4));
967 /* If this HPTE isn't referenced, ignore it */
968 if (!(hptep[1] & HPTE_R_R))
971 if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) {
972 /* unlock rmap before spinning on the HPTE lock */
974 while (hptep[0] & HPTE_V_HVLOCK)
979 /* Now check and modify the HPTE */
980 if ((hptep[0] & HPTE_V_VALID) && (hptep[1] & HPTE_R_R)) {
981 kvmppc_clear_ref_hpte(kvm, hptep, i);
982 rev[i].guest_rpte |= HPTE_R_R;
985 hptep[0] &= ~HPTE_V_HVLOCK;
986 } while ((i = j) != head);
992 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
994 if (!kvm->arch.using_mmu_notifiers)
996 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
999 static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1002 struct revmap_entry *rev = kvm->arch.revmap;
1003 unsigned long head, i, j;
1007 if (*rmapp & KVMPPC_RMAP_REFERENCED)
1011 if (*rmapp & KVMPPC_RMAP_REFERENCED)
1014 if (*rmapp & KVMPPC_RMAP_PRESENT) {
1015 i = head = *rmapp & KVMPPC_RMAP_INDEX;
1017 hp = (unsigned long *)(kvm->arch.hpt_virt + (i << 4));
1019 if (hp[1] & HPTE_R_R)
1021 } while ((i = j) != head);
1030 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1032 if (!kvm->arch.using_mmu_notifiers)
1034 return kvm_handle_hva(kvm, hva, kvm_test_age_rmapp);
1037 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1039 if (!kvm->arch.using_mmu_notifiers)
1041 kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
1044 static int kvm_test_clear_dirty(struct kvm *kvm, unsigned long *rmapp)
1046 struct revmap_entry *rev = kvm->arch.revmap;
1047 unsigned long head, i, j;
1048 unsigned long *hptep;
1053 if (*rmapp & KVMPPC_RMAP_CHANGED) {
1054 *rmapp &= ~KVMPPC_RMAP_CHANGED;
1057 if (!(*rmapp & KVMPPC_RMAP_PRESENT)) {
1062 i = head = *rmapp & KVMPPC_RMAP_INDEX;
1064 hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4));
1067 if (!(hptep[1] & HPTE_R_C))
1070 if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) {
1071 /* unlock rmap before spinning on the HPTE lock */
1073 while (hptep[0] & HPTE_V_HVLOCK)
1078 /* Now check and modify the HPTE */
1079 if ((hptep[0] & HPTE_V_VALID) && (hptep[1] & HPTE_R_C)) {
1080 /* need to make it temporarily absent to clear C */
1081 hptep[0] |= HPTE_V_ABSENT;
1082 kvmppc_invalidate_hpte(kvm, hptep, i);
1083 hptep[1] &= ~HPTE_R_C;
1085 hptep[0] = (hptep[0] & ~HPTE_V_ABSENT) | HPTE_V_VALID;
1086 rev[i].guest_rpte |= HPTE_R_C;
1089 hptep[0] &= ~HPTE_V_HVLOCK;
1090 } while ((i = j) != head);
1096 long kvmppc_hv_get_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot,
1100 unsigned long *rmapp;
1103 rmapp = memslot->arch.rmap;
1104 for (i = 0; i < memslot->npages; ++i) {
1105 if (kvm_test_clear_dirty(kvm, rmapp) && map)
1106 __set_bit_le(i, map);
1113 void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,
1114 unsigned long *nb_ret)
1116 struct kvm_memory_slot *memslot;
1117 unsigned long gfn = gpa >> PAGE_SHIFT;
1118 struct page *page, *pages[1];
1120 unsigned long hva, psize, offset;
1122 unsigned long *physp;
1125 srcu_idx = srcu_read_lock(&kvm->srcu);
1126 memslot = gfn_to_memslot(kvm, gfn);
1127 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
1129 if (!kvm->arch.using_mmu_notifiers) {
1130 physp = memslot->arch.slot_phys;
1133 physp += gfn - memslot->base_gfn;
1136 if (kvmppc_get_guest_page(kvm, gfn, memslot,
1141 page = pfn_to_page(pa >> PAGE_SHIFT);
1144 hva = gfn_to_hva_memslot(memslot, gfn);
1145 npages = get_user_pages_fast(hva, 1, 1, pages);
1150 srcu_read_unlock(&kvm->srcu, srcu_idx);
1153 if (PageHuge(page)) {
1154 page = compound_head(page);
1155 psize <<= compound_order(page);
1157 offset = gpa & (psize - 1);
1159 *nb_ret = psize - offset;
1160 return page_address(page) + offset;
1163 srcu_read_unlock(&kvm->srcu, srcu_idx);
1167 void kvmppc_unpin_guest_page(struct kvm *kvm, void *va)
1169 struct page *page = virt_to_page(va);
1175 * Functions for reading and writing the hash table via reads and
1176 * writes on a file descriptor.
1178 * Reads return the guest view of the hash table, which has to be
1179 * pieced together from the real hash table and the guest_rpte
1180 * values in the revmap array.
1182 * On writes, each HPTE written is considered in turn, and if it
1183 * is valid, it is written to the HPT as if an H_ENTER with the
1184 * exact flag set was done. When the invalid count is non-zero
1185 * in the header written to the stream, the kernel will make
1186 * sure that that many HPTEs are invalid, and invalidate them
1190 struct kvm_htab_ctx {
1191 unsigned long index;
1192 unsigned long flags;
1197 #define HPTE_SIZE (2 * sizeof(unsigned long))
1199 static long record_hpte(unsigned long flags, unsigned long *hptp,
1200 unsigned long *hpte, struct revmap_entry *revp,
1201 int want_valid, int first_pass)
1207 /* Unmodified entries are uninteresting except on the first pass */
1208 dirty = !!(revp->guest_rpte & HPTE_GR_MODIFIED);
1209 if (!first_pass && !dirty)
1213 if (hptp[0] & (HPTE_V_VALID | HPTE_V_ABSENT)) {
1215 if ((flags & KVM_GET_HTAB_BOLTED_ONLY) &&
1216 !(hptp[0] & HPTE_V_BOLTED))
1219 if (valid != want_valid)
1223 if (valid || dirty) {
1224 /* lock the HPTE so it's stable and read it */
1226 while (!try_lock_hpte(hptp, HPTE_V_HVLOCK))
1229 if (v & HPTE_V_ABSENT) {
1230 v &= ~HPTE_V_ABSENT;
1233 /* re-evaluate valid and dirty from synchronized HPTE value */
1234 valid = !!(v & HPTE_V_VALID);
1235 if ((flags & KVM_GET_HTAB_BOLTED_ONLY) && !(v & HPTE_V_BOLTED))
1237 r = revp->guest_rpte | (hptp[1] & (HPTE_R_R | HPTE_R_C));
1238 dirty = !!(revp->guest_rpte & HPTE_GR_MODIFIED);
1239 /* only clear modified if this is the right sort of entry */
1240 if (valid == want_valid && dirty) {
1241 r &= ~HPTE_GR_MODIFIED;
1242 revp->guest_rpte = r;
1244 asm volatile(PPC_RELEASE_BARRIER "" : : : "memory");
1245 hptp[0] &= ~HPTE_V_HVLOCK;
1247 if (!(valid == want_valid && (first_pass || dirty)))
1255 static ssize_t kvm_htab_read(struct file *file, char __user *buf,
1256 size_t count, loff_t *ppos)
1258 struct kvm_htab_ctx *ctx = file->private_data;
1259 struct kvm *kvm = ctx->kvm;
1260 struct kvm_get_htab_header hdr;
1261 unsigned long *hptp;
1262 struct revmap_entry *revp;
1263 unsigned long i, nb, nw;
1264 unsigned long __user *lbuf;
1265 struct kvm_get_htab_header __user *hptr;
1266 unsigned long flags;
1268 unsigned long hpte[2];
1270 if (!access_ok(VERIFY_WRITE, buf, count))
1273 first_pass = ctx->first_pass;
1277 hptp = (unsigned long *)(kvm->arch.hpt_virt + (i * HPTE_SIZE));
1278 revp = kvm->arch.revmap + i;
1279 lbuf = (unsigned long __user *)buf;
1282 while (nb + sizeof(hdr) + HPTE_SIZE < count) {
1283 /* Initialize header */
1284 hptr = (struct kvm_get_htab_header __user *)buf;
1290 lbuf = (unsigned long __user *)(buf + sizeof(hdr));
1292 /* Skip uninteresting entries, i.e. clean on not-first pass */
1294 while (i < kvm->arch.hpt_npte &&
1295 !(revp->guest_rpte & HPTE_GR_MODIFIED)) {
1302 /* Grab a series of valid entries */
1303 while (i < kvm->arch.hpt_npte &&
1304 hdr.n_valid < 0xffff &&
1305 nb + HPTE_SIZE < count &&
1306 record_hpte(flags, hptp, hpte, revp, 1, first_pass)) {
1307 /* valid entry, write it out */
1309 if (__put_user(hpte[0], lbuf) ||
1310 __put_user(hpte[1], lbuf + 1))
1318 /* Now skip invalid entries while we can */
1319 while (i < kvm->arch.hpt_npte &&
1320 hdr.n_invalid < 0xffff &&
1321 record_hpte(flags, hptp, hpte, revp, 0, first_pass)) {
1322 /* found an invalid entry */
1329 if (hdr.n_valid || hdr.n_invalid) {
1330 /* write back the header */
1331 if (__copy_to_user(hptr, &hdr, sizeof(hdr)))
1334 buf = (char __user *)lbuf;
1339 /* Check if we've wrapped around the hash table */
1340 if (i >= kvm->arch.hpt_npte) {
1342 ctx->first_pass = 0;
1352 static ssize_t kvm_htab_write(struct file *file, const char __user *buf,
1353 size_t count, loff_t *ppos)
1355 struct kvm_htab_ctx *ctx = file->private_data;
1356 struct kvm *kvm = ctx->kvm;
1357 struct kvm_get_htab_header hdr;
1360 unsigned long __user *lbuf;
1361 unsigned long *hptp;
1362 unsigned long tmp[2];
1367 if (!access_ok(VERIFY_READ, buf, count))
1370 /* lock out vcpus from running while we're doing this */
1371 mutex_lock(&kvm->lock);
1372 rma_setup = kvm->arch.rma_setup_done;
1374 kvm->arch.rma_setup_done = 0; /* temporarily */
1375 /* order rma_setup_done vs. vcpus_running */
1377 if (atomic_read(&kvm->arch.vcpus_running)) {
1378 kvm->arch.rma_setup_done = 1;
1379 mutex_unlock(&kvm->lock);
1385 for (nb = 0; nb + sizeof(hdr) <= count; ) {
1387 if (__copy_from_user(&hdr, buf, sizeof(hdr)))
1391 if (nb + hdr.n_valid * HPTE_SIZE > count)
1399 if (i >= kvm->arch.hpt_npte ||
1400 i + hdr.n_valid + hdr.n_invalid > kvm->arch.hpt_npte)
1403 hptp = (unsigned long *)(kvm->arch.hpt_virt + (i * HPTE_SIZE));
1404 lbuf = (unsigned long __user *)buf;
1405 for (j = 0; j < hdr.n_valid; ++j) {
1407 if (__get_user(v, lbuf) || __get_user(r, lbuf + 1))
1410 if (!(v & HPTE_V_VALID))
1415 if (hptp[0] & (HPTE_V_VALID | HPTE_V_ABSENT))
1416 kvmppc_do_h_remove(kvm, 0, i, 0, tmp);
1418 ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, i, v, r,
1420 if (ret != H_SUCCESS) {
1421 pr_err("kvm_htab_write ret %ld i=%ld v=%lx "
1422 "r=%lx\n", ret, i, v, r);
1425 if (!rma_setup && is_vrma_hpte(v)) {
1426 unsigned long psize = hpte_page_size(v, r);
1427 unsigned long senc = slb_pgsize_encoding(psize);
1430 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
1431 (VRMA_VSID << SLB_VSID_SHIFT_1T);
1432 lpcr = kvm->arch.lpcr & ~LPCR_VRMASD;
1433 lpcr |= senc << (LPCR_VRMASD_SH - 4);
1434 kvm->arch.lpcr = lpcr;
1441 for (j = 0; j < hdr.n_invalid; ++j) {
1442 if (hptp[0] & (HPTE_V_VALID | HPTE_V_ABSENT))
1443 kvmppc_do_h_remove(kvm, 0, i, 0, tmp);
1451 /* Order HPTE updates vs. rma_setup_done */
1453 kvm->arch.rma_setup_done = rma_setup;
1454 mutex_unlock(&kvm->lock);
1461 static int kvm_htab_release(struct inode *inode, struct file *filp)
1463 struct kvm_htab_ctx *ctx = filp->private_data;
1465 filp->private_data = NULL;
1466 if (!(ctx->flags & KVM_GET_HTAB_WRITE))
1467 atomic_dec(&ctx->kvm->arch.hpte_mod_interest);
1468 kvm_put_kvm(ctx->kvm);
1473 static struct file_operations kvm_htab_fops = {
1474 .read = kvm_htab_read,
1475 .write = kvm_htab_write,
1476 .llseek = default_llseek,
1477 .release = kvm_htab_release,
1480 int kvm_vm_ioctl_get_htab_fd(struct kvm *kvm, struct kvm_get_htab_fd *ghf)
1483 struct kvm_htab_ctx *ctx;
1486 /* reject flags we don't recognize */
1487 if (ghf->flags & ~(KVM_GET_HTAB_BOLTED_ONLY | KVM_GET_HTAB_WRITE))
1489 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1494 ctx->index = ghf->start_index;
1495 ctx->flags = ghf->flags;
1496 ctx->first_pass = 1;
1498 rwflag = (ghf->flags & KVM_GET_HTAB_WRITE) ? O_WRONLY : O_RDONLY;
1499 ret = anon_inode_getfd("kvm-htab", &kvm_htab_fops, ctx, rwflag);
1505 if (rwflag == O_RDONLY) {
1506 mutex_lock(&kvm->slots_lock);
1507 atomic_inc(&kvm->arch.hpte_mod_interest);
1508 /* make sure kvmppc_do_h_enter etc. see the increment */
1509 synchronize_srcu_expedited(&kvm->srcu);
1510 mutex_unlock(&kvm->slots_lock);
1516 void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu)
1518 struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
1520 if (cpu_has_feature(CPU_FTR_ARCH_206))
1521 vcpu->arch.slb_nr = 32; /* POWER7 */
1523 vcpu->arch.slb_nr = 64;
1525 mmu->xlate = kvmppc_mmu_book3s_64_hv_xlate;
1526 mmu->reset_msr = kvmppc_mmu_book3s_64_hv_reset_msr;
1528 vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;