arch/powerpc/platforms/85xx/mpc85xx_rdb.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * MPC85xx RDB Board Setup
   4  *
   5  * Copyright 2009,2012-2013 Freescale Semiconductor Inc.
   6  */
   7
   8 #include <linux/stddef.h>
   9 #include <linux/kernel.h>
  10 #include <linux/pci.h>
  11 #include <linux/kdev_t.h>
  12 #include <linux/delay.h>
  13 #include <linux/seq_file.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/of_platform.h>
  16 #include <linux/fsl/guts.h>
  17
  18 #include <asm/time.h>
  19 #include <asm/machdep.h>
  20 #include <asm/pci-bridge.h>
  21 #include <mm/mmu_decl.h>
  22 #include <asm/prom.h>
  23 #include <asm/udbg.h>
  24 #include <asm/mpic.h>
  25 #include <soc/fsl/qe/qe.h>
  26 #include <soc/fsl/qe/qe_ic.h>
  27
  28 #include <sysdev/fsl_soc.h>
  29 #include <sysdev/fsl_pci.h>
  30 #include "smp.h"
  31
  32 #include "mpc85xx.h"
  33
  34 #undef DEBUG
  35
  36 #ifdef DEBUG
  37 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  38 #else
  39 #define DBG(fmt, args...)
  40 #endif
  41
  42
  43 void __init mpc85xx_rdb_pic_init(void)
  44 {
  45         struct mpic *mpic;
  46
  47 #ifdef CONFIG_QUICC_ENGINE
  48         struct device_node *np;
  49 #endif
  50
  51         if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) {
  52                 mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
  53                         MPIC_BIG_ENDIAN |
  54                         MPIC_SINGLE_DEST_CPU,
  55                         0, 256, " OpenPIC  ");
  56         } else {
  57                 mpic = mpic_alloc(NULL, 0,
  58                   MPIC_BIG_ENDIAN |
  59                   MPIC_SINGLE_DEST_CPU,
  60                   0, 256, " OpenPIC  ");
  61         }
  62
  63         BUG_ON(mpic == NULL);
  64         mpic_init(mpic);
  65
  66 #ifdef CONFIG_QUICC_ENGINE
  67         np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
  68         if (np) {
  69                 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
  70                                 qe_ic_cascade_high_mpic);
  71                 of_node_put(np);
  72
  73         } else
  74                 pr_err("%s: Could not find qe-ic node\n", __func__);
  75 #endif
  76
  77 }
  78
  79 /*
  80  * Setup the architecture
  81  */
  82 static void __init mpc85xx_rdb_setup_arch(void)
  83 {
  84         if (ppc_md.progress)
  85                 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
  86
  87         mpc85xx_smp_init();
  88
  89         fsl_pci_assign_primary();
  90
  91 #ifdef CONFIG_QUICC_ENGINE
  92         mpc85xx_qe_par_io_init();
  93 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
  94         if (machine_is(p1025_rdb)) {
  95                 struct device_node *np;
  96
  97                 struct ccsr_guts __iomem *guts;
  98
  99                 np = of_find_node_by_name(NULL, "global-utilities");
 100                 if (np) {
 101                         guts = of_iomap(np, 0);
 102                         if (!guts) {
 103
 104                                 pr_err("mpc85xx-rdb: could not map global utilities register\n");
 105
 106                         } else {
 107                         /* P1025 has pins muxed for QE and other functions. To
 108                         * enable QE UEC mode, we need to set bit QE0 for UCC1
 109                         * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
 110                         * and QE12 for QE MII management singals in PMUXCR
 111                         * register.
 112                         */
 113                                 setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
 114                                                 MPC85xx_PMUXCR_QE(3) |
 115                                                 MPC85xx_PMUXCR_QE(9) |
 116                                                 MPC85xx_PMUXCR_QE(12));
 117                                 iounmap(guts);
 118                         }
 119                         of_node_put(np);
 120                 }
 121
 122         }
 123 #endif
 124 #endif  /* CONFIG_QUICC_ENGINE */
 125
 126         printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
 127 }
 128
 129 machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
 130 machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
 131 machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
 132 machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
 133 machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
 134 machine_arch_initcall(p1020_rdb_pd, mpc85xx_common_publish_devices);
 135 machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
 136 machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
 137 machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
 138 machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
 139
 140 /*
 141  * Called very early, device-tree isn't unflattened
 142  */
 143 static int __init p2020_rdb_probe(void)
 144 {
 145         if (of_machine_is_compatible("fsl,P2020RDB"))
 146                 return 1;
 147         return 0;
 148 }
 149
 150 static int __init p1020_rdb_probe(void)
 151 {
 152         if (of_machine_is_compatible("fsl,P1020RDB"))
 153                 return 1;
 154         return 0;
 155 }
 156
 157 static int __init p1020_rdb_pc_probe(void)
 158 {
 159         return of_machine_is_compatible("fsl,P1020RDB-PC");
 160 }
 161
 162 static int __init p1020_rdb_pd_probe(void)
 163 {
 164         return of_machine_is_compatible("fsl,P1020RDB-PD");
 165 }
 166
 167 static int __init p1021_rdb_pc_probe(void)
 168 {
 169         if (of_machine_is_compatible("fsl,P1021RDB-PC"))
 170                 return 1;
 171         return 0;
 172 }
 173
 174 static int __init p2020_rdb_pc_probe(void)
 175 {
 176         if (of_machine_is_compatible("fsl,P2020RDB-PC"))
 177                 return 1;
 178         return 0;
 179 }
 180
 181 static int __init p1025_rdb_probe(void)
 182 {
 183         return of_machine_is_compatible("fsl,P1025RDB");
 184 }
 185
 186 static int __init p1020_mbg_pc_probe(void)
 187 {
 188         return of_machine_is_compatible("fsl,P1020MBG-PC");
 189 }
 190
 191 static int __init p1020_utm_pc_probe(void)
 192 {
 193         return of_machine_is_compatible("fsl,P1020UTM-PC");
 194 }
 195
 196 static int __init p1024_rdb_probe(void)
 197 {
 198         return of_machine_is_compatible("fsl,P1024RDB");
 199 }
 200
 201 define_machine(p2020_rdb) {
 202         .name                   = "P2020 RDB",
 203         .probe                  = p2020_rdb_probe,
 204         .setup_arch             = mpc85xx_rdb_setup_arch,
 205         .init_IRQ               = mpc85xx_rdb_pic_init,
 206 #ifdef CONFIG_PCI
 207         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 208         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 209 #endif
 210         .get_irq                = mpic_get_irq,
 211         .calibrate_decr         = generic_calibrate_decr,
 212         .progress               = udbg_progress,
 213 };
 214
 215 define_machine(p1020_rdb) {
 216         .name                   = "P1020 RDB",
 217         .probe                  = p1020_rdb_probe,
 218         .setup_arch             = mpc85xx_rdb_setup_arch,
 219         .init_IRQ               = mpc85xx_rdb_pic_init,
 220 #ifdef CONFIG_PCI
 221         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 222         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 223 #endif
 224         .get_irq                = mpic_get_irq,
 225         .calibrate_decr         = generic_calibrate_decr,
 226         .progress               = udbg_progress,
 227 };
 228
 229 define_machine(p1021_rdb_pc) {
 230         .name                   = "P1021 RDB-PC",
 231         .probe                  = p1021_rdb_pc_probe,
 232         .setup_arch             = mpc85xx_rdb_setup_arch,
 233         .init_IRQ               = mpc85xx_rdb_pic_init,
 234 #ifdef CONFIG_PCI
 235         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 236         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 237 #endif
 238         .get_irq                = mpic_get_irq,
 239         .calibrate_decr         = generic_calibrate_decr,
 240         .progress               = udbg_progress,
 241 };
 242
 243 define_machine(p2020_rdb_pc) {
 244         .name                   = "P2020RDB-PC",
 245         .probe                  = p2020_rdb_pc_probe,
 246         .setup_arch             = mpc85xx_rdb_setup_arch,
 247         .init_IRQ               = mpc85xx_rdb_pic_init,
 248 #ifdef CONFIG_PCI
 249         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 250         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 251 #endif
 252         .get_irq                = mpic_get_irq,
 253         .calibrate_decr         = generic_calibrate_decr,
 254         .progress               = udbg_progress,
 255 };
 256
 257 define_machine(p1025_rdb) {
 258         .name                   = "P1025 RDB",
 259         .probe                  = p1025_rdb_probe,
 260         .setup_arch             = mpc85xx_rdb_setup_arch,
 261         .init_IRQ               = mpc85xx_rdb_pic_init,
 262 #ifdef CONFIG_PCI
 263         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 264         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 265 #endif
 266         .get_irq                = mpic_get_irq,
 267         .calibrate_decr         = generic_calibrate_decr,
 268         .progress               = udbg_progress,
 269 };
 270
 271 define_machine(p1020_mbg_pc) {
 272         .name                   = "P1020 MBG-PC",
 273         .probe                  = p1020_mbg_pc_probe,
 274         .setup_arch             = mpc85xx_rdb_setup_arch,
 275         .init_IRQ               = mpc85xx_rdb_pic_init,
 276 #ifdef CONFIG_PCI
 277         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 278         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 279 #endif
 280         .get_irq                = mpic_get_irq,
 281         .calibrate_decr         = generic_calibrate_decr,
 282         .progress               = udbg_progress,
 283 };
 284
 285 define_machine(p1020_utm_pc) {
 286         .name                   = "P1020 UTM-PC",
 287         .probe                  = p1020_utm_pc_probe,
 288         .setup_arch             = mpc85xx_rdb_setup_arch,
 289         .init_IRQ               = mpc85xx_rdb_pic_init,
 290 #ifdef CONFIG_PCI
 291         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 292         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 293 #endif
 294         .get_irq                = mpic_get_irq,
 295         .calibrate_decr         = generic_calibrate_decr,
 296         .progress               = udbg_progress,
 297 };
 298
 299 define_machine(p1020_rdb_pc) {
 300         .name                   = "P1020RDB-PC",
 301         .probe                  = p1020_rdb_pc_probe,
 302         .setup_arch             = mpc85xx_rdb_setup_arch,
 303         .init_IRQ               = mpc85xx_rdb_pic_init,
 304 #ifdef CONFIG_PCI
 305         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 306         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 307 #endif
 308         .get_irq                = mpic_get_irq,
 309         .calibrate_decr         = generic_calibrate_decr,
 310         .progress               = udbg_progress,
 311 };
 312
 313 define_machine(p1020_rdb_pd) {
 314         .name                   = "P1020RDB-PD",
 315         .probe                  = p1020_rdb_pd_probe,
 316         .setup_arch             = mpc85xx_rdb_setup_arch,
 317         .init_IRQ               = mpc85xx_rdb_pic_init,
 318 #ifdef CONFIG_PCI
 319         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 320         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 321 #endif
 322         .get_irq                = mpic_get_irq,
 323         .calibrate_decr         = generic_calibrate_decr,
 324         .progress               = udbg_progress,
 325 };
 326
 327 define_machine(p1024_rdb) {
 328         .name                   = "P1024 RDB",
 329         .probe                  = p1024_rdb_probe,
 330         .setup_arch             = mpc85xx_rdb_setup_arch,
 331         .init_IRQ               = mpc85xx_rdb_pic_init,
 332 #ifdef CONFIG_PCI
 333         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 334         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
 335 #endif
 336         .get_irq                = mpic_get_irq,
 337         .calibrate_decr         = generic_calibrate_decr,
 338         .progress               = udbg_progress,
 339 };