arch/powerpc/platforms/pseries/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  64-bit pSeries and RS/6000 setup code.
   4  *
   5  *  Copyright (C) 1995  Linus Torvalds
   6  *  Adapted from 'alpha' version by Gary Thomas
   7  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   8  *  Modified by PPC64 Team, IBM Corp
   9  */
  10
  11 /*
  12  * bootup setup stuff..
  13  */
  14
  15 #include <linux/cpu.h>
  16 #include <linux/errno.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/sched.h>
  19 #include <linux/kernel.h>
  20 #include <linux/mm.h>
  21 #include <linux/stddef.h>
  22 #include <linux/unistd.h>
  23 #include <linux/user.h>
  24 #include <linux/tty.h>
  25 #include <linux/major.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/reboot.h>
  28 #include <linux/init.h>
  29 #include <linux/ioport.h>
  30 #include <linux/console.h>
  31 #include <linux/pci.h>
  32 #include <linux/utsname.h>
  33 #include <linux/adb.h>
  34 #include <linux/export.h>
  35 #include <linux/delay.h>
  36 #include <linux/irq.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/root_dev.h>
  39 #include <linux/of.h>
  40 #include <linux/of_irq.h>
  41 #include <linux/of_pci.h>
  42 #include <linux/memblock.h>
  43 #include <linux/swiotlb.h>
  44 #include <linux/seq_buf.h>
  45
  46 #include <asm/mmu.h>
  47 #include <asm/processor.h>
  48 #include <asm/io.h>
  49 #include <asm/rtas.h>
  50 #include <asm/pci-bridge.h>
  51 #include <asm/iommu.h>
  52 #include <asm/dma.h>
  53 #include <asm/machdep.h>
  54 #include <asm/irq.h>
  55 #include <asm/time.h>
  56 #include <asm/nvram.h>
  57 #include <asm/pmc.h>
  58 #include <asm/xics.h>
  59 #include <asm/xive.h>
  60 #include <asm/ppc-pci.h>
  61 #include <asm/i8259.h>
  62 #include <asm/udbg.h>
  63 #include <asm/smp.h>
  64 #include <asm/firmware.h>
  65 #include <asm/eeh.h>
  66 #include <asm/reg.h>
  67 #include <asm/plpar_wrappers.h>
  68 #include <asm/kexec.h>
  69 #include <asm/isa-bridge.h>
  70 #include <asm/security_features.h>
  71 #include <asm/asm-const.h>
  72 #include <asm/idle.h>
  73 #include <asm/swiotlb.h>
  74 #include <asm/svm.h>
  75 #include <asm/dtl.h>
  76 #include <asm/hvconsole.h>
  77 #include <asm/setup.h>
  78
  79 #include "pseries.h"
  80
  81 DEFINE_STATIC_KEY_FALSE(shared_processor);
  82 EXPORT_SYMBOL(shared_processor);
  83
  84 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING
  85 struct static_key paravirt_steal_enabled;
  86 struct static_key paravirt_steal_rq_enabled;
  87
  88 static bool steal_acc = true;
  89 static int __init parse_no_stealacc(char *arg)
  90 {
  91         steal_acc = false;
  92         return 0;
  93 }
  94
  95 early_param("no-steal-acc", parse_no_stealacc);
  96 #endif
  97
  98 int CMO_PrPSP = -1;
  99 int CMO_SecPSP = -1;
 100 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
 101 EXPORT_SYMBOL(CMO_PageSize);
 102
 103 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
 104 int ibm_nmi_interlock_token;
 105 u32 pseries_security_flavor;
 106
 107 static void pSeries_show_cpuinfo(struct seq_file *m)
 108 {
 109         struct device_node *root;
 110         const char *model = "";
 111
 112         root = of_find_node_by_path("/");
 113         if (root)
 114                 model = of_get_property(root, "model", NULL);
 115         seq_printf(m, "machine\t\t: CHRP %s\n", model);
 116         of_node_put(root);
 117         if (radix_enabled())
 118                 seq_printf(m, "MMU\t\t: Radix\n");
 119         else
 120                 seq_printf(m, "MMU\t\t: Hash\n");
 121 }
 122
 123 /* Initialize firmware assisted non-maskable interrupts if
 124  * the firmware supports this feature.
 125  */
 126 static void __init fwnmi_init(void)
 127 {
 128         unsigned long system_reset_addr, machine_check_addr;
 129         u8 *mce_data_buf;
 130         unsigned int i;
 131         int nr_cpus = num_possible_cpus();
 132 #ifdef CONFIG_PPC_64S_HASH_MMU
 133         struct slb_entry *slb_ptr;
 134         size_t size;
 135 #endif
 136         int ibm_nmi_register_token;
 137
 138         ibm_nmi_register_token = rtas_token("ibm,nmi-register");
 139         if (ibm_nmi_register_token == RTAS_UNKNOWN_SERVICE)
 140                 return;
 141
 142         ibm_nmi_interlock_token = rtas_token("ibm,nmi-interlock");
 143         if (WARN_ON(ibm_nmi_interlock_token == RTAS_UNKNOWN_SERVICE))
 144                 return;
 145
 146         /* If the kernel's not linked at zero we point the firmware at low
 147          * addresses anyway, and use a trampoline to get to the real code. */
 148         system_reset_addr  = __pa(system_reset_fwnmi) - PHYSICAL_START;
 149         machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
 150
 151         if (0 == rtas_call(ibm_nmi_register_token, 2, 1, NULL,
 152                            system_reset_addr, machine_check_addr))
 153                 fwnmi_active = 1;
 154
 155         /*
 156          * Allocate a chunk for per cpu buffer to hold rtas errorlog.
 157          * It will be used in real mode mce handler, hence it needs to be
 158          * below RMA.
 159          */
 160         mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus,
 161                                         RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT,
 162                                         ppc64_rma_size, NUMA_NO_NODE);
 163         if (!mce_data_buf)
 164                 panic("Failed to allocate %d bytes below %pa for MCE buffer\n",
 165                       RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size);
 166
 167         for_each_possible_cpu(i) {
 168                 paca_ptrs[i]->mce_data_buf = mce_data_buf +
 169                                                 (RTAS_ERROR_LOG_MAX * i);
 170         }
 171
 172 #ifdef CONFIG_PPC_64S_HASH_MMU
 173         if (!radix_enabled()) {
 174                 /* Allocate per cpu area to save old slb contents during MCE */
 175                 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus;
 176                 slb_ptr = memblock_alloc_try_nid_raw(size,
 177                                 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT,
 178                                 ppc64_rma_size, NUMA_NO_NODE);
 179                 if (!slb_ptr)
 180                         panic("Failed to allocate %zu bytes below %pa for slb area\n",
 181                               size, &ppc64_rma_size);
 182
 183                 for_each_possible_cpu(i)
 184                         paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i);
 185         }
 186 #endif
 187 }
 188
 189 /*
 190  * Affix a device for the first timer to the platform bus if
 191  * we have firmware support for the H_WATCHDOG hypercall.
 192  */
 193 static __init int pseries_wdt_init(void)
 194 {
 195         if (firmware_has_feature(FW_FEATURE_WATCHDOG))
 196                 platform_device_register_simple("pseries-wdt", 0, NULL, 0);
 197         return 0;
 198 }
 199 machine_subsys_initcall(pseries, pseries_wdt_init);
 200
 201 static void pseries_8259_cascade(struct irq_desc *desc)
 202 {
 203         struct irq_chip *chip = irq_desc_get_chip(desc);
 204         unsigned int cascade_irq = i8259_irq();
 205
 206         if (cascade_irq)
 207                 generic_handle_irq(cascade_irq);
 208
 209         chip->irq_eoi(&desc->irq_data);
 210 }
 211
 212 static void __init pseries_setup_i8259_cascade(void)
 213 {
 214         struct device_node *np, *old, *found = NULL;
 215         unsigned int cascade;
 216         const u32 *addrp;
 217         unsigned long intack = 0;
 218         int naddr;
 219
 220         for_each_node_by_type(np, "interrupt-controller") {
 221                 if (of_device_is_compatible(np, "chrp,iic")) {
 222                         found = np;
 223                         break;
 224                 }
 225         }
 226
 227         if (found == NULL) {
 228                 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
 229                 return;
 230         }
 231
 232         cascade = irq_of_parse_and_map(found, 0);
 233         if (!cascade) {
 234                 printk(KERN_ERR "pic: failed to map cascade interrupt");
 235                 return;
 236         }
 237         pr_debug("pic: cascade mapped to irq %d\n", cascade);
 238
 239         for (old = of_node_get(found); old != NULL ; old = np) {
 240                 np = of_get_parent(old);
 241                 of_node_put(old);
 242                 if (np == NULL)
 243                         break;
 244                 if (!of_node_name_eq(np, "pci"))
 245                         continue;
 246                 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
 247                 if (addrp == NULL)
 248                         continue;
 249                 naddr = of_n_addr_cells(np);
 250                 intack = addrp[naddr-1];
 251                 if (naddr > 1)
 252                         intack |= ((unsigned long)addrp[naddr-2]) << 32;
 253         }
 254         if (intack)
 255                 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
 256         i8259_init(found, intack);
 257         of_node_put(found);
 258         irq_set_chained_handler(cascade, pseries_8259_cascade);
 259 }
 260
 261 static void __init pseries_init_irq(void)
 262 {
 263         /* Try using a XIVE if available, otherwise use a XICS */
 264         if (!xive_spapr_init()) {
 265                 xics_init();
 266                 pseries_setup_i8259_cascade();
 267         }
 268 }
 269
 270 static void pseries_lpar_enable_pmcs(void)
 271 {
 272         unsigned long set, reset;
 273
 274         set = 1UL << 63;
 275         reset = 0;
 276         plpar_hcall_norets(H_PERFMON, set, reset);
 277 }
 278
 279 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
 280 {
 281         struct of_reconfig_data *rd = data;
 282         struct device_node *parent, *np = rd->dn;
 283         struct pci_dn *pdn;
 284         int err = NOTIFY_OK;
 285
 286         switch (action) {
 287         case OF_RECONFIG_ATTACH_NODE:
 288                 parent = of_get_parent(np);
 289                 pdn = parent ? PCI_DN(parent) : NULL;
 290                 if (pdn)
 291                         pci_add_device_node_info(pdn->phb, np);
 292
 293                 of_node_put(parent);
 294                 break;
 295         case OF_RECONFIG_DETACH_NODE:
 296                 pdn = PCI_DN(np);
 297                 if (pdn)
 298                         list_del(&pdn->list);
 299                 break;
 300         default:
 301                 err = NOTIFY_DONE;
 302                 break;
 303         }
 304         return err;
 305 }
 306
 307 static struct notifier_block pci_dn_reconfig_nb = {
 308         .notifier_call = pci_dn_reconfig_notifier,
 309 };
 310
 311 struct kmem_cache *dtl_cache;
 312
 313 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
 314 /*
 315  * Allocate space for the dispatch trace log for all possible cpus
 316  * and register the buffers with the hypervisor.  This is used for
 317  * computing time stolen by the hypervisor.
 318  */
 319 static int alloc_dispatch_logs(void)
 320 {
 321         if (!firmware_has_feature(FW_FEATURE_SPLPAR))
 322                 return 0;
 323
 324         if (!dtl_cache)
 325                 return 0;
 326
 327         alloc_dtl_buffers(0);
 328
 329         /* Register the DTL for the current (boot) cpu */
 330         register_dtl_buffer(smp_processor_id());
 331
 332         return 0;
 333 }
 334 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 335 static inline int alloc_dispatch_logs(void)
 336 {
 337         return 0;
 338 }
 339 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 340
 341 static int alloc_dispatch_log_kmem_cache(void)
 342 {
 343         void (*ctor)(void *) = get_dtl_cache_ctor();
 344
 345         dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
 346                                                 DISPATCH_LOG_BYTES, 0, ctor);
 347         if (!dtl_cache) {
 348                 pr_warn("Failed to create dispatch trace log buffer cache\n");
 349                 pr_warn("Stolen time statistics will be unreliable\n");
 350                 return 0;
 351         }
 352
 353         return alloc_dispatch_logs();
 354 }
 355 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
 356
 357 DEFINE_PER_CPU(u64, idle_spurr_cycles);
 358 DEFINE_PER_CPU(u64, idle_entry_purr_snap);
 359 DEFINE_PER_CPU(u64, idle_entry_spurr_snap);
 360 static void pseries_lpar_idle(void)
 361 {
 362         /*
 363          * Default handler to go into low thread priority and possibly
 364          * low power mode by ceding processor to hypervisor
 365          */
 366
 367         if (!prep_irq_for_idle())
 368                 return;
 369
 370         /* Indicate to hypervisor that we are idle. */
 371         pseries_idle_prolog();
 372
 373         /*
 374          * Yield the processor to the hypervisor.  We return if
 375          * an external interrupt occurs (which are driven prior
 376          * to returning here) or if a prod occurs from another
 377          * processor. When returning here, external interrupts
 378          * are enabled.
 379          */
 380         cede_processor();
 381
 382         pseries_idle_epilog();
 383 }
 384
 385 static bool pseries_reloc_on_exception_enabled;
 386
 387 bool pseries_reloc_on_exception(void)
 388 {
 389         return pseries_reloc_on_exception_enabled;
 390 }
 391 EXPORT_SYMBOL_GPL(pseries_reloc_on_exception);
 392
 393 /*
 394  * Enable relocation on during exceptions. This has partition wide scope and
 395  * may take a while to complete, if it takes longer than one second we will
 396  * just give up rather than wasting any more time on this - if that turns out
 397  * to ever be a problem in practice we can move this into a kernel thread to
 398  * finish off the process later in boot.
 399  */
 400 bool pseries_enable_reloc_on_exc(void)
 401 {
 402         long rc;
 403         unsigned int delay, total_delay = 0;
 404
 405         while (1) {
 406                 rc = enable_reloc_on_exceptions();
 407                 if (!H_IS_LONG_BUSY(rc)) {
 408                         if (rc == H_P2) {
 409                                 pr_info("Relocation on exceptions not"
 410                                         " supported\n");
 411                                 return false;
 412                         } else if (rc != H_SUCCESS) {
 413                                 pr_warn("Unable to enable relocation"
 414                                         " on exceptions: %ld\n", rc);
 415                                 return false;
 416                         }
 417                         pseries_reloc_on_exception_enabled = true;
 418                         return true;
 419                 }
 420
 421                 delay = get_longbusy_msecs(rc);
 422                 total_delay += delay;
 423                 if (total_delay > 1000) {
 424                         pr_warn("Warning: Giving up waiting to enable "
 425                                 "relocation on exceptions (%u msec)!\n",
 426                                 total_delay);
 427                         return false;
 428                 }
 429
 430                 mdelay(delay);
 431         }
 432 }
 433 EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
 434
 435 void pseries_disable_reloc_on_exc(void)
 436 {
 437         long rc;
 438
 439         while (1) {
 440                 rc = disable_reloc_on_exceptions();
 441                 if (!H_IS_LONG_BUSY(rc))
 442                         break;
 443                 mdelay(get_longbusy_msecs(rc));
 444         }
 445         if (rc == H_SUCCESS)
 446                 pseries_reloc_on_exception_enabled = false;
 447         else
 448                 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n",
 449                         rc);
 450 }
 451 EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
 452
 453 #ifdef __LITTLE_ENDIAN__
 454 void pseries_big_endian_exceptions(void)
 455 {
 456         long rc;
 457
 458         while (1) {
 459                 rc = enable_big_endian_exceptions();
 460                 if (!H_IS_LONG_BUSY(rc))
 461                         break;
 462                 mdelay(get_longbusy_msecs(rc));
 463         }
 464
 465         /*
 466          * At this point it is unlikely panic() will get anything
 467          * out to the user, since this is called very late in kexec
 468          * but at least this will stop us from continuing on further
 469          * and creating an even more difficult to debug situation.
 470          *
 471          * There is a known problem when kdump'ing, if cpus are offline
 472          * the above call will fail. Rather than panicking again, keep
 473          * going and hope the kdump kernel is also little endian, which
 474          * it usually is.
 475          */
 476         if (rc && !kdump_in_progress())
 477                 panic("Could not enable big endian exceptions");
 478 }
 479
 480 void __init pseries_little_endian_exceptions(void)
 481 {
 482         long rc;
 483
 484         while (1) {
 485                 rc = enable_little_endian_exceptions();
 486                 if (!H_IS_LONG_BUSY(rc))
 487                         break;
 488                 mdelay(get_longbusy_msecs(rc));
 489         }
 490         if (rc) {
 491                 ppc_md.progress("H_SET_MODE LE exception fail", 0);
 492                 panic("Could not enable little endian exceptions");
 493         }
 494 }
 495 #endif
 496
 497 static void __init pSeries_discover_phbs(void)
 498 {
 499         struct device_node *node;
 500         struct pci_controller *phb;
 501         struct device_node *root = of_find_node_by_path("/");
 502
 503         for_each_child_of_node(root, node) {
 504                 if (!of_node_is_type(node, "pci") &&
 505                     !of_node_is_type(node, "pciex"))
 506                         continue;
 507
 508                 phb = pcibios_alloc_controller(node);
 509                 if (!phb)
 510                         continue;
 511                 rtas_setup_phb(phb);
 512                 pci_process_bridge_OF_ranges(phb, node, 0);
 513                 isa_bridge_find_early(phb);
 514                 phb->controller_ops = pseries_pci_controller_ops;
 515
 516                 /* create pci_dn's for DT nodes under this PHB */
 517                 pci_devs_phb_init_dynamic(phb);
 518
 519                 pseries_msi_allocate_domains(phb);
 520         }
 521
 522         of_node_put(root);
 523
 524         /*
 525          * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
 526          * in chosen.
 527          */
 528         of_pci_check_probe_only();
 529 }
 530
 531 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
 532 {
 533         /*
 534          * The features below are disabled by default, so we instead look to see
 535          * if firmware has *enabled* them, and set them if so.
 536          */
 537         if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
 538                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
 539
 540         if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
 541                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
 542
 543         if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
 544                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
 545
 546         if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
 547                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
 548
 549         if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
 550                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
 551
 552         if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
 553                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
 554
 555         if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST)
 556                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
 557
 558         if (result->character & H_CPU_CHAR_BCCTR_LINK_FLUSH_ASSIST)
 559                 security_ftr_set(SEC_FTR_BCCTR_LINK_FLUSH_ASSIST);
 560
 561         if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE)
 562                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
 563
 564         if (result->behaviour & H_CPU_BEHAV_FLUSH_LINK_STACK)
 565                 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK);
 566
 567         /*
 568          * The features below are enabled by default, so we instead look to see
 569          * if firmware has *disabled* them, and clear them if so.
 570          * H_CPU_BEHAV_FAVOUR_SECURITY_H could be set only if
 571          * H_CPU_BEHAV_FAVOUR_SECURITY is.
 572          */
 573         if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) {
 574                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
 575                 pseries_security_flavor = 0;
 576         } else if (result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY_H)
 577                 pseries_security_flavor = 1;
 578         else
 579                 pseries_security_flavor = 2;
 580
 581         if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
 582                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
 583
 584         if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY)
 585                 security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY);
 586
 587         if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS)
 588                 security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS);
 589
 590         if (result->behaviour & H_CPU_BEHAV_NO_STF_BARRIER)
 591                 security_ftr_clear(SEC_FTR_STF_BARRIER);
 592
 593         if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
 594                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 595 }
 596
 597 void pseries_setup_security_mitigations(void)
 598 {
 599         struct h_cpu_char_result result;
 600         enum l1d_flush_type types;
 601         bool enable;
 602         long rc;
 603
 604         /*
 605          * Set features to the defaults assumed by init_cpu_char_feature_flags()
 606          * so it can set/clear again any features that might have changed after
 607          * migration, and in case the hypercall fails and it is not even called.
 608          */
 609         powerpc_security_features = SEC_FTR_DEFAULT;
 610
 611         rc = plpar_get_cpu_characteristics(&result);
 612         if (rc == H_SUCCESS)
 613                 init_cpu_char_feature_flags(&result);
 614
 615         /*
 616          * We're the guest so this doesn't apply to us, clear it to simplify
 617          * handling of it elsewhere.
 618          */
 619         security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
 620
 621         types = L1D_FLUSH_FALLBACK;
 622
 623         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 624                 types |= L1D_FLUSH_MTTRIG;
 625
 626         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 627                 types |= L1D_FLUSH_ORI;
 628
 629         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 630                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
 631
 632         setup_rfi_flush(types, enable);
 633         setup_count_cache_flush();
 634
 635         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 636                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY);
 637         setup_entry_flush(enable);
 638
 639         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 640                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
 641         setup_uaccess_flush(enable);
 642
 643         setup_stf_barrier();
 644 }
 645
 646 #ifdef CONFIG_PCI_IOV
 647 enum rtas_iov_fw_value_map {
 648         NUM_RES_PROPERTY  = 0, /* Number of Resources */
 649         LOW_INT           = 1, /* Lowest 32 bits of Address */
 650         START_OF_ENTRIES  = 2, /* Always start of entry */
 651         APERTURE_PROPERTY = 2, /* Start of entry+ to  Aperture Size */
 652         WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */
 653         NEXT_ENTRY        = 7  /* Go to next entry on array */
 654 };
 655
 656 enum get_iov_fw_value_index {
 657         BAR_ADDRS     = 1,    /*  Get Bar Address */
 658         APERTURE_SIZE = 2,    /*  Get Aperture Size */
 659         WDW_SIZE      = 3     /*  Get Window Size */
 660 };
 661
 662 static resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno,
 663                                                 enum get_iov_fw_value_index value)
 664 {
 665         const int *indexes;
 666         struct device_node *dn = pci_device_to_OF_node(dev);
 667         int i, num_res, ret = 0;
 668
 669         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 670         if (!indexes)
 671                 return  0;
 672
 673         /*
 674          * First element in the array is the number of Bars
 675          * returned.  Search through the list to find the matching
 676          * bar
 677          */
 678         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 679         if (resno >= num_res)
 680                 return 0; /* or an error */
 681
 682         i = START_OF_ENTRIES + NEXT_ENTRY * resno;
 683         switch (value) {
 684         case BAR_ADDRS:
 685                 ret = of_read_number(&indexes[i], 2);
 686                 break;
 687         case APERTURE_SIZE:
 688                 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 689                 break;
 690         case WDW_SIZE:
 691                 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 692                 break;
 693         }
 694
 695         return ret;
 696 }
 697
 698 static void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes)
 699 {
 700         struct resource *res;
 701         resource_size_t base, size;
 702         int i, r, num_res;
 703
 704         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 705         num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS);
 706         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 707              i += NEXT_ENTRY, r++) {
 708                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 709                 base = of_read_number(&indexes[i], 2);
 710                 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 711                 res->flags = pci_parse_of_flags(of_read_number
 712                                                 (&indexes[i + LOW_INT], 1), 0);
 713                 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED);
 714                 res->name = pci_name(dev);
 715                 res->start = base;
 716                 res->end = base + size - 1;
 717         }
 718 }
 719
 720 static void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes)
 721 {
 722         struct resource *res, *root, *conflict;
 723         resource_size_t base, size;
 724         int i, r, num_res;
 725
 726         /*
 727          * First element in the array is the number of Bars
 728          * returned.  Search through the list to find the matching
 729          * bars assign them from firmware into resources structure.
 730          */
 731         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 732         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 733              i += NEXT_ENTRY, r++) {
 734                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 735                 base = of_read_number(&indexes[i], 2);
 736                 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 737                 res->name = pci_name(dev);
 738                 res->start = base;
 739                 res->end = base + size - 1;
 740                 root = &iomem_resource;
 741                 dev_dbg(&dev->dev,
 742                         "pSeries IOV BAR %d: trying firmware assignment %pR\n",
 743                          r + PCI_IOV_RESOURCES, res);
 744                 conflict = request_resource_conflict(root, res);
 745                 if (conflict) {
 746                         dev_info(&dev->dev,
 747                                  "BAR %d: %pR conflicts with %s %pR\n",
 748                                  r + PCI_IOV_RESOURCES, res,
 749                                  conflict->name, conflict);
 750                         res->flags |= IORESOURCE_UNSET;
 751                 }
 752         }
 753 }
 754
 755 static void pseries_disable_sriov_resources(struct pci_dev *pdev)
 756 {
 757         int i;
 758
 759         pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n");
 760         for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
 761                 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0;
 762 }
 763
 764 static void pseries_pci_fixup_resources(struct pci_dev *pdev)
 765 {
 766         const int *indexes;
 767         struct device_node *dn = pci_device_to_OF_node(pdev);
 768
 769         /*Firmware must support open sriov otherwise dont configure*/
 770         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 771         if (indexes)
 772                 of_pci_set_vf_bar_size(pdev, indexes);
 773         else
 774                 pseries_disable_sriov_resources(pdev);
 775 }
 776
 777 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev)
 778 {
 779         const int *indexes;
 780         struct device_node *dn = pci_device_to_OF_node(pdev);
 781
 782         if (!pdev->is_physfn)
 783                 return;
 784         /*Firmware must support open sriov otherwise don't configure*/
 785         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 786         if (indexes)
 787                 of_pci_parse_iov_addrs(pdev, indexes);
 788         else
 789                 pseries_disable_sriov_resources(pdev);
 790 }
 791
 792 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev,
 793                                                           int resno)
 794 {
 795         const __be32 *reg;
 796         struct device_node *dn = pci_device_to_OF_node(pdev);
 797
 798         /*Firmware must support open sriov otherwise report regular alignment*/
 799         reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL);
 800         if (!reg)
 801                 return pci_iov_resource_size(pdev, resno);
 802
 803         if (!pdev->is_physfn)
 804                 return 0;
 805         return pseries_get_iov_fw_value(pdev,
 806                                         resno - PCI_IOV_RESOURCES,
 807                                         APERTURE_SIZE);
 808 }
 809 #endif
 810
 811 static void __init pSeries_setup_arch(void)
 812 {
 813         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 814
 815         /* Discover PIC type and setup ppc_md accordingly */
 816         smp_init_pseries();
 817
 818
 819         if (radix_enabled() && !mmu_has_feature(MMU_FTR_GTSE))
 820                 if (!firmware_has_feature(FW_FEATURE_RPT_INVALIDATE))
 821                         panic("BUG: Radix support requires either GTSE or RPT_INVALIDATE\n");
 822
 823
 824         /* openpic global configuration register (64-bit format). */
 825         /* openpic Interrupt Source Unit pointer (64-bit format). */
 826         /* python0 facility area (mmio) (64-bit format) REAL address. */
 827
 828         /* init to some ~sane value until calibrate_delay() runs */
 829         loops_per_jiffy = 50000000;
 830
 831         fwnmi_init();
 832
 833         pseries_setup_security_mitigations();
 834         if (!radix_enabled())
 835                 pseries_lpar_read_hblkrm_characteristics();
 836
 837         /* By default, only probe PCI (can be overridden by rtas_pci) */
 838         pci_add_flags(PCI_PROBE_ONLY);
 839
 840         /* Find and initialize PCI host bridges */
 841         init_pci_config_tokens();
 842         of_reconfig_notifier_register(&pci_dn_reconfig_nb);
 843
 844         pSeries_nvram_init();
 845
 846         if (firmware_has_feature(FW_FEATURE_LPAR)) {
 847                 vpa_init(boot_cpuid);
 848
 849                 if (lppaca_shared_proc(get_lppaca())) {
 850                         static_branch_enable(&shared_processor);
 851                         pv_spinlocks_init();
 852 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING
 853                         static_key_slow_inc(&paravirt_steal_enabled);
 854                         if (steal_acc)
 855                                 static_key_slow_inc(&paravirt_steal_rq_enabled);
 856 #endif
 857                 }
 858
 859                 ppc_md.power_save = pseries_lpar_idle;
 860                 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
 861 #ifdef CONFIG_PCI_IOV
 862                 ppc_md.pcibios_fixup_resources =
 863                         pseries_pci_fixup_resources;
 864                 ppc_md.pcibios_fixup_sriov =
 865                         pseries_pci_fixup_iov_resources;
 866                 ppc_md.pcibios_iov_resource_alignment =
 867                         pseries_pci_iov_resource_alignment;
 868 #endif
 869         } else {
 870                 /* No special idle routine */
 871                 ppc_md.enable_pmcs = power4_enable_pmcs;
 872         }
 873
 874         ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
 875         pseries_rng_init();
 876 }
 877
 878 static void pseries_panic(char *str)
 879 {
 880         panic_flush_kmsg_end();
 881         rtas_os_term(str);
 882 }
 883
 884 static int __init pSeries_init_panel(void)
 885 {
 886         /* Manually leave the kernel version on the panel. */
 887 #ifdef __BIG_ENDIAN__
 888         ppc_md.progress("Linux ppc64\n", 0);
 889 #else
 890         ppc_md.progress("Linux ppc64le\n", 0);
 891 #endif
 892         ppc_md.progress(init_utsname()->version, 0);
 893
 894         return 0;
 895 }
 896 machine_arch_initcall(pseries, pSeries_init_panel);
 897
 898 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
 899 {
 900         return plpar_hcall_norets(H_SET_DABR, dabr);
 901 }
 902
 903 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
 904 {
 905         /* Have to set at least one bit in the DABRX according to PAPR */
 906         if (dabrx == 0 && dabr == 0)
 907                 dabrx = DABRX_USER;
 908         /* PAPR says we can only set kernel and user bits */
 909         dabrx &= DABRX_KERNEL | DABRX_USER;
 910
 911         return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
 912 }
 913
 914 static int pseries_set_dawr(int nr, unsigned long dawr, unsigned long dawrx)
 915 {
 916         /* PAPR says we can't set HYP */
 917         dawrx &= ~DAWRX_HYP;
 918
 919         if (nr == 0)
 920                 return plpar_set_watchpoint0(dawr, dawrx);
 921         else
 922                 return plpar_set_watchpoint1(dawr, dawrx);
 923 }
 924
 925 #define CMO_CHARACTERISTICS_TOKEN 44
 926 #define CMO_MAXLENGTH 1026
 927
 928 void pSeries_coalesce_init(void)
 929 {
 930         struct hvcall_mpp_x_data mpp_x_data;
 931
 932         if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
 933                 powerpc_firmware_features |= FW_FEATURE_XCMO;
 934         else
 935                 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
 936 }
 937
 938 /**
 939  * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
 940  * handle that here. (Stolen from parse_system_parameter_string)
 941  */
 942 static void __init pSeries_cmo_feature_init(void)
 943 {
 944         char *ptr, *key, *value, *end;
 945         int call_status;
 946         int page_order = IOMMU_PAGE_SHIFT_4K;
 947
 948         pr_debug(" -> fw_cmo_feature_init()\n");
 949         spin_lock(&rtas_data_buf_lock);
 950         memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
 951         call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
 952                                 NULL,
 953                                 CMO_CHARACTERISTICS_TOKEN,
 954                                 __pa(rtas_data_buf),
 955                                 RTAS_DATA_BUF_SIZE);
 956
 957         if (call_status != 0) {
 958                 spin_unlock(&rtas_data_buf_lock);
 959                 pr_debug("CMO not available\n");
 960                 pr_debug(" <- fw_cmo_feature_init()\n");
 961                 return;
 962         }
 963
 964         end = rtas_data_buf + CMO_MAXLENGTH - 2;
 965         ptr = rtas_data_buf + 2;        /* step over strlen value */
 966         key = value = ptr;
 967
 968         while (*ptr && (ptr <= end)) {
 969                 /* Separate the key and value by replacing '=' with '\0' and
 970                  * point the value at the string after the '='
 971                  */
 972                 if (ptr[0] == '=') {
 973                         ptr[0] = '\0';
 974                         value = ptr + 1;
 975                 } else if (ptr[0] == '\0' || ptr[0] == ',') {
 976                         /* Terminate the string containing the key/value pair */
 977                         ptr[0] = '\0';
 978
 979                         if (key == value) {
 980                                 pr_debug("Malformed key/value pair\n");
 981                                 /* Never found a '=', end processing */
 982                                 break;
 983                         }
 984
 985                         if (0 == strcmp(key, "CMOPageSize"))
 986                                 page_order = simple_strtol(value, NULL, 10);
 987                         else if (0 == strcmp(key, "PrPSP"))
 988                                 CMO_PrPSP = simple_strtol(value, NULL, 10);
 989                         else if (0 == strcmp(key, "SecPSP"))
 990                                 CMO_SecPSP = simple_strtol(value, NULL, 10);
 991                         value = key = ptr + 1;
 992                 }
 993                 ptr++;
 994         }
 995
 996         /* Page size is returned as the power of 2 of the page size,
 997          * convert to the page size in bytes before returning
 998          */
 999         CMO_PageSize = 1 << page_order;
1000         pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
1001
1002         if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
1003                 pr_info("CMO enabled\n");
1004                 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
1005                          CMO_SecPSP);
1006                 powerpc_firmware_features |= FW_FEATURE_CMO;
1007                 pSeries_coalesce_init();
1008         } else
1009                 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
1010                          CMO_SecPSP);
1011         spin_unlock(&rtas_data_buf_lock);
1012         pr_debug(" <- fw_cmo_feature_init()\n");
1013 }
1014
1015 static void __init pseries_add_hw_description(void)
1016 {
1017         struct device_node *dn;
1018         const char *s;
1019
1020         dn = of_find_node_by_path("/openprom");
1021         if (dn) {
1022                 if (of_property_read_string(dn, "model", &s) == 0)
1023                         seq_buf_printf(&ppc_hw_desc, "of:%s ", s);
1024
1025                 of_node_put(dn);
1026         }
1027
1028         dn = of_find_node_by_path("/hypervisor");
1029         if (dn) {
1030                 if (of_property_read_string(dn, "compatible", &s) == 0)
1031                         seq_buf_printf(&ppc_hw_desc, "hv:%s ", s);
1032
1033                 of_node_put(dn);
1034                 return;
1035         }
1036
1037         if (of_property_read_bool(of_root, "ibm,powervm-partition") ||
1038             of_property_read_bool(of_root, "ibm,fw-net-version"))
1039                 seq_buf_printf(&ppc_hw_desc, "hv:phyp ");
1040 }
1041
1042 /*
1043  * Early initialization.  Relocation is on but do not reference unbolted pages
1044  */
1045 static void __init pseries_init(void)
1046 {
1047         pr_debug(" -> pseries_init()\n");
1048
1049         pseries_add_hw_description();
1050
1051 #ifdef CONFIG_HVC_CONSOLE
1052         if (firmware_has_feature(FW_FEATURE_LPAR))
1053                 hvc_vio_init_early();
1054 #endif
1055         if (firmware_has_feature(FW_FEATURE_XDABR))
1056                 ppc_md.set_dabr = pseries_set_xdabr;
1057         else if (firmware_has_feature(FW_FEATURE_DABR))
1058                 ppc_md.set_dabr = pseries_set_dabr;
1059
1060         if (firmware_has_feature(FW_FEATURE_SET_MODE))
1061                 ppc_md.set_dawr = pseries_set_dawr;
1062
1063         pSeries_cmo_feature_init();
1064         iommu_init_early_pSeries();
1065
1066         pr_debug(" <- pseries_init()\n");
1067 }
1068
1069 /**
1070  * pseries_power_off - tell firmware about how to power off the system.
1071  *
1072  * This function calls either the power-off rtas token in normal cases
1073  * or the ibm,power-off-ups token (if present & requested) in case of
1074  * a power failure. If power-off token is used, power on will only be
1075  * possible with power button press. If ibm,power-off-ups token is used
1076  * it will allow auto poweron after power is restored.
1077  */
1078 static void pseries_power_off(void)
1079 {
1080         int rc;
1081         int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
1082
1083         if (rtas_flash_term_hook)
1084                 rtas_flash_term_hook(SYS_POWER_OFF);
1085
1086         if (rtas_poweron_auto == 0 ||
1087                 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
1088                 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
1089                 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
1090         } else {
1091                 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
1092                 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
1093         }
1094         for (;;);
1095 }
1096
1097 static int __init pSeries_probe(void)
1098 {
1099         if (!of_node_is_type(of_root, "chrp"))
1100                 return 0;
1101
1102         /* Cell blades firmware claims to be chrp while it's not. Until this
1103          * is fixed, we need to avoid those here.
1104          */
1105         if (of_machine_is_compatible("IBM,CPBW-1.0") ||
1106             of_machine_is_compatible("IBM,CBEA"))
1107                 return 0;
1108
1109         pm_power_off = pseries_power_off;
1110
1111         pr_debug("Machine is%s LPAR !\n",
1112                  (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
1113
1114         pseries_init();
1115
1116         return 1;
1117 }
1118
1119 static int pSeries_pci_probe_mode(struct pci_bus *bus)
1120 {
1121         if (firmware_has_feature(FW_FEATURE_LPAR))
1122                 return PCI_PROBE_DEVTREE;
1123         return PCI_PROBE_NORMAL;
1124 }
1125
1126 struct pci_controller_ops pseries_pci_controller_ops = {
1127         .probe_mode             = pSeries_pci_probe_mode,
1128 };
1129
1130 define_machine(pseries) {
1131         .name                   = "pSeries",
1132         .probe                  = pSeries_probe,
1133         .setup_arch             = pSeries_setup_arch,
1134         .init_IRQ               = pseries_init_irq,
1135         .show_cpuinfo           = pSeries_show_cpuinfo,
1136         .log_error              = pSeries_log_error,
1137         .discover_phbs          = pSeries_discover_phbs,
1138         .pcibios_fixup          = pSeries_final_fixup,
1139         .restart                = rtas_restart,
1140         .halt                   = rtas_halt,
1141         .panic                  = pseries_panic,
1142         .get_boot_time          = rtas_get_boot_time,
1143         .get_rtc_time           = rtas_get_rtc_time,
1144         .set_rtc_time           = rtas_set_rtc_time,
1145         .calibrate_decr         = generic_calibrate_decr,
1146         .progress               = rtas_progress,
1147         .system_reset_exception = pSeries_system_reset_exception,
1148         .machine_check_early    = pseries_machine_check_realmode,
1149         .machine_check_exception = pSeries_machine_check_exception,
1150         .machine_check_log_err  = pSeries_machine_check_log_err,
1151 #ifdef CONFIG_KEXEC_CORE
1152         .machine_kexec          = pseries_machine_kexec,
1153         .kexec_cpu_down         = pseries_kexec_cpu_down,
1154 #endif
1155 #ifdef CONFIG_MEMORY_HOTPLUG
1156         .memory_block_size      = pseries_memory_block_size,
1157 #endif
1158 };