arch/s390/kernel/irq.c

   1 /*
   2  *    Copyright IBM Corp. 2004, 2011
   3  *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
   4  *               Holger Smolinski <Holger.Smolinski@de.ibm.com>,
   5  *               Thomas Spatzier <tspat@de.ibm.com>,
   6  *
   7  * This file contains interrupt related functions.
   8  */
   9
  10 #include <linux/kernel_stat.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/seq_file.h>
  13 #include <linux/proc_fs.h>
  14 #include <linux/profile.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/ftrace.h>
  18 #include <linux/errno.h>
  19 #include <linux/slab.h>
  20 #include <linux/cpu.h>
  21 #include <asm/irq_regs.h>
  22 #include <asm/cputime.h>
  23 #include <asm/lowcore.h>
  24 #include <asm/irq.h>
  25 #include "entry.h"
  26
  27 DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
  28 EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
  29
  30 struct irq_class {
  31         char *name;
  32         char *desc;
  33 };
  34
  35 /*
  36  * The list of "main" irq classes on s390. This is the list of interrupts
  37  * that appear both in /proc/stat ("intr" line) and /proc/interrupts.
  38  * Historically only external and I/O interrupts have been part of /proc/stat.
  39  * We can't add the split external and I/O sub classes since the first field
  40  * in the "intr" line in /proc/stat is supposed to be the sum of all other
  41  * fields.
  42  * Since the external and I/O interrupt fields are already sums we would end
  43  * up with having a sum which accounts each interrupt twice.
  44  */
  45 static const struct irq_class irqclass_main_desc[NR_IRQS] = {
  46         [EXTERNAL_INTERRUPT] = {.name = "EXT"},
  47         [IO_INTERRUPT]       = {.name = "I/O"}
  48 };
  49
  50 /*
  51  * The list of split external and I/O interrupts that appear only in
  52  * /proc/interrupts.
  53  * In addition this list contains non external / I/O events like NMIs.
  54  */
  55 static const struct irq_class irqclass_sub_desc[NR_ARCH_IRQS] = {
  56         [IRQEXT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
  57         [IRQEXT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
  58         [IRQEXT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
  59         [IRQEXT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
  60         [IRQEXT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
  61         [IRQEXT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
  62         [IRQEXT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
  63         [IRQEXT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
  64         [IRQEXT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
  65         [IRQEXT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
  66         [IRQEXT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
  67         [IRQEXT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
  68         [IRQEXT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
  69         [IRQIO_CIO]  = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
  70         [IRQIO_QAI]  = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
  71         [IRQIO_DAS]  = {.name = "DAS", .desc = "[I/O] DASD"},
  72         [IRQIO_C15]  = {.name = "C15", .desc = "[I/O] 3215"},
  73         [IRQIO_C70]  = {.name = "C70", .desc = "[I/O] 3270"},
  74         [IRQIO_TAP]  = {.name = "TAP", .desc = "[I/O] Tape"},
  75         [IRQIO_VMR]  = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
  76         [IRQIO_LCS]  = {.name = "LCS", .desc = "[I/O] LCS"},
  77         [IRQIO_CLW]  = {.name = "CLW", .desc = "[I/O] CLAW"},
  78         [IRQIO_CTC]  = {.name = "CTC", .desc = "[I/O] CTC"},
  79         [IRQIO_APB]  = {.name = "APB", .desc = "[I/O] AP Bus"},
  80         [IRQIO_ADM]  = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
  81         [IRQIO_CSC]  = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
  82         [IRQIO_PCI]  = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
  83         [IRQIO_MSI]  = {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
  84         [IRQIO_VIR]  = {.name = "VIR", .desc = "[I/O] Virtual I/O Devices"},
  85         [NMI_NMI]    = {.name = "NMI", .desc = "[NMI] Machine Check"},
  86         [CPU_RST]    = {.name = "RST", .desc = "[CPU] CPU Restart"},
  87 };
  88
  89 /*
  90  * show_interrupts is needed by /proc/interrupts.
  91  */
  92 int show_interrupts(struct seq_file *p, void *v)
  93 {
  94         int irq = *(loff_t *) v;
  95         int cpu;
  96
  97         get_online_cpus();
  98         if (irq == 0) {
  99                 seq_puts(p, "           ");
 100                 for_each_online_cpu(cpu)
 101                         seq_printf(p, "CPU%d       ", cpu);
 102                 seq_putc(p, '\n');
 103         }
 104         if (irq < NR_IRQS) {
 105                 seq_printf(p, "%s: ", irqclass_main_desc[irq].name);
 106                 for_each_online_cpu(cpu)
 107                         seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[irq]);
 108                 seq_putc(p, '\n');
 109                 goto skip_arch_irqs;
 110         }
 111         for (irq = 0; irq < NR_ARCH_IRQS; irq++) {
 112                 seq_printf(p, "%s: ", irqclass_sub_desc[irq].name);
 113                 for_each_online_cpu(cpu)
 114                         seq_printf(p, "%10u ", per_cpu(irq_stat, cpu).irqs[irq]);
 115                 if (irqclass_sub_desc[irq].desc)
 116                         seq_printf(p, "  %s", irqclass_sub_desc[irq].desc);
 117                 seq_putc(p, '\n');
 118         }
 119 skip_arch_irqs:
 120         put_online_cpus();
 121         return 0;
 122 }
 123
 124 /*
 125  * Switch to the asynchronous interrupt stack for softirq execution.
 126  */
 127 asmlinkage void do_softirq(void)
 128 {
 129         unsigned long flags, old, new;
 130
 131         if (in_interrupt())
 132                 return;
 133
 134         local_irq_save(flags);
 135
 136         if (local_softirq_pending()) {
 137                 /* Get current stack pointer. */
 138                 asm volatile("la %0,0(15)" : "=a" (old));
 139                 /* Check against async. stack address range. */
 140                 new = S390_lowcore.async_stack;
 141                 if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
 142                         /* Need to switch to the async. stack. */
 143                         new -= STACK_FRAME_OVERHEAD;
 144                         ((struct stack_frame *) new)->back_chain = old;
 145
 146                         asm volatile("   la    15,0(%0)\n"
 147                                      "   basr  14,%2\n"
 148                                      "   la    15,0(%1)\n"
 149                                      : : "a" (new), "a" (old),
 150                                          "a" (__do_softirq)
 151                                      : "0", "1", "2", "3", "4", "5", "14",
 152                                        "cc", "memory" );
 153                 } else {
 154                         /* We are already on the async stack. */
 155                         __do_softirq();
 156                 }
 157         }
 158
 159         local_irq_restore(flags);
 160 }
 161
 162 #ifdef CONFIG_PROC_FS
 163 void init_irq_proc(void)
 164 {
 165         if (proc_mkdir("irq", NULL))
 166                 create_prof_cpu_mask();
 167 }
 168 #endif
 169
 170 /*
 171  * ext_int_hash[index] is the list head for all external interrupts that hash
 172  * to this index.
 173  */
 174 static struct list_head ext_int_hash[256];
 175
 176 struct ext_int_info {
 177         ext_int_handler_t handler;
 178         u16 code;
 179         struct list_head entry;
 180         struct rcu_head rcu;
 181 };
 182
 183 /* ext_int_hash_lock protects the handler lists for external interrupts */
 184 DEFINE_SPINLOCK(ext_int_hash_lock);
 185
 186 static void __init init_external_interrupts(void)
 187 {
 188         int idx;
 189
 190         for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
 191                 INIT_LIST_HEAD(&ext_int_hash[idx]);
 192 }
 193
 194 static inline int ext_hash(u16 code)
 195 {
 196         return (code + (code >> 9)) & 0xff;
 197 }
 198
 199 int register_external_interrupt(u16 code, ext_int_handler_t handler)
 200 {
 201         struct ext_int_info *p;
 202         unsigned long flags;
 203         int index;
 204
 205         p = kmalloc(sizeof(*p), GFP_ATOMIC);
 206         if (!p)
 207                 return -ENOMEM;
 208         p->code = code;
 209         p->handler = handler;
 210         index = ext_hash(code);
 211
 212         spin_lock_irqsave(&ext_int_hash_lock, flags);
 213         list_add_rcu(&p->entry, &ext_int_hash[index]);
 214         spin_unlock_irqrestore(&ext_int_hash_lock, flags);
 215         return 0;
 216 }
 217 EXPORT_SYMBOL(register_external_interrupt);
 218
 219 int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
 220 {
 221         struct ext_int_info *p;
 222         unsigned long flags;
 223         int index = ext_hash(code);
 224
 225         spin_lock_irqsave(&ext_int_hash_lock, flags);
 226         list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
 227                 if (p->code == code && p->handler == handler) {
 228                         list_del_rcu(&p->entry);
 229                         kfree_rcu(p, rcu);
 230                 }
 231         }
 232         spin_unlock_irqrestore(&ext_int_hash_lock, flags);
 233         return 0;
 234 }
 235 EXPORT_SYMBOL(unregister_external_interrupt);
 236
 237 void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
 238                            unsigned int param32, unsigned long param64)
 239 {
 240         struct pt_regs *old_regs;
 241         struct ext_int_info *p;
 242         int index;
 243
 244         old_regs = set_irq_regs(regs);
 245         irq_enter();
 246         if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
 247                 /* Serve timer interrupts first. */
 248                 clock_comparator_work();
 249         }
 250         kstat_incr_irqs_this_cpu(EXTERNAL_INTERRUPT, NULL);
 251         if (ext_code.code != 0x1004)
 252                 __get_cpu_var(s390_idle).nohz_delay = 1;
 253
 254         index = ext_hash(ext_code.code);
 255         rcu_read_lock();
 256         list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
 257                 if (likely(p->code == ext_code.code))
 258                         p->handler(ext_code, param32, param64);
 259         rcu_read_unlock();
 260         irq_exit();
 261         set_irq_regs(old_regs);
 262 }
 263
 264 void __init init_IRQ(void)
 265 {
 266         init_external_interrupts();
 267 }
 268
 269 static DEFINE_SPINLOCK(sc_irq_lock);
 270 static int sc_irq_refcount;
 271
 272 void service_subclass_irq_register(void)
 273 {
 274         spin_lock(&sc_irq_lock);
 275         if (!sc_irq_refcount)
 276                 ctl_set_bit(0, 9);
 277         sc_irq_refcount++;
 278         spin_unlock(&sc_irq_lock);
 279 }
 280 EXPORT_SYMBOL(service_subclass_irq_register);
 281
 282 void service_subclass_irq_unregister(void)
 283 {
 284         spin_lock(&sc_irq_lock);
 285         sc_irq_refcount--;
 286         if (!sc_irq_refcount)
 287                 ctl_clear_bit(0, 9);
 288         spin_unlock(&sc_irq_lock);
 289 }
 290 EXPORT_SYMBOL(service_subclass_irq_unregister);
 291
 292 static DEFINE_SPINLOCK(ma_subclass_lock);
 293 static int ma_subclass_refcount;
 294
 295 void measurement_alert_subclass_register(void)
 296 {
 297         spin_lock(&ma_subclass_lock);
 298         if (!ma_subclass_refcount)
 299                 ctl_set_bit(0, 5);
 300         ma_subclass_refcount++;
 301         spin_unlock(&ma_subclass_lock);
 302 }
 303 EXPORT_SYMBOL(measurement_alert_subclass_register);
 304
 305 void measurement_alert_subclass_unregister(void)
 306 {
 307         spin_lock(&ma_subclass_lock);
 308         ma_subclass_refcount--;
 309         if (!ma_subclass_refcount)
 310                 ctl_clear_bit(0, 5);
 311         spin_unlock(&ma_subclass_lock);
 312 }
 313 EXPORT_SYMBOL(measurement_alert_subclass_unregister);