2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
15 #ifndef _ASM_TILE_PROCESSOR_H
16 #define _ASM_TILE_PROCESSOR_H
21 * NOTE: we don't include <linux/ptrace.h> or <linux/percpu.h> as one
22 * normally would, due to #include dependencies.
24 #include <linux/types.h>
25 #include <asm/ptrace.h>
26 #include <asm/percpu.h>
28 #include <arch/chip.h>
29 #include <arch/spr_def.h>
39 * Default implementation of macro that returns current
40 * instruction pointer ("program counter").
42 void *current_text_addr(void);
44 #if CHIP_HAS_TILE_DMA()
45 /* Capture the state of a suspended DMA. */
46 struct tile_dma_state {
50 unsigned long strides;
51 unsigned long chunk_size;
52 unsigned long src_chunk;
53 unsigned long dest_chunk;
59 * A mask of the DMA status register for selecting only the 'running'
62 #define DMA_STATUS_MASK \
63 (SPR_DMA_STATUS__RUNNING_MASK | SPR_DMA_STATUS__DONE_MASK)
67 * Track asynchronous TLB events (faults and access violations)
68 * that occur while we are in kernel mode from DMA or the SN processor.
71 short fault_num; /* original fault number; 0 if none */
72 char is_fault; /* was it a fault (vs an access violation) */
73 char is_write; /* for fault: was it caused by a write? */
74 unsigned long address; /* what address faulted? */
77 #ifdef CONFIG_HARDWALL
79 struct hardwall_task {
80 /* Which hardwall is this task tied to? (or NULL if none) */
81 struct hardwall_info *info;
82 /* Chains this task into the list at info->task_head. */
83 struct list_head list;
86 #define HARDWALL_TYPES 1 /* udn */
88 #define HARDWALL_TYPES 3 /* udn, idn, and ipi */
92 struct thread_struct {
93 /* kernel stack pointer */
97 /* starting user stack pointer (for page migration) */
99 /* pid of process that created this one */
101 #if CHIP_HAS_TILE_DMA()
102 /* DMA info for suspended threads (byte == 0 means no DMA state) */
103 struct tile_dma_state tile_dma_state;
105 /* User EX_CONTEXT registers */
106 unsigned long ex_context[2];
107 /* User SYSTEM_SAVE registers */
108 unsigned long system_save[4];
109 /* User interrupt mask */
110 unsigned long long interrupt_mask;
111 /* User interrupt-control 0 state */
112 unsigned long intctrl_0;
113 /* Is this task currently doing a backtrace? */
115 #if CHIP_HAS_PROC_STATUS_SPR()
116 /* Any other miscellaneous processor state bits */
117 unsigned long proc_status;
119 #if !CHIP_HAS_FIXED_INTVEC_BASE()
120 /* Interrupt base for PL0 interrupts */
121 unsigned long interrupt_vector_base;
123 #if CHIP_HAS_TILE_RTF_HWM()
124 /* Tile cache retry fifo high-water mark */
125 unsigned long tile_rtf_hwm;
127 #if CHIP_HAS_DSTREAM_PF()
128 /* Data stream prefetch control */
129 unsigned long dstream_pf;
131 #ifdef CONFIG_HARDWALL
132 /* Hardwall information for various resources. */
133 struct hardwall_task hardwall[HARDWALL_TYPES];
135 #if CHIP_HAS_TILE_DMA()
136 /* Async DMA TLB fault information */
137 struct async_tlb dma_async_tlb;
139 #if CHIP_HAS_SN_PROC()
140 /* Was static network processor when we were switched out? */
142 /* Async SNI TLB fault information */
143 struct async_tlb sn_async_tlb;
147 #endif /* !__ASSEMBLY__ */
150 * Start with "sp" this many bytes below the top of the kernel stack.
151 * This preserves the invariant that a called function may write to *sp.
153 #define STACK_TOP_DELTA 8
156 * When entering the kernel via a fault, start with the top of the
157 * pt_regs structure this many bytes below the top of the page.
158 * This aligns the pt_regs structure optimally for cache-line access.
161 #define KSTK_PTREGS_GAP 48
163 #define KSTK_PTREGS_GAP 56
169 #define TASK_SIZE_MAX (MEM_LOW_END + 1)
171 #define TASK_SIZE_MAX PAGE_OFFSET
174 /* TASK_SIZE and related variables are always checked in "current" context. */
176 #define COMPAT_TASK_SIZE (1UL << 31)
177 #define TASK_SIZE ((current_thread_info()->status & TS_COMPAT) ?\
178 COMPAT_TASK_SIZE : TASK_SIZE_MAX)
180 #define TASK_SIZE TASK_SIZE_MAX
183 /* We provide a minimal "vdso" a la x86; just the sigreturn code for now. */
184 #define VDSO_BASE (TASK_SIZE - PAGE_SIZE)
186 #define STACK_TOP VDSO_BASE
188 /* STACK_TOP_MAX is used temporarily in execve and should not check COMPAT. */
189 #define STACK_TOP_MAX TASK_SIZE_MAX
192 * This decides where the kernel will search for a free chunk of vm
193 * space during mmap's, if it is using bottom-up mapping.
195 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
197 #define HAVE_ARCH_PICK_MMAP_LAYOUT
199 #define INIT_THREAD { \
200 .ksp = (unsigned long)init_stack + THREAD_SIZE - STACK_TOP_DELTA, \
201 .interrupt_mask = -1ULL \
204 /* Kernel stack top for the task that first boots on this cpu. */
205 DECLARE_PER_CPU(unsigned long, boot_sp);
207 /* PC to boot from on this cpu. */
208 DECLARE_PER_CPU(unsigned long, boot_pc);
210 /* Do necessary setup to start up a newly executed thread. */
211 static inline void start_thread(struct pt_regs *regs,
212 unsigned long pc, unsigned long usp)
216 single_step_execve();
219 /* Free all resources held by a thread. */
220 static inline void release_thread(struct task_struct *dead_task)
222 /* Nothing for now */
225 extern int do_work_pending(struct pt_regs *regs, u32 flags);
229 * Return saved (kernel) PC of a blocked thread.
230 * Only used in a printk() in kernel/sched/core.c, so don't work too hard.
232 #define thread_saved_pc(t) ((t)->thread.pc)
234 unsigned long get_wchan(struct task_struct *p);
236 /* Return initial ksp value for given task. */
237 #define task_ksp0(task) ((unsigned long)(task)->stack + THREAD_SIZE)
239 /* Return some info about the user process TASK. */
240 #define KSTK_TOP(task) (task_ksp0(task) - STACK_TOP_DELTA)
241 #define task_pt_regs(task) \
242 ((struct pt_regs *)(task_ksp0(task) - KSTK_PTREGS_GAP) - 1)
243 #define current_pt_regs() \
244 ((struct pt_regs *)((stack_pointer | (THREAD_SIZE - 1)) - \
245 (KSTK_PTREGS_GAP - 1)) - 1)
246 #define task_sp(task) (task_pt_regs(task)->sp)
247 #define task_pc(task) (task_pt_regs(task)->pc)
248 /* Aliases for pc and sp (used in fs/proc/array.c) */
249 #define KSTK_EIP(task) task_pc(task)
250 #define KSTK_ESP(task) task_sp(task)
252 /* Fine-grained unaligned JIT support */
253 #define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr))
254 #define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
256 extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr);
257 extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val);
259 /* Standard format for printing registers and other word-size data. */
261 # define REGFMT "0x%016lx"
263 # define REGFMT "0x%08lx"
267 * Do some slow action (e.g. read a slow SPR).
268 * Note that this must also have compiler-barrier semantics since
269 * it may be used in a busy loop reading memory.
271 static inline void cpu_relax(void)
273 __insn_mfspr(SPR_PASS);
277 /* Info on this processor (see fs/proc/cpuinfo.c) */
278 struct seq_operations;
279 extern const struct seq_operations cpuinfo_op;
281 /* Provide information about the chip model. */
282 extern char chip_model[64];
284 /* Data on which physical memory controller corresponds to which NUMA node. */
285 extern int node_controller[];
287 #if CHIP_HAS_CBOX_HOME_MAP()
288 /* Does the heap allocator return hash-for-home pages by default? */
289 extern int hash_default;
291 /* Should kernel stack pages be hash-for-home? */
292 extern int kstack_hash;
294 /* Does MAP_ANONYMOUS return hash-for-home pages by default? */
295 #define uheap_hash hash_default
298 #define hash_default 0
299 #define kstack_hash 0
303 /* Are we using huge pages in the TLB for kernel data? */
304 extern int kdata_huge;
306 /* Support standard Linux prefetching. */
307 #define ARCH_HAS_PREFETCH
308 #define prefetch(x) __builtin_prefetch(x)
309 #define PREFETCH_STRIDE CHIP_L2_LINE_SIZE()
311 /* Bring a value into the L1D, faulting the TLB if necessary. */
313 #define prefetch_L1(x) __insn_prefetch_l1_fault((void *)(x))
315 #define prefetch_L1(x) __insn_prefetch_L1((void *)(x))
318 #else /* __ASSEMBLY__ */
320 /* Do some slow action (e.g. read a slow SPR). */
321 #define CPU_RELAX mfspr zero, SPR_PASS
323 #endif /* !__ASSEMBLY__ */
325 /* Assembly code assumes that the PL is in the low bits. */
326 #if SPR_EX_CONTEXT_1_1__PL_SHIFT != 0
327 # error Fix assembly assumptions about PL
330 /* We sometimes use these macros for EX_CONTEXT_0_1 as well. */
331 #if SPR_EX_CONTEXT_1_1__PL_SHIFT != SPR_EX_CONTEXT_0_1__PL_SHIFT || \
332 SPR_EX_CONTEXT_1_1__PL_RMASK != SPR_EX_CONTEXT_0_1__PL_RMASK || \
333 SPR_EX_CONTEXT_1_1__ICS_SHIFT != SPR_EX_CONTEXT_0_1__ICS_SHIFT || \
334 SPR_EX_CONTEXT_1_1__ICS_RMASK != SPR_EX_CONTEXT_0_1__ICS_RMASK
335 # error Fix assumptions that EX1 macros work for both PL0 and PL1
338 /* Allow pulling apart and recombining the PL and ICS bits in EX_CONTEXT. */
339 #define EX1_PL(ex1) \
340 (((ex1) >> SPR_EX_CONTEXT_1_1__PL_SHIFT) & SPR_EX_CONTEXT_1_1__PL_RMASK)
341 #define EX1_ICS(ex1) \
342 (((ex1) >> SPR_EX_CONTEXT_1_1__ICS_SHIFT) & SPR_EX_CONTEXT_1_1__ICS_RMASK)
343 #define PL_ICS_EX1(pl, ics) \
344 (((pl) << SPR_EX_CONTEXT_1_1__PL_SHIFT) | \
345 ((ics) << SPR_EX_CONTEXT_1_1__ICS_SHIFT))
348 * Provide symbolic constants for PLs.
349 * Note that assembly code assumes that USER_PL is zero.
352 #if CONFIG_KERNEL_PL == 2
355 #define KERNEL_PL CONFIG_KERNEL_PL
357 /* SYSTEM_SAVE_K_0 holds the current cpu number ORed with ksp0. */
358 #define CPU_LOG_MASK_VALUE 12
359 #define CPU_MASK_VALUE ((1 << CPU_LOG_MASK_VALUE) - 1)
360 #if CONFIG_NR_CPUS > CPU_MASK_VALUE
361 # error Too many cpus!
363 #define raw_smp_processor_id() \
364 ((int)__insn_mfspr(SPR_SYSTEM_SAVE_K_0) & CPU_MASK_VALUE)
365 #define get_current_ksp0() \
366 (__insn_mfspr(SPR_SYSTEM_SAVE_K_0) & ~CPU_MASK_VALUE)
367 #define next_current_ksp0(task) ({ \
368 unsigned long __ksp0 = task_ksp0(task); \
369 int __cpu = raw_smp_processor_id(); \
370 BUG_ON(__ksp0 & CPU_MASK_VALUE); \
374 #endif /* _ASM_TILE_PROCESSOR_H */