2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/kaiser.h>
39 #include <asm/nospec-branch.h>
40 #include <linux/err.h>
42 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
43 #include <linux/elf-em.h>
44 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
45 #define __AUDIT_ARCH_64BIT 0x80000000
46 #define __AUDIT_ARCH_LE 0x40000000
49 .section .entry.text, "ax"
51 #ifdef CONFIG_PARAVIRT
52 ENTRY(native_usergs_sysret64)
55 ENDPROC(native_usergs_sysret64)
56 #endif /* CONFIG_PARAVIRT */
58 .macro TRACE_IRQS_IRETQ
59 #ifdef CONFIG_TRACE_IRQFLAGS
60 bt $9, EFLAGS(%rsp) /* interrupts off? */
68 * When dynamic function tracer is enabled it will add a breakpoint
69 * to all locations that it is about to modify, sync CPUs, update
70 * all the code, sync CPUs, then remove the breakpoints. In this time
71 * if lockdep is enabled, it might jump back into the debug handler
72 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
74 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
75 * make sure the stack pointer does not get reset back to the top
76 * of the debug stack, and instead just reuses the current stack.
78 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
80 .macro TRACE_IRQS_OFF_DEBUG
81 call debug_stack_set_zero
83 call debug_stack_reset
86 .macro TRACE_IRQS_ON_DEBUG
87 call debug_stack_set_zero
89 call debug_stack_reset
92 .macro TRACE_IRQS_IRETQ_DEBUG
93 btl $9, EFLAGS(%rsp) /* interrupts off? */
100 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
101 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
102 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
106 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
108 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
109 * then loads new ss, cs, and rip from previously programmed MSRs.
110 * rflags gets masked by a value from another MSR (so CLD and CLAC
111 * are not needed). SYSCALL does not save anything on the stack
112 * and does not change rsp.
114 * Registers on entry:
115 * rax system call number
117 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
121 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
124 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
126 * Only called from user space.
128 * When user can change pt_regs->foo always force IRET. That is because
129 * it deals with uncanonical addresses better. SYSRET has trouble
130 * with them due to bugs in both AMD and Intel CPUs.
133 ENTRY(entry_SYSCALL_64)
135 * Interrupts are off on entry.
136 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
137 * it is too small to ever cause noticeable irq latency.
140 SWITCH_KERNEL_CR3_NO_STACK
142 * A hypervisor implementation might want to use a label
143 * after the swapgs, so that it can do the swapgs
144 * for the guest and jump here on syscall.
146 GLOBAL(entry_SYSCALL_64_after_swapgs)
148 movq %rsp, PER_CPU_VAR(rsp_scratch)
149 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
151 /* Construct struct pt_regs on stack */
152 pushq $__USER_DS /* pt_regs->ss */
153 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
155 * Re-enable interrupts.
156 * We use 'rsp_scratch' as a scratch space, hence irq-off block above
157 * must execute atomically in the face of possible interrupt-driven
158 * task preemption. We must enable interrupts only after we're done
159 * with using rsp_scratch:
161 ENABLE_INTERRUPTS(CLBR_NONE)
162 pushq %r11 /* pt_regs->flags */
163 pushq $__USER_CS /* pt_regs->cs */
164 pushq %rcx /* pt_regs->ip */
165 pushq %rax /* pt_regs->orig_ax */
166 pushq %rdi /* pt_regs->di */
167 pushq %rsi /* pt_regs->si */
168 pushq %rdx /* pt_regs->dx */
169 pushq %rcx /* pt_regs->cx */
170 pushq $-ENOSYS /* pt_regs->ax */
171 pushq %r8 /* pt_regs->r8 */
172 pushq %r9 /* pt_regs->r9 */
173 pushq %r10 /* pt_regs->r10 */
174 pushq %r11 /* pt_regs->r11 */
175 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
177 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
179 entry_SYSCALL_64_fastpath:
180 #if __SYSCALL_MASK == ~0
181 cmpq $NR_syscalls, %rax
183 andl $__SYSCALL_MASK, %eax
184 cmpl $NR_syscalls, %eax
186 jae 1f /* return -ENOSYS (already in pt_regs->ax) */
187 sbb %rcx, %rcx /* array_index_mask_nospec() */
190 #ifdef CONFIG_RETPOLINE
191 movq sys_call_table(, %rax, 8), %rax
192 call __x86_indirect_thunk_rax
194 call *sys_call_table(, %rax, 8)
200 * Syscall return path ending with SYSRET (fast path).
201 * Has incompletely filled pt_regs.
205 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
206 * it is too small to ever cause noticeable irq latency.
208 DISABLE_INTERRUPTS(CLBR_NONE)
211 * We must check ti flags with interrupts (or at least preemption)
212 * off because we must *never* return to userspace without
213 * processing exit work that is enqueued if we're preempted here.
214 * In particular, returning to userspace with any of the one-shot
215 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
218 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
219 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */
222 movq EFLAGS(%rsp), %r11
223 RESTORE_C_REGS_EXCEPT_RCX_R11
225 * This opens a window where we have a user CR3, but are
226 * running in the kernel. This makes using the CS
227 * register useless for telling whether or not we need to
228 * switch CR3 in NMIs. Normal interrupts are OK because
234 * 64-bit SYSRET restores rip from rcx,
235 * rflags from r11 (but RF and VM bits are forced to 0),
236 * cs and ss are loaded from MSRs.
237 * Restoration of rflags re-enables interrupts.
239 * NB: On AMD CPUs with the X86_BUG_SYSRET_SS_ATTRS bug, the ss
240 * descriptor is not reinitialized. This means that we should
241 * avoid SYSRET with SS == NULL, which could happen if we schedule,
242 * exit the kernel, and re-enter using an interrupt vector. (All
243 * interrupt entries on x86_64 set SS to NULL.) We prevent that
244 * from happening by reloading SS in __switch_to. (Actually
245 * detecting the failure in 64-bit userspace is tricky but can be
250 GLOBAL(int_ret_from_sys_call_irqs_off)
252 ENABLE_INTERRUPTS(CLBR_NONE)
253 jmp int_ret_from_sys_call
255 /* Do syscall entry tracing */
258 movl $AUDIT_ARCH_X86_64, %esi
259 call syscall_trace_enter_phase1
261 jnz tracesys_phase2 /* if needed, run the slow path */
262 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
263 movq ORIG_RAX(%rsp), %rax
264 jmp entry_SYSCALL_64_fastpath /* and return to the fast path */
269 movl $AUDIT_ARCH_X86_64, %esi
271 call syscall_trace_enter_phase2
274 * Reload registers from stack in case ptrace changed them.
275 * We don't reload %rax because syscall_trace_entry_phase2() returned
276 * the value it wants us to use in the table lookup.
278 RESTORE_C_REGS_EXCEPT_RAX
280 #if __SYSCALL_MASK == ~0
281 cmpq $NR_syscalls, %rax
283 andl $__SYSCALL_MASK, %eax
284 cmpl $NR_syscalls, %eax
286 jae 1f /* return -ENOSYS (already in pt_regs->ax) */
287 sbb %rcx, %rcx /* array_index_mask_nospec() */
289 movq %r10, %rcx /* fixup for C */
290 #ifdef CONFIG_RETPOLINE
291 movq sys_call_table(, %rax, 8), %rax
292 call __x86_indirect_thunk_rax
294 call *sys_call_table(, %rax, 8)
298 /* Use IRET because user could have changed pt_regs->foo */
301 * Syscall return path ending with IRET.
302 * Has correct iret frame.
304 GLOBAL(int_ret_from_sys_call)
307 call syscall_return_slowpath /* returns with IRQs disabled */
309 TRACE_IRQS_IRETQ /* we're about to change IF */
312 * Try to use SYSRET instead of IRET if we're returning to
313 * a completely clean 64-bit userspace context.
317 cmpq %rcx, %r11 /* RCX == RIP */
318 jne opportunistic_sysret_failed
321 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
322 * in kernel space. This essentially lets the user take over
323 * the kernel, since userspace controls RSP.
325 * If width of "canonical tail" ever becomes variable, this will need
326 * to be updated to remain correct on both old and new CPUs.
328 .ifne __VIRTUAL_MASK_SHIFT - 47
329 .error "virtual address width changed -- SYSRET checks need update"
332 /* Change top 16 bits to be the sign-extension of 47th bit */
333 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
334 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
336 /* If this changed %rcx, it was not canonical */
338 jne opportunistic_sysret_failed
340 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
341 jne opportunistic_sysret_failed
344 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
345 jne opportunistic_sysret_failed
348 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
349 * restoring TF results in a trap from userspace immediately after
350 * SYSRET. This would cause an infinite loop whenever #DB happens
351 * with register state that satisfies the opportunistic SYSRET
352 * conditions. For example, single-stepping this user code:
354 * movq $stuck_here, %rcx
359 * would never get past 'stuck_here'.
361 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
362 jnz opportunistic_sysret_failed
364 /* nothing to check for RSP */
366 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
367 jne opportunistic_sysret_failed
370 * We win! This label is here just for ease of understanding
371 * perf profiles. Nothing jumps here.
373 syscall_return_via_sysret:
374 /* rcx and r11 are already restored (see code above) */
375 RESTORE_C_REGS_EXCEPT_RCX_R11
377 * This opens a window where we have a user CR3, but are
378 * running in the kernel. This makes using the CS
379 * register useless for telling whether or not we need to
380 * switch CR3 in NMIs. Normal interrupts are OK because
387 opportunistic_sysret_failed:
389 * This opens a window where we have a user CR3, but are
390 * running in the kernel. This makes using the CS
391 * register useless for telling whether or not we need to
392 * switch CR3 in NMIs. Normal interrupts are OK because
397 jmp restore_c_regs_and_iret
398 END(entry_SYSCALL_64)
401 .macro FORK_LIKE func
417 /* exec failed, can use fast SYSRET code path in this case */
420 /* must use IRET code path (pt_regs->cs may have changed) */
424 jmp int_ret_from_sys_call
427 * Remaining execve stubs are only 7 bytes long.
428 * ENTRY() often aligns to 16 bytes, which in this case has no benefits.
431 GLOBAL(stub_execveat)
433 jmp return_from_execve
436 #if defined(CONFIG_X86_X32_ABI)
438 GLOBAL(stub_x32_execve)
439 call compat_sys_execve
440 jmp return_from_execve
443 GLOBAL(stub_x32_execveat)
444 call compat_sys_execveat
445 jmp return_from_execve
446 END(stub_x32_execveat)
450 * sigreturn is special because it needs to restore all registers on return.
451 * This cannot be done with SYSRET, so use the IRET return path instead.
453 ENTRY(stub_rt_sigreturn)
455 * SAVE_EXTRA_REGS result is not normally needed:
456 * sigreturn overwrites all pt_regs->GPREGS.
457 * But sigreturn can fail (!), and there is no easy way to detect that.
458 * To make sure RESTORE_EXTRA_REGS doesn't restore garbage on error,
459 * we SAVE_EXTRA_REGS here.
462 call sys_rt_sigreturn
467 jmp int_ret_from_sys_call
468 END(stub_rt_sigreturn)
470 #ifdef CONFIG_X86_X32_ABI
471 ENTRY(stub_x32_rt_sigreturn)
473 call sys32_x32_rt_sigreturn
475 END(stub_x32_rt_sigreturn)
479 * A newly forked process directly context switches into this address.
481 * rdi: prev task we switched from
485 LOCK ; btr $TIF_FORK, TI_flags(%r8)
488 popfq /* reset kernel eflags */
490 call schedule_tail /* rdi: 'prev' task parameter */
494 testb $3, CS(%rsp) /* from kernel_thread? */
497 * By the time we get here, we have no idea whether our pt_regs,
498 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
499 * the slow path, or one of the 32-bit compat paths.
500 * Use IRET code path to return, since it can safely handle
503 jnz int_ret_from_sys_call
506 * We came from kernel_thread
507 * nb: we depend on RESTORE_EXTRA_REGS above
513 jmp int_ret_from_sys_call
517 * Build the entry stubs with some assembler magic.
518 * We pack 1 stub into every 8-byte block.
521 ENTRY(irq_entries_start)
522 vector=FIRST_EXTERNAL_VECTOR
523 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
524 pushq $(~vector+0x80) /* Note: always in signed byte range */
529 END(irq_entries_start)
532 * Interrupt entry/exit.
534 * Interrupt entry points save only callee clobbered registers in fast path.
536 * Entry runs with interrupts off.
539 /* 0(%rsp): ~(interrupt number) */
540 .macro interrupt func
542 ALLOC_PT_GPREGS_ON_STACK
550 * IRQ from user mode. Switch to kernel gsbase and inform context
551 * tracking that we're in kernel mode.
557 * We need to tell lockdep that IRQs are off. We can't do this until
558 * we fix gsbase, and we should do it before enter_from_user_mode
559 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
560 * the simplest way to handle it is to just call it twice if
561 * we enter from user mode. There's no reason to optimize this since
562 * TRACE_IRQS_OFF is a no-op if lockdep is off.
566 #ifdef CONFIG_CONTEXT_TRACKING
567 call enter_from_user_mode
572 * Save previous stack pointer, optionally switch to interrupt stack.
573 * irq_count is used to check if a CPU is already on an interrupt stack
574 * or not. While this is essentially redundant with preempt_count it is
575 * a little cheaper to use a separate counter in the PDA (short of
576 * moving irq_enter into assembly, which would be too much work)
579 incl PER_CPU_VAR(irq_count)
580 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
582 /* We entered an interrupt context - irqs are off: */
585 call \func /* rdi points to pt_regs */
589 * The interrupt stubs push (~vector+0x80) onto the stack and
590 * then jump to common_interrupt.
592 .p2align CONFIG_X86_L1_CACHE_SHIFT
595 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
597 /* 0(%rsp): old RSP */
599 DISABLE_INTERRUPTS(CLBR_NONE)
601 decl PER_CPU_VAR(irq_count)
603 /* Restore saved previous stack */
609 /* Interrupt came from user space */
612 call prepare_exit_to_usermode
616 jmp restore_regs_and_iret
618 /* Returning to kernel space */
620 #ifdef CONFIG_PREEMPT
621 /* Interrupts are off */
622 /* Check if we need preemption */
623 btl $9, EFLAGS(%rsp) /* were interrupts off? */
625 0: cmpl $0, PER_CPU_VAR(__preempt_count)
627 call preempt_schedule_irq
632 * The iretq could re-enable interrupts:
637 * At this label, code paths which return to kernel and to user,
638 * which come from interrupts/exception and from syscalls, merge.
640 GLOBAL(restore_regs_and_iret)
642 restore_c_regs_and_iret:
644 REMOVE_PT_GPREGS_FROM_STACK 8
649 * Are we returning to a stack segment from the LDT? Note: in
650 * 64-bit mode SS:RSP on the exception stack is always valid.
652 #ifdef CONFIG_X86_ESPFIX64
653 testb $4, (SS-RIP)(%rsp)
654 jnz native_irq_return_ldt
657 .global native_irq_return_iret
658 native_irq_return_iret:
660 * This may fault. Non-paranoid faults on return to userspace are
661 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
662 * Double-faults due to espfix64 are handled in do_double_fault.
663 * Other faults here are fatal.
667 #ifdef CONFIG_X86_ESPFIX64
668 native_irq_return_ldt:
673 movq PER_CPU_VAR(espfix_waddr), %rdi
674 movq %rax, (0*8)(%rdi) /* RAX */
675 movq (2*8)(%rsp), %rax /* RIP */
676 movq %rax, (1*8)(%rdi)
677 movq (3*8)(%rsp), %rax /* CS */
678 movq %rax, (2*8)(%rdi)
679 movq (4*8)(%rsp), %rax /* RFLAGS */
680 movq %rax, (3*8)(%rdi)
681 movq (6*8)(%rsp), %rax /* SS */
682 movq %rax, (5*8)(%rdi)
683 movq (5*8)(%rsp), %rax /* RSP */
684 movq %rax, (4*8)(%rdi)
685 andl $0xffff0000, %eax
687 orq PER_CPU_VAR(espfix_stack), %rax
692 jmp native_irq_return_iret
694 END(common_interrupt)
699 .macro apicinterrupt3 num sym do_sym
709 #ifdef CONFIG_TRACING
710 #define trace(sym) trace_##sym
711 #define smp_trace(sym) smp_trace_##sym
713 .macro trace_apicinterrupt num sym
714 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
717 .macro trace_apicinterrupt num sym do_sym
721 /* Make sure APIC interrupt handlers end up in the irqentry section: */
722 #define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
723 #define POP_SECTION_IRQENTRY .popsection
725 .macro apicinterrupt num sym do_sym
726 PUSH_SECTION_IRQENTRY
727 apicinterrupt3 \num \sym \do_sym
728 trace_apicinterrupt \num \sym
733 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
734 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
738 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
741 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
742 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
744 #ifdef CONFIG_HAVE_KVM
745 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
746 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
749 #ifdef CONFIG_X86_MCE_THRESHOLD
750 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
753 #ifdef CONFIG_X86_MCE_AMD
754 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
757 #ifdef CONFIG_X86_THERMAL_VECTOR
758 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
762 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
763 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
764 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
767 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
768 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
770 #ifdef CONFIG_IRQ_WORK
771 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
775 * Exception entry points.
777 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
779 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
782 .if \shift_ist != -1 && \paranoid == 0
783 .error "using shift_ist requires paranoid=1"
787 PARAVIRT_ADJUST_EXCEPTION_FRAME
789 .ifeq \has_error_code
790 pushq $-1 /* ORIG_RAX: no syscall to restart */
793 ALLOC_PT_GPREGS_ON_STACK
797 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
804 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
808 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
814 movq %rsp, %rdi /* pt_regs pointer */
817 movq ORIG_RAX(%rsp), %rsi /* get error code */
818 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
820 xorl %esi, %esi /* no error code */
824 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
830 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
833 /* these procedures expect "no swapgs" flag in ebx */
842 * Paranoid entry from userspace. Switch stacks and treat it
843 * as a normal entry. This means that paranoid handlers
844 * run in real process context if user_mode(regs).
850 movq %rsp, %rdi /* pt_regs pointer */
852 movq %rax, %rsp /* switch stack */
854 movq %rsp, %rdi /* pt_regs pointer */
857 movq ORIG_RAX(%rsp), %rsi /* get error code */
858 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
860 xorl %esi, %esi /* no error code */
865 jmp error_exit /* %ebx: no swapgs flag */
870 #ifdef CONFIG_TRACING
871 .macro trace_idtentry sym do_sym has_error_code:req
872 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
873 idtentry \sym \do_sym has_error_code=\has_error_code
876 .macro trace_idtentry sym do_sym has_error_code:req
877 idtentry \sym \do_sym has_error_code=\has_error_code
881 idtentry divide_error do_divide_error has_error_code=0
882 idtentry overflow do_overflow has_error_code=0
883 idtentry bounds do_bounds has_error_code=0
884 idtentry invalid_op do_invalid_op has_error_code=0
885 idtentry device_not_available do_device_not_available has_error_code=0
886 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
887 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
888 idtentry invalid_TSS do_invalid_TSS has_error_code=1
889 idtentry segment_not_present do_segment_not_present has_error_code=1
890 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
891 idtentry coprocessor_error do_coprocessor_error has_error_code=0
892 idtentry alignment_check do_alignment_check has_error_code=1
893 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
897 * Reload gs selector with exception handling
900 ENTRY(native_load_gs_index)
902 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
906 2: mfence /* workaround */
910 END(native_load_gs_index)
912 _ASM_EXTABLE(gs_change, bad_gs)
913 .section .fixup, "ax"
914 /* running with kernelgs */
916 SWAPGS /* switch back to user gs */
922 /* Call softirq on interrupt stack. Interrupts are off. */
923 ENTRY(do_softirq_own_stack)
926 incl PER_CPU_VAR(irq_count)
927 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
928 push %rbp /* frame pointer backlink */
931 decl PER_CPU_VAR(irq_count)
933 END(do_softirq_own_stack)
936 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
939 * A note on the "critical region" in our callback handler.
940 * We want to avoid stacking callback handlers due to events occurring
941 * during handling of the last event. To do this, we keep events disabled
942 * until we've done all processing. HOWEVER, we must enable events before
943 * popping the stack frame (can't be done atomically) and so it would still
944 * be possible to get enough handler activations to overflow the stack.
945 * Although unlikely, bugs of that kind are hard to track down, so we'd
946 * like to avoid the possibility.
947 * So, on entry to the handler we detect whether we interrupted an
948 * existing activation in its critical region -- if so, we pop the current
949 * activation and restart the handler using the previous one.
951 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
954 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
955 * see the correct pointer to the pt_regs
957 movq %rdi, %rsp /* we don't return, adjust the stack frame */
958 11: incl PER_CPU_VAR(irq_count)
960 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
961 pushq %rbp /* frame pointer backlink */
962 call xen_evtchn_do_upcall
964 decl PER_CPU_VAR(irq_count)
965 #ifndef CONFIG_PREEMPT
966 call xen_maybe_preempt_hcall
969 END(xen_do_hypervisor_callback)
972 * Hypervisor uses this for application faults while it executes.
973 * We get here for two reasons:
974 * 1. Fault while reloading DS, ES, FS or GS
975 * 2. Fault while executing IRET
976 * Category 1 we do not need to fix up as Xen has already reloaded all segment
977 * registers that could be reloaded and zeroed the others.
978 * Category 2 we fix up by killing the current process. We cannot use the
979 * normal Linux return path in this case because if we use the IRET hypercall
980 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
981 * We distinguish between categories by comparing each saved segment register
982 * with its current contents: any discrepancy means we in category 1.
984 ENTRY(xen_failsafe_callback)
997 /* All segments match their saved values => Category 2 (Bad IRET). */
1004 jmp general_protection
1005 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1009 pushq $-1 /* orig_ax = -1 => not a system call */
1010 ALLOC_PT_GPREGS_ON_STACK
1014 END(xen_failsafe_callback)
1016 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1017 xen_hvm_callback_vector xen_evtchn_do_upcall
1019 #endif /* CONFIG_XEN */
1021 #if IS_ENABLED(CONFIG_HYPERV)
1022 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1023 hyperv_callback_vector hyperv_vector_handler
1024 #endif /* CONFIG_HYPERV */
1026 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1027 idtentry int3 do_int3 has_error_code=0
1028 idtentry stack_segment do_stack_segment has_error_code=1
1031 idtentry xen_debug do_debug has_error_code=0
1032 idtentry xen_int3 do_int3 has_error_code=0
1033 idtentry xen_stack_segment do_stack_segment has_error_code=1
1036 idtentry general_protection do_general_protection has_error_code=1
1037 trace_idtentry page_fault do_page_fault has_error_code=1
1039 #ifdef CONFIG_KVM_GUEST
1040 idtentry async_page_fault do_async_page_fault has_error_code=1
1043 #ifdef CONFIG_X86_MCE
1044 idtentry machine_check do_mce has_error_code=0 paranoid=1
1048 * Save all registers in pt_regs, and switch gs if needed.
1049 * Use slow, but surefire "are we in kernel?" check.
1051 * Return: ebx=0: needs swapgs but not SWITCH_USER_CR3 in paranoid_exit
1052 * ebx=1: needs neither swapgs nor SWITCH_USER_CR3 in paranoid_exit
1053 * ebx=2: needs both swapgs and SWITCH_USER_CR3 in paranoid_exit
1054 * ebx=3: needs SWITCH_USER_CR3 but not swapgs in paranoid_exit
1056 ENTRY(paranoid_entry)
1061 movl $MSR_GS_BASE, %ecx
1064 js 1f /* negative -> in kernel */
1068 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1070 * We might have come in between a swapgs and a SWITCH_KERNEL_CR3
1071 * on entry, or between a SWITCH_USER_CR3 and a swapgs on exit.
1072 * Do a conditional SWITCH_KERNEL_CR3: this could safely be done
1073 * unconditionally, but we need to find out whether the reverse
1074 * should be done on return (conveyed to paranoid_exit in %ebx).
1076 ALTERNATIVE "jmp 2f", "movq %cr3, %rax", X86_FEATURE_KAISER
1077 testl $KAISER_SHADOW_PGD_OFFSET, %eax
1080 andq $(~(X86_CR3_PCID_ASID_MASK | KAISER_SHADOW_PGD_OFFSET)), %rax
1081 /* If PCID enabled, set X86_CR3_PCID_NOFLUSH_BIT */
1082 ALTERNATIVE "", "bts $63, %rax", X86_FEATURE_PCID
1090 * "Paranoid" exit path from exception stack. This is invoked
1091 * only on return from non-NMI IST interrupts that came
1092 * from kernel space.
1094 * We may be returning to very strange contexts (e.g. very early
1095 * in syscall entry), so checking for preemption here would
1096 * be complicated. Fortunately, we there's no good reason
1097 * to try to handle preemption here.
1099 * On entry: ebx=0: needs swapgs but not SWITCH_USER_CR3
1100 * ebx=1: needs neither swapgs nor SWITCH_USER_CR3
1101 * ebx=2: needs both swapgs and SWITCH_USER_CR3
1102 * ebx=3: needs SWITCH_USER_CR3 but not swapgs
1104 ENTRY(paranoid_exit)
1105 DISABLE_INTERRUPTS(CLBR_NONE)
1106 TRACE_IRQS_OFF_DEBUG
1107 TRACE_IRQS_IRETQ_DEBUG
1108 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1109 /* No ALTERNATIVE for X86_FEATURE_KAISER: paranoid_entry sets %ebx */
1110 testl $2, %ebx /* SWITCH_USER_CR3 needed? */
1111 jz paranoid_exit_no_switch
1113 paranoid_exit_no_switch:
1115 testl $1, %ebx /* swapgs needed? */
1116 jnz paranoid_exit_no_swapgs
1118 paranoid_exit_no_swapgs:
1121 REMOVE_PT_GPREGS_FROM_STACK 8
1126 * Save all registers in pt_regs, and switch gs if needed.
1127 * Return: EBX=0: came from user mode; EBX=1: otherwise
1134 * error_entry() always returns with a kernel gsbase and
1135 * CR3. We must also have a kernel CR3/gsbase before
1136 * calling TRACE_IRQS_*. Just unconditionally switch to
1137 * the kernel CR3 here.
1141 testb $3, CS+8(%rsp)
1142 jz .Lerror_kernelspace
1144 .Lerror_entry_from_usermode_swapgs:
1146 * We entered from user mode or we're pretending to have entered
1147 * from user mode due to an IRET fault.
1151 .Lerror_entry_from_usermode_after_swapgs:
1153 * We need to tell lockdep that IRQs are off. We can't do this until
1154 * we fix gsbase, and we should do it before enter_from_user_mode
1155 * (which can take locks).
1158 #ifdef CONFIG_CONTEXT_TRACKING
1159 call enter_from_user_mode
1168 * There are two places in the kernel that can potentially fault with
1169 * usergs. Handle them here. B stepping K8s sometimes report a
1170 * truncated RIP for IRET exceptions returning to compat mode. Check
1171 * for these here too.
1173 .Lerror_kernelspace:
1175 leaq native_irq_return_iret(%rip), %rcx
1176 cmpq %rcx, RIP+8(%rsp)
1178 movl %ecx, %eax /* zero extend */
1179 cmpq %rax, RIP+8(%rsp)
1181 cmpq $gs_change, RIP+8(%rsp)
1182 jne .Lerror_entry_done
1185 * hack: gs_change can fail with user gsbase. If this happens, fix up
1186 * gsbase and proceed. We'll fix up the exception and land in
1187 * gs_change's error handler with kernel gsbase.
1189 jmp .Lerror_entry_from_usermode_swapgs
1192 /* Fix truncated RIP */
1193 movq %rcx, RIP+8(%rsp)
1198 * We came from an IRET to user mode, so we have user gsbase.
1199 * Switch to kernel gsbase:
1204 * Pretend that the exception came from user mode: set up pt_regs
1205 * as if we faulted immediately after IRET and clear EBX so that
1206 * error_exit knows that we will be returning to user mode.
1212 jmp .Lerror_entry_from_usermode_after_swapgs
1217 * On entry, EBS is a "return to kernel mode" flag:
1218 * 1: already in kernel mode, don't need SWAPGS
1219 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1223 DISABLE_INTERRUPTS(CLBR_NONE)
1230 /* Runs on exception stack */
1233 * Fix up the exception frame if we're on Xen.
1234 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1235 * one value to the stack on native, so it may clobber the rdx
1236 * scratch slot, but it won't clobber any of the important
1239 * Xen is a different story, because the Xen frame itself overlaps
1240 * the "NMI executing" variable.
1242 PARAVIRT_ADJUST_EXCEPTION_FRAME
1245 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1246 * the iretq it performs will take us out of NMI context.
1247 * This means that we can have nested NMIs where the next
1248 * NMI is using the top of the stack of the previous NMI. We
1249 * can't let it execute because the nested NMI will corrupt the
1250 * stack of the previous NMI. NMI handlers are not re-entrant
1253 * To handle this case we do the following:
1254 * Check the a special location on the stack that contains
1255 * a variable that is set when NMIs are executing.
1256 * The interrupted task's stack is also checked to see if it
1258 * If the variable is not set and the stack is not the NMI
1260 * o Set the special variable on the stack
1261 * o Copy the interrupt frame into an "outermost" location on the
1263 * o Copy the interrupt frame into an "iret" location on the stack
1264 * o Continue processing the NMI
1265 * If the variable is set or the previous stack is the NMI stack:
1266 * o Modify the "iret" location to jump to the repeat_nmi
1267 * o return back to the first NMI
1269 * Now on exit of the first NMI, we first clear the stack variable
1270 * The NMI stack will tell any nested NMIs at that point that it is
1271 * nested. Then we pop the stack normally with iret, and if there was
1272 * a nested NMI that updated the copy interrupt stack frame, a
1273 * jump will be made to the repeat_nmi code that will handle the second
1276 * However, espfix prevents us from directly returning to userspace
1277 * with a single IRET instruction. Similarly, IRET to user mode
1278 * can fault. We therefore handle NMIs from user space like
1279 * other IST entries.
1284 /* Use %rdx as our temp variable throughout */
1287 testb $3, CS-RIP+8(%rsp)
1288 jz .Lnmi_from_kernel
1291 * NMI from user mode. We need to run on the thread stack, but we
1292 * can't go through the normal entry paths: NMIs are masked, and
1293 * we don't want to enable interrupts, because then we'll end
1294 * up in an awkward situation in which IRQs are on but NMIs
1297 * We also must not push anything to the stack before switching
1298 * stacks lest we corrupt the "NMI executing" variable.
1303 * percpu variables are mapped with user CR3, so no need
1304 * to switch CR3 here.
1308 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1309 pushq 5*8(%rdx) /* pt_regs->ss */
1310 pushq 4*8(%rdx) /* pt_regs->rsp */
1311 pushq 3*8(%rdx) /* pt_regs->flags */
1312 pushq 2*8(%rdx) /* pt_regs->cs */
1313 pushq 1*8(%rdx) /* pt_regs->rip */
1314 pushq $-1 /* pt_regs->orig_ax */
1315 pushq %rdi /* pt_regs->di */
1316 pushq %rsi /* pt_regs->si */
1317 pushq (%rdx) /* pt_regs->dx */
1318 pushq %rcx /* pt_regs->cx */
1319 pushq %rax /* pt_regs->ax */
1320 pushq %r8 /* pt_regs->r8 */
1321 pushq %r9 /* pt_regs->r9 */
1322 pushq %r10 /* pt_regs->r10 */
1323 pushq %r11 /* pt_regs->r11 */
1324 pushq %rbx /* pt_regs->rbx */
1325 pushq %rbp /* pt_regs->rbp */
1326 pushq %r12 /* pt_regs->r12 */
1327 pushq %r13 /* pt_regs->r13 */
1328 pushq %r14 /* pt_regs->r14 */
1329 pushq %r15 /* pt_regs->r15 */
1332 * At this point we no longer need to worry about stack damage
1333 * due to nesting -- we're on the normal thread stack and we're
1334 * done with the NMI stack.
1339 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1340 /* Unconditionally use kernel CR3 for do_nmi() */
1341 /* %rax is saved above, so OK to clobber here */
1342 ALTERNATIVE "jmp 2f", "movq %cr3, %rax", X86_FEATURE_KAISER
1343 /* If PCID enabled, NOFLUSH now and NOFLUSH on return */
1344 ALTERNATIVE "", "bts $63, %rax", X86_FEATURE_PCID
1346 /* mask off "user" bit of pgd address and 12 PCID bits: */
1347 andq $(~(X86_CR3_PCID_ASID_MASK | KAISER_SHADOW_PGD_OFFSET)), %rax
1353 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1355 * Unconditionally restore CR3. I know we return to
1356 * kernel code that needs user CR3, but do we ever return
1357 * to "user mode" where we need the kernel CR3?
1359 ALTERNATIVE "", "popq %rax; movq %rax, %cr3", X86_FEATURE_KAISER
1363 * Return back to user mode. We must *not* do the normal exit
1364 * work, because we don't want to enable interrupts. Do not
1365 * switch to user CR3: we might be going back to kernel code
1366 * that had a user CR3 set.
1369 jmp restore_c_regs_and_iret
1373 * Here's what our stack frame will look like:
1374 * +---------------------------------------------------------+
1376 * | original Return RSP |
1377 * | original RFLAGS |
1380 * +---------------------------------------------------------+
1381 * | temp storage for rdx |
1382 * +---------------------------------------------------------+
1383 * | "NMI executing" variable |
1384 * +---------------------------------------------------------+
1385 * | iret SS } Copied from "outermost" frame |
1386 * | iret Return RSP } on each loop iteration; overwritten |
1387 * | iret RFLAGS } by a nested NMI to force another |
1388 * | iret CS } iteration if needed. |
1390 * +---------------------------------------------------------+
1391 * | outermost SS } initialized in first_nmi; |
1392 * | outermost Return RSP } will not be changed before |
1393 * | outermost RFLAGS } NMI processing is done. |
1394 * | outermost CS } Copied to "iret" frame on each |
1395 * | outermost RIP } iteration. |
1396 * +---------------------------------------------------------+
1398 * +---------------------------------------------------------+
1400 * The "original" frame is used by hardware. Before re-enabling
1401 * NMIs, we need to be done with it, and we need to leave enough
1402 * space for the asm code here.
1404 * We return by executing IRET while RSP points to the "iret" frame.
1405 * That will either return for real or it will loop back into NMI
1408 * The "outermost" frame is copied to the "iret" frame on each
1409 * iteration of the loop, so each iteration starts with the "iret"
1410 * frame pointing to the final return target.
1414 * Determine whether we're a nested NMI.
1416 * If we interrupted kernel code between repeat_nmi and
1417 * end_repeat_nmi, then we are a nested NMI. We must not
1418 * modify the "iret" frame because it's being written by
1419 * the outer NMI. That's okay; the outer NMI handler is
1420 * about to about to call do_nmi anyway, so we can just
1421 * resume the outer NMI.
1424 movq $repeat_nmi, %rdx
1427 movq $end_repeat_nmi, %rdx
1433 * Now check "NMI executing". If it's set, then we're nested.
1434 * This will not detect if we interrupted an outer NMI just
1441 * Now test if the previous stack was an NMI stack. This covers
1442 * the case where we interrupt an outer NMI after it clears
1443 * "NMI executing" but before IRET. We need to be careful, though:
1444 * there is one case in which RSP could point to the NMI stack
1445 * despite there being no NMI active: naughty userspace controls
1446 * RSP at the very beginning of the SYSCALL targets. We can
1447 * pull a fast one on naughty userspace, though: we program
1448 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1449 * if it controls the kernel's RSP. We set DF before we clear
1453 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1454 cmpq %rdx, 4*8(%rsp)
1455 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1458 subq $EXCEPTION_STKSZ, %rdx
1459 cmpq %rdx, 4*8(%rsp)
1460 /* If it is below the NMI stack, it is a normal NMI */
1463 /* Ah, it is within the NMI stack. */
1465 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1466 jz first_nmi /* RSP was user controlled. */
1468 /* This is a nested NMI. */
1472 * Modify the "iret" frame to point to repeat_nmi, forcing another
1473 * iteration of NMI handling.
1476 leaq -10*8(%rsp), %rdx
1483 /* Put stack back */
1489 /* We are returning to kernel mode, so this cannot result in a fault. */
1496 /* Make room for "NMI executing". */
1499 /* Leave room for the "iret" frame */
1502 /* Copy the "original" frame to the "outermost" frame */
1507 /* Everything up to here is safe from nested NMIs */
1509 #ifdef CONFIG_DEBUG_ENTRY
1511 * For ease of testing, unmask NMIs right away. Disabled by
1512 * default because IRET is very expensive.
1515 pushq %rsp /* RSP (minus 8 because of the previous push) */
1516 addq $8, (%rsp) /* Fix up RSP */
1518 pushq $__KERNEL_CS /* CS */
1520 INTERRUPT_RETURN /* continues at repeat_nmi below */
1526 * If there was a nested NMI, the first NMI's iret will return
1527 * here. But NMIs are still enabled and we can take another
1528 * nested NMI. The nested NMI checks the interrupted RIP to see
1529 * if it is between repeat_nmi and end_repeat_nmi, and if so
1530 * it will just return, as we are about to repeat an NMI anyway.
1531 * This makes it safe to copy to the stack frame that a nested
1534 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1535 * we're repeating an NMI, gsbase has the same value that it had on
1536 * the first iteration. paranoid_entry will load the kernel
1537 * gsbase if needed before we call do_nmi. "NMI executing"
1540 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1543 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1544 * here must not modify the "iret" frame while we're writing to
1545 * it or it will end up containing garbage.
1555 * Everything below this point can be preempted by a nested NMI.
1556 * If this happens, then the inner NMI will change the "iret"
1557 * frame to point back to repeat_nmi.
1559 pushq $-1 /* ORIG_RAX: no syscall to restart */
1560 ALLOC_PT_GPREGS_ON_STACK
1563 * Use the same approach as paranoid_entry to handle SWAPGS, but
1564 * without CR3 handling since we do that differently in NMIs. No
1565 * need to use paranoid_exit as we should not be calling schedule
1566 * in NMI context. Even with normal interrupts enabled. An NMI
1567 * should not be setting NEED_RESCHED or anything that normal
1568 * interrupts and exceptions might do.
1574 movl $MSR_GS_BASE, %ecx
1577 js 1f /* negative -> in kernel */
1583 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1584 /* Unconditionally use kernel CR3 for do_nmi() */
1585 /* %rax is saved above, so OK to clobber here */
1586 ALTERNATIVE "jmp 2f", "movq %cr3, %rax", X86_FEATURE_KAISER
1587 /* If PCID enabled, NOFLUSH now and NOFLUSH on return */
1588 ALTERNATIVE "", "bts $63, %rax", X86_FEATURE_PCID
1590 /* mask off "user" bit of pgd address and 12 PCID bits: */
1591 andq $(~(X86_CR3_PCID_ASID_MASK | KAISER_SHADOW_PGD_OFFSET)), %rax
1596 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1599 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1601 * Unconditionally restore CR3. We might be returning to
1602 * kernel code that needs user CR3, like just just before
1605 ALTERNATIVE "", "popq %rax; movq %rax, %cr3", X86_FEATURE_KAISER
1608 testl %ebx, %ebx /* swapgs needed? */
1611 /* We fixed up CR3 above, so no need to switch it here */
1617 /* Point RSP at the "iret" frame. */
1618 REMOVE_PT_GPREGS_FROM_STACK 6*8
1621 * Clear "NMI executing". Set DF first so that we can easily
1622 * distinguish the remaining code between here and IRET from
1623 * the SYSCALL entry and exit paths. On a native kernel, we
1624 * could just inspect RIP, but, on paravirt kernels,
1625 * INTERRUPT_RETURN can translate into a jump into a
1629 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1632 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1633 * stack in a single instruction. We are returning to kernel
1634 * mode, so this cannot result in a fault.
1639 ENTRY(ignore_sysret)