arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11 #include <linux/slab.h>
  12
  13 #include <asm/sigcontext.h>
  14 #include <asm/processor.h>
  15 #include <asm/math_emu.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/i387.h>
  19 #include <asm/fpu-internal.h>
  20 #include <asm/user.h>
  21
  22 /*
  23  * Were we in an interrupt that interrupted kernel mode?
  24  *
  25  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
  26  * pair does nothing at all: the thread must not have fpu (so
  27  * that we don't try to save the FPU state), and TS must
  28  * be set (so that the clts/stts pair does nothing that is
  29  * visible in the interrupted kernel thread).
  30  *
  31  * Except for the eagerfpu case when we return 1 unless we've already
  32  * been eager and saved the state in kernel_fpu_begin().
  33  */
  34 static inline bool interrupted_kernel_fpu_idle(void)
  35 {
  36         if (use_eager_fpu())
  37                 return __thread_has_fpu(current);
  38
  39         return !__thread_has_fpu(current) &&
  40                 (read_cr0() & X86_CR0_TS);
  41 }
  42
  43 /*
  44  * Were we in user mode (or vm86 mode) when we were
  45  * interrupted?
  46  *
  47  * Doing kernel_fpu_begin/end() is ok if we are running
  48  * in an interrupt context from user mode - we'll just
  49  * save the FPU state as required.
  50  */
  51 static inline bool interrupted_user_mode(void)
  52 {
  53         struct pt_regs *regs = get_irq_regs();
  54         return regs && user_mode_vm(regs);
  55 }
  56
  57 /*
  58  * Can we use the FPU in kernel mode with the
  59  * whole "kernel_fpu_begin/end()" sequence?
  60  *
  61  * It's always ok in process context (ie "not interrupt")
  62  * but it is sometimes ok even from an irq.
  63  */
  64 bool irq_fpu_usable(void)
  65 {
  66         return !in_interrupt() ||
  67                 interrupted_user_mode() ||
  68                 interrupted_kernel_fpu_idle();
  69 }
  70 EXPORT_SYMBOL(irq_fpu_usable);
  71
  72 void __kernel_fpu_begin(void)
  73 {
  74         struct task_struct *me = current;
  75
  76         if (__thread_has_fpu(me)) {
  77                 __thread_clear_has_fpu(me);
  78                 __save_init_fpu(me);
  79                 /* We do 'stts()' in __kernel_fpu_end() */
  80         } else if (!use_eager_fpu()) {
  81                 this_cpu_write(fpu_owner_task, NULL);
  82                 clts();
  83         }
  84 }
  85 EXPORT_SYMBOL(__kernel_fpu_begin);
  86
  87 void __kernel_fpu_end(void)
  88 {
  89         if (use_eager_fpu()) {
  90                 /*
  91                  * For eager fpu, most the time, tsk_used_math() is true.
  92                  * Restore the user math as we are done with the kernel usage.
  93                  * At few instances during thread exit, signal handling etc,
  94                  * tsk_used_math() is false. Those few places will take proper
  95                  * actions, so we don't need to restore the math here.
  96                  */
  97                 if (likely(tsk_used_math(current)))
  98                         math_state_restore();
  99         } else {
 100                 stts();
 101         }
 102 }
 103 EXPORT_SYMBOL(__kernel_fpu_end);
 104
 105 void unlazy_fpu(struct task_struct *tsk)
 106 {
 107         preempt_disable();
 108         if (__thread_has_fpu(tsk)) {
 109                 if (use_eager_fpu()) {
 110                         __save_fpu(tsk);
 111                 } else {
 112                         __save_init_fpu(tsk);
 113                         __thread_fpu_end(tsk);
 114                 }
 115         }
 116         preempt_enable();
 117 }
 118 EXPORT_SYMBOL(unlazy_fpu);
 119
 120 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
 121 unsigned int xstate_size;
 122 EXPORT_SYMBOL_GPL(xstate_size);
 123 static struct i387_fxsave_struct fx_scratch;
 124
 125 static void mxcsr_feature_mask_init(void)
 126 {
 127         unsigned long mask = 0;
 128
 129         if (cpu_has_fxsr) {
 130                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
 131                 asm volatile("fxsave %0" : "+m" (fx_scratch));
 132                 mask = fx_scratch.mxcsr_mask;
 133                 if (mask == 0)
 134                         mask = 0x0000ffbf;
 135         }
 136         mxcsr_feature_mask &= mask;
 137 }
 138
 139 static void init_thread_xstate(void)
 140 {
 141         /*
 142          * Note that xstate_size might be overwriten later during
 143          * xsave_init().
 144          */
 145
 146         if (!cpu_has_fpu) {
 147                 /*
 148                  * Disable xsave as we do not support it if i387
 149                  * emulation is enabled.
 150                  */
 151                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
 152                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
 153                 xstate_size = sizeof(struct i387_soft_struct);
 154                 return;
 155         }
 156
 157         if (cpu_has_fxsr)
 158                 xstate_size = sizeof(struct i387_fxsave_struct);
 159         else
 160                 xstate_size = sizeof(struct i387_fsave_struct);
 161 }
 162
 163 /*
 164  * Called at bootup to set up the initial FPU state that is later cloned
 165  * into all processes.
 166  */
 167
 168 void fpu_init(void)
 169 {
 170         unsigned long cr0;
 171         unsigned long cr4_mask = 0;
 172
 173 #ifndef CONFIG_MATH_EMULATION
 174         if (!cpu_has_fpu) {
 175                 pr_emerg("No FPU found and no math emulation present\n");
 176                 pr_emerg("Giving up\n");
 177                 for (;;)
 178                         asm volatile("hlt");
 179         }
 180 #endif
 181         if (cpu_has_fxsr)
 182                 cr4_mask |= X86_CR4_OSFXSR;
 183         if (cpu_has_xmm)
 184                 cr4_mask |= X86_CR4_OSXMMEXCPT;
 185         if (cr4_mask)
 186                 set_in_cr4(cr4_mask);
 187
 188         cr0 = read_cr0();
 189         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
 190         if (!cpu_has_fpu)
 191                 cr0 |= X86_CR0_EM;
 192         write_cr0(cr0);
 193
 194         /*
 195          * init_thread_xstate is only called once to avoid overriding
 196          * xstate_size during boot time or during CPU hotplug.
 197          */
 198         if (xstate_size == 0)
 199                 init_thread_xstate();
 200
 201         mxcsr_feature_mask_init();
 202         xsave_init();
 203         eager_fpu_init();
 204 }
 205
 206 void fpu_finit(struct fpu *fpu)
 207 {
 208         if (!cpu_has_fpu) {
 209                 finit_soft_fpu(&fpu->state->soft);
 210                 return;
 211         }
 212
 213         if (cpu_has_fxsr) {
 214                 fx_finit(&fpu->state->fxsave);
 215         } else {
 216                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 217                 memset(fp, 0, xstate_size);
 218                 fp->cwd = 0xffff037fu;
 219                 fp->swd = 0xffff0000u;
 220                 fp->twd = 0xffffffffu;
 221                 fp->fos = 0xffff0000u;
 222         }
 223 }
 224 EXPORT_SYMBOL_GPL(fpu_finit);
 225
 226 /*
 227  * The _current_ task is using the FPU for the first time
 228  * so initialize it and set the mxcsr to its default
 229  * value at reset if we support XMM instructions and then
 230  * remember the current task has used the FPU.
 231  */
 232 int init_fpu(struct task_struct *tsk)
 233 {
 234         int ret;
 235
 236         if (tsk_used_math(tsk)) {
 237                 if (cpu_has_fpu && tsk == current)
 238                         unlazy_fpu(tsk);
 239                 task_disable_lazy_fpu_restore(tsk);
 240                 return 0;
 241         }
 242
 243         /*
 244          * Memory allocation at the first usage of the FPU and other state.
 245          */
 246         ret = fpu_alloc(&tsk->thread.fpu);
 247         if (ret)
 248                 return ret;
 249
 250         fpu_finit(&tsk->thread.fpu);
 251
 252         set_stopped_child_used_math(tsk);
 253         return 0;
 254 }
 255 EXPORT_SYMBOL_GPL(init_fpu);
 256
 257 /*
 258  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 259  * as the "regset->n" for the xstate regset will be updated based on the feature
 260  * capabilites supported by the xsave.
 261  */
 262 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 263 {
 264         return tsk_used_math(target) ? regset->n : 0;
 265 }
 266
 267 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 268 {
 269         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 270 }
 271
 272 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 273                 unsigned int pos, unsigned int count,
 274                 void *kbuf, void __user *ubuf)
 275 {
 276         int ret;
 277
 278         if (!cpu_has_fxsr)
 279                 return -ENODEV;
 280
 281         ret = init_fpu(target);
 282         if (ret)
 283                 return ret;
 284
 285         sanitize_i387_state(target);
 286
 287         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 288                                    &target->thread.fpu.state->fxsave, 0, -1);
 289 }
 290
 291 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 292                 unsigned int pos, unsigned int count,
 293                 const void *kbuf, const void __user *ubuf)
 294 {
 295         int ret;
 296
 297         if (!cpu_has_fxsr)
 298                 return -ENODEV;
 299
 300         ret = init_fpu(target);
 301         if (ret)
 302                 return ret;
 303
 304         sanitize_i387_state(target);
 305
 306         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 307                                  &target->thread.fpu.state->fxsave, 0, -1);
 308
 309         /*
 310          * mxcsr reserved bits must be masked to zero for security reasons.
 311          */
 312         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 313
 314         /*
 315          * update the header bits in the xsave header, indicating the
 316          * presence of FP and SSE state.
 317          */
 318         if (cpu_has_xsave)
 319                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 320
 321         return ret;
 322 }
 323
 324 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 325                 unsigned int pos, unsigned int count,
 326                 void *kbuf, void __user *ubuf)
 327 {
 328         int ret;
 329
 330         if (!cpu_has_xsave)
 331                 return -ENODEV;
 332
 333         ret = init_fpu(target);
 334         if (ret)
 335                 return ret;
 336
 337         /*
 338          * Copy the 48bytes defined by the software first into the xstate
 339          * memory layout in the thread struct, so that we can copy the entire
 340          * xstateregs to the user using one user_regset_copyout().
 341          */
 342         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
 343                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 344
 345         /*
 346          * Copy the xstate memory layout.
 347          */
 348         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 349                                   &target->thread.fpu.state->xsave, 0, -1);
 350         return ret;
 351 }
 352
 353 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 354                   unsigned int pos, unsigned int count,
 355                   const void *kbuf, const void __user *ubuf)
 356 {
 357         int ret;
 358         struct xsave_hdr_struct *xsave_hdr;
 359
 360         if (!cpu_has_xsave)
 361                 return -ENODEV;
 362
 363         ret = init_fpu(target);
 364         if (ret)
 365                 return ret;
 366
 367         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 368                                  &target->thread.fpu.state->xsave, 0, -1);
 369
 370         /*
 371          * mxcsr reserved bits must be masked to zero for security reasons.
 372          */
 373         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 374
 375         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
 376
 377         xsave_hdr->xstate_bv &= pcntxt_mask;
 378         /*
 379          * These bits must be zero.
 380          */
 381         memset(xsave_hdr->reserved, 0, 48);
 382
 383         return ret;
 384 }
 385
 386 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 387
 388 /*
 389  * FPU tag word conversions.
 390  */
 391
 392 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 393 {
 394         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 395
 396         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 397         tmp = ~twd;
 398         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 399         /* and move the valid bits to the lower byte. */
 400         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 401         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 402         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 403
 404         return tmp;
 405 }
 406
 407 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
 408 #define FP_EXP_TAG_VALID        0
 409 #define FP_EXP_TAG_ZERO         1
 410 #define FP_EXP_TAG_SPECIAL      2
 411 #define FP_EXP_TAG_EMPTY        3
 412
 413 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 414 {
 415         struct _fpxreg *st;
 416         u32 tos = (fxsave->swd >> 11) & 7;
 417         u32 twd = (unsigned long) fxsave->twd;
 418         u32 tag;
 419         u32 ret = 0xffff0000u;
 420         int i;
 421
 422         for (i = 0; i < 8; i++, twd >>= 1) {
 423                 if (twd & 0x1) {
 424                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 425
 426                         switch (st->exponent & 0x7fff) {
 427                         case 0x7fff:
 428                                 tag = FP_EXP_TAG_SPECIAL;
 429                                 break;
 430                         case 0x0000:
 431                                 if (!st->significand[0] &&
 432                                     !st->significand[1] &&
 433                                     !st->significand[2] &&
 434                                     !st->significand[3])
 435                                         tag = FP_EXP_TAG_ZERO;
 436                                 else
 437                                         tag = FP_EXP_TAG_SPECIAL;
 438                                 break;
 439                         default:
 440                                 if (st->significand[3] & 0x8000)
 441                                         tag = FP_EXP_TAG_VALID;
 442                                 else
 443                                         tag = FP_EXP_TAG_SPECIAL;
 444                                 break;
 445                         }
 446                 } else {
 447                         tag = FP_EXP_TAG_EMPTY;
 448                 }
 449                 ret |= tag << (2 * i);
 450         }
 451         return ret;
 452 }
 453
 454 /*
 455  * FXSR floating point environment conversions.
 456  */
 457
 458 void
 459 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 460 {
 461         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 462         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 463         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 464         int i;
 465
 466         env->cwd = fxsave->cwd | 0xffff0000u;
 467         env->swd = fxsave->swd | 0xffff0000u;
 468         env->twd = twd_fxsr_to_i387(fxsave);
 469
 470 #ifdef CONFIG_X86_64
 471         env->fip = fxsave->rip;
 472         env->foo = fxsave->rdp;
 473         /*
 474          * should be actually ds/cs at fpu exception time, but
 475          * that information is not available in 64bit mode.
 476          */
 477         env->fcs = task_pt_regs(tsk)->cs;
 478         if (tsk == current) {
 479                 savesegment(ds, env->fos);
 480         } else {
 481                 env->fos = tsk->thread.ds;
 482         }
 483         env->fos |= 0xffff0000;
 484 #else
 485         env->fip = fxsave->fip;
 486         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 487         env->foo = fxsave->foo;
 488         env->fos = fxsave->fos;
 489 #endif
 490
 491         for (i = 0; i < 8; ++i)
 492                 memcpy(&to[i], &from[i], sizeof(to[0]));
 493 }
 494
 495 void convert_to_fxsr(struct task_struct *tsk,
 496                      const struct user_i387_ia32_struct *env)
 497
 498 {
 499         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 500         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 501         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 502         int i;
 503
 504         fxsave->cwd = env->cwd;
 505         fxsave->swd = env->swd;
 506         fxsave->twd = twd_i387_to_fxsr(env->twd);
 507         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 508 #ifdef CONFIG_X86_64
 509         fxsave->rip = env->fip;
 510         fxsave->rdp = env->foo;
 511         /* cs and ds ignored */
 512 #else
 513         fxsave->fip = env->fip;
 514         fxsave->fcs = (env->fcs & 0xffff);
 515         fxsave->foo = env->foo;
 516         fxsave->fos = env->fos;
 517 #endif
 518
 519         for (i = 0; i < 8; ++i)
 520                 memcpy(&to[i], &from[i], sizeof(from[0]));
 521 }
 522
 523 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 524                unsigned int pos, unsigned int count,
 525                void *kbuf, void __user *ubuf)
 526 {
 527         struct user_i387_ia32_struct env;
 528         int ret;
 529
 530         ret = init_fpu(target);
 531         if (ret)
 532                 return ret;
 533
 534         if (!static_cpu_has(X86_FEATURE_FPU))
 535                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 536
 537         if (!cpu_has_fxsr)
 538                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 539                                            &target->thread.fpu.state->fsave, 0,
 540                                            -1);
 541
 542         sanitize_i387_state(target);
 543
 544         if (kbuf && pos == 0 && count == sizeof(env)) {
 545                 convert_from_fxsr(kbuf, target);
 546                 return 0;
 547         }
 548
 549         convert_from_fxsr(&env, target);
 550
 551         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 552 }
 553
 554 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 555                unsigned int pos, unsigned int count,
 556                const void *kbuf, const void __user *ubuf)
 557 {
 558         struct user_i387_ia32_struct env;
 559         int ret;
 560
 561         ret = init_fpu(target);
 562         if (ret)
 563                 return ret;
 564
 565         sanitize_i387_state(target);
 566
 567         if (!static_cpu_has(X86_FEATURE_FPU))
 568                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 569
 570         if (!cpu_has_fxsr)
 571                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 572                                           &target->thread.fpu.state->fsave, 0,
 573                                           -1);
 574
 575         if (pos > 0 || count < sizeof(env))
 576                 convert_from_fxsr(&env, target);
 577
 578         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 579         if (!ret)
 580                 convert_to_fxsr(target, &env);
 581
 582         /*
 583          * update the header bit in the xsave header, indicating the
 584          * presence of FP.
 585          */
 586         if (cpu_has_xsave)
 587                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 588         return ret;
 589 }
 590
 591 /*
 592  * FPU state for core dumps.
 593  * This is only used for a.out dumps now.
 594  * It is declared generically using elf_fpregset_t (which is
 595  * struct user_i387_struct) but is in fact only used for 32-bit
 596  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 597  */
 598 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 599 {
 600         struct task_struct *tsk = current;
 601         int fpvalid;
 602
 603         fpvalid = !!used_math();
 604         if (fpvalid)
 605                 fpvalid = !fpregs_get(tsk, NULL,
 606                                       0, sizeof(struct user_i387_ia32_struct),
 607                                       fpu, NULL);
 608
 609         return fpvalid;
 610 }
 611 EXPORT_SYMBOL(dump_fpu);
 612
 613 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
 614
 615 static int __init no_387(char *s)
 616 {
 617         setup_clear_cpu_cap(X86_FEATURE_FPU);
 618         return 1;
 619 }
 620
 621 __setup("no387", no_387);
 622
 623 void fpu_detect(struct cpuinfo_x86 *c)
 624 {
 625         unsigned long cr0;
 626         u16 fsw, fcw;
 627
 628         fsw = fcw = 0xffff;
 629
 630         cr0 = read_cr0();
 631         cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
 632         write_cr0(cr0);
 633
 634         asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
 635                      : "+m" (fsw), "+m" (fcw));
 636
 637         if (fsw == 0 && (fcw & 0x103f) == 0x003f)
 638                 set_cpu_cap(c, X86_FEATURE_FPU);
 639         else
 640                 clear_cpu_cap(c, X86_FEATURE_FPU);
 641
 642         /* The final cr0 value is set in fpu_init() */
 643 }