arch/x86/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
   4  *
   5  *    MandrakeSoft S.A.
   6  *    43, rue d'Aboukir
   7  *    75002 Paris - France
   8  *    http://www.linux-mandrake.com/
   9  *    http://www.mandrakesoft.com/
  10  *
  11  *  This library is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU Lesser General Public
  13  *  License as published by the Free Software Foundation; either
  14  *  version 2 of the License, or (at your option) any later version.
  15  *
  16  *  This library is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  Lesser General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU Lesser General Public
  22  *  License along with this library; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  *  Yunhong Jiang <yunhong.jiang@intel.com>
  26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  27  *  Based on Xen 3.1 code.
  28  */
  29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30
  31 #include <linux/kvm_host.h>
  32 #include <linux/kvm.h>
  33 #include <linux/mm.h>
  34 #include <linux/highmem.h>
  35 #include <linux/smp.h>
  36 #include <linux/hrtimer.h>
  37 #include <linux/io.h>
  38 #include <linux/slab.h>
  39 #include <linux/export.h>
  40 #include <linux/nospec.h>
  41 #include <asm/processor.h>
  42 #include <asm/page.h>
  43 #include <asm/current.h>
  44 #include <trace/events/kvm.h>
  45
  46 #include "ioapic.h"
  47 #include "lapic.h"
  48 #include "irq.h"
  49
  50 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
  51                 bool line_status);
  52
  53 static void kvm_ioapic_update_eoi_one(struct kvm_vcpu *vcpu,
  54                                       struct kvm_ioapic *ioapic,
  55                                       int trigger_mode,
  56                                       int pin);
  57
  58 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic)
  59 {
  60         unsigned long result = 0;
  61
  62         switch (ioapic->ioregsel) {
  63         case IOAPIC_REG_VERSION:
  64                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  65                           | (IOAPIC_VERSION_ID & 0xff));
  66                 break;
  67
  68         case IOAPIC_REG_APIC_ID:
  69         case IOAPIC_REG_ARB_ID:
  70                 result = ((ioapic->id & 0xf) << 24);
  71                 break;
  72
  73         default:
  74                 {
  75                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  76                         u64 redir_content = ~0ULL;
  77
  78                         if (redir_index < IOAPIC_NUM_PINS) {
  79                                 u32 index = array_index_nospec(
  80                                         redir_index, IOAPIC_NUM_PINS);
  81
  82                                 redir_content = ioapic->redirtbl[index].bits;
  83                         }
  84
  85                         result = (ioapic->ioregsel & 0x1) ?
  86                             (redir_content >> 32) & 0xffffffff :
  87                             redir_content & 0xffffffff;
  88                         break;
  89                 }
  90         }
  91
  92         return result;
  93 }
  94
  95 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
  96 {
  97         ioapic->rtc_status.pending_eoi = 0;
  98         bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPU_IDS);
  99 }
 100
 101 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
 102
 103 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
 104 {
 105         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
 106                 kvm_rtc_eoi_tracking_restore_all(ioapic);
 107 }
 108
 109 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 110 {
 111         bool new_val, old_val;
 112         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 113         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 114         union kvm_ioapic_redirect_entry *e;
 115
 116         e = &ioapic->redirtbl[RTC_GSI];
 117         if (!kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT,
 118                                  e->fields.dest_id,
 119                                  kvm_lapic_irq_dest_mode(!!e->fields.dest_mode)))
 120                 return;
 121
 122         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
 123         old_val = test_bit(vcpu->vcpu_id, dest_map->map);
 124
 125         if (new_val == old_val)
 126                 return;
 127
 128         if (new_val) {
 129                 __set_bit(vcpu->vcpu_id, dest_map->map);
 130                 dest_map->vectors[vcpu->vcpu_id] = e->fields.vector;
 131                 ioapic->rtc_status.pending_eoi++;
 132         } else {
 133                 __clear_bit(vcpu->vcpu_id, dest_map->map);
 134                 ioapic->rtc_status.pending_eoi--;
 135                 rtc_status_pending_eoi_check_valid(ioapic);
 136         }
 137 }
 138
 139 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 140 {
 141         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 142
 143         spin_lock(&ioapic->lock);
 144         __rtc_irq_eoi_tracking_restore_one(vcpu);
 145         spin_unlock(&ioapic->lock);
 146 }
 147
 148 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 149 {
 150         struct kvm_vcpu *vcpu;
 151         unsigned long i;
 152
 153         if (RTC_GSI >= IOAPIC_NUM_PINS)
 154                 return;
 155
 156         rtc_irq_eoi_tracking_reset(ioapic);
 157         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
 158             __rtc_irq_eoi_tracking_restore_one(vcpu);
 159 }
 160
 161 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu,
 162                         int vector)
 163 {
 164         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 165
 166         /* RTC special handling */
 167         if (test_bit(vcpu->vcpu_id, dest_map->map) &&
 168             (vector == dest_map->vectors[vcpu->vcpu_id]) &&
 169             (test_and_clear_bit(vcpu->vcpu_id,
 170                                 ioapic->rtc_status.dest_map.map))) {
 171                 --ioapic->rtc_status.pending_eoi;
 172                 rtc_status_pending_eoi_check_valid(ioapic);
 173         }
 174 }
 175
 176 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
 177 {
 178         if (ioapic->rtc_status.pending_eoi > 0)
 179                 return true; /* coalesced */
 180
 181         return false;
 182 }
 183
 184 static void ioapic_lazy_update_eoi(struct kvm_ioapic *ioapic, int irq)
 185 {
 186         unsigned long i;
 187         struct kvm_vcpu *vcpu;
 188         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 189
 190         kvm_for_each_vcpu(i, vcpu, ioapic->kvm) {
 191                 if (!kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT,
 192                                          entry->fields.dest_id,
 193                                          entry->fields.dest_mode) ||
 194                     kvm_apic_pending_eoi(vcpu, entry->fields.vector))
 195                         continue;
 196
 197                 /*
 198                  * If no longer has pending EOI in LAPICs, update
 199                  * EOI for this vector.
 200                  */
 201                 rtc_irq_eoi(ioapic, vcpu, entry->fields.vector);
 202                 break;
 203         }
 204 }
 205
 206 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
 207                 int irq_level, bool line_status)
 208 {
 209         union kvm_ioapic_redirect_entry entry;
 210         u32 mask = 1 << irq;
 211         u32 old_irr;
 212         int edge, ret;
 213
 214         entry = ioapic->redirtbl[irq];
 215         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
 216
 217         if (!irq_level) {
 218                 ioapic->irr &= ~mask;
 219                 ret = 1;
 220                 goto out;
 221         }
 222
 223         /*
 224          * AMD SVM AVIC accelerate EOI write iff the interrupt is edge
 225          * triggered, in which case the in-kernel IOAPIC will not be able
 226          * to receive the EOI.  In this case, we do a lazy update of the
 227          * pending EOI when trying to set IOAPIC irq.
 228          */
 229         if (edge && kvm_apicv_activated(ioapic->kvm))
 230                 ioapic_lazy_update_eoi(ioapic, irq);
 231
 232         /*
 233          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
 234          * this only happens if a previous edge has not been delivered due
 235          * to masking.  For level interrupts, the remote_irr field tells
 236          * us if the interrupt is waiting for an EOI.
 237          *
 238          * RTC is special: it is edge-triggered, but userspace likes to know
 239          * if it has been already ack-ed via EOI because coalesced RTC
 240          * interrupts lead to time drift in Windows guests.  So we track
 241          * EOI manually for the RTC interrupt.
 242          */
 243         if (irq == RTC_GSI && line_status &&
 244                 rtc_irq_check_coalesced(ioapic)) {
 245                 ret = 0;
 246                 goto out;
 247         }
 248
 249         old_irr = ioapic->irr;
 250         ioapic->irr |= mask;
 251         if (edge) {
 252                 ioapic->irr_delivered &= ~mask;
 253                 if (old_irr == ioapic->irr) {
 254                         ret = 0;
 255                         goto out;
 256                 }
 257         }
 258
 259         ret = ioapic_service(ioapic, irq, line_status);
 260
 261 out:
 262         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
 263         return ret;
 264 }
 265
 266 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
 267 {
 268         u32 idx;
 269
 270         rtc_irq_eoi_tracking_reset(ioapic);
 271         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
 272                 ioapic_set_irq(ioapic, idx, 1, true);
 273
 274         kvm_rtc_eoi_tracking_restore_all(ioapic);
 275 }
 276
 277
 278 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
 279 {
 280         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 281         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 282         union kvm_ioapic_redirect_entry *e;
 283         int index;
 284
 285         spin_lock(&ioapic->lock);
 286
 287         /* Make sure we see any missing RTC EOI */
 288         if (test_bit(vcpu->vcpu_id, dest_map->map))
 289                 __set_bit(dest_map->vectors[vcpu->vcpu_id],
 290                           ioapic_handled_vectors);
 291
 292         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
 293                 e = &ioapic->redirtbl[index];
 294                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
 295                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
 296                     index == RTC_GSI) {
 297                         u16 dm = kvm_lapic_irq_dest_mode(!!e->fields.dest_mode);
 298
 299                         if (kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT,
 300                                                 e->fields.dest_id, dm) ||
 301                             kvm_apic_pending_eoi(vcpu, e->fields.vector))
 302                                 __set_bit(e->fields.vector,
 303                                           ioapic_handled_vectors);
 304                 }
 305         }
 306         spin_unlock(&ioapic->lock);
 307 }
 308
 309 void kvm_arch_post_irq_ack_notifier_list_update(struct kvm *kvm)
 310 {
 311         if (!ioapic_in_kernel(kvm))
 312                 return;
 313         kvm_make_scan_ioapic_request(kvm);
 314 }
 315
 316 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 317 {
 318         unsigned index;
 319         bool mask_before, mask_after;
 320         union kvm_ioapic_redirect_entry *e;
 321         int old_remote_irr, old_delivery_status, old_dest_id, old_dest_mode;
 322         DECLARE_BITMAP(vcpu_bitmap, KVM_MAX_VCPUS);
 323
 324         switch (ioapic->ioregsel) {
 325         case IOAPIC_REG_VERSION:
 326                 /* Writes are ignored. */
 327                 break;
 328
 329         case IOAPIC_REG_APIC_ID:
 330                 ioapic->id = (val >> 24) & 0xf;
 331                 break;
 332
 333         case IOAPIC_REG_ARB_ID:
 334                 break;
 335
 336         default:
 337                 index = (ioapic->ioregsel - 0x10) >> 1;
 338
 339                 if (index >= IOAPIC_NUM_PINS)
 340                         return;
 341                 index = array_index_nospec(index, IOAPIC_NUM_PINS);
 342                 e = &ioapic->redirtbl[index];
 343                 mask_before = e->fields.mask;
 344                 /* Preserve read-only fields */
 345                 old_remote_irr = e->fields.remote_irr;
 346                 old_delivery_status = e->fields.delivery_status;
 347                 old_dest_id = e->fields.dest_id;
 348                 old_dest_mode = e->fields.dest_mode;
 349                 if (ioapic->ioregsel & 1) {
 350                         e->bits &= 0xffffffff;
 351                         e->bits |= (u64) val << 32;
 352                 } else {
 353                         e->bits &= ~0xffffffffULL;
 354                         e->bits |= (u32) val;
 355                 }
 356                 e->fields.remote_irr = old_remote_irr;
 357                 e->fields.delivery_status = old_delivery_status;
 358
 359                 /*
 360                  * Some OSes (Linux, Xen) assume that Remote IRR bit will
 361                  * be cleared by IOAPIC hardware when the entry is configured
 362                  * as edge-triggered. This behavior is used to simulate an
 363                  * explicit EOI on IOAPICs that don't have the EOI register.
 364                  */
 365                 if (e->fields.trig_mode == IOAPIC_EDGE_TRIG)
 366                         e->fields.remote_irr = 0;
 367
 368                 mask_after = e->fields.mask;
 369                 if (mask_before != mask_after)
 370                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
 371                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
 372                     && ioapic->irr & (1 << index))
 373                         ioapic_service(ioapic, index, false);
 374                 if (e->fields.delivery_mode == APIC_DM_FIXED) {
 375                         struct kvm_lapic_irq irq;
 376
 377                         irq.vector = e->fields.vector;
 378                         irq.delivery_mode = e->fields.delivery_mode << 8;
 379                         irq.dest_mode =
 380                             kvm_lapic_irq_dest_mode(!!e->fields.dest_mode);
 381                         irq.level = false;
 382                         irq.trig_mode = e->fields.trig_mode;
 383                         irq.shorthand = APIC_DEST_NOSHORT;
 384                         irq.dest_id = e->fields.dest_id;
 385                         irq.msi_redir_hint = false;
 386                         bitmap_zero(vcpu_bitmap, KVM_MAX_VCPUS);
 387                         kvm_bitmap_or_dest_vcpus(ioapic->kvm, &irq,
 388                                                  vcpu_bitmap);
 389                         if (old_dest_mode != e->fields.dest_mode ||
 390                             old_dest_id != e->fields.dest_id) {
 391                                 /*
 392                                  * Update vcpu_bitmap with vcpus specified in
 393                                  * the previous request as well. This is done to
 394                                  * keep ioapic_handled_vectors synchronized.
 395                                  */
 396                                 irq.dest_id = old_dest_id;
 397                                 irq.dest_mode =
 398                                     kvm_lapic_irq_dest_mode(
 399                                         !!e->fields.dest_mode);
 400                                 kvm_bitmap_or_dest_vcpus(ioapic->kvm, &irq,
 401                                                          vcpu_bitmap);
 402                         }
 403                         kvm_make_scan_ioapic_request_mask(ioapic->kvm,
 404                                                           vcpu_bitmap);
 405                 } else {
 406                         kvm_make_scan_ioapic_request(ioapic->kvm);
 407                 }
 408                 break;
 409         }
 410 }
 411
 412 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
 413 {
 414         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 415         struct kvm_lapic_irq irqe;
 416         int ret;
 417
 418         if (entry->fields.mask ||
 419             (entry->fields.trig_mode == IOAPIC_LEVEL_TRIG &&
 420             entry->fields.remote_irr))
 421                 return -1;
 422
 423         irqe.dest_id = entry->fields.dest_id;
 424         irqe.vector = entry->fields.vector;
 425         irqe.dest_mode = kvm_lapic_irq_dest_mode(!!entry->fields.dest_mode);
 426         irqe.trig_mode = entry->fields.trig_mode;
 427         irqe.delivery_mode = entry->fields.delivery_mode << 8;
 428         irqe.level = 1;
 429         irqe.shorthand = APIC_DEST_NOSHORT;
 430         irqe.msi_redir_hint = false;
 431
 432         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
 433                 ioapic->irr_delivered |= 1 << irq;
 434
 435         if (irq == RTC_GSI && line_status) {
 436                 /*
 437                  * pending_eoi cannot ever become negative (see
 438                  * rtc_status_pending_eoi_check_valid) and the caller
 439                  * ensures that it is only called if it is >= zero, namely
 440                  * if rtc_irq_check_coalesced returns false).
 441                  */
 442                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
 443                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
 444                                                &ioapic->rtc_status.dest_map);
 445                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
 446         } else
 447                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
 448
 449         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
 450                 entry->fields.remote_irr = 1;
 451
 452         return ret;
 453 }
 454
 455 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
 456                        int level, bool line_status)
 457 {
 458         int ret, irq_level;
 459
 460         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
 461
 462         spin_lock(&ioapic->lock);
 463         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
 464                                          irq_source_id, level);
 465         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
 466
 467         spin_unlock(&ioapic->lock);
 468
 469         return ret;
 470 }
 471
 472 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
 473 {
 474         int i;
 475
 476         spin_lock(&ioapic->lock);
 477         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 478                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
 479         spin_unlock(&ioapic->lock);
 480 }
 481
 482 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
 483 {
 484         int i;
 485         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
 486                                                  eoi_inject.work);
 487         spin_lock(&ioapic->lock);
 488         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 489                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 490
 491                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
 492                         continue;
 493
 494                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
 495                         ioapic_service(ioapic, i, false);
 496         }
 497         spin_unlock(&ioapic->lock);
 498 }
 499
 500 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
 501 static void kvm_ioapic_update_eoi_one(struct kvm_vcpu *vcpu,
 502                                       struct kvm_ioapic *ioapic,
 503                                       int trigger_mode,
 504                                       int pin)
 505 {
 506         struct kvm_lapic *apic = vcpu->arch.apic;
 507         union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[pin];
 508
 509         /*
 510          * We are dropping lock while calling ack notifiers because ack
 511          * notifier callbacks for assigned devices call into IOAPIC
 512          * recursively. Since remote_irr is cleared only after call
 513          * to notifiers if the same vector will be delivered while lock
 514          * is dropped it will be put into irr and will be delivered
 515          * after ack notifier returns.
 516          */
 517         spin_unlock(&ioapic->lock);
 518         kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, pin);
 519         spin_lock(&ioapic->lock);
 520
 521         if (trigger_mode != IOAPIC_LEVEL_TRIG ||
 522             kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
 523                 return;
 524
 525         ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 526         ent->fields.remote_irr = 0;
 527         if (!ent->fields.mask && (ioapic->irr & (1 << pin))) {
 528                 ++ioapic->irq_eoi[pin];
 529                 if (ioapic->irq_eoi[pin] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
 530                         /*
 531                          * Real hardware does not deliver the interrupt
 532                          * immediately during eoi broadcast, and this
 533                          * lets a buggy guest make slow progress
 534                          * even if it does not correctly handle a
 535                          * level-triggered interrupt.  Emulate this
 536                          * behavior if we detect an interrupt storm.
 537                          */
 538                         schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
 539                         ioapic->irq_eoi[pin] = 0;
 540                         trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
 541                 } else {
 542                         ioapic_service(ioapic, pin, false);
 543                 }
 544         } else {
 545                 ioapic->irq_eoi[pin] = 0;
 546         }
 547 }
 548
 549 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
 550 {
 551         int i;
 552         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 553
 554         spin_lock(&ioapic->lock);
 555         rtc_irq_eoi(ioapic, vcpu, vector);
 556         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 557                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 558
 559                 if (ent->fields.vector != vector)
 560                         continue;
 561                 kvm_ioapic_update_eoi_one(vcpu, ioapic, trigger_mode, i);
 562         }
 563         spin_unlock(&ioapic->lock);
 564 }
 565
 566 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
 567 {
 568         return container_of(dev, struct kvm_ioapic, dev);
 569 }
 570
 571 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
 572 {
 573         return ((addr >= ioapic->base_address &&
 574                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 575 }
 576
 577 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 578                                 gpa_t addr, int len, void *val)
 579 {
 580         struct kvm_ioapic *ioapic = to_ioapic(this);
 581         u32 result;
 582         if (!ioapic_in_range(ioapic, addr))
 583                 return -EOPNOTSUPP;
 584
 585         ASSERT(!(addr & 0xf));  /* check alignment */
 586
 587         addr &= 0xff;
 588         spin_lock(&ioapic->lock);
 589         switch (addr) {
 590         case IOAPIC_REG_SELECT:
 591                 result = ioapic->ioregsel;
 592                 break;
 593
 594         case IOAPIC_REG_WINDOW:
 595                 result = ioapic_read_indirect(ioapic);
 596                 break;
 597
 598         default:
 599                 result = 0;
 600                 break;
 601         }
 602         spin_unlock(&ioapic->lock);
 603
 604         switch (len) {
 605         case 8:
 606                 *(u64 *) val = result;
 607                 break;
 608         case 1:
 609         case 2:
 610         case 4:
 611                 memcpy(val, (char *)&result, len);
 612                 break;
 613         default:
 614                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 615         }
 616         return 0;
 617 }
 618
 619 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 620                                  gpa_t addr, int len, const void *val)
 621 {
 622         struct kvm_ioapic *ioapic = to_ioapic(this);
 623         u32 data;
 624         if (!ioapic_in_range(ioapic, addr))
 625                 return -EOPNOTSUPP;
 626
 627         ASSERT(!(addr & 0xf));  /* check alignment */
 628
 629         switch (len) {
 630         case 8:
 631         case 4:
 632                 data = *(u32 *) val;
 633                 break;
 634         case 2:
 635                 data = *(u16 *) val;
 636                 break;
 637         case 1:
 638                 data = *(u8  *) val;
 639                 break;
 640         default:
 641                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 642                 return 0;
 643         }
 644
 645         addr &= 0xff;
 646         spin_lock(&ioapic->lock);
 647         switch (addr) {
 648         case IOAPIC_REG_SELECT:
 649                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
 650                 break;
 651
 652         case IOAPIC_REG_WINDOW:
 653                 ioapic_write_indirect(ioapic, data);
 654                 break;
 655
 656         default:
 657                 break;
 658         }
 659         spin_unlock(&ioapic->lock);
 660         return 0;
 661 }
 662
 663 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 664 {
 665         int i;
 666
 667         cancel_delayed_work_sync(&ioapic->eoi_inject);
 668         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 669                 ioapic->redirtbl[i].fields.mask = 1;
 670         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 671         ioapic->ioregsel = 0;
 672         ioapic->irr = 0;
 673         ioapic->irr_delivered = 0;
 674         ioapic->id = 0;
 675         memset(ioapic->irq_eoi, 0x00, sizeof(ioapic->irq_eoi));
 676         rtc_irq_eoi_tracking_reset(ioapic);
 677 }
 678
 679 static const struct kvm_io_device_ops ioapic_mmio_ops = {
 680         .read     = ioapic_mmio_read,
 681         .write    = ioapic_mmio_write,
 682 };
 683
 684 int kvm_ioapic_init(struct kvm *kvm)
 685 {
 686         struct kvm_ioapic *ioapic;
 687         int ret;
 688
 689         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL_ACCOUNT);
 690         if (!ioapic)
 691                 return -ENOMEM;
 692         spin_lock_init(&ioapic->lock);
 693         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
 694         kvm->arch.vioapic = ioapic;
 695         kvm_ioapic_reset(ioapic);
 696         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
 697         ioapic->kvm = kvm;
 698         mutex_lock(&kvm->slots_lock);
 699         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
 700                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
 701         mutex_unlock(&kvm->slots_lock);
 702         if (ret < 0) {
 703                 kvm->arch.vioapic = NULL;
 704                 kfree(ioapic);
 705         }
 706
 707         return ret;
 708 }
 709
 710 void kvm_ioapic_destroy(struct kvm *kvm)
 711 {
 712         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 713
 714         if (!ioapic)
 715                 return;
 716
 717         cancel_delayed_work_sync(&ioapic->eoi_inject);
 718         mutex_lock(&kvm->slots_lock);
 719         kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
 720         mutex_unlock(&kvm->slots_lock);
 721         kvm->arch.vioapic = NULL;
 722         kfree(ioapic);
 723 }
 724
 725 void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 726 {
 727         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 728
 729         spin_lock(&ioapic->lock);
 730         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
 731         state->irr &= ~ioapic->irr_delivered;
 732         spin_unlock(&ioapic->lock);
 733 }
 734
 735 void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 736 {
 737         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 738
 739         spin_lock(&ioapic->lock);
 740         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
 741         ioapic->irr = 0;
 742         ioapic->irr_delivered = 0;
 743         kvm_make_scan_ioapic_request(kvm);
 744         kvm_ioapic_inject_all(ioapic, state->irr);
 745         spin_unlock(&ioapic->lock);
 746 }