arch/x86/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
   4  *
   5  *    MandrakeSoft S.A.
   6  *    43, rue d'Aboukir
   7  *    75002 Paris - France
   8  *    http://www.linux-mandrake.com/
   9  *    http://www.mandrakesoft.com/
  10  *
  11  *  This library is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU Lesser General Public
  13  *  License as published by the Free Software Foundation; either
  14  *  version 2 of the License, or (at your option) any later version.
  15  *
  16  *  This library is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  Lesser General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU Lesser General Public
  22  *  License along with this library; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  *  Yunhong Jiang <yunhong.jiang@intel.com>
  26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  27  *  Based on Xen 3.1 code.
  28  */
  29
  30 #include <linux/kvm_host.h>
  31 #include <linux/kvm.h>
  32 #include <linux/mm.h>
  33 #include <linux/highmem.h>
  34 #include <linux/smp.h>
  35 #include <linux/hrtimer.h>
  36 #include <linux/io.h>
  37 #include <linux/slab.h>
  38 #include <linux/export.h>
  39 #include <asm/processor.h>
  40 #include <asm/page.h>
  41 #include <asm/current.h>
  42 #include <trace/events/kvm.h>
  43
  44 #include "ioapic.h"
  45 #include "lapic.h"
  46 #include "irq.h"
  47
  48 #if 0
  49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
  50 #else
  51 #define ioapic_debug(fmt, arg...)
  52 #endif
  53 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
  54                 bool line_status);
  55
  56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
  57                                           unsigned long addr,
  58                                           unsigned long length)
  59 {
  60         unsigned long result = 0;
  61
  62         switch (ioapic->ioregsel) {
  63         case IOAPIC_REG_VERSION:
  64                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  65                           | (IOAPIC_VERSION_ID & 0xff));
  66                 break;
  67
  68         case IOAPIC_REG_APIC_ID:
  69         case IOAPIC_REG_ARB_ID:
  70                 result = ((ioapic->id & 0xf) << 24);
  71                 break;
  72
  73         default:
  74                 {
  75                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  76                         u64 redir_content;
  77
  78                         if (redir_index < IOAPIC_NUM_PINS)
  79                                 redir_content =
  80                                         ioapic->redirtbl[redir_index].bits;
  81                         else
  82                                 redir_content = ~0ULL;
  83
  84                         result = (ioapic->ioregsel & 0x1) ?
  85                             (redir_content >> 32) & 0xffffffff :
  86                             redir_content & 0xffffffff;
  87                         break;
  88                 }
  89         }
  90
  91         return result;
  92 }
  93
  94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
  95 {
  96         ioapic->rtc_status.pending_eoi = 0;
  97         bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPUS);
  98 }
  99
 100 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
 101
 102 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
 103 {
 104         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
 105                 kvm_rtc_eoi_tracking_restore_all(ioapic);
 106 }
 107
 108 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 109 {
 110         bool new_val, old_val;
 111         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 112         union kvm_ioapic_redirect_entry *e;
 113
 114         e = &ioapic->redirtbl[RTC_GSI];
 115         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
 116                                 e->fields.dest_mode))
 117                 return;
 118
 119         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
 120         old_val = test_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map.map);
 121
 122         if (new_val == old_val)
 123                 return;
 124
 125         if (new_val) {
 126                 __set_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map.map);
 127                 ioapic->rtc_status.pending_eoi++;
 128         } else {
 129                 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map.map);
 130                 ioapic->rtc_status.pending_eoi--;
 131                 rtc_status_pending_eoi_check_valid(ioapic);
 132         }
 133 }
 134
 135 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 136 {
 137         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 138
 139         spin_lock(&ioapic->lock);
 140         __rtc_irq_eoi_tracking_restore_one(vcpu);
 141         spin_unlock(&ioapic->lock);
 142 }
 143
 144 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 145 {
 146         struct kvm_vcpu *vcpu;
 147         int i;
 148
 149         if (RTC_GSI >= IOAPIC_NUM_PINS)
 150                 return;
 151
 152         rtc_irq_eoi_tracking_reset(ioapic);
 153         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
 154             __rtc_irq_eoi_tracking_restore_one(vcpu);
 155 }
 156
 157 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
 158 {
 159         if (test_and_clear_bit(vcpu->vcpu_id,
 160                                ioapic->rtc_status.dest_map.map)) {
 161                 --ioapic->rtc_status.pending_eoi;
 162                 rtc_status_pending_eoi_check_valid(ioapic);
 163         }
 164 }
 165
 166 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
 167 {
 168         if (ioapic->rtc_status.pending_eoi > 0)
 169                 return true; /* coalesced */
 170
 171         return false;
 172 }
 173
 174 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
 175                 int irq_level, bool line_status)
 176 {
 177         union kvm_ioapic_redirect_entry entry;
 178         u32 mask = 1 << irq;
 179         u32 old_irr;
 180         int edge, ret;
 181
 182         entry = ioapic->redirtbl[irq];
 183         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
 184
 185         if (!irq_level) {
 186                 ioapic->irr &= ~mask;
 187                 ret = 1;
 188                 goto out;
 189         }
 190
 191         /*
 192          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
 193          * this only happens if a previous edge has not been delivered due
 194          * do masking.  For level interrupts, the remote_irr field tells
 195          * us if the interrupt is waiting for an EOI.
 196          *
 197          * RTC is special: it is edge-triggered, but userspace likes to know
 198          * if it has been already ack-ed via EOI because coalesced RTC
 199          * interrupts lead to time drift in Windows guests.  So we track
 200          * EOI manually for the RTC interrupt.
 201          */
 202         if (irq == RTC_GSI && line_status &&
 203                 rtc_irq_check_coalesced(ioapic)) {
 204                 ret = 0;
 205                 goto out;
 206         }
 207
 208         old_irr = ioapic->irr;
 209         ioapic->irr |= mask;
 210         if (edge)
 211                 ioapic->irr_delivered &= ~mask;
 212         if ((edge && old_irr == ioapic->irr) ||
 213             (!edge && entry.fields.remote_irr)) {
 214                 ret = 0;
 215                 goto out;
 216         }
 217
 218         ret = ioapic_service(ioapic, irq, line_status);
 219
 220 out:
 221         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
 222         return ret;
 223 }
 224
 225 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
 226 {
 227         u32 idx;
 228
 229         rtc_irq_eoi_tracking_reset(ioapic);
 230         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
 231                 ioapic_set_irq(ioapic, idx, 1, true);
 232
 233         kvm_rtc_eoi_tracking_restore_all(ioapic);
 234 }
 235
 236
 237 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
 238 {
 239         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 240         union kvm_ioapic_redirect_entry *e;
 241         int index;
 242
 243         spin_lock(&ioapic->lock);
 244         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
 245                 e = &ioapic->redirtbl[index];
 246                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
 247                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
 248                     index == RTC_GSI) {
 249                         if (kvm_apic_match_dest(vcpu, NULL, 0,
 250                                      e->fields.dest_id, e->fields.dest_mode) ||
 251                             (e->fields.trig_mode == IOAPIC_EDGE_TRIG &&
 252                              kvm_apic_pending_eoi(vcpu, e->fields.vector)))
 253                                 __set_bit(e->fields.vector,
 254                                           ioapic_handled_vectors);
 255                 }
 256         }
 257         spin_unlock(&ioapic->lock);
 258 }
 259
 260 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
 261 {
 262         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 263
 264         if (!ioapic)
 265                 return;
 266         kvm_make_scan_ioapic_request(kvm);
 267 }
 268
 269 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 270 {
 271         unsigned index;
 272         bool mask_before, mask_after;
 273         union kvm_ioapic_redirect_entry *e;
 274
 275         switch (ioapic->ioregsel) {
 276         case IOAPIC_REG_VERSION:
 277                 /* Writes are ignored. */
 278                 break;
 279
 280         case IOAPIC_REG_APIC_ID:
 281                 ioapic->id = (val >> 24) & 0xf;
 282                 break;
 283
 284         case IOAPIC_REG_ARB_ID:
 285                 break;
 286
 287         default:
 288                 index = (ioapic->ioregsel - 0x10) >> 1;
 289
 290                 ioapic_debug("change redir index %x val %x\n", index, val);
 291                 if (index >= IOAPIC_NUM_PINS)
 292                         return;
 293                 e = &ioapic->redirtbl[index];
 294                 mask_before = e->fields.mask;
 295                 if (ioapic->ioregsel & 1) {
 296                         e->bits &= 0xffffffff;
 297                         e->bits |= (u64) val << 32;
 298                 } else {
 299                         e->bits &= ~0xffffffffULL;
 300                         e->bits |= (u32) val;
 301                         e->fields.remote_irr = 0;
 302                 }
 303                 mask_after = e->fields.mask;
 304                 if (mask_before != mask_after)
 305                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
 306                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
 307                     && ioapic->irr & (1 << index))
 308                         ioapic_service(ioapic, index, false);
 309                 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
 310                 break;
 311         }
 312 }
 313
 314 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
 315 {
 316         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 317         struct kvm_lapic_irq irqe;
 318         int ret;
 319
 320         if (entry->fields.mask)
 321                 return -1;
 322
 323         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
 324                      "vector=%x trig_mode=%x\n",
 325                      entry->fields.dest_id, entry->fields.dest_mode,
 326                      entry->fields.delivery_mode, entry->fields.vector,
 327                      entry->fields.trig_mode);
 328
 329         irqe.dest_id = entry->fields.dest_id;
 330         irqe.vector = entry->fields.vector;
 331         irqe.dest_mode = entry->fields.dest_mode;
 332         irqe.trig_mode = entry->fields.trig_mode;
 333         irqe.delivery_mode = entry->fields.delivery_mode << 8;
 334         irqe.level = 1;
 335         irqe.shorthand = 0;
 336         irqe.msi_redir_hint = false;
 337
 338         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
 339                 ioapic->irr_delivered |= 1 << irq;
 340
 341         if (irq == RTC_GSI && line_status) {
 342                 /*
 343                  * pending_eoi cannot ever become negative (see
 344                  * rtc_status_pending_eoi_check_valid) and the caller
 345                  * ensures that it is only called if it is >= zero, namely
 346                  * if rtc_irq_check_coalesced returns false).
 347                  */
 348                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
 349                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
 350                                                &ioapic->rtc_status.dest_map);
 351                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
 352         } else
 353                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
 354
 355         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
 356                 entry->fields.remote_irr = 1;
 357
 358         return ret;
 359 }
 360
 361 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
 362                        int level, bool line_status)
 363 {
 364         int ret, irq_level;
 365
 366         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
 367
 368         spin_lock(&ioapic->lock);
 369         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
 370                                          irq_source_id, level);
 371         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
 372
 373         spin_unlock(&ioapic->lock);
 374
 375         return ret;
 376 }
 377
 378 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
 379 {
 380         int i;
 381
 382         spin_lock(&ioapic->lock);
 383         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 384                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
 385         spin_unlock(&ioapic->lock);
 386 }
 387
 388 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
 389 {
 390         int i;
 391         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
 392                                                  eoi_inject.work);
 393         spin_lock(&ioapic->lock);
 394         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 395                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 396
 397                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
 398                         continue;
 399
 400                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
 401                         ioapic_service(ioapic, i, false);
 402         }
 403         spin_unlock(&ioapic->lock);
 404 }
 405
 406 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
 407
 408 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
 409                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
 410 {
 411         int i;
 412         struct kvm_lapic *apic = vcpu->arch.apic;
 413
 414         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 415                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 416
 417                 if (ent->fields.vector != vector)
 418                         continue;
 419
 420                 if (i == RTC_GSI)
 421                         rtc_irq_eoi(ioapic, vcpu);
 422                 /*
 423                  * We are dropping lock while calling ack notifiers because ack
 424                  * notifier callbacks for assigned devices call into IOAPIC
 425                  * recursively. Since remote_irr is cleared only after call
 426                  * to notifiers if the same vector will be delivered while lock
 427                  * is dropped it will be put into irr and will be delivered
 428                  * after ack notifier returns.
 429                  */
 430                 spin_unlock(&ioapic->lock);
 431                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
 432                 spin_lock(&ioapic->lock);
 433
 434                 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
 435                     kvm_apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
 436                         continue;
 437
 438                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 439                 ent->fields.remote_irr = 0;
 440                 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
 441                         ++ioapic->irq_eoi[i];
 442                         if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
 443                                 /*
 444                                  * Real hardware does not deliver the interrupt
 445                                  * immediately during eoi broadcast, and this
 446                                  * lets a buggy guest make slow progress
 447                                  * even if it does not correctly handle a
 448                                  * level-triggered interrupt.  Emulate this
 449                                  * behavior if we detect an interrupt storm.
 450                                  */
 451                                 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
 452                                 ioapic->irq_eoi[i] = 0;
 453                                 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
 454                         } else {
 455                                 ioapic_service(ioapic, i, false);
 456                         }
 457                 } else {
 458                         ioapic->irq_eoi[i] = 0;
 459                 }
 460         }
 461 }
 462
 463 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
 464 {
 465         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 466
 467         spin_lock(&ioapic->lock);
 468         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
 469         spin_unlock(&ioapic->lock);
 470 }
 471
 472 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
 473 {
 474         return container_of(dev, struct kvm_ioapic, dev);
 475 }
 476
 477 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
 478 {
 479         return ((addr >= ioapic->base_address &&
 480                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 481 }
 482
 483 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 484                                 gpa_t addr, int len, void *val)
 485 {
 486         struct kvm_ioapic *ioapic = to_ioapic(this);
 487         u32 result;
 488         if (!ioapic_in_range(ioapic, addr))
 489                 return -EOPNOTSUPP;
 490
 491         ioapic_debug("addr %lx\n", (unsigned long)addr);
 492         ASSERT(!(addr & 0xf));  /* check alignment */
 493
 494         addr &= 0xff;
 495         spin_lock(&ioapic->lock);
 496         switch (addr) {
 497         case IOAPIC_REG_SELECT:
 498                 result = ioapic->ioregsel;
 499                 break;
 500
 501         case IOAPIC_REG_WINDOW:
 502                 result = ioapic_read_indirect(ioapic, addr, len);
 503                 break;
 504
 505         default:
 506                 result = 0;
 507                 break;
 508         }
 509         spin_unlock(&ioapic->lock);
 510
 511         switch (len) {
 512         case 8:
 513                 *(u64 *) val = result;
 514                 break;
 515         case 1:
 516         case 2:
 517         case 4:
 518                 memcpy(val, (char *)&result, len);
 519                 break;
 520         default:
 521                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 522         }
 523         return 0;
 524 }
 525
 526 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 527                                  gpa_t addr, int len, const void *val)
 528 {
 529         struct kvm_ioapic *ioapic = to_ioapic(this);
 530         u32 data;
 531         if (!ioapic_in_range(ioapic, addr))
 532                 return -EOPNOTSUPP;
 533
 534         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
 535                      (void*)addr, len, val);
 536         ASSERT(!(addr & 0xf));  /* check alignment */
 537
 538         switch (len) {
 539         case 8:
 540         case 4:
 541                 data = *(u32 *) val;
 542                 break;
 543         case 2:
 544                 data = *(u16 *) val;
 545                 break;
 546         case 1:
 547                 data = *(u8  *) val;
 548                 break;
 549         default:
 550                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 551                 return 0;
 552         }
 553
 554         addr &= 0xff;
 555         spin_lock(&ioapic->lock);
 556         switch (addr) {
 557         case IOAPIC_REG_SELECT:
 558                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
 559                 break;
 560
 561         case IOAPIC_REG_WINDOW:
 562                 ioapic_write_indirect(ioapic, data);
 563                 break;
 564
 565         default:
 566                 break;
 567         }
 568         spin_unlock(&ioapic->lock);
 569         return 0;
 570 }
 571
 572 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 573 {
 574         int i;
 575
 576         cancel_delayed_work_sync(&ioapic->eoi_inject);
 577         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 578                 ioapic->redirtbl[i].fields.mask = 1;
 579         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 580         ioapic->ioregsel = 0;
 581         ioapic->irr = 0;
 582         ioapic->irr_delivered = 0;
 583         ioapic->id = 0;
 584         memset(ioapic->irq_eoi, 0x00, IOAPIC_NUM_PINS);
 585         rtc_irq_eoi_tracking_reset(ioapic);
 586 }
 587
 588 static const struct kvm_io_device_ops ioapic_mmio_ops = {
 589         .read     = ioapic_mmio_read,
 590         .write    = ioapic_mmio_write,
 591 };
 592
 593 int kvm_ioapic_init(struct kvm *kvm)
 594 {
 595         struct kvm_ioapic *ioapic;
 596         int ret;
 597
 598         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
 599         if (!ioapic)
 600                 return -ENOMEM;
 601         spin_lock_init(&ioapic->lock);
 602         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
 603         kvm->arch.vioapic = ioapic;
 604         kvm_ioapic_reset(ioapic);
 605         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
 606         ioapic->kvm = kvm;
 607         mutex_lock(&kvm->slots_lock);
 608         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
 609                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
 610         mutex_unlock(&kvm->slots_lock);
 611         if (ret < 0) {
 612                 kvm->arch.vioapic = NULL;
 613                 kfree(ioapic);
 614                 return ret;
 615         }
 616
 617         kvm_vcpu_request_scan_ioapic(kvm);
 618         return ret;
 619 }
 620
 621 void kvm_ioapic_destroy(struct kvm *kvm)
 622 {
 623         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 624
 625         cancel_delayed_work_sync(&ioapic->eoi_inject);
 626         kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
 627         kvm->arch.vioapic = NULL;
 628         kfree(ioapic);
 629 }
 630
 631 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 632 {
 633         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
 634         if (!ioapic)
 635                 return -EINVAL;
 636
 637         spin_lock(&ioapic->lock);
 638         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
 639         state->irr &= ~ioapic->irr_delivered;
 640         spin_unlock(&ioapic->lock);
 641         return 0;
 642 }
 643
 644 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 645 {
 646         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
 647         if (!ioapic)
 648                 return -EINVAL;
 649
 650         spin_lock(&ioapic->lock);
 651         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
 652         ioapic->irr = 0;
 653         ioapic->irr_delivered = 0;
 654         kvm_vcpu_request_scan_ioapic(kvm);
 655         kvm_ioapic_inject_all(ioapic, state->irr);
 656         spin_unlock(&ioapic->lock);
 657         return 0;
 658 }