2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
41 #include <asm/cmpxchg.h>
46 * When setting this variable to true it enables Two-Dimensional-Paging
47 * where the hardware walks 2 page tables:
48 * 1. the guest-virtual to guest-physical
49 * 2. while doing 1. it walks guest-physical to host-physical
50 * If the hardware supports that we don't need to do shadow paging.
52 bool tdp_enabled = false;
56 AUDIT_POST_PAGE_FAULT,
67 module_param(dbg, bool, 0644);
69 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
70 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define MMU_WARN_ON(x) WARN_ON(x)
73 #define pgprintk(x...) do { } while (0)
74 #define rmap_printk(x...) do { } while (0)
75 #define MMU_WARN_ON(x) do { } while (0)
78 #define PTE_PREFETCH_NUM 8
80 #define PT_FIRST_AVAIL_BITS_SHIFT 10
81 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
83 #define PT64_LEVEL_BITS 9
85 #define PT64_LEVEL_SHIFT(level) \
86 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
88 #define PT64_INDEX(address, level)\
89 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
92 #define PT32_LEVEL_BITS 10
94 #define PT32_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
97 #define PT32_LVL_OFFSET_MASK(level) \
98 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
99 * PT32_LEVEL_BITS))) - 1))
101 #define PT32_INDEX(address, level)\
102 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
105 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
106 #define PT64_DIR_BASE_ADDR_MASK \
107 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
108 #define PT64_LVL_ADDR_MASK(level) \
109 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
110 * PT64_LEVEL_BITS))) - 1))
111 #define PT64_LVL_OFFSET_MASK(level) \
112 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
113 * PT64_LEVEL_BITS))) - 1))
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118 #define PT32_LVL_ADDR_MASK(level) \
119 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
120 * PT32_LEVEL_BITS))) - 1))
122 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \
123 | shadow_x_mask | shadow_nx_mask)
125 #define ACC_EXEC_MASK 1
126 #define ACC_WRITE_MASK PT_WRITABLE_MASK
127 #define ACC_USER_MASK PT_USER_MASK
128 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
130 #include <trace/events/kvm.h>
132 #define CREATE_TRACE_POINTS
133 #include "mmutrace.h"
135 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
136 #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
138 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
140 /* make pte_list_desc fit well in cache line */
141 #define PTE_LIST_EXT 3
143 struct pte_list_desc {
144 u64 *sptes[PTE_LIST_EXT];
145 struct pte_list_desc *more;
148 struct kvm_shadow_walk_iterator {
156 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
157 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
158 shadow_walk_okay(&(_walker)); \
159 shadow_walk_next(&(_walker)))
161 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)) && \
164 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
165 __shadow_walk_next(&(_walker), spte))
167 static struct kmem_cache *pte_list_desc_cache;
168 static struct kmem_cache *mmu_page_header_cache;
169 static struct percpu_counter kvm_total_used_mmu_pages;
171 static u64 __read_mostly shadow_nx_mask;
172 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
173 static u64 __read_mostly shadow_user_mask;
174 static u64 __read_mostly shadow_accessed_mask;
175 static u64 __read_mostly shadow_dirty_mask;
176 static u64 __read_mostly shadow_mmio_mask;
178 static void mmu_spte_set(u64 *sptep, u64 spte);
179 static void mmu_free_roots(struct kvm_vcpu *vcpu);
181 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask)
183 shadow_mmio_mask = mmio_mask;
185 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask);
188 * the low bit of the generation number is always presumed to be zero.
189 * This disables mmio caching during memslot updates. The concept is
190 * similar to a seqcount but instead of retrying the access we just punt
191 * and ignore the cache.
193 * spte bits 3-11 are used as bits 1-9 of the generation number,
194 * the bits 52-61 are used as bits 10-19 of the generation number.
196 #define MMIO_SPTE_GEN_LOW_SHIFT 2
197 #define MMIO_SPTE_GEN_HIGH_SHIFT 52
199 #define MMIO_GEN_SHIFT 20
200 #define MMIO_GEN_LOW_SHIFT 10
201 #define MMIO_GEN_LOW_MASK ((1 << MMIO_GEN_LOW_SHIFT) - 2)
202 #define MMIO_GEN_MASK ((1 << MMIO_GEN_SHIFT) - 1)
204 static u64 generation_mmio_spte_mask(unsigned int gen)
208 WARN_ON(gen & ~MMIO_GEN_MASK);
210 mask = (gen & MMIO_GEN_LOW_MASK) << MMIO_SPTE_GEN_LOW_SHIFT;
211 mask |= ((u64)gen >> MMIO_GEN_LOW_SHIFT) << MMIO_SPTE_GEN_HIGH_SHIFT;
215 static unsigned int get_mmio_spte_generation(u64 spte)
219 spte &= ~shadow_mmio_mask;
221 gen = (spte >> MMIO_SPTE_GEN_LOW_SHIFT) & MMIO_GEN_LOW_MASK;
222 gen |= (spte >> MMIO_SPTE_GEN_HIGH_SHIFT) << MMIO_GEN_LOW_SHIFT;
226 static unsigned int kvm_current_mmio_generation(struct kvm_vcpu *vcpu)
228 return kvm_vcpu_memslots(vcpu)->generation & MMIO_GEN_MASK;
231 static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn,
234 unsigned int gen = kvm_current_mmio_generation(vcpu);
235 u64 mask = generation_mmio_spte_mask(gen);
237 access &= ACC_WRITE_MASK | ACC_USER_MASK;
238 mask |= shadow_mmio_mask | access | gfn << PAGE_SHIFT;
240 trace_mark_mmio_spte(sptep, gfn, access, gen);
241 mmu_spte_set(sptep, mask);
244 static bool is_mmio_spte(u64 spte)
246 return (spte & shadow_mmio_mask) == shadow_mmio_mask;
249 static gfn_t get_mmio_spte_gfn(u64 spte)
251 u64 mask = generation_mmio_spte_mask(MMIO_GEN_MASK) | shadow_mmio_mask;
252 return (spte & ~mask) >> PAGE_SHIFT;
255 static unsigned get_mmio_spte_access(u64 spte)
257 u64 mask = generation_mmio_spte_mask(MMIO_GEN_MASK) | shadow_mmio_mask;
258 return (spte & ~mask) & ~PAGE_MASK;
261 static bool set_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
262 pfn_t pfn, unsigned access)
264 if (unlikely(is_noslot_pfn(pfn))) {
265 mark_mmio_spte(vcpu, sptep, gfn, access);
272 static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
274 unsigned int kvm_gen, spte_gen;
276 kvm_gen = kvm_current_mmio_generation(vcpu);
277 spte_gen = get_mmio_spte_generation(spte);
279 trace_check_mmio_spte(spte, kvm_gen, spte_gen);
280 return likely(kvm_gen == spte_gen);
283 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
284 u64 dirty_mask, u64 nx_mask, u64 x_mask)
286 shadow_user_mask = user_mask;
287 shadow_accessed_mask = accessed_mask;
288 shadow_dirty_mask = dirty_mask;
289 shadow_nx_mask = nx_mask;
290 shadow_x_mask = x_mask;
292 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
294 static int is_cpuid_PSE36(void)
299 static int is_nx(struct kvm_vcpu *vcpu)
301 return vcpu->arch.efer & EFER_NX;
304 static int is_shadow_present_pte(u64 pte)
306 return pte & PT_PRESENT_MASK && !is_mmio_spte(pte);
309 static int is_large_pte(u64 pte)
311 return pte & PT_PAGE_SIZE_MASK;
314 static int is_rmap_spte(u64 pte)
316 return is_shadow_present_pte(pte);
319 static int is_last_spte(u64 pte, int level)
321 if (level == PT_PAGE_TABLE_LEVEL)
323 if (is_large_pte(pte))
328 static pfn_t spte_to_pfn(u64 pte)
330 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
333 static gfn_t pse36_gfn_delta(u32 gpte)
335 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
337 return (gpte & PT32_DIR_PSE36_MASK) << shift;
341 static void __set_spte(u64 *sptep, u64 spte)
346 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
351 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
353 return xchg(sptep, spte);
356 static u64 __get_spte_lockless(u64 *sptep)
358 return ACCESS_ONCE(*sptep);
361 static bool __check_direct_spte_mmio_pf(u64 spte)
363 /* It is valid if the spte is zapped. */
375 static void count_spte_clear(u64 *sptep, u64 spte)
377 struct kvm_mmu_page *sp = page_header(__pa(sptep));
379 if (is_shadow_present_pte(spte))
382 /* Ensure the spte is completely set before we increase the count */
384 sp->clear_spte_count++;
387 static void __set_spte(u64 *sptep, u64 spte)
389 union split_spte *ssptep, sspte;
391 ssptep = (union split_spte *)sptep;
392 sspte = (union split_spte)spte;
394 ssptep->spte_high = sspte.spte_high;
397 * If we map the spte from nonpresent to present, We should store
398 * the high bits firstly, then set present bit, so cpu can not
399 * fetch this spte while we are setting the spte.
403 ssptep->spte_low = sspte.spte_low;
406 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
408 union split_spte *ssptep, sspte;
410 ssptep = (union split_spte *)sptep;
411 sspte = (union split_spte)spte;
413 ssptep->spte_low = sspte.spte_low;
416 * If we map the spte from present to nonpresent, we should clear
417 * present bit firstly to avoid vcpu fetch the old high bits.
421 ssptep->spte_high = sspte.spte_high;
422 count_spte_clear(sptep, spte);
425 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
427 union split_spte *ssptep, sspte, orig;
429 ssptep = (union split_spte *)sptep;
430 sspte = (union split_spte)spte;
432 /* xchg acts as a barrier before the setting of the high bits */
433 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
434 orig.spte_high = ssptep->spte_high;
435 ssptep->spte_high = sspte.spte_high;
436 count_spte_clear(sptep, spte);
442 * The idea using the light way get the spte on x86_32 guest is from
443 * gup_get_pte(arch/x86/mm/gup.c).
445 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
446 * coalesces them and we are running out of the MMU lock. Therefore
447 * we need to protect against in-progress updates of the spte.
449 * Reading the spte while an update is in progress may get the old value
450 * for the high part of the spte. The race is fine for a present->non-present
451 * change (because the high part of the spte is ignored for non-present spte),
452 * but for a present->present change we must reread the spte.
454 * All such changes are done in two steps (present->non-present and
455 * non-present->present), hence it is enough to count the number of
456 * present->non-present updates: if it changed while reading the spte,
457 * we might have hit the race. This is done using clear_spte_count.
459 static u64 __get_spte_lockless(u64 *sptep)
461 struct kvm_mmu_page *sp = page_header(__pa(sptep));
462 union split_spte spte, *orig = (union split_spte *)sptep;
466 count = sp->clear_spte_count;
469 spte.spte_low = orig->spte_low;
472 spte.spte_high = orig->spte_high;
475 if (unlikely(spte.spte_low != orig->spte_low ||
476 count != sp->clear_spte_count))
482 static bool __check_direct_spte_mmio_pf(u64 spte)
484 union split_spte sspte = (union split_spte)spte;
485 u32 high_mmio_mask = shadow_mmio_mask >> 32;
487 /* It is valid if the spte is zapped. */
491 /* It is valid if the spte is being zapped. */
492 if (sspte.spte_low == 0ull &&
493 (sspte.spte_high & high_mmio_mask) == high_mmio_mask)
500 static bool spte_is_locklessly_modifiable(u64 spte)
502 return (spte & (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE)) ==
503 (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE);
506 static bool spte_has_volatile_bits(u64 spte)
509 * Always atomicly update spte if it can be updated
510 * out of mmu-lock, it can ensure dirty bit is not lost,
511 * also, it can help us to get a stable is_writable_pte()
512 * to ensure tlb flush is not missed.
514 if (spte_is_locklessly_modifiable(spte))
517 if (!shadow_accessed_mask)
520 if (!is_shadow_present_pte(spte))
523 if ((spte & shadow_accessed_mask) &&
524 (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
530 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
532 return (old_spte & bit_mask) && !(new_spte & bit_mask);
535 static bool spte_is_bit_changed(u64 old_spte, u64 new_spte, u64 bit_mask)
537 return (old_spte & bit_mask) != (new_spte & bit_mask);
540 /* Rules for using mmu_spte_set:
541 * Set the sptep from nonpresent to present.
542 * Note: the sptep being assigned *must* be either not present
543 * or in a state where the hardware will not attempt to update
546 static void mmu_spte_set(u64 *sptep, u64 new_spte)
548 WARN_ON(is_shadow_present_pte(*sptep));
549 __set_spte(sptep, new_spte);
552 /* Rules for using mmu_spte_update:
553 * Update the state bits, it means the mapped pfn is not changged.
555 * Whenever we overwrite a writable spte with a read-only one we
556 * should flush remote TLBs. Otherwise rmap_write_protect
557 * will find a read-only spte, even though the writable spte
558 * might be cached on a CPU's TLB, the return value indicates this
561 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
563 u64 old_spte = *sptep;
566 WARN_ON(!is_rmap_spte(new_spte));
568 if (!is_shadow_present_pte(old_spte)) {
569 mmu_spte_set(sptep, new_spte);
573 if (!spte_has_volatile_bits(old_spte))
574 __update_clear_spte_fast(sptep, new_spte);
576 old_spte = __update_clear_spte_slow(sptep, new_spte);
579 * For the spte updated out of mmu-lock is safe, since
580 * we always atomicly update it, see the comments in
581 * spte_has_volatile_bits().
583 if (spte_is_locklessly_modifiable(old_spte) &&
584 !is_writable_pte(new_spte))
587 if (!shadow_accessed_mask)
591 * Flush TLB when accessed/dirty bits are changed in the page tables,
592 * to guarantee consistency between TLB and page tables.
594 if (spte_is_bit_changed(old_spte, new_spte,
595 shadow_accessed_mask | shadow_dirty_mask))
598 if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
599 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
600 if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
601 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
607 * Rules for using mmu_spte_clear_track_bits:
608 * It sets the sptep from present to nonpresent, and track the
609 * state bits, it is used to clear the last level sptep.
611 static int mmu_spte_clear_track_bits(u64 *sptep)
614 u64 old_spte = *sptep;
616 if (!spte_has_volatile_bits(old_spte))
617 __update_clear_spte_fast(sptep, 0ull);
619 old_spte = __update_clear_spte_slow(sptep, 0ull);
621 if (!is_rmap_spte(old_spte))
624 pfn = spte_to_pfn(old_spte);
627 * KVM does not hold the refcount of the page used by
628 * kvm mmu, before reclaiming the page, we should
629 * unmap it from mmu first.
631 WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn)));
633 if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
634 kvm_set_pfn_accessed(pfn);
635 if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
636 kvm_set_pfn_dirty(pfn);
641 * Rules for using mmu_spte_clear_no_track:
642 * Directly clear spte without caring the state bits of sptep,
643 * it is used to set the upper level spte.
645 static void mmu_spte_clear_no_track(u64 *sptep)
647 __update_clear_spte_fast(sptep, 0ull);
650 static u64 mmu_spte_get_lockless(u64 *sptep)
652 return __get_spte_lockless(sptep);
655 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
658 * Prevent page table teardown by making any free-er wait during
659 * kvm_flush_remote_tlbs() IPI to all active vcpus.
662 vcpu->mode = READING_SHADOW_PAGE_TABLES;
664 * Make sure a following spte read is not reordered ahead of the write
670 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
673 * Make sure the write to vcpu->mode is not reordered in front of
674 * reads to sptes. If it does, kvm_commit_zap_page() can see us
675 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
678 vcpu->mode = OUTSIDE_GUEST_MODE;
682 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
683 struct kmem_cache *base_cache, int min)
687 if (cache->nobjs >= min)
689 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
690 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
693 cache->objects[cache->nobjs++] = obj;
698 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache *cache)
703 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
704 struct kmem_cache *cache)
707 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
710 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
715 if (cache->nobjs >= min)
717 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
718 page = (void *)__get_free_page(GFP_KERNEL);
721 cache->objects[cache->nobjs++] = page;
726 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
729 free_page((unsigned long)mc->objects[--mc->nobjs]);
732 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
736 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
737 pte_list_desc_cache, 8 + PTE_PREFETCH_NUM);
740 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
743 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
744 mmu_page_header_cache, 4);
749 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
751 mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
752 pte_list_desc_cache);
753 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
754 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
755 mmu_page_header_cache);
758 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
763 p = mc->objects[--mc->nobjs];
767 static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu)
769 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache);
772 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
774 kmem_cache_free(pte_list_desc_cache, pte_list_desc);
777 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
779 if (!sp->role.direct)
780 return sp->gfns[index];
782 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
785 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
788 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
790 sp->gfns[index] = gfn;
794 * Return the pointer to the large page information for a given gfn,
795 * handling slots that are not large page aligned.
797 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
798 struct kvm_memory_slot *slot,
803 idx = gfn_to_index(gfn, slot->base_gfn, level);
804 return &slot->arch.lpage_info[level - 2][idx];
807 static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
809 struct kvm_memory_slot *slot;
810 struct kvm_lpage_info *linfo;
815 slot = gfn_to_memslot(kvm, gfn);
816 for (i = PT_DIRECTORY_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
817 linfo = lpage_info_slot(gfn, slot, i);
818 linfo->write_count += 1;
820 kvm->arch.indirect_shadow_pages++;
823 static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
825 struct kvm_memory_slot *slot;
826 struct kvm_lpage_info *linfo;
831 slot = gfn_to_memslot(kvm, gfn);
832 for (i = PT_DIRECTORY_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
833 linfo = lpage_info_slot(gfn, slot, i);
834 linfo->write_count -= 1;
835 WARN_ON(linfo->write_count < 0);
837 kvm->arch.indirect_shadow_pages--;
840 static int has_wrprotected_page(struct kvm_vcpu *vcpu,
844 struct kvm_memory_slot *slot;
845 struct kvm_lpage_info *linfo;
847 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
849 linfo = lpage_info_slot(gfn, slot, level);
850 return linfo->write_count;
856 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
858 unsigned long page_size;
861 page_size = kvm_host_page_size(kvm, gfn);
863 for (i = PT_PAGE_TABLE_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
864 if (page_size >= KVM_HPAGE_SIZE(i))
873 static struct kvm_memory_slot *
874 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
877 struct kvm_memory_slot *slot;
879 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
880 if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
881 (no_dirty_log && slot->dirty_bitmap))
887 static bool mapping_level_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t large_gfn)
889 return !gfn_to_memslot_dirty_bitmap(vcpu, large_gfn, true);
892 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
894 int host_level, level, max_level;
896 host_level = host_mapping_level(vcpu->kvm, large_gfn);
898 if (host_level == PT_PAGE_TABLE_LEVEL)
901 max_level = min(kvm_x86_ops->get_lpage_level(), host_level);
903 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
904 if (has_wrprotected_page(vcpu, large_gfn, level))
911 * Pte mapping structures:
913 * If pte_list bit zero is zero, then pte_list point to the spte.
915 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
916 * pte_list_desc containing more mappings.
918 * Returns the number of pte entries before the spte was added or zero if
919 * the spte was not added.
922 static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,
923 unsigned long *pte_list)
925 struct pte_list_desc *desc;
929 rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte);
930 *pte_list = (unsigned long)spte;
931 } else if (!(*pte_list & 1)) {
932 rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte);
933 desc = mmu_alloc_pte_list_desc(vcpu);
934 desc->sptes[0] = (u64 *)*pte_list;
935 desc->sptes[1] = spte;
936 *pte_list = (unsigned long)desc | 1;
939 rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte);
940 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
941 while (desc->sptes[PTE_LIST_EXT-1] && desc->more) {
943 count += PTE_LIST_EXT;
945 if (desc->sptes[PTE_LIST_EXT-1]) {
946 desc->more = mmu_alloc_pte_list_desc(vcpu);
949 for (i = 0; desc->sptes[i]; ++i)
951 desc->sptes[i] = spte;
957 pte_list_desc_remove_entry(unsigned long *pte_list, struct pte_list_desc *desc,
958 int i, struct pte_list_desc *prev_desc)
962 for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j)
964 desc->sptes[i] = desc->sptes[j];
965 desc->sptes[j] = NULL;
968 if (!prev_desc && !desc->more)
969 *pte_list = (unsigned long)desc->sptes[0];
972 prev_desc->more = desc->more;
974 *pte_list = (unsigned long)desc->more | 1;
975 mmu_free_pte_list_desc(desc);
978 static void pte_list_remove(u64 *spte, unsigned long *pte_list)
980 struct pte_list_desc *desc;
981 struct pte_list_desc *prev_desc;
985 printk(KERN_ERR "pte_list_remove: %p 0->BUG\n", spte);
987 } else if (!(*pte_list & 1)) {
988 rmap_printk("pte_list_remove: %p 1->0\n", spte);
989 if ((u64 *)*pte_list != spte) {
990 printk(KERN_ERR "pte_list_remove: %p 1->BUG\n", spte);
995 rmap_printk("pte_list_remove: %p many->many\n", spte);
996 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
999 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
1000 if (desc->sptes[i] == spte) {
1001 pte_list_desc_remove_entry(pte_list,
1009 pr_err("pte_list_remove: %p many->many\n", spte);
1014 typedef void (*pte_list_walk_fn) (u64 *spte);
1015 static void pte_list_walk(unsigned long *pte_list, pte_list_walk_fn fn)
1017 struct pte_list_desc *desc;
1023 if (!(*pte_list & 1))
1024 return fn((u64 *)*pte_list);
1026 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
1028 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
1034 static unsigned long *__gfn_to_rmap(gfn_t gfn, int level,
1035 struct kvm_memory_slot *slot)
1039 idx = gfn_to_index(gfn, slot->base_gfn, level);
1040 return &slot->arch.rmap[level - PT_PAGE_TABLE_LEVEL][idx];
1044 * Take gfn and return the reverse mapping to it.
1046 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, struct kvm_mmu_page *sp)
1048 struct kvm_memory_slot *slot;
1050 slot = gfn_to_memslot(kvm, gfn);
1051 return __gfn_to_rmap(gfn, sp->role.level, slot);
1054 static bool rmap_can_add(struct kvm_vcpu *vcpu)
1056 struct kvm_mmu_memory_cache *cache;
1058 cache = &vcpu->arch.mmu_pte_list_desc_cache;
1059 return mmu_memory_cache_free_objects(cache);
1062 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1064 struct kvm_mmu_page *sp;
1065 unsigned long *rmapp;
1067 sp = page_header(__pa(spte));
1068 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
1069 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp);
1070 return pte_list_add(vcpu, spte, rmapp);
1073 static void rmap_remove(struct kvm *kvm, u64 *spte)
1075 struct kvm_mmu_page *sp;
1077 unsigned long *rmapp;
1079 sp = page_header(__pa(spte));
1080 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
1081 rmapp = gfn_to_rmap(kvm, gfn, sp);
1082 pte_list_remove(spte, rmapp);
1086 * Used by the following functions to iterate through the sptes linked by a
1087 * rmap. All fields are private and not assumed to be used outside.
1089 struct rmap_iterator {
1090 /* private fields */
1091 struct pte_list_desc *desc; /* holds the sptep if not NULL */
1092 int pos; /* index of the sptep */
1096 * Iteration must be started by this function. This should also be used after
1097 * removing/dropping sptes from the rmap link because in such cases the
1098 * information in the itererator may not be valid.
1100 * Returns sptep if found, NULL otherwise.
1102 static u64 *rmap_get_first(unsigned long rmap, struct rmap_iterator *iter)
1112 iter->desc = (struct pte_list_desc *)(rmap & ~1ul);
1114 return iter->desc->sptes[iter->pos];
1118 * Must be used with a valid iterator: e.g. after rmap_get_first().
1120 * Returns sptep if found, NULL otherwise.
1122 static u64 *rmap_get_next(struct rmap_iterator *iter)
1125 if (iter->pos < PTE_LIST_EXT - 1) {
1129 sptep = iter->desc->sptes[iter->pos];
1134 iter->desc = iter->desc->more;
1138 /* desc->sptes[0] cannot be NULL */
1139 return iter->desc->sptes[iter->pos];
1146 #define for_each_rmap_spte(_rmap_, _iter_, _spte_) \
1147 for (_spte_ = rmap_get_first(*_rmap_, _iter_); \
1148 _spte_ && ({BUG_ON(!is_shadow_present_pte(*_spte_)); 1;}); \
1149 _spte_ = rmap_get_next(_iter_))
1151 static void drop_spte(struct kvm *kvm, u64 *sptep)
1153 if (mmu_spte_clear_track_bits(sptep))
1154 rmap_remove(kvm, sptep);
1158 static bool __drop_large_spte(struct kvm *kvm, u64 *sptep)
1160 if (is_large_pte(*sptep)) {
1161 WARN_ON(page_header(__pa(sptep))->role.level ==
1162 PT_PAGE_TABLE_LEVEL);
1163 drop_spte(kvm, sptep);
1171 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1173 if (__drop_large_spte(vcpu->kvm, sptep))
1174 kvm_flush_remote_tlbs(vcpu->kvm);
1178 * Write-protect on the specified @sptep, @pt_protect indicates whether
1179 * spte write-protection is caused by protecting shadow page table.
1181 * Note: write protection is difference between dirty logging and spte
1183 * - for dirty logging, the spte can be set to writable at anytime if
1184 * its dirty bitmap is properly set.
1185 * - for spte protection, the spte can be writable only after unsync-ing
1188 * Return true if tlb need be flushed.
1190 static bool spte_write_protect(struct kvm *kvm, u64 *sptep, bool pt_protect)
1194 if (!is_writable_pte(spte) &&
1195 !(pt_protect && spte_is_locklessly_modifiable(spte)))
1198 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep, *sptep);
1201 spte &= ~SPTE_MMU_WRITEABLE;
1202 spte = spte & ~PT_WRITABLE_MASK;
1204 return mmu_spte_update(sptep, spte);
1207 static bool __rmap_write_protect(struct kvm *kvm, unsigned long *rmapp,
1211 struct rmap_iterator iter;
1214 for_each_rmap_spte(rmapp, &iter, sptep)
1215 flush |= spte_write_protect(kvm, sptep, pt_protect);
1220 static bool spte_clear_dirty(struct kvm *kvm, u64 *sptep)
1224 rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep, *sptep);
1226 spte &= ~shadow_dirty_mask;
1228 return mmu_spte_update(sptep, spte);
1231 static bool __rmap_clear_dirty(struct kvm *kvm, unsigned long *rmapp)
1234 struct rmap_iterator iter;
1237 for_each_rmap_spte(rmapp, &iter, sptep)
1238 flush |= spte_clear_dirty(kvm, sptep);
1243 static bool spte_set_dirty(struct kvm *kvm, u64 *sptep)
1247 rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep, *sptep);
1249 spte |= shadow_dirty_mask;
1251 return mmu_spte_update(sptep, spte);
1254 static bool __rmap_set_dirty(struct kvm *kvm, unsigned long *rmapp)
1257 struct rmap_iterator iter;
1260 for_each_rmap_spte(rmapp, &iter, sptep)
1261 flush |= spte_set_dirty(kvm, sptep);
1267 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1268 * @kvm: kvm instance
1269 * @slot: slot to protect
1270 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1271 * @mask: indicates which pages we should protect
1273 * Used when we do not need to care about huge page mappings: e.g. during dirty
1274 * logging we do not have any such mappings.
1276 static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1277 struct kvm_memory_slot *slot,
1278 gfn_t gfn_offset, unsigned long mask)
1280 unsigned long *rmapp;
1283 rmapp = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1284 PT_PAGE_TABLE_LEVEL, slot);
1285 __rmap_write_protect(kvm, rmapp, false);
1287 /* clear the first set bit */
1293 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages
1294 * @kvm: kvm instance
1295 * @slot: slot to clear D-bit
1296 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1297 * @mask: indicates which pages we should clear D-bit
1299 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1301 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1302 struct kvm_memory_slot *slot,
1303 gfn_t gfn_offset, unsigned long mask)
1305 unsigned long *rmapp;
1308 rmapp = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1309 PT_PAGE_TABLE_LEVEL, slot);
1310 __rmap_clear_dirty(kvm, rmapp);
1312 /* clear the first set bit */
1316 EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked);
1319 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1322 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1323 * enable dirty logging for them.
1325 * Used when we do not need to care about huge page mappings: e.g. during dirty
1326 * logging we do not have any such mappings.
1328 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1329 struct kvm_memory_slot *slot,
1330 gfn_t gfn_offset, unsigned long mask)
1332 if (kvm_x86_ops->enable_log_dirty_pt_masked)
1333 kvm_x86_ops->enable_log_dirty_pt_masked(kvm, slot, gfn_offset,
1336 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1339 static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
1341 struct kvm_memory_slot *slot;
1342 unsigned long *rmapp;
1344 bool write_protected = false;
1346 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
1348 for (i = PT_PAGE_TABLE_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
1349 rmapp = __gfn_to_rmap(gfn, i, slot);
1350 write_protected |= __rmap_write_protect(vcpu->kvm, rmapp, true);
1353 return write_protected;
1356 static bool kvm_zap_rmapp(struct kvm *kvm, unsigned long *rmapp)
1359 struct rmap_iterator iter;
1362 while ((sptep = rmap_get_first(*rmapp, &iter))) {
1363 BUG_ON(!(*sptep & PT_PRESENT_MASK));
1364 rmap_printk("%s: spte %p %llx.\n", __func__, sptep, *sptep);
1366 drop_spte(kvm, sptep);
1373 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
1374 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1377 return kvm_zap_rmapp(kvm, rmapp);
1380 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
1381 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1385 struct rmap_iterator iter;
1388 pte_t *ptep = (pte_t *)data;
1391 WARN_ON(pte_huge(*ptep));
1392 new_pfn = pte_pfn(*ptep);
1395 for_each_rmap_spte(rmapp, &iter, sptep) {
1396 rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n",
1397 sptep, *sptep, gfn, level);
1401 if (pte_write(*ptep)) {
1402 drop_spte(kvm, sptep);
1405 new_spte = *sptep & ~PT64_BASE_ADDR_MASK;
1406 new_spte |= (u64)new_pfn << PAGE_SHIFT;
1408 new_spte &= ~PT_WRITABLE_MASK;
1409 new_spte &= ~SPTE_HOST_WRITEABLE;
1410 new_spte &= ~shadow_accessed_mask;
1412 mmu_spte_clear_track_bits(sptep);
1413 mmu_spte_set(sptep, new_spte);
1418 kvm_flush_remote_tlbs(kvm);
1423 struct slot_rmap_walk_iterator {
1425 struct kvm_memory_slot *slot;
1431 /* output fields. */
1433 unsigned long *rmap;
1436 /* private field. */
1437 unsigned long *end_rmap;
1441 rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level)
1443 iterator->level = level;
1444 iterator->gfn = iterator->start_gfn;
1445 iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot);
1446 iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level,
1451 slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,
1452 struct kvm_memory_slot *slot, int start_level,
1453 int end_level, gfn_t start_gfn, gfn_t end_gfn)
1455 iterator->slot = slot;
1456 iterator->start_level = start_level;
1457 iterator->end_level = end_level;
1458 iterator->start_gfn = start_gfn;
1459 iterator->end_gfn = end_gfn;
1461 rmap_walk_init_level(iterator, iterator->start_level);
1464 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)
1466 return !!iterator->rmap;
1469 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)
1471 if (++iterator->rmap <= iterator->end_rmap) {
1472 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level));
1476 if (++iterator->level > iterator->end_level) {
1477 iterator->rmap = NULL;
1481 rmap_walk_init_level(iterator, iterator->level);
1484 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1485 _start_gfn, _end_gfn, _iter_) \
1486 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1487 _end_level_, _start_gfn, _end_gfn); \
1488 slot_rmap_walk_okay(_iter_); \
1489 slot_rmap_walk_next(_iter_))
1491 static int kvm_handle_hva_range(struct kvm *kvm,
1492 unsigned long start,
1495 int (*handler)(struct kvm *kvm,
1496 unsigned long *rmapp,
1497 struct kvm_memory_slot *slot,
1500 unsigned long data))
1502 struct kvm_memslots *slots;
1503 struct kvm_memory_slot *memslot;
1504 struct slot_rmap_walk_iterator iterator;
1507 slots = kvm_memslots(kvm);
1509 kvm_for_each_memslot(memslot, slots) {
1510 unsigned long hva_start, hva_end;
1511 gfn_t gfn_start, gfn_end;
1513 hva_start = max(start, memslot->userspace_addr);
1514 hva_end = min(end, memslot->userspace_addr +
1515 (memslot->npages << PAGE_SHIFT));
1516 if (hva_start >= hva_end)
1519 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1520 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1522 gfn_start = hva_to_gfn_memslot(hva_start, memslot);
1523 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
1525 for_each_slot_rmap_range(memslot, PT_PAGE_TABLE_LEVEL,
1526 PT_MAX_HUGEPAGE_LEVEL, gfn_start, gfn_end - 1,
1528 ret |= handler(kvm, iterator.rmap, memslot,
1529 iterator.gfn, iterator.level, data);
1535 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
1537 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
1538 struct kvm_memory_slot *slot,
1539 gfn_t gfn, int level,
1540 unsigned long data))
1542 return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler);
1545 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1547 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
1550 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
1552 return kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp);
1555 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1557 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
1560 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1561 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1565 struct rmap_iterator uninitialized_var(iter);
1568 BUG_ON(!shadow_accessed_mask);
1570 for_each_rmap_spte(rmapp, &iter, sptep)
1571 if (*sptep & shadow_accessed_mask) {
1573 clear_bit((ffs(shadow_accessed_mask) - 1),
1574 (unsigned long *)sptep);
1577 trace_kvm_age_page(gfn, level, slot, young);
1581 static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1582 struct kvm_memory_slot *slot, gfn_t gfn,
1583 int level, unsigned long data)
1586 struct rmap_iterator iter;
1590 * If there's no access bit in the secondary pte set by the
1591 * hardware it's up to gup-fast/gup to set the access bit in
1592 * the primary pte or in the page structure.
1594 if (!shadow_accessed_mask)
1597 for_each_rmap_spte(rmapp, &iter, sptep)
1598 if (*sptep & shadow_accessed_mask) {
1606 #define RMAP_RECYCLE_THRESHOLD 1000
1608 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1610 unsigned long *rmapp;
1611 struct kvm_mmu_page *sp;
1613 sp = page_header(__pa(spte));
1615 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp);
1617 kvm_unmap_rmapp(vcpu->kvm, rmapp, NULL, gfn, sp->role.level, 0);
1618 kvm_flush_remote_tlbs(vcpu->kvm);
1621 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1624 * In case of absence of EPT Access and Dirty Bits supports,
1625 * emulate the accessed bit for EPT, by checking if this page has
1626 * an EPT mapping, and clearing it if it does. On the next access,
1627 * a new EPT mapping will be established.
1628 * This has some overhead, but not as much as the cost of swapping
1629 * out actively used pages or breaking up actively used hugepages.
1631 if (!shadow_accessed_mask) {
1633 * We are holding the kvm->mmu_lock, and we are blowing up
1634 * shadow PTEs. MMU notifier consumers need to be kept at bay.
1635 * This is correct as long as we don't decouple the mmu_lock
1636 * protected regions (like invalidate_range_start|end does).
1638 kvm->mmu_notifier_seq++;
1639 return kvm_handle_hva_range(kvm, start, end, 0,
1643 return kvm_handle_hva_range(kvm, start, end, 0, kvm_age_rmapp);
1646 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1648 return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp);
1652 static int is_empty_shadow_page(u64 *spt)
1657 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1658 if (is_shadow_present_pte(*pos)) {
1659 printk(KERN_ERR "%s: %p %llx\n", __func__,
1668 * This value is the sum of all of the kvm instances's
1669 * kvm->arch.n_used_mmu_pages values. We need a global,
1670 * aggregate version in order to make the slab shrinker
1673 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
1675 kvm->arch.n_used_mmu_pages += nr;
1676 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1679 static void kvm_mmu_free_page(struct kvm_mmu_page *sp)
1681 MMU_WARN_ON(!is_empty_shadow_page(sp->spt));
1682 hlist_del(&sp->hash_link);
1683 list_del(&sp->link);
1684 free_page((unsigned long)sp->spt);
1685 if (!sp->role.direct)
1686 free_page((unsigned long)sp->gfns);
1687 kmem_cache_free(mmu_page_header_cache, sp);
1690 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1692 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1695 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1696 struct kvm_mmu_page *sp, u64 *parent_pte)
1701 pte_list_add(vcpu, parent_pte, &sp->parent_ptes);
1704 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1707 pte_list_remove(parent_pte, &sp->parent_ptes);
1710 static void drop_parent_pte(struct kvm_mmu_page *sp,
1713 mmu_page_remove_parent_pte(sp, parent_pte);
1714 mmu_spte_clear_no_track(parent_pte);
1717 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1718 u64 *parent_pte, int direct)
1720 struct kvm_mmu_page *sp;
1722 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache);
1723 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1725 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1726 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1729 * The active_mmu_pages list is the FIFO list, do not move the
1730 * page until it is zapped. kvm_zap_obsolete_pages depends on
1731 * this feature. See the comments in kvm_zap_obsolete_pages().
1733 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1734 sp->parent_ptes = 0;
1735 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1736 kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1740 static void mark_unsync(u64 *spte);
1741 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1743 pte_list_walk(&sp->parent_ptes, mark_unsync);
1746 static void mark_unsync(u64 *spte)
1748 struct kvm_mmu_page *sp;
1751 sp = page_header(__pa(spte));
1752 index = spte - sp->spt;
1753 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1755 if (sp->unsync_children++)
1757 kvm_mmu_mark_parents_unsync(sp);
1760 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1761 struct kvm_mmu_page *sp)
1766 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1770 static void nonpaging_update_pte(struct kvm_vcpu *vcpu,
1771 struct kvm_mmu_page *sp, u64 *spte,
1777 #define KVM_PAGE_ARRAY_NR 16
1779 struct kvm_mmu_pages {
1780 struct mmu_page_and_offset {
1781 struct kvm_mmu_page *sp;
1783 } page[KVM_PAGE_ARRAY_NR];
1787 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1793 for (i=0; i < pvec->nr; i++)
1794 if (pvec->page[i].sp == sp)
1797 pvec->page[pvec->nr].sp = sp;
1798 pvec->page[pvec->nr].idx = idx;
1800 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1803 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1804 struct kvm_mmu_pages *pvec)
1806 int i, ret, nr_unsync_leaf = 0;
1808 for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1809 struct kvm_mmu_page *child;
1810 u64 ent = sp->spt[i];
1812 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1813 goto clear_child_bitmap;
1815 child = page_header(ent & PT64_BASE_ADDR_MASK);
1817 if (child->unsync_children) {
1818 if (mmu_pages_add(pvec, child, i))
1821 ret = __mmu_unsync_walk(child, pvec);
1823 goto clear_child_bitmap;
1825 nr_unsync_leaf += ret;
1828 } else if (child->unsync) {
1830 if (mmu_pages_add(pvec, child, i))
1833 goto clear_child_bitmap;
1838 __clear_bit(i, sp->unsync_child_bitmap);
1839 sp->unsync_children--;
1840 WARN_ON((int)sp->unsync_children < 0);
1844 return nr_unsync_leaf;
1847 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1848 struct kvm_mmu_pages *pvec)
1850 if (!sp->unsync_children)
1853 mmu_pages_add(pvec, sp, 0);
1854 return __mmu_unsync_walk(sp, pvec);
1857 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1859 WARN_ON(!sp->unsync);
1860 trace_kvm_mmu_sync_page(sp);
1862 --kvm->stat.mmu_unsync;
1865 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1866 struct list_head *invalid_list);
1867 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1868 struct list_head *invalid_list);
1871 * NOTE: we should pay more attention on the zapped-obsolete page
1872 * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk
1873 * since it has been deleted from active_mmu_pages but still can be found
1876 * for_each_gfn_indirect_valid_sp has skipped that kind of page and
1877 * kvm_mmu_get_page(), the only user of for_each_gfn_sp(), has skipped
1878 * all the obsolete pages.
1880 #define for_each_gfn_sp(_kvm, _sp, _gfn) \
1881 hlist_for_each_entry(_sp, \
1882 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1883 if ((_sp)->gfn != (_gfn)) {} else
1885 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1886 for_each_gfn_sp(_kvm, _sp, _gfn) \
1887 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1889 /* @sp->gfn should be write-protected at the call site */
1890 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1891 struct list_head *invalid_list, bool clear_unsync)
1893 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1894 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1899 kvm_unlink_unsync_page(vcpu->kvm, sp);
1901 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1902 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1906 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1910 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1911 struct kvm_mmu_page *sp)
1913 LIST_HEAD(invalid_list);
1916 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1918 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1923 #ifdef CONFIG_KVM_MMU_AUDIT
1924 #include "mmu_audit.c"
1926 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { }
1927 static void mmu_audit_disable(void) { }
1930 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1931 struct list_head *invalid_list)
1933 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1936 /* @gfn should be write-protected at the call site */
1937 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1939 struct kvm_mmu_page *s;
1940 LIST_HEAD(invalid_list);
1943 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
1947 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1948 kvm_unlink_unsync_page(vcpu->kvm, s);
1949 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1950 (vcpu->arch.mmu.sync_page(vcpu, s))) {
1951 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1957 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1959 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1962 struct mmu_page_path {
1963 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1964 unsigned int idx[PT64_ROOT_LEVEL-1];
1967 #define for_each_sp(pvec, sp, parents, i) \
1968 for (i = mmu_pages_next(&pvec, &parents, -1), \
1969 sp = pvec.page[i].sp; \
1970 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1971 i = mmu_pages_next(&pvec, &parents, i))
1973 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1974 struct mmu_page_path *parents,
1979 for (n = i+1; n < pvec->nr; n++) {
1980 struct kvm_mmu_page *sp = pvec->page[n].sp;
1982 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1983 parents->idx[0] = pvec->page[n].idx;
1987 parents->parent[sp->role.level-2] = sp;
1988 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1994 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1996 struct kvm_mmu_page *sp;
1997 unsigned int level = 0;
2000 unsigned int idx = parents->idx[level];
2002 sp = parents->parent[level];
2006 --sp->unsync_children;
2007 WARN_ON((int)sp->unsync_children < 0);
2008 __clear_bit(idx, sp->unsync_child_bitmap);
2010 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
2013 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
2014 struct mmu_page_path *parents,
2015 struct kvm_mmu_pages *pvec)
2017 parents->parent[parent->role.level-1] = NULL;
2021 static void mmu_sync_children(struct kvm_vcpu *vcpu,
2022 struct kvm_mmu_page *parent)
2025 struct kvm_mmu_page *sp;
2026 struct mmu_page_path parents;
2027 struct kvm_mmu_pages pages;
2028 LIST_HEAD(invalid_list);
2030 kvm_mmu_pages_init(parent, &parents, &pages);
2031 while (mmu_unsync_walk(parent, &pages)) {
2032 bool protected = false;
2034 for_each_sp(pages, sp, parents, i)
2035 protected |= rmap_write_protect(vcpu, sp->gfn);
2038 kvm_flush_remote_tlbs(vcpu->kvm);
2040 for_each_sp(pages, sp, parents, i) {
2041 kvm_sync_page(vcpu, sp, &invalid_list);
2042 mmu_pages_clear_parents(&parents);
2044 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2045 cond_resched_lock(&vcpu->kvm->mmu_lock);
2046 kvm_mmu_pages_init(parent, &parents, &pages);
2050 static void init_shadow_page_table(struct kvm_mmu_page *sp)
2054 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2058 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
2060 sp->write_flooding_count = 0;
2063 static void clear_sp_write_flooding_count(u64 *spte)
2065 struct kvm_mmu_page *sp = page_header(__pa(spte));
2067 __clear_sp_write_flooding_count(sp);
2070 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
2072 return unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
2075 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
2083 union kvm_mmu_page_role role;
2085 struct kvm_mmu_page *sp;
2086 bool need_sync = false;
2088 role = vcpu->arch.mmu.base_role;
2090 role.direct = direct;
2093 role.access = access;
2094 if (!vcpu->arch.mmu.direct_map
2095 && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
2096 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
2097 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
2098 role.quadrant = quadrant;
2100 for_each_gfn_sp(vcpu->kvm, sp, gfn) {
2101 if (is_obsolete_sp(vcpu->kvm, sp))
2104 if (!need_sync && sp->unsync)
2107 if (sp->role.word != role.word)
2110 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
2113 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
2114 if (sp->unsync_children) {
2115 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
2116 kvm_mmu_mark_parents_unsync(sp);
2117 } else if (sp->unsync)
2118 kvm_mmu_mark_parents_unsync(sp);
2120 __clear_sp_write_flooding_count(sp);
2121 trace_kvm_mmu_get_page(sp, false);
2124 ++vcpu->kvm->stat.mmu_cache_miss;
2125 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
2130 hlist_add_head(&sp->hash_link,
2131 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
2133 if (rmap_write_protect(vcpu, gfn))
2134 kvm_flush_remote_tlbs(vcpu->kvm);
2135 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
2136 kvm_sync_pages(vcpu, gfn);
2138 account_shadowed(vcpu->kvm, sp);
2140 sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen;
2141 init_shadow_page_table(sp);
2142 trace_kvm_mmu_get_page(sp, true);
2146 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
2147 struct kvm_vcpu *vcpu, u64 addr)
2149 iterator->addr = addr;
2150 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
2151 iterator->level = vcpu->arch.mmu.shadow_root_level;
2153 if (iterator->level == PT64_ROOT_LEVEL &&
2154 vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
2155 !vcpu->arch.mmu.direct_map)
2158 if (iterator->level == PT32E_ROOT_LEVEL) {
2159 iterator->shadow_addr
2160 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
2161 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
2163 if (!iterator->shadow_addr)
2164 iterator->level = 0;
2168 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2170 if (iterator->level < PT_PAGE_TABLE_LEVEL)
2173 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
2174 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2178 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2181 if (is_last_spte(spte, iterator->level)) {
2182 iterator->level = 0;
2186 iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK;
2190 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2192 return __shadow_walk_next(iterator, *iterator->sptep);
2195 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp, bool accessed)
2199 BUILD_BUG_ON(VMX_EPT_READABLE_MASK != PT_PRESENT_MASK ||
2200 VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
2202 spte = __pa(sp->spt) | PT_PRESENT_MASK | PT_WRITABLE_MASK |
2203 shadow_user_mask | shadow_x_mask;
2206 spte |= shadow_accessed_mask;
2208 mmu_spte_set(sptep, spte);
2211 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2212 unsigned direct_access)
2214 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2215 struct kvm_mmu_page *child;
2218 * For the direct sp, if the guest pte's dirty bit
2219 * changed form clean to dirty, it will corrupt the
2220 * sp's access: allow writable in the read-only sp,
2221 * so we should update the spte at this point to get
2222 * a new sp with the correct access.
2224 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
2225 if (child->role.access == direct_access)
2228 drop_parent_pte(child, sptep);
2229 kvm_flush_remote_tlbs(vcpu->kvm);
2233 static bool mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2237 struct kvm_mmu_page *child;
2240 if (is_shadow_present_pte(pte)) {
2241 if (is_last_spte(pte, sp->role.level)) {
2242 drop_spte(kvm, spte);
2243 if (is_large_pte(pte))
2246 child = page_header(pte & PT64_BASE_ADDR_MASK);
2247 drop_parent_pte(child, spte);
2252 if (is_mmio_spte(pte))
2253 mmu_spte_clear_no_track(spte);
2258 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
2259 struct kvm_mmu_page *sp)
2263 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2264 mmu_page_zap_pte(kvm, sp, sp->spt + i);
2267 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
2269 mmu_page_remove_parent_pte(sp, parent_pte);
2272 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
2275 struct rmap_iterator iter;
2277 while ((sptep = rmap_get_first(sp->parent_ptes, &iter)))
2278 drop_parent_pte(sp, sptep);
2281 static int mmu_zap_unsync_children(struct kvm *kvm,
2282 struct kvm_mmu_page *parent,
2283 struct list_head *invalid_list)
2286 struct mmu_page_path parents;
2287 struct kvm_mmu_pages pages;
2289 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
2292 kvm_mmu_pages_init(parent, &parents, &pages);
2293 while (mmu_unsync_walk(parent, &pages)) {
2294 struct kvm_mmu_page *sp;
2296 for_each_sp(pages, sp, parents, i) {
2297 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2298 mmu_pages_clear_parents(&parents);
2301 kvm_mmu_pages_init(parent, &parents, &pages);
2307 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2308 struct list_head *invalid_list)
2312 trace_kvm_mmu_prepare_zap_page(sp);
2313 ++kvm->stat.mmu_shadow_zapped;
2314 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
2315 kvm_mmu_page_unlink_children(kvm, sp);
2316 kvm_mmu_unlink_parents(kvm, sp);
2318 if (!sp->role.invalid && !sp->role.direct)
2319 unaccount_shadowed(kvm, sp);
2322 kvm_unlink_unsync_page(kvm, sp);
2323 if (!sp->root_count) {
2326 list_move(&sp->link, invalid_list);
2327 kvm_mod_used_mmu_pages(kvm, -1);
2329 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2332 * The obsolete pages can not be used on any vcpus.
2333 * See the comments in kvm_mmu_invalidate_zap_all_pages().
2335 if (!sp->role.invalid && !is_obsolete_sp(kvm, sp))
2336 kvm_reload_remote_mmus(kvm);
2339 sp->role.invalid = 1;
2343 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2344 struct list_head *invalid_list)
2346 struct kvm_mmu_page *sp, *nsp;
2348 if (list_empty(invalid_list))
2352 * wmb: make sure everyone sees our modifications to the page tables
2353 * rmb: make sure we see changes to vcpu->mode
2358 * Wait for all vcpus to exit guest mode and/or lockless shadow
2361 kvm_flush_remote_tlbs(kvm);
2363 list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2364 WARN_ON(!sp->role.invalid || sp->root_count);
2365 kvm_mmu_free_page(sp);
2369 static bool prepare_zap_oldest_mmu_page(struct kvm *kvm,
2370 struct list_head *invalid_list)
2372 struct kvm_mmu_page *sp;
2374 if (list_empty(&kvm->arch.active_mmu_pages))
2377 sp = list_entry(kvm->arch.active_mmu_pages.prev,
2378 struct kvm_mmu_page, link);
2379 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2385 * Changing the number of mmu pages allocated to the vm
2386 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2388 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
2390 LIST_HEAD(invalid_list);
2392 spin_lock(&kvm->mmu_lock);
2394 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2395 /* Need to free some mmu pages to achieve the goal. */
2396 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages)
2397 if (!prepare_zap_oldest_mmu_page(kvm, &invalid_list))
2400 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2401 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2404 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2406 spin_unlock(&kvm->mmu_lock);
2409 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2411 struct kvm_mmu_page *sp;
2412 LIST_HEAD(invalid_list);
2415 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2417 spin_lock(&kvm->mmu_lock);
2418 for_each_gfn_indirect_valid_sp(kvm, sp, gfn) {
2419 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2422 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2424 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2425 spin_unlock(&kvm->mmu_lock);
2429 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page);
2432 * The function is based on mtrr_type_lookup() in
2433 * arch/x86/kernel/cpu/mtrr/generic.c
2435 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
2439 u8 prev_match, curr_match;
2440 int i, num_var_ranges = KVM_NR_VAR_MTRR;
2442 /* MTRR is completely disabled, use UC for all of physical memory. */
2443 if (!(mtrr_state->enabled & 0x2))
2444 return MTRR_TYPE_UNCACHABLE;
2446 /* Make end inclusive end, instead of exclusive */
2449 /* Look in fixed ranges. Just return the type as per start */
2450 if (mtrr_state->have_fixed && (mtrr_state->enabled & 0x1) &&
2451 (start < 0x100000)) {
2454 if (start < 0x80000) {
2456 idx += (start >> 16);
2457 return mtrr_state->fixed_ranges[idx];
2458 } else if (start < 0xC0000) {
2460 idx += ((start - 0x80000) >> 14);
2461 return mtrr_state->fixed_ranges[idx];
2462 } else if (start < 0x1000000) {
2464 idx += ((start - 0xC0000) >> 12);
2465 return mtrr_state->fixed_ranges[idx];
2470 * Look in variable ranges
2471 * Look of multiple ranges matching this address and pick type
2472 * as per MTRR precedence
2475 for (i = 0; i < num_var_ranges; ++i) {
2476 unsigned short start_state, end_state;
2478 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
2481 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
2482 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
2483 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
2484 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
2486 start_state = ((start & mask) == (base & mask));
2487 end_state = ((end & mask) == (base & mask));
2488 if (start_state != end_state)
2491 if ((start & mask) != (base & mask))
2494 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
2495 if (prev_match == 0xFF) {
2496 prev_match = curr_match;
2500 if (prev_match == MTRR_TYPE_UNCACHABLE ||
2501 curr_match == MTRR_TYPE_UNCACHABLE)
2502 return MTRR_TYPE_UNCACHABLE;
2504 if ((prev_match == MTRR_TYPE_WRBACK &&
2505 curr_match == MTRR_TYPE_WRTHROUGH) ||
2506 (prev_match == MTRR_TYPE_WRTHROUGH &&
2507 curr_match == MTRR_TYPE_WRBACK)) {
2508 prev_match = MTRR_TYPE_WRTHROUGH;
2509 curr_match = MTRR_TYPE_WRTHROUGH;
2512 if (prev_match != curr_match)
2513 return MTRR_TYPE_UNCACHABLE;
2516 if (prev_match != 0xFF)
2519 return mtrr_state->def_type;
2522 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
2526 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
2527 (gfn << PAGE_SHIFT) + PAGE_SIZE);
2528 if (mtrr == 0xfe || mtrr == 0xff)
2529 mtrr = MTRR_TYPE_WRBACK;
2532 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
2534 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
2536 trace_kvm_mmu_unsync_page(sp);
2537 ++vcpu->kvm->stat.mmu_unsync;
2540 kvm_mmu_mark_parents_unsync(sp);
2543 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
2545 struct kvm_mmu_page *s;
2547 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
2550 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
2551 __kvm_unsync_page(vcpu, s);
2555 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
2558 struct kvm_mmu_page *s;
2559 bool need_unsync = false;
2561 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
2565 if (s->role.level != PT_PAGE_TABLE_LEVEL)
2572 kvm_unsync_pages(vcpu, gfn);
2576 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2577 unsigned pte_access, int level,
2578 gfn_t gfn, pfn_t pfn, bool speculative,
2579 bool can_unsync, bool host_writable)
2584 if (set_mmio_spte(vcpu, sptep, gfn, pfn, pte_access))
2587 spte = PT_PRESENT_MASK;
2589 spte |= shadow_accessed_mask;
2591 if (pte_access & ACC_EXEC_MASK)
2592 spte |= shadow_x_mask;
2594 spte |= shadow_nx_mask;
2596 if (pte_access & ACC_USER_MASK)
2597 spte |= shadow_user_mask;
2599 if (level > PT_PAGE_TABLE_LEVEL)
2600 spte |= PT_PAGE_SIZE_MASK;
2602 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
2603 kvm_is_reserved_pfn(pfn));
2606 spte |= SPTE_HOST_WRITEABLE;
2608 pte_access &= ~ACC_WRITE_MASK;
2610 spte |= (u64)pfn << PAGE_SHIFT;
2612 if (pte_access & ACC_WRITE_MASK) {
2615 * Other vcpu creates new sp in the window between
2616 * mapping_level() and acquiring mmu-lock. We can
2617 * allow guest to retry the access, the mapping can
2618 * be fixed if guest refault.
2620 if (level > PT_PAGE_TABLE_LEVEL &&
2621 has_wrprotected_page(vcpu, gfn, level))
2624 spte |= PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE;
2627 * Optimization: for pte sync, if spte was writable the hash
2628 * lookup is unnecessary (and expensive). Write protection
2629 * is responsibility of mmu_get_page / kvm_sync_page.
2630 * Same reasoning can be applied to dirty page accounting.
2632 if (!can_unsync && is_writable_pte(*sptep))
2635 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2636 pgprintk("%s: found shadow page for %llx, marking ro\n",
2639 pte_access &= ~ACC_WRITE_MASK;
2640 spte &= ~(PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE);
2644 if (pte_access & ACC_WRITE_MASK) {
2645 kvm_vcpu_mark_page_dirty(vcpu, gfn);
2646 spte |= shadow_dirty_mask;
2650 if (mmu_spte_update(sptep, spte))
2651 kvm_flush_remote_tlbs(vcpu->kvm);
2656 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2657 unsigned pte_access, int write_fault, int *emulate,
2658 int level, gfn_t gfn, pfn_t pfn, bool speculative,
2661 int was_rmapped = 0;
2664 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,
2665 *sptep, write_fault, gfn);
2667 if (is_rmap_spte(*sptep)) {
2669 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2670 * the parent of the now unreachable PTE.
2672 if (level > PT_PAGE_TABLE_LEVEL &&
2673 !is_large_pte(*sptep)) {
2674 struct kvm_mmu_page *child;
2677 child = page_header(pte & PT64_BASE_ADDR_MASK);
2678 drop_parent_pte(child, sptep);
2679 kvm_flush_remote_tlbs(vcpu->kvm);
2680 } else if (pfn != spte_to_pfn(*sptep)) {
2681 pgprintk("hfn old %llx new %llx\n",
2682 spte_to_pfn(*sptep), pfn);
2683 drop_spte(vcpu->kvm, sptep);
2684 kvm_flush_remote_tlbs(vcpu->kvm);
2689 if (set_spte(vcpu, sptep, pte_access, level, gfn, pfn, speculative,
2690 true, host_writable)) {
2693 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2696 if (unlikely(is_mmio_spte(*sptep) && emulate))
2699 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2700 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2701 is_large_pte(*sptep)? "2MB" : "4kB",
2702 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2704 if (!was_rmapped && is_large_pte(*sptep))
2705 ++vcpu->kvm->stat.lpages;
2707 if (is_shadow_present_pte(*sptep)) {
2709 rmap_count = rmap_add(vcpu, sptep, gfn);
2710 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2711 rmap_recycle(vcpu, sptep, gfn);
2715 kvm_release_pfn_clean(pfn);
2718 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2721 struct kvm_memory_slot *slot;
2723 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log);
2725 return KVM_PFN_ERR_FAULT;
2727 return gfn_to_pfn_memslot_atomic(slot, gfn);
2730 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2731 struct kvm_mmu_page *sp,
2732 u64 *start, u64 *end)
2734 struct page *pages[PTE_PREFETCH_NUM];
2735 struct kvm_memory_slot *slot;
2736 unsigned access = sp->role.access;
2740 gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2741 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK);
2745 ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start);
2749 for (i = 0; i < ret; i++, gfn++, start++)
2750 mmu_set_spte(vcpu, start, access, 0, NULL,
2751 sp->role.level, gfn, page_to_pfn(pages[i]),
2757 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2758 struct kvm_mmu_page *sp, u64 *sptep)
2760 u64 *spte, *start = NULL;
2763 WARN_ON(!sp->role.direct);
2765 i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2768 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2769 if (is_shadow_present_pte(*spte) || spte == sptep) {
2772 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2780 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2782 struct kvm_mmu_page *sp;
2785 * Since it's no accessed bit on EPT, it's no way to
2786 * distinguish between actually accessed translations
2787 * and prefetched, so disable pte prefetch if EPT is
2790 if (!shadow_accessed_mask)
2793 sp = page_header(__pa(sptep));
2794 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2797 __direct_pte_prefetch(vcpu, sp, sptep);
2800 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2801 int map_writable, int level, gfn_t gfn, pfn_t pfn,
2804 struct kvm_shadow_walk_iterator iterator;
2805 struct kvm_mmu_page *sp;
2809 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2812 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2813 if (iterator.level == level) {
2814 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL,
2815 write, &emulate, level, gfn, pfn,
2816 prefault, map_writable);
2817 direct_pte_prefetch(vcpu, iterator.sptep);
2818 ++vcpu->stat.pf_fixed;
2822 drop_large_spte(vcpu, iterator.sptep);
2823 if (!is_shadow_present_pte(*iterator.sptep)) {
2824 u64 base_addr = iterator.addr;
2826 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2827 pseudo_gfn = base_addr >> PAGE_SHIFT;
2828 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2830 1, ACC_ALL, iterator.sptep);
2832 link_shadow_page(iterator.sptep, sp, true);
2838 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2842 info.si_signo = SIGBUS;
2844 info.si_code = BUS_MCEERR_AR;
2845 info.si_addr = (void __user *)address;
2846 info.si_addr_lsb = PAGE_SHIFT;
2848 send_sig_info(SIGBUS, &info, tsk);
2851 static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, pfn_t pfn)
2854 * Do not cache the mmio info caused by writing the readonly gfn
2855 * into the spte otherwise read access on readonly gfn also can
2856 * caused mmio page fault and treat it as mmio access.
2857 * Return 1 to tell kvm to emulate it.
2859 if (pfn == KVM_PFN_ERR_RO_FAULT)
2862 if (pfn == KVM_PFN_ERR_HWPOISON) {
2863 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current);
2870 static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,
2871 gfn_t *gfnp, pfn_t *pfnp, int *levelp)
2875 int level = *levelp;
2878 * Check if it's a transparent hugepage. If this would be an
2879 * hugetlbfs page, level wouldn't be set to
2880 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2883 if (!is_error_noslot_pfn(pfn) && !kvm_is_reserved_pfn(pfn) &&
2884 level == PT_PAGE_TABLE_LEVEL &&
2885 PageTransCompound(pfn_to_page(pfn)) &&
2886 !has_wrprotected_page(vcpu, gfn, PT_DIRECTORY_LEVEL)) {
2889 * mmu_notifier_retry was successful and we hold the
2890 * mmu_lock here, so the pmd can't become splitting
2891 * from under us, and in turn
2892 * __split_huge_page_refcount() can't run from under
2893 * us and we can safely transfer the refcount from
2894 * PG_tail to PG_head as we switch the pfn to tail to
2897 *levelp = level = PT_DIRECTORY_LEVEL;
2898 mask = KVM_PAGES_PER_HPAGE(level) - 1;
2899 VM_BUG_ON((gfn & mask) != (pfn & mask));
2903 kvm_release_pfn_clean(pfn);
2911 static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn,
2912 pfn_t pfn, unsigned access, int *ret_val)
2916 /* The pfn is invalid, report the error! */
2917 if (unlikely(is_error_pfn(pfn))) {
2918 *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn);
2922 if (unlikely(is_noslot_pfn(pfn)))
2923 vcpu_cache_mmio_info(vcpu, gva, gfn, access);
2930 static bool page_fault_can_be_fast(u32 error_code)
2933 * Do not fix the mmio spte with invalid generation number which
2934 * need to be updated by slow page fault path.
2936 if (unlikely(error_code & PFERR_RSVD_MASK))
2940 * #PF can be fast only if the shadow page table is present and it
2941 * is caused by write-protect, that means we just need change the
2942 * W bit of the spte which can be done out of mmu-lock.
2944 if (!(error_code & PFERR_PRESENT_MASK) ||
2945 !(error_code & PFERR_WRITE_MASK))
2952 fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
2953 u64 *sptep, u64 spte)
2957 WARN_ON(!sp->role.direct);
2960 * The gfn of direct spte is stable since it is calculated
2963 gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt);
2966 * Theoretically we could also set dirty bit (and flush TLB) here in
2967 * order to eliminate unnecessary PML logging. See comments in
2968 * set_spte. But fast_page_fault is very unlikely to happen with PML
2969 * enabled, so we do not do this. This might result in the same GPA
2970 * to be logged in PML buffer again when the write really happens, and
2971 * eventually to be called by mark_page_dirty twice. But it's also no
2972 * harm. This also avoids the TLB flush needed after setting dirty bit
2973 * so non-PML cases won't be impacted.
2975 * Compare with set_spte where instead shadow_dirty_mask is set.
2977 if (cmpxchg64(sptep, spte, spte | PT_WRITABLE_MASK) == spte)
2978 kvm_vcpu_mark_page_dirty(vcpu, gfn);
2985 * - true: let the vcpu to access on the same address again.
2986 * - false: let the real page fault path to fix it.
2988 static bool fast_page_fault(struct kvm_vcpu *vcpu, gva_t gva, int level,
2991 struct kvm_shadow_walk_iterator iterator;
2992 struct kvm_mmu_page *sp;
2996 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2999 if (!page_fault_can_be_fast(error_code))
3002 walk_shadow_page_lockless_begin(vcpu);
3003 for_each_shadow_entry_lockless(vcpu, gva, iterator, spte)
3004 if (!is_shadow_present_pte(spte) || iterator.level < level)
3008 * If the mapping has been changed, let the vcpu fault on the
3009 * same address again.
3011 if (!is_rmap_spte(spte)) {
3016 sp = page_header(__pa(iterator.sptep));
3017 if (!is_last_spte(spte, sp->role.level))
3021 * Check if it is a spurious fault caused by TLB lazily flushed.
3023 * Need not check the access of upper level table entries since
3024 * they are always ACC_ALL.
3026 if (is_writable_pte(spte)) {
3032 * Currently, to simplify the code, only the spte write-protected
3033 * by dirty-log can be fast fixed.
3035 if (!spte_is_locklessly_modifiable(spte))
3039 * Do not fix write-permission on the large spte since we only dirty
3040 * the first page into the dirty-bitmap in fast_pf_fix_direct_spte()
3041 * that means other pages are missed if its slot is dirty-logged.
3043 * Instead, we let the slow page fault path create a normal spte to
3046 * See the comments in kvm_arch_commit_memory_region().
3048 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
3052 * Currently, fast page fault only works for direct mapping since
3053 * the gfn is not stable for indirect shadow page.
3054 * See Documentation/virtual/kvm/locking.txt to get more detail.
3056 ret = fast_pf_fix_direct_spte(vcpu, sp, iterator.sptep, spte);
3058 trace_fast_page_fault(vcpu, gva, error_code, iterator.sptep,
3060 walk_shadow_page_lockless_end(vcpu);
3065 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
3066 gva_t gva, pfn_t *pfn, bool write, bool *writable);
3067 static void make_mmu_pages_available(struct kvm_vcpu *vcpu);
3069 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, u32 error_code,
3070 gfn_t gfn, bool prefault)
3076 unsigned long mmu_seq;
3077 bool map_writable, write = error_code & PFERR_WRITE_MASK;
3079 force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
3080 if (likely(!force_pt_level)) {
3081 level = mapping_level(vcpu, gfn);
3083 * This path builds a PAE pagetable - so we can map
3084 * 2mb pages at maximum. Therefore check if the level
3085 * is larger than that.
3087 if (level > PT_DIRECTORY_LEVEL)
3088 level = PT_DIRECTORY_LEVEL;
3090 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
3092 level = PT_PAGE_TABLE_LEVEL;
3094 if (fast_page_fault(vcpu, v, level, error_code))
3097 mmu_seq = vcpu->kvm->mmu_notifier_seq;
3100 if (try_async_pf(vcpu, prefault, gfn, v, &pfn, write, &map_writable))
3103 if (handle_abnormal_pfn(vcpu, v, gfn, pfn, ACC_ALL, &r))
3106 spin_lock(&vcpu->kvm->mmu_lock);
3107 if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
3109 make_mmu_pages_available(vcpu);
3110 if (likely(!force_pt_level))
3111 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
3112 r = __direct_map(vcpu, v, write, map_writable, level, gfn, pfn,
3114 spin_unlock(&vcpu->kvm->mmu_lock);
3120 spin_unlock(&vcpu->kvm->mmu_lock);
3121 kvm_release_pfn_clean(pfn);
3126 static void mmu_free_roots(struct kvm_vcpu *vcpu)
3129 struct kvm_mmu_page *sp;
3130 LIST_HEAD(invalid_list);
3132 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3135 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
3136 (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
3137 vcpu->arch.mmu.direct_map)) {
3138 hpa_t root = vcpu->arch.mmu.root_hpa;
3140 spin_lock(&vcpu->kvm->mmu_lock);
3141 sp = page_header(root);
3143 if (!sp->root_count && sp->role.invalid) {
3144 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3145 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3147 spin_unlock(&vcpu->kvm->mmu_lock);
3148 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3152 spin_lock(&vcpu->kvm->mmu_lock);
3153 for (i = 0; i < 4; ++i) {
3154 hpa_t root = vcpu->arch.mmu.pae_root[i];
3157 root &= PT64_BASE_ADDR_MASK;
3158 sp = page_header(root);
3160 if (!sp->root_count && sp->role.invalid)
3161 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3164 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3166 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3167 spin_unlock(&vcpu->kvm->mmu_lock);
3168 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3171 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
3175 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
3176 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3183 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3185 struct kvm_mmu_page *sp;
3188 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3189 spin_lock(&vcpu->kvm->mmu_lock);
3190 make_mmu_pages_available(vcpu);
3191 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
3194 spin_unlock(&vcpu->kvm->mmu_lock);
3195 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
3196 } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
3197 for (i = 0; i < 4; ++i) {
3198 hpa_t root = vcpu->arch.mmu.pae_root[i];
3200 MMU_WARN_ON(VALID_PAGE(root));
3201 spin_lock(&vcpu->kvm->mmu_lock);
3202 make_mmu_pages_available(vcpu);
3203 sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
3205 PT32_ROOT_LEVEL, 1, ACC_ALL,
3207 root = __pa(sp->spt);
3209 spin_unlock(&vcpu->kvm->mmu_lock);
3210 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
3212 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
3219 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3221 struct kvm_mmu_page *sp;
3226 root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
3228 if (mmu_check_root(vcpu, root_gfn))
3232 * Do we shadow a long mode page table? If so we need to
3233 * write-protect the guests page table root.
3235 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
3236 hpa_t root = vcpu->arch.mmu.root_hpa;
3238 MMU_WARN_ON(VALID_PAGE(root));
3240 spin_lock(&vcpu->kvm->mmu_lock);
3241 make_mmu_pages_available(vcpu);
3242 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
3244 root = __pa(sp->spt);
3246 spin_unlock(&vcpu->kvm->mmu_lock);
3247 vcpu->arch.mmu.root_hpa = root;
3252 * We shadow a 32 bit page table. This may be a legacy 2-level
3253 * or a PAE 3-level page table. In either case we need to be aware that
3254 * the shadow page table may be a PAE or a long mode page table.
3256 pm_mask = PT_PRESENT_MASK;
3257 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
3258 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3260 for (i = 0; i < 4; ++i) {
3261 hpa_t root = vcpu->arch.mmu.pae_root[i];
3263 MMU_WARN_ON(VALID_PAGE(root));
3264 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
3265 pdptr = vcpu->arch.mmu.get_pdptr(vcpu, i);
3266 if (!is_present_gpte(pdptr)) {
3267 vcpu->arch.mmu.pae_root[i] = 0;
3270 root_gfn = pdptr >> PAGE_SHIFT;
3271 if (mmu_check_root(vcpu, root_gfn))
3274 spin_lock(&vcpu->kvm->mmu_lock);
3275 make_mmu_pages_available(vcpu);
3276 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
3279 root = __pa(sp->spt);
3281 spin_unlock(&vcpu->kvm->mmu_lock);
3283 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
3285 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
3288 * If we shadow a 32 bit page table with a long mode page
3289 * table we enter this path.
3291 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3292 if (vcpu->arch.mmu.lm_root == NULL) {
3294 * The additional page necessary for this is only
3295 * allocated on demand.
3300 lm_root = (void*)get_zeroed_page(GFP_KERNEL);
3301 if (lm_root == NULL)
3304 lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
3306 vcpu->arch.mmu.lm_root = lm_root;
3309 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
3315 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
3317 if (vcpu->arch.mmu.direct_map)
3318 return mmu_alloc_direct_roots(vcpu);
3320 return mmu_alloc_shadow_roots(vcpu);
3323 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
3326 struct kvm_mmu_page *sp;
3328 if (vcpu->arch.mmu.direct_map)
3331 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3334 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
3335 kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
3336 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
3337 hpa_t root = vcpu->arch.mmu.root_hpa;
3338 sp = page_header(root);
3339 mmu_sync_children(vcpu, sp);
3340 kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
3343 for (i = 0; i < 4; ++i) {
3344 hpa_t root = vcpu->arch.mmu.pae_root[i];
3346 if (root && VALID_PAGE(root)) {
3347 root &= PT64_BASE_ADDR_MASK;
3348 sp = page_header(root);
3349 mmu_sync_children(vcpu, sp);
3352 kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
3355 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
3357 spin_lock(&vcpu->kvm->mmu_lock);
3358 mmu_sync_roots(vcpu);
3359 spin_unlock(&vcpu->kvm->mmu_lock);
3361 EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots);
3363 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
3364 u32 access, struct x86_exception *exception)
3367 exception->error_code = 0;
3371 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
3373 struct x86_exception *exception)
3376 exception->error_code = 0;
3377 return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception);
3380 static bool quickly_check_mmio_pf(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3383 return vcpu_match_mmio_gpa(vcpu, addr);
3385 return vcpu_match_mmio_gva(vcpu, addr);
3390 * On direct hosts, the last spte is only allows two states
3391 * for mmio page fault:
3392 * - It is the mmio spte
3393 * - It is zapped or it is being zapped.
3395 * This function completely checks the spte when the last spte
3396 * is not the mmio spte.
3398 static bool check_direct_spte_mmio_pf(u64 spte)
3400 return __check_direct_spte_mmio_pf(spte);
3403 static u64 walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr)
3405 struct kvm_shadow_walk_iterator iterator;
3408 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3411 walk_shadow_page_lockless_begin(vcpu);
3412 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte)
3413 if (!is_shadow_present_pte(spte))
3415 walk_shadow_page_lockless_end(vcpu);
3420 int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3424 if (quickly_check_mmio_pf(vcpu, addr, direct))
3425 return RET_MMIO_PF_EMULATE;
3427 spte = walk_shadow_page_get_mmio_spte(vcpu, addr);
3429 if (is_mmio_spte(spte)) {
3430 gfn_t gfn = get_mmio_spte_gfn(spte);
3431 unsigned access = get_mmio_spte_access(spte);
3433 if (!check_mmio_spte(vcpu, spte))
3434 return RET_MMIO_PF_INVALID;
3439 trace_handle_mmio_page_fault(addr, gfn, access);
3440 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
3441 return RET_MMIO_PF_EMULATE;
3445 * It's ok if the gva is remapped by other cpus on shadow guest,
3446 * it's a BUG if the gfn is not a mmio page.
3448 if (direct && !check_direct_spte_mmio_pf(spte))
3449 return RET_MMIO_PF_BUG;
3452 * If the page table is zapped by other cpus, let CPU fault again on
3455 return RET_MMIO_PF_RETRY;
3457 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common);
3459 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr,
3460 u32 error_code, bool direct)
3464 ret = handle_mmio_page_fault_common(vcpu, addr, direct);
3465 WARN_ON(ret == RET_MMIO_PF_BUG);
3469 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3470 u32 error_code, bool prefault)
3475 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
3477 if (unlikely(error_code & PFERR_RSVD_MASK)) {
3478 r = handle_mmio_page_fault(vcpu, gva, error_code, true);
3480 if (likely(r != RET_MMIO_PF_INVALID))
3484 r = mmu_topup_memory_caches(vcpu);
3488 MMU_WARN_ON(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3490 gfn = gva >> PAGE_SHIFT;
3492 return nonpaging_map(vcpu, gva & PAGE_MASK,
3493 error_code, gfn, prefault);
3496 static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
3498 struct kvm_arch_async_pf arch;
3500 arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
3502 arch.direct_map = vcpu->arch.mmu.direct_map;
3503 arch.cr3 = vcpu->arch.mmu.get_cr3(vcpu);
3505 return kvm_setup_async_pf(vcpu, gva, kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
3508 static bool can_do_async_pf(struct kvm_vcpu *vcpu)
3510 if (unlikely(!irqchip_in_kernel(vcpu->kvm) ||
3511 kvm_event_needs_reinjection(vcpu)))
3514 return kvm_x86_ops->interrupt_allowed(vcpu);
3517 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
3518 gva_t gva, pfn_t *pfn, bool write, bool *writable)
3520 struct kvm_memory_slot *slot;
3523 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
3525 *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, write, writable);
3527 return false; /* *pfn has correct page already */
3529 if (!prefault && can_do_async_pf(vcpu)) {
3530 trace_kvm_try_async_get_page(gva, gfn);
3531 if (kvm_find_async_pf_gfn(vcpu, gfn)) {
3532 trace_kvm_async_pf_doublefault(gva, gfn);
3533 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
3535 } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn))
3539 *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, write, writable);
3543 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,
3550 gfn_t gfn = gpa >> PAGE_SHIFT;
3551 unsigned long mmu_seq;
3552 int write = error_code & PFERR_WRITE_MASK;
3555 MMU_WARN_ON(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3557 if (unlikely(error_code & PFERR_RSVD_MASK)) {
3558 r = handle_mmio_page_fault(vcpu, gpa, error_code, true);
3560 if (likely(r != RET_MMIO_PF_INVALID))
3564 r = mmu_topup_memory_caches(vcpu);
3568 force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
3569 if (likely(!force_pt_level)) {
3570 level = mapping_level(vcpu, gfn);
3571 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
3573 level = PT_PAGE_TABLE_LEVEL;
3575 if (fast_page_fault(vcpu, gpa, level, error_code))
3578 mmu_seq = vcpu->kvm->mmu_notifier_seq;
3581 if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable))
3584 if (handle_abnormal_pfn(vcpu, 0, gfn, pfn, ACC_ALL, &r))
3587 spin_lock(&vcpu->kvm->mmu_lock);
3588 if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
3590 make_mmu_pages_available(vcpu);
3591 if (likely(!force_pt_level))
3592 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
3593 r = __direct_map(vcpu, gpa, write, map_writable,
3594 level, gfn, pfn, prefault);
3595 spin_unlock(&vcpu->kvm->mmu_lock);
3600 spin_unlock(&vcpu->kvm->mmu_lock);
3601 kvm_release_pfn_clean(pfn);
3605 static void nonpaging_init_context(struct kvm_vcpu *vcpu,
3606 struct kvm_mmu *context)
3608 context->page_fault = nonpaging_page_fault;
3609 context->gva_to_gpa = nonpaging_gva_to_gpa;
3610 context->sync_page = nonpaging_sync_page;
3611 context->invlpg = nonpaging_invlpg;
3612 context->update_pte = nonpaging_update_pte;
3613 context->root_level = 0;
3614 context->shadow_root_level = PT32E_ROOT_LEVEL;
3615 context->root_hpa = INVALID_PAGE;
3616 context->direct_map = true;
3617 context->nx = false;
3620 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu)
3622 mmu_free_roots(vcpu);
3625 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
3627 return kvm_read_cr3(vcpu);
3630 static void inject_page_fault(struct kvm_vcpu *vcpu,
3631 struct x86_exception *fault)
3633 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
3636 static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
3637 unsigned access, int *nr_present)
3639 if (unlikely(is_mmio_spte(*sptep))) {
3640 if (gfn != get_mmio_spte_gfn(*sptep)) {
3641 mmu_spte_clear_no_track(sptep);
3646 mark_mmio_spte(vcpu, sptep, gfn, access);
3653 static inline bool is_last_gpte(struct kvm_mmu *mmu, unsigned level, unsigned gpte)
3658 index |= (gpte & PT_PAGE_SIZE_MASK) >> (PT_PAGE_SIZE_SHIFT - 2);
3659 return mmu->last_pte_bitmap & (1 << index);
3662 #define PTTYPE_EPT 18 /* arbitrary */
3663 #define PTTYPE PTTYPE_EPT
3664 #include "paging_tmpl.h"
3668 #include "paging_tmpl.h"
3672 #include "paging_tmpl.h"
3675 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3676 struct kvm_mmu *context)
3678 int maxphyaddr = cpuid_maxphyaddr(vcpu);
3679 u64 exb_bit_rsvd = 0;
3680 u64 gbpages_bit_rsvd = 0;
3681 u64 nonleaf_bit8_rsvd = 0;
3683 context->bad_mt_xwr = 0;
3686 exb_bit_rsvd = rsvd_bits(63, 63);
3687 if (!guest_cpuid_has_gbpages(vcpu))
3688 gbpages_bit_rsvd = rsvd_bits(7, 7);
3691 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
3692 * leaf entries) on AMD CPUs only.
3694 if (guest_cpuid_is_amd(vcpu))
3695 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
3697 switch (context->root_level) {
3698 case PT32_ROOT_LEVEL:
3699 /* no rsvd bits for 2 level 4K page table entries */
3700 context->rsvd_bits_mask[0][1] = 0;
3701 context->rsvd_bits_mask[0][0] = 0;
3702 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3704 if (!is_pse(vcpu)) {
3705 context->rsvd_bits_mask[1][1] = 0;
3709 if (is_cpuid_PSE36())
3710 /* 36bits PSE 4MB page */
3711 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
3713 /* 32 bits PSE 4MB page */
3714 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
3716 case PT32E_ROOT_LEVEL:
3717 context->rsvd_bits_mask[0][2] =
3718 rsvd_bits(maxphyaddr, 63) |
3719 rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */
3720 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3721 rsvd_bits(maxphyaddr, 62); /* PDE */
3722 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3723 rsvd_bits(maxphyaddr, 62); /* PTE */
3724 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3725 rsvd_bits(maxphyaddr, 62) |
3726 rsvd_bits(13, 20); /* large page */
3727 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3729 case PT64_ROOT_LEVEL:
3730 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
3731 nonleaf_bit8_rsvd | rsvd_bits(7, 7) | rsvd_bits(maxphyaddr, 51);
3732 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
3733 nonleaf_bit8_rsvd | gbpages_bit_rsvd | rsvd_bits(maxphyaddr, 51);
3734 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3735 rsvd_bits(maxphyaddr, 51);
3736 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3737 rsvd_bits(maxphyaddr, 51);
3738 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
3739 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
3740 gbpages_bit_rsvd | rsvd_bits(maxphyaddr, 51) |
3742 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3743 rsvd_bits(maxphyaddr, 51) |
3744 rsvd_bits(13, 20); /* large page */
3745 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3750 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
3751 struct kvm_mmu *context, bool execonly)
3753 int maxphyaddr = cpuid_maxphyaddr(vcpu);
3756 context->rsvd_bits_mask[0][3] =
3757 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 7);
3758 context->rsvd_bits_mask[0][2] =
3759 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6);
3760 context->rsvd_bits_mask[0][1] =
3761 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6);
3762 context->rsvd_bits_mask[0][0] = rsvd_bits(maxphyaddr, 51);
3765 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
3766 context->rsvd_bits_mask[1][2] =
3767 rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 29);
3768 context->rsvd_bits_mask[1][1] =
3769 rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 20);
3770 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3772 for (pte = 0; pte < 64; pte++) {
3773 int rwx_bits = pte & 7;
3775 if (mt == 0x2 || mt == 0x3 || mt == 0x7 ||
3776 rwx_bits == 0x2 || rwx_bits == 0x6 ||
3777 (rwx_bits == 0x4 && !execonly))
3778 context->bad_mt_xwr |= (1ull << pte);
3782 static void update_permission_bitmask(struct kvm_vcpu *vcpu,
3783 struct kvm_mmu *mmu, bool ept)
3785 unsigned bit, byte, pfec;
3787 bool fault, x, w, u, wf, uf, ff, smapf, cr4_smap, cr4_smep, smap = 0;
3789 cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3790 cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
3791 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
3794 wf = pfec & PFERR_WRITE_MASK;
3795 uf = pfec & PFERR_USER_MASK;
3796 ff = pfec & PFERR_FETCH_MASK;
3798 * PFERR_RSVD_MASK bit is set in PFEC if the access is not
3799 * subject to SMAP restrictions, and cleared otherwise. The
3800 * bit is only meaningful if the SMAP bit is set in CR4.
3802 smapf = !(pfec & PFERR_RSVD_MASK);
3803 for (bit = 0; bit < 8; ++bit) {
3804 x = bit & ACC_EXEC_MASK;
3805 w = bit & ACC_WRITE_MASK;
3806 u = bit & ACC_USER_MASK;
3809 /* Not really needed: !nx will cause pte.nx to fault */
3811 /* Allow supervisor writes if !cr0.wp */
3812 w |= !is_write_protection(vcpu) && !uf;
3813 /* Disallow supervisor fetches of user code if cr4.smep */
3814 x &= !(cr4_smep && u && !uf);
3817 * SMAP:kernel-mode data accesses from user-mode
3818 * mappings should fault. A fault is considered
3819 * as a SMAP violation if all of the following
3820 * conditions are ture:
3821 * - X86_CR4_SMAP is set in CR4
3822 * - An user page is accessed
3823 * - Page fault in kernel mode
3824 * - if CPL = 3 or X86_EFLAGS_AC is clear
3826 * Here, we cover the first three conditions.
3827 * The fourth is computed dynamically in
3828 * permission_fault() and is in smapf.
3830 * Also, SMAP does not affect instruction
3831 * fetches, add the !ff check here to make it
3834 smap = cr4_smap && u && !uf && !ff;
3836 /* Not really needed: no U/S accesses on ept */
3839 fault = (ff && !x) || (uf && !u) || (wf && !w) ||
3841 map |= fault << bit;
3843 mmu->permissions[byte] = map;
3847 static void update_last_pte_bitmap(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
3850 unsigned level, root_level = mmu->root_level;
3851 const unsigned ps_set_index = 1 << 2; /* bit 2 of index: ps */
3853 if (root_level == PT32E_ROOT_LEVEL)
3855 /* PT_PAGE_TABLE_LEVEL always terminates */
3856 map = 1 | (1 << ps_set_index);
3857 for (level = PT_DIRECTORY_LEVEL; level <= root_level; ++level) {
3858 if (level <= PT_PDPE_LEVEL
3859 && (mmu->root_level >= PT32E_ROOT_LEVEL || is_pse(vcpu)))
3860 map |= 1 << (ps_set_index | (level - 1));
3862 mmu->last_pte_bitmap = map;
3865 static void paging64_init_context_common(struct kvm_vcpu *vcpu,
3866 struct kvm_mmu *context,
3869 context->nx = is_nx(vcpu);
3870 context->root_level = level;
3872 reset_rsvds_bits_mask(vcpu, context);
3873 update_permission_bitmask(vcpu, context, false);
3874 update_last_pte_bitmap(vcpu, context);
3876 MMU_WARN_ON(!is_pae(vcpu));
3877 context->page_fault = paging64_page_fault;
3878 context->gva_to_gpa = paging64_gva_to_gpa;
3879 context->sync_page = paging64_sync_page;
3880 context->invlpg = paging64_invlpg;
3881 context->update_pte = paging64_update_pte;
3882 context->shadow_root_level = level;
3883 context->root_hpa = INVALID_PAGE;
3884 context->direct_map = false;
3887 static void paging64_init_context(struct kvm_vcpu *vcpu,
3888 struct kvm_mmu *context)
3890 paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
3893 static void paging32_init_context(struct kvm_vcpu *vcpu,
3894 struct kvm_mmu *context)
3896 context->nx = false;
3897 context->root_level = PT32_ROOT_LEVEL;
3899 reset_rsvds_bits_mask(vcpu, context);
3900 update_permission_bitmask(vcpu, context, false);
3901 update_last_pte_bitmap(vcpu, context);
3903 context->page_fault = paging32_page_fault;
3904 context->gva_to_gpa = paging32_gva_to_gpa;
3905 context->sync_page = paging32_sync_page;
3906 context->invlpg = paging32_invlpg;
3907 context->update_pte = paging32_update_pte;
3908 context->shadow_root_level = PT32E_ROOT_LEVEL;
3909 context->root_hpa = INVALID_PAGE;
3910 context->direct_map = false;
3913 static void paging32E_init_context(struct kvm_vcpu *vcpu,
3914 struct kvm_mmu *context)
3916 paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
3919 static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
3921 struct kvm_mmu *context = &vcpu->arch.mmu;
3923 context->base_role.word = 0;
3924 context->page_fault = tdp_page_fault;
3925 context->sync_page = nonpaging_sync_page;
3926 context->invlpg = nonpaging_invlpg;
3927 context->update_pte = nonpaging_update_pte;
3928 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
3929 context->root_hpa = INVALID_PAGE;
3930 context->direct_map = true;
3931 context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
3932 context->get_cr3 = get_cr3;
3933 context->get_pdptr = kvm_pdptr_read;
3934 context->inject_page_fault = kvm_inject_page_fault;
3936 if (!is_paging(vcpu)) {
3937 context->nx = false;
3938 context->gva_to_gpa = nonpaging_gva_to_gpa;
3939 context->root_level = 0;
3940 } else if (is_long_mode(vcpu)) {
3941 context->nx = is_nx(vcpu);
3942 context->root_level = PT64_ROOT_LEVEL;
3943 reset_rsvds_bits_mask(vcpu, context);
3944 context->gva_to_gpa = paging64_gva_to_gpa;
3945 } else if (is_pae(vcpu)) {
3946 context->nx = is_nx(vcpu);
3947 context->root_level = PT32E_ROOT_LEVEL;
3948 reset_rsvds_bits_mask(vcpu, context);
3949 context->gva_to_gpa = paging64_gva_to_gpa;
3951 context->nx = false;
3952 context->root_level = PT32_ROOT_LEVEL;
3953 reset_rsvds_bits_mask(vcpu, context);
3954 context->gva_to_gpa = paging32_gva_to_gpa;
3957 update_permission_bitmask(vcpu, context, false);
3958 update_last_pte_bitmap(vcpu, context);
3961 void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu)
3963 bool smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3964 bool smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
3965 struct kvm_mmu *context = &vcpu->arch.mmu;
3967 MMU_WARN_ON(VALID_PAGE(context->root_hpa));
3969 if (!is_paging(vcpu))
3970 nonpaging_init_context(vcpu, context);
3971 else if (is_long_mode(vcpu))
3972 paging64_init_context(vcpu, context);
3973 else if (is_pae(vcpu))
3974 paging32E_init_context(vcpu, context);
3976 paging32_init_context(vcpu, context);
3978 context->base_role.nxe = is_nx(vcpu);
3979 context->base_role.cr4_pae = !!is_pae(vcpu);
3980 context->base_role.cr0_wp = is_write_protection(vcpu);
3981 context->base_role.smep_andnot_wp
3982 = smep && !is_write_protection(vcpu);
3983 context->base_role.smap_andnot_wp
3984 = smap && !is_write_protection(vcpu);
3986 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
3988 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly)
3990 struct kvm_mmu *context = &vcpu->arch.mmu;
3992 MMU_WARN_ON(VALID_PAGE(context->root_hpa));
3994 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
3997 context->page_fault = ept_page_fault;
3998 context->gva_to_gpa = ept_gva_to_gpa;
3999 context->sync_page = ept_sync_page;
4000 context->invlpg = ept_invlpg;
4001 context->update_pte = ept_update_pte;
4002 context->root_level = context->shadow_root_level;
4003 context->root_hpa = INVALID_PAGE;
4004 context->direct_map = false;
4006 update_permission_bitmask(vcpu, context, true);
4007 reset_rsvds_bits_mask_ept(vcpu, context, execonly);
4009 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu);
4011 static void init_kvm_softmmu(struct kvm_vcpu *vcpu)
4013 struct kvm_mmu *context = &vcpu->arch.mmu;
4015 kvm_init_shadow_mmu(vcpu);
4016 context->set_cr3 = kvm_x86_ops->set_cr3;
4017 context->get_cr3 = get_cr3;
4018 context->get_pdptr = kvm_pdptr_read;
4019 context->inject_page_fault = kvm_inject_page_fault;
4022 static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
4024 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
4026 g_context->get_cr3 = get_cr3;
4027 g_context->get_pdptr = kvm_pdptr_read;
4028 g_context->inject_page_fault = kvm_inject_page_fault;
4031 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
4032 * translation of l2_gpa to l1_gpa addresses is done using the
4033 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
4034 * functions between mmu and nested_mmu are swapped.
4036 if (!is_paging(vcpu)) {
4037 g_context->nx = false;
4038 g_context->root_level = 0;
4039 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
4040 } else if (is_long_mode(vcpu)) {
4041 g_context->nx = is_nx(vcpu);
4042 g_context->root_level = PT64_ROOT_LEVEL;
4043 reset_rsvds_bits_mask(vcpu, g_context);
4044 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
4045 } else if (is_pae(vcpu)) {
4046 g_context->nx = is_nx(vcpu);
4047 g_context->root_level = PT32E_ROOT_LEVEL;
4048 reset_rsvds_bits_mask(vcpu, g_context);
4049 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
4051 g_context->nx = false;
4052 g_context->root_level = PT32_ROOT_LEVEL;
4053 reset_rsvds_bits_mask(vcpu, g_context);
4054 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
4057 update_permission_bitmask(vcpu, g_context, false);
4058 update_last_pte_bitmap(vcpu, g_context);
4061 static void init_kvm_mmu(struct kvm_vcpu *vcpu)
4063 if (mmu_is_nested(vcpu))
4064 init_kvm_nested_mmu(vcpu);
4065 else if (tdp_enabled)
4066 init_kvm_tdp_mmu(vcpu);
4068 init_kvm_softmmu(vcpu);
4071 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
4073 kvm_mmu_unload(vcpu);
4076 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
4078 int kvm_mmu_load(struct kvm_vcpu *vcpu)
4082 r = mmu_topup_memory_caches(vcpu);
4085 r = mmu_alloc_roots(vcpu);
4086 kvm_mmu_sync_roots(vcpu);
4089 /* set_cr3() should ensure TLB has been flushed */
4090 vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
4094 EXPORT_SYMBOL_GPL(kvm_mmu_load);
4096 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
4098 mmu_free_roots(vcpu);
4099 WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa));
4101 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
4103 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4104 struct kvm_mmu_page *sp, u64 *spte,
4107 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
4108 ++vcpu->kvm->stat.mmu_pde_zapped;
4112 ++vcpu->kvm->stat.mmu_pte_updated;
4113 vcpu->arch.mmu.update_pte(vcpu, sp, spte, new);
4116 static bool need_remote_flush(u64 old, u64 new)
4118 if (!is_shadow_present_pte(old))
4120 if (!is_shadow_present_pte(new))
4122 if ((old ^ new) & PT64_BASE_ADDR_MASK)
4124 old ^= shadow_nx_mask;
4125 new ^= shadow_nx_mask;
4126 return (old & ~new & PT64_PERM_MASK) != 0;
4129 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
4130 bool remote_flush, bool local_flush)
4136 kvm_flush_remote_tlbs(vcpu->kvm);
4137 else if (local_flush)
4138 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
4141 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
4142 const u8 *new, int *bytes)
4148 * Assume that the pte write on a page table of the same type
4149 * as the current vcpu paging mode since we update the sptes only
4150 * when they have the same mode.
4152 if (is_pae(vcpu) && *bytes == 4) {
4153 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
4156 r = kvm_vcpu_read_guest(vcpu, *gpa, &gentry, 8);
4159 new = (const u8 *)&gentry;
4164 gentry = *(const u32 *)new;
4167 gentry = *(const u64 *)new;
4178 * If we're seeing too many writes to a page, it may no longer be a page table,
4179 * or we may be forking, in which case it is better to unmap the page.
4181 static bool detect_write_flooding(struct kvm_mmu_page *sp)
4184 * Skip write-flooding detected for the sp whose level is 1, because
4185 * it can become unsync, then the guest page is not write-protected.
4187 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
4190 return ++sp->write_flooding_count >= 3;
4194 * Misaligned accesses are too much trouble to fix up; also, they usually
4195 * indicate a page is not used as a page table.
4197 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
4200 unsigned offset, pte_size, misaligned;
4202 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4203 gpa, bytes, sp->role.word);
4205 offset = offset_in_page(gpa);
4206 pte_size = sp->role.cr4_pae ? 8 : 4;
4209 * Sometimes, the OS only writes the last one bytes to update status
4210 * bits, for example, in linux, andb instruction is used in clear_bit().
4212 if (!(offset & (pte_size - 1)) && bytes == 1)
4215 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
4216 misaligned |= bytes < 4;
4221 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
4223 unsigned page_offset, quadrant;
4227 page_offset = offset_in_page(gpa);
4228 level = sp->role.level;
4230 if (!sp->role.cr4_pae) {
4231 page_offset <<= 1; /* 32->64 */
4233 * A 32-bit pde maps 4MB while the shadow pdes map
4234 * only 2MB. So we need to double the offset again
4235 * and zap two pdes instead of one.
4237 if (level == PT32_ROOT_LEVEL) {
4238 page_offset &= ~7; /* kill rounding error */
4242 quadrant = page_offset >> PAGE_SHIFT;
4243 page_offset &= ~PAGE_MASK;
4244 if (quadrant != sp->role.quadrant)
4248 spte = &sp->spt[page_offset / sizeof(*spte)];
4252 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
4253 const u8 *new, int bytes)
4255 gfn_t gfn = gpa >> PAGE_SHIFT;
4256 struct kvm_mmu_page *sp;
4257 LIST_HEAD(invalid_list);
4258 u64 entry, gentry, *spte;
4260 bool remote_flush, local_flush, zap_page;
4261 union kvm_mmu_page_role mask = { };
4266 mask.smep_andnot_wp = 1;
4267 mask.smap_andnot_wp = 1;
4270 * If we don't have indirect shadow pages, it means no page is
4271 * write-protected, so we can exit simply.
4273 if (!ACCESS_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
4276 zap_page = remote_flush = local_flush = false;
4278 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
4280 gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, new, &bytes);
4283 * No need to care whether allocation memory is successful
4284 * or not since pte prefetch is skiped if it does not have
4285 * enough objects in the cache.
4287 mmu_topup_memory_caches(vcpu);
4289 spin_lock(&vcpu->kvm->mmu_lock);
4290 ++vcpu->kvm->stat.mmu_pte_write;
4291 kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
4293 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) {
4294 if (detect_write_misaligned(sp, gpa, bytes) ||
4295 detect_write_flooding(sp)) {
4296 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
4298 ++vcpu->kvm->stat.mmu_flooded;
4302 spte = get_written_sptes(sp, gpa, &npte);
4309 mmu_page_zap_pte(vcpu->kvm, sp, spte);
4311 !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
4312 & mask.word) && rmap_can_add(vcpu))
4313 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
4314 if (need_remote_flush(entry, *spte))
4315 remote_flush = true;
4319 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
4320 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
4321 kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
4322 spin_unlock(&vcpu->kvm->mmu_lock);
4325 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
4330 if (vcpu->arch.mmu.direct_map)
4333 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
4335 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4339 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
4341 static void make_mmu_pages_available(struct kvm_vcpu *vcpu)
4343 LIST_HEAD(invalid_list);
4345 if (likely(kvm_mmu_available_pages(vcpu->kvm) >= KVM_MIN_FREE_MMU_PAGES))
4348 while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES) {
4349 if (!prepare_zap_oldest_mmu_page(vcpu->kvm, &invalid_list))
4352 ++vcpu->kvm->stat.mmu_recycled;
4354 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
4357 static bool is_mmio_page_fault(struct kvm_vcpu *vcpu, gva_t addr)
4359 if (vcpu->arch.mmu.direct_map || mmu_is_nested(vcpu))
4360 return vcpu_match_mmio_gpa(vcpu, addr);
4362 return vcpu_match_mmio_gva(vcpu, addr);
4365 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code,
4366 void *insn, int insn_len)
4368 int r, emulation_type = EMULTYPE_RETRY;
4369 enum emulation_result er;
4371 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false);
4380 if (is_mmio_page_fault(vcpu, cr2))
4383 er = x86_emulate_instruction(vcpu, cr2, emulation_type, insn, insn_len);
4388 case EMULATE_USER_EXIT:
4389 ++vcpu->stat.mmio_exits;
4399 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
4401 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
4403 vcpu->arch.mmu.invlpg(vcpu, gva);
4404 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
4405 ++vcpu->stat.invlpg;
4407 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
4409 void kvm_enable_tdp(void)
4413 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
4415 void kvm_disable_tdp(void)
4417 tdp_enabled = false;
4419 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
4421 static void free_mmu_pages(struct kvm_vcpu *vcpu)
4423 free_page((unsigned long)vcpu->arch.mmu.pae_root);
4424 if (vcpu->arch.mmu.lm_root != NULL)
4425 free_page((unsigned long)vcpu->arch.mmu.lm_root);
4428 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
4434 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4435 * Therefore we need to allocate shadow page tables in the first
4436 * 4GB of memory, which happens to fit the DMA32 zone.
4438 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
4442 vcpu->arch.mmu.pae_root = page_address(page);
4443 for (i = 0; i < 4; ++i)
4444 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
4449 int kvm_mmu_create(struct kvm_vcpu *vcpu)
4451 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
4452 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4453 vcpu->arch.mmu.translate_gpa = translate_gpa;
4454 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
4456 return alloc_mmu_pages(vcpu);
4459 void kvm_mmu_setup(struct kvm_vcpu *vcpu)
4461 MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa));
4466 /* The return value indicates if tlb flush on all vcpus is needed. */
4467 typedef bool (*slot_level_handler) (struct kvm *kvm, unsigned long *rmap);
4469 /* The caller should hold mmu-lock before calling this function. */
4471 slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot,
4472 slot_level_handler fn, int start_level, int end_level,
4473 gfn_t start_gfn, gfn_t end_gfn, bool lock_flush_tlb)
4475 struct slot_rmap_walk_iterator iterator;
4478 for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn,
4479 end_gfn, &iterator) {
4481 flush |= fn(kvm, iterator.rmap);
4483 if (need_resched() || spin_needbreak(&kvm->mmu_lock)) {
4484 if (flush && lock_flush_tlb) {
4485 kvm_flush_remote_tlbs(kvm);
4488 cond_resched_lock(&kvm->mmu_lock);
4492 if (flush && lock_flush_tlb) {
4493 kvm_flush_remote_tlbs(kvm);
4501 slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4502 slot_level_handler fn, int start_level, int end_level,
4503 bool lock_flush_tlb)
4505 return slot_handle_level_range(kvm, memslot, fn, start_level,
4506 end_level, memslot->base_gfn,
4507 memslot->base_gfn + memslot->npages - 1,
4512 slot_handle_all_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4513 slot_level_handler fn, bool lock_flush_tlb)
4515 return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL,
4516 PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb);
4520 slot_handle_large_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4521 slot_level_handler fn, bool lock_flush_tlb)
4523 return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL + 1,
4524 PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb);
4528 slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot,
4529 slot_level_handler fn, bool lock_flush_tlb)
4531 return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL,
4532 PT_PAGE_TABLE_LEVEL, lock_flush_tlb);
4535 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
4537 struct kvm_memslots *slots;
4538 struct kvm_memory_slot *memslot;
4540 slots = kvm_memslots(kvm);
4542 spin_lock(&kvm->mmu_lock);
4543 kvm_for_each_memslot(memslot, slots) {
4546 start = max(gfn_start, memslot->base_gfn);
4547 end = min(gfn_end, memslot->base_gfn + memslot->npages);
4551 slot_handle_level_range(kvm, memslot, kvm_zap_rmapp,
4552 PT_PAGE_TABLE_LEVEL, PT_MAX_HUGEPAGE_LEVEL,
4553 start, end - 1, true);
4556 spin_unlock(&kvm->mmu_lock);
4559 static bool slot_rmap_write_protect(struct kvm *kvm, unsigned long *rmapp)
4561 return __rmap_write_protect(kvm, rmapp, false);
4564 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
4565 struct kvm_memory_slot *memslot)
4569 spin_lock(&kvm->mmu_lock);
4570 flush = slot_handle_all_level(kvm, memslot, slot_rmap_write_protect,
4572 spin_unlock(&kvm->mmu_lock);
4575 * kvm_mmu_slot_remove_write_access() and kvm_vm_ioctl_get_dirty_log()
4576 * which do tlb flush out of mmu-lock should be serialized by
4577 * kvm->slots_lock otherwise tlb flush would be missed.
4579 lockdep_assert_held(&kvm->slots_lock);
4582 * We can flush all the TLBs out of the mmu lock without TLB
4583 * corruption since we just change the spte from writable to
4584 * readonly so that we only need to care the case of changing
4585 * spte from present to present (changing the spte from present
4586 * to nonpresent will flush all the TLBs immediately), in other
4587 * words, the only case we care is mmu_spte_update() where we
4588 * haved checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE
4589 * instead of PT_WRITABLE_MASK, that means it does not depend
4590 * on PT_WRITABLE_MASK anymore.
4593 kvm_flush_remote_tlbs(kvm);
4596 static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
4597 unsigned long *rmapp)
4600 struct rmap_iterator iter;
4601 int need_tlb_flush = 0;
4603 struct kvm_mmu_page *sp;
4606 for_each_rmap_spte(rmapp, &iter, sptep) {
4607 sp = page_header(__pa(sptep));
4608 pfn = spte_to_pfn(*sptep);
4611 * We cannot do huge page mapping for indirect shadow pages,
4612 * which are found on the last rmap (level = 1) when not using
4613 * tdp; such shadow pages are synced with the page table in
4614 * the guest, and the guest page table is using 4K page size
4615 * mapping if the indirect sp has level = 1.
4617 if (sp->role.direct &&
4618 !kvm_is_reserved_pfn(pfn) &&
4619 PageTransCompound(pfn_to_page(pfn))) {
4620 drop_spte(kvm, sptep);
4626 return need_tlb_flush;
4629 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
4630 const struct kvm_memory_slot *memslot)
4632 /* FIXME: const-ify all uses of struct kvm_memory_slot. */
4633 spin_lock(&kvm->mmu_lock);
4634 slot_handle_leaf(kvm, (struct kvm_memory_slot *)memslot,
4635 kvm_mmu_zap_collapsible_spte, true);
4636 spin_unlock(&kvm->mmu_lock);
4639 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
4640 struct kvm_memory_slot *memslot)
4644 spin_lock(&kvm->mmu_lock);
4645 flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, false);
4646 spin_unlock(&kvm->mmu_lock);
4648 lockdep_assert_held(&kvm->slots_lock);
4651 * It's also safe to flush TLBs out of mmu lock here as currently this
4652 * function is only used for dirty logging, in which case flushing TLB
4653 * out of mmu lock also guarantees no dirty pages will be lost in
4657 kvm_flush_remote_tlbs(kvm);
4659 EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty);
4661 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
4662 struct kvm_memory_slot *memslot)
4666 spin_lock(&kvm->mmu_lock);
4667 flush = slot_handle_large_level(kvm, memslot, slot_rmap_write_protect,
4669 spin_unlock(&kvm->mmu_lock);
4671 /* see kvm_mmu_slot_remove_write_access */
4672 lockdep_assert_held(&kvm->slots_lock);
4675 kvm_flush_remote_tlbs(kvm);
4677 EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access);
4679 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
4680 struct kvm_memory_slot *memslot)
4684 spin_lock(&kvm->mmu_lock);
4685 flush = slot_handle_all_level(kvm, memslot, __rmap_set_dirty, false);
4686 spin_unlock(&kvm->mmu_lock);
4688 lockdep_assert_held(&kvm->slots_lock);
4690 /* see kvm_mmu_slot_leaf_clear_dirty */
4692 kvm_flush_remote_tlbs(kvm);
4694 EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty);
4696 #define BATCH_ZAP_PAGES 10
4697 static void kvm_zap_obsolete_pages(struct kvm *kvm)
4699 struct kvm_mmu_page *sp, *node;
4703 list_for_each_entry_safe_reverse(sp, node,
4704 &kvm->arch.active_mmu_pages, link) {
4708 * No obsolete page exists before new created page since
4709 * active_mmu_pages is the FIFO list.
4711 if (!is_obsolete_sp(kvm, sp))
4715 * Since we are reversely walking the list and the invalid
4716 * list will be moved to the head, skip the invalid page
4717 * can help us to avoid the infinity list walking.
4719 if (sp->role.invalid)
4723 * Need not flush tlb since we only zap the sp with invalid
4724 * generation number.
4726 if (batch >= BATCH_ZAP_PAGES &&
4727 cond_resched_lock(&kvm->mmu_lock)) {
4732 ret = kvm_mmu_prepare_zap_page(kvm, sp,
4733 &kvm->arch.zapped_obsolete_pages);
4741 * Should flush tlb before free page tables since lockless-walking
4742 * may use the pages.
4744 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
4748 * Fast invalidate all shadow pages and use lock-break technique
4749 * to zap obsolete pages.
4751 * It's required when memslot is being deleted or VM is being
4752 * destroyed, in these cases, we should ensure that KVM MMU does
4753 * not use any resource of the being-deleted slot or all slots
4754 * after calling the function.
4756 void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm)
4758 spin_lock(&kvm->mmu_lock);
4759 trace_kvm_mmu_invalidate_zap_all_pages(kvm);
4760 kvm->arch.mmu_valid_gen++;
4763 * Notify all vcpus to reload its shadow page table
4764 * and flush TLB. Then all vcpus will switch to new
4765 * shadow page table with the new mmu_valid_gen.
4767 * Note: we should do this under the protection of
4768 * mmu-lock, otherwise, vcpu would purge shadow page
4769 * but miss tlb flush.
4771 kvm_reload_remote_mmus(kvm);
4773 kvm_zap_obsolete_pages(kvm);
4774 spin_unlock(&kvm->mmu_lock);
4777 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
4779 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
4782 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots)
4785 * The very rare case: if the generation-number is round,
4786 * zap all shadow pages.
4788 if (unlikely((slots->generation & MMIO_GEN_MASK) == 0)) {
4789 printk_ratelimited(KERN_DEBUG "kvm: zapping shadow pages for mmio generation wraparound\n");
4790 kvm_mmu_invalidate_zap_all_pages(kvm);
4794 static unsigned long
4795 mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
4798 int nr_to_scan = sc->nr_to_scan;
4799 unsigned long freed = 0;
4801 spin_lock(&kvm_lock);
4803 list_for_each_entry(kvm, &vm_list, vm_list) {
4805 LIST_HEAD(invalid_list);
4808 * Never scan more than sc->nr_to_scan VM instances.
4809 * Will not hit this condition practically since we do not try
4810 * to shrink more than one VM and it is very unlikely to see
4811 * !n_used_mmu_pages so many times.
4816 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4817 * here. We may skip a VM instance errorneosly, but we do not
4818 * want to shrink a VM that only started to populate its MMU
4821 if (!kvm->arch.n_used_mmu_pages &&
4822 !kvm_has_zapped_obsolete_pages(kvm))
4825 idx = srcu_read_lock(&kvm->srcu);
4826 spin_lock(&kvm->mmu_lock);
4828 if (kvm_has_zapped_obsolete_pages(kvm)) {
4829 kvm_mmu_commit_zap_page(kvm,
4830 &kvm->arch.zapped_obsolete_pages);
4834 if (prepare_zap_oldest_mmu_page(kvm, &invalid_list))
4836 kvm_mmu_commit_zap_page(kvm, &invalid_list);
4839 spin_unlock(&kvm->mmu_lock);
4840 srcu_read_unlock(&kvm->srcu, idx);
4843 * unfair on small ones
4844 * per-vm shrinkers cry out
4845 * sadness comes quickly
4847 list_move_tail(&kvm->vm_list, &vm_list);
4851 spin_unlock(&kvm_lock);
4855 static unsigned long
4856 mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
4858 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
4861 static struct shrinker mmu_shrinker = {
4862 .count_objects = mmu_shrink_count,
4863 .scan_objects = mmu_shrink_scan,
4864 .seeks = DEFAULT_SEEKS * 10,
4867 static void mmu_destroy_caches(void)
4869 if (pte_list_desc_cache)
4870 kmem_cache_destroy(pte_list_desc_cache);
4871 if (mmu_page_header_cache)
4872 kmem_cache_destroy(mmu_page_header_cache);
4875 int kvm_mmu_module_init(void)
4877 pte_list_desc_cache = kmem_cache_create("pte_list_desc",
4878 sizeof(struct pte_list_desc),
4880 if (!pte_list_desc_cache)
4883 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
4884 sizeof(struct kvm_mmu_page),
4886 if (!mmu_page_header_cache)
4889 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL))
4892 register_shrinker(&mmu_shrinker);
4897 mmu_destroy_caches();
4902 * Caculate mmu pages needed for kvm.
4904 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
4906 unsigned int nr_mmu_pages;
4907 unsigned int nr_pages = 0;
4908 struct kvm_memslots *slots;
4909 struct kvm_memory_slot *memslot;
4911 slots = kvm_memslots(kvm);
4913 kvm_for_each_memslot(memslot, slots)
4914 nr_pages += memslot->npages;
4916 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
4917 nr_mmu_pages = max(nr_mmu_pages,
4918 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
4920 return nr_mmu_pages;
4923 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
4925 struct kvm_shadow_walk_iterator iterator;
4929 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
4932 walk_shadow_page_lockless_begin(vcpu);
4933 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) {
4934 sptes[iterator.level-1] = spte;
4936 if (!is_shadow_present_pte(spte))
4939 walk_shadow_page_lockless_end(vcpu);
4943 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
4945 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
4947 kvm_mmu_unload(vcpu);
4948 free_mmu_pages(vcpu);
4949 mmu_free_memory_caches(vcpu);
4952 void kvm_mmu_module_exit(void)
4954 mmu_destroy_caches();
4955 percpu_counter_destroy(&kvm_total_used_mmu_pages);
4956 unregister_shrinker(&mmu_shrinker);
4957 mmu_audit_disable();