arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <asm/sgx.h>
  79 #include <clocksource/hyperv_timer.h>
  80
  81 #define CREATE_TRACE_POINTS
  82 #include "trace.h"
  83
  84 #define MAX_IO_MSRS 256
  85 #define KVM_MAX_MCE_BANKS 32
  86 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  87 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  88
  89 #define emul_to_vcpu(ctxt) \
  90         ((struct kvm_vcpu *)(ctxt)->vcpu)
  91
  92 /* EFER defaults:
  93  * - enable syscall per default because its emulated by KVM
  94  * - enable LME and LMA per default on 64 bit KVM
  95  */
  96 #ifdef CONFIG_X86_64
  97 static
  98 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  99 #else
 100 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 101 #endif
 102
 103 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 104
 105 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 106                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 107
 108 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 109 static void process_nmi(struct kvm_vcpu *vcpu);
 110 static void process_smi(struct kvm_vcpu *vcpu);
 111 static void enter_smm(struct kvm_vcpu *vcpu);
 112 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 113 static void store_regs(struct kvm_vcpu *vcpu);
 114 static int sync_regs(struct kvm_vcpu *vcpu);
 115
 116 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 117 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 118
 119 #define KVM_X86_OP(func)                                             \
 120         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 121                                 *(((struct kvm_x86_ops *)0)->func));
 122 #define KVM_X86_OP_NULL KVM_X86_OP
 123 #include <asm/kvm-x86-ops.h>
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 126 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 127
 128 static bool __read_mostly ignore_msrs = 0;
 129 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 130
 131 bool __read_mostly report_ignored_msrs = true;
 132 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 133 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 134
 135 unsigned int min_timer_period_us = 200;
 136 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 137
 138 static bool __read_mostly kvmclock_periodic_sync = true;
 139 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 140
 141 bool __read_mostly kvm_has_tsc_control;
 142 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 143 u32  __read_mostly kvm_max_guest_tsc_khz;
 144 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 145 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 146 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 147 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 148 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 149 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 150 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 151 bool __read_mostly kvm_has_bus_lock_exit;
 152 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 153
 154 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 155 static u32 __read_mostly tsc_tolerance_ppm = 250;
 156 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 157
 158 /*
 159  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 160  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 161  * advancement entirely.  Any other value is used as-is and disables adaptive
 162  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 163  */
 164 static int __read_mostly lapic_timer_advance_ns = -1;
 165 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 166
 167 static bool __read_mostly vector_hashing = true;
 168 module_param(vector_hashing, bool, S_IRUGO);
 169
 170 bool __read_mostly enable_vmware_backdoor = false;
 171 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 172 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 173
 174 static bool __read_mostly force_emulation_prefix = false;
 175 module_param(force_emulation_prefix, bool, S_IRUGO);
 176
 177 int __read_mostly pi_inject_timer = -1;
 178 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 179
 180 /*
 181  * Restoring the host value for MSRs that are only consumed when running in
 182  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 183  * returns to userspace, i.e. the kernel can run with the guest's value.
 184  */
 185 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 186
 187 struct kvm_user_return_msrs {
 188         struct user_return_notifier urn;
 189         bool registered;
 190         struct kvm_user_return_msr_values {
 191                 u64 host;
 192                 u64 curr;
 193         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 194 };
 195
 196 u32 __read_mostly kvm_nr_uret_msrs;
 197 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 198 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 199 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 200
 201 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 202                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 203                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 204                                 | XFEATURE_MASK_PKRU)
 205
 206 u64 __read_mostly host_efer;
 207 EXPORT_SYMBOL_GPL(host_efer);
 208
 209 bool __read_mostly allow_smaller_maxphyaddr = 0;
 210 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 211
 212 u64 __read_mostly host_xss;
 213 EXPORT_SYMBOL_GPL(host_xss);
 214 u64 __read_mostly supported_xss;
 215 EXPORT_SYMBOL_GPL(supported_xss);
 216
 217 struct kvm_stats_debugfs_item debugfs_entries[] = {
 218         VCPU_STAT("pf_fixed", pf_fixed),
 219         VCPU_STAT("pf_guest", pf_guest),
 220         VCPU_STAT("tlb_flush", tlb_flush),
 221         VCPU_STAT("invlpg", invlpg),
 222         VCPU_STAT("exits", exits),
 223         VCPU_STAT("io_exits", io_exits),
 224         VCPU_STAT("mmio_exits", mmio_exits),
 225         VCPU_STAT("signal_exits", signal_exits),
 226         VCPU_STAT("irq_window", irq_window_exits),
 227         VCPU_STAT("nmi_window", nmi_window_exits),
 228         VCPU_STAT("halt_exits", halt_exits),
 229         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 230         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 231         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 232         VCPU_STAT("halt_wakeup", halt_wakeup),
 233         VCPU_STAT("hypercalls", hypercalls),
 234         VCPU_STAT("request_irq", request_irq_exits),
 235         VCPU_STAT("irq_exits", irq_exits),
 236         VCPU_STAT("host_state_reload", host_state_reload),
 237         VCPU_STAT("fpu_reload", fpu_reload),
 238         VCPU_STAT("insn_emulation", insn_emulation),
 239         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 240         VCPU_STAT("irq_injections", irq_injections),
 241         VCPU_STAT("nmi_injections", nmi_injections),
 242         VCPU_STAT("req_event", req_event),
 243         VCPU_STAT("l1d_flush", l1d_flush),
 244         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 245         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 246         VCPU_STAT("nested_run", nested_run),
 247         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 248         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 249         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 250         VM_STAT("mmu_pte_write", mmu_pte_write),
 251         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 252         VM_STAT("mmu_flooded", mmu_flooded),
 253         VM_STAT("mmu_recycled", mmu_recycled),
 254         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 255         VM_STAT("mmu_unsync", mmu_unsync),
 256         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 257         VM_STAT("largepages", lpages, .mode = 0444),
 258         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 259         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 260         { NULL }
 261 };
 262
 263 u64 __read_mostly host_xcr0;
 264 u64 __read_mostly supported_xcr0;
 265 EXPORT_SYMBOL_GPL(supported_xcr0);
 266
 267 static struct kmem_cache *x86_fpu_cache;
 268
 269 static struct kmem_cache *x86_emulator_cache;
 270
 271 /*
 272  * When called, it means the previous get/set msr reached an invalid msr.
 273  * Return true if we want to ignore/silent this failed msr access.
 274  */
 275 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 276 {
 277         const char *op = write ? "wrmsr" : "rdmsr";
 278
 279         if (ignore_msrs) {
 280                 if (report_ignored_msrs)
 281                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 282                                       op, msr, data);
 283                 /* Mask the error */
 284                 return true;
 285         } else {
 286                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 287                                       op, msr, data);
 288                 return false;
 289         }
 290 }
 291
 292 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 293 {
 294         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 295         unsigned int size = sizeof(struct x86_emulate_ctxt);
 296
 297         return kmem_cache_create_usercopy("x86_emulator", size,
 298                                           __alignof__(struct x86_emulate_ctxt),
 299                                           SLAB_ACCOUNT, useroffset,
 300                                           size - useroffset, NULL);
 301 }
 302
 303 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 304
 305 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 306 {
 307         int i;
 308         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 309                 vcpu->arch.apf.gfns[i] = ~0;
 310 }
 311
 312 static void kvm_on_user_return(struct user_return_notifier *urn)
 313 {
 314         unsigned slot;
 315         struct kvm_user_return_msrs *msrs
 316                 = container_of(urn, struct kvm_user_return_msrs, urn);
 317         struct kvm_user_return_msr_values *values;
 318         unsigned long flags;
 319
 320         /*
 321          * Disabling irqs at this point since the following code could be
 322          * interrupted and executed through kvm_arch_hardware_disable()
 323          */
 324         local_irq_save(flags);
 325         if (msrs->registered) {
 326                 msrs->registered = false;
 327                 user_return_notifier_unregister(urn);
 328         }
 329         local_irq_restore(flags);
 330         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 331                 values = &msrs->values[slot];
 332                 if (values->host != values->curr) {
 333                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 334                         values->curr = values->host;
 335                 }
 336         }
 337 }
 338
 339 static int kvm_probe_user_return_msr(u32 msr)
 340 {
 341         u64 val;
 342         int ret;
 343
 344         preempt_disable();
 345         ret = rdmsrl_safe(msr, &val);
 346         if (ret)
 347                 goto out;
 348         ret = wrmsrl_safe(msr, val);
 349 out:
 350         preempt_enable();
 351         return ret;
 352 }
 353
 354 int kvm_add_user_return_msr(u32 msr)
 355 {
 356         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 357
 358         if (kvm_probe_user_return_msr(msr))
 359                 return -1;
 360
 361         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 362         return kvm_nr_uret_msrs++;
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 365
 366 int kvm_find_user_return_msr(u32 msr)
 367 {
 368         int i;
 369
 370         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 371                 if (kvm_uret_msrs_list[i] == msr)
 372                         return i;
 373         }
 374         return -1;
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 377
 378 static void kvm_user_return_msr_cpu_online(void)
 379 {
 380         unsigned int cpu = smp_processor_id();
 381         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 382         u64 value;
 383         int i;
 384
 385         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 386                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 387                 msrs->values[i].host = value;
 388                 msrs->values[i].curr = value;
 389         }
 390 }
 391
 392 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 393 {
 394         unsigned int cpu = smp_processor_id();
 395         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 396         int err;
 397
 398         value = (value & mask) | (msrs->values[slot].host & ~mask);
 399         if (value == msrs->values[slot].curr)
 400                 return 0;
 401         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 402         if (err)
 403                 return 1;
 404
 405         msrs->values[slot].curr = value;
 406         if (!msrs->registered) {
 407                 msrs->urn.on_user_return = kvm_on_user_return;
 408                 user_return_notifier_register(&msrs->urn);
 409                 msrs->registered = true;
 410         }
 411         return 0;
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 414
 415 static void drop_user_return_notifiers(void)
 416 {
 417         unsigned int cpu = smp_processor_id();
 418         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 419
 420         if (msrs->registered)
 421                 kvm_on_user_return(&msrs->urn);
 422 }
 423
 424 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 425 {
 426         return vcpu->arch.apic_base;
 427 }
 428 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 429
 430 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 431 {
 432         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 433 }
 434 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 435
 436 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 437 {
 438         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 439         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 440         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 441                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 442
 443         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 444                 return 1;
 445         if (!msr_info->host_initiated) {
 446                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 447                         return 1;
 448                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 449                         return 1;
 450         }
 451
 452         kvm_lapic_set_base(vcpu, msr_info->data);
 453         kvm_recalculate_apic_map(vcpu->kvm);
 454         return 0;
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 457
 458 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 459 {
 460         /* Fault while not rebooting.  We want the trace. */
 461         BUG_ON(!kvm_rebooting);
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 464
 465 #define EXCPT_BENIGN            0
 466 #define EXCPT_CONTRIBUTORY      1
 467 #define EXCPT_PF                2
 468
 469 static int exception_class(int vector)
 470 {
 471         switch (vector) {
 472         case PF_VECTOR:
 473                 return EXCPT_PF;
 474         case DE_VECTOR:
 475         case TS_VECTOR:
 476         case NP_VECTOR:
 477         case SS_VECTOR:
 478         case GP_VECTOR:
 479                 return EXCPT_CONTRIBUTORY;
 480         default:
 481                 break;
 482         }
 483         return EXCPT_BENIGN;
 484 }
 485
 486 #define EXCPT_FAULT             0
 487 #define EXCPT_TRAP              1
 488 #define EXCPT_ABORT             2
 489 #define EXCPT_INTERRUPT         3
 490
 491 static int exception_type(int vector)
 492 {
 493         unsigned int mask;
 494
 495         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 496                 return EXCPT_INTERRUPT;
 497
 498         mask = 1 << vector;
 499
 500         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 501         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 502                 return EXCPT_TRAP;
 503
 504         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 505                 return EXCPT_ABORT;
 506
 507         /* Reserved exceptions will result in fault */
 508         return EXCPT_FAULT;
 509 }
 510
 511 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 512 {
 513         unsigned nr = vcpu->arch.exception.nr;
 514         bool has_payload = vcpu->arch.exception.has_payload;
 515         unsigned long payload = vcpu->arch.exception.payload;
 516
 517         if (!has_payload)
 518                 return;
 519
 520         switch (nr) {
 521         case DB_VECTOR:
 522                 /*
 523                  * "Certain debug exceptions may clear bit 0-3.  The
 524                  * remaining contents of the DR6 register are never
 525                  * cleared by the processor".
 526                  */
 527                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 528                 /*
 529                  * In order to reflect the #DB exception payload in guest
 530                  * dr6, three components need to be considered: active low
 531                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 532                  * DR6_BS and DR6_BT)
 533                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 534                  * In the target guest dr6:
 535                  * FIXED_1 bits should always be set.
 536                  * Active low bits should be cleared if 1-setting in payload.
 537                  * Active high bits should be set if 1-setting in payload.
 538                  *
 539                  * Note, the payload is compatible with the pending debug
 540                  * exceptions/exit qualification under VMX, that active_low bits
 541                  * are active high in payload.
 542                  * So they need to be flipped for DR6.
 543                  */
 544                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 545                 vcpu->arch.dr6 |= payload;
 546                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 547
 548                 /*
 549                  * The #DB payload is defined as compatible with the 'pending
 550                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 551                  * defined in the 'pending debug exceptions' field (enabled
 552                  * breakpoint), it is reserved and must be zero in DR6.
 553                  */
 554                 vcpu->arch.dr6 &= ~BIT(12);
 555                 break;
 556         case PF_VECTOR:
 557                 vcpu->arch.cr2 = payload;
 558                 break;
 559         }
 560
 561         vcpu->arch.exception.has_payload = false;
 562         vcpu->arch.exception.payload = 0;
 563 }
 564 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 565
 566 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 567                 unsigned nr, bool has_error, u32 error_code,
 568                 bool has_payload, unsigned long payload, bool reinject)
 569 {
 570         u32 prev_nr;
 571         int class1, class2;
 572
 573         kvm_make_request(KVM_REQ_EVENT, vcpu);
 574
 575         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 576         queue:
 577                 if (reinject) {
 578                         /*
 579                          * On vmentry, vcpu->arch.exception.pending is only
 580                          * true if an event injection was blocked by
 581                          * nested_run_pending.  In that case, however,
 582                          * vcpu_enter_guest requests an immediate exit,
 583                          * and the guest shouldn't proceed far enough to
 584                          * need reinjection.
 585                          */
 586                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 587                         vcpu->arch.exception.injected = true;
 588                         if (WARN_ON_ONCE(has_payload)) {
 589                                 /*
 590                                  * A reinjected event has already
 591                                  * delivered its payload.
 592                                  */
 593                                 has_payload = false;
 594                                 payload = 0;
 595                         }
 596                 } else {
 597                         vcpu->arch.exception.pending = true;
 598                         vcpu->arch.exception.injected = false;
 599                 }
 600                 vcpu->arch.exception.has_error_code = has_error;
 601                 vcpu->arch.exception.nr = nr;
 602                 vcpu->arch.exception.error_code = error_code;
 603                 vcpu->arch.exception.has_payload = has_payload;
 604                 vcpu->arch.exception.payload = payload;
 605                 if (!is_guest_mode(vcpu))
 606                         kvm_deliver_exception_payload(vcpu);
 607                 return;
 608         }
 609
 610         /* to check exception */
 611         prev_nr = vcpu->arch.exception.nr;
 612         if (prev_nr == DF_VECTOR) {
 613                 /* triple fault -> shutdown */
 614                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 615                 return;
 616         }
 617         class1 = exception_class(prev_nr);
 618         class2 = exception_class(nr);
 619         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 620                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 621                 /*
 622                  * Generate double fault per SDM Table 5-5.  Set
 623                  * exception.pending = true so that the double fault
 624                  * can trigger a nested vmexit.
 625                  */
 626                 vcpu->arch.exception.pending = true;
 627                 vcpu->arch.exception.injected = false;
 628                 vcpu->arch.exception.has_error_code = true;
 629                 vcpu->arch.exception.nr = DF_VECTOR;
 630                 vcpu->arch.exception.error_code = 0;
 631                 vcpu->arch.exception.has_payload = false;
 632                 vcpu->arch.exception.payload = 0;
 633         } else
 634                 /* replace previous exception with a new one in a hope
 635                    that instruction re-execution will regenerate lost
 636                    exception */
 637                 goto queue;
 638 }
 639
 640 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 641 {
 642         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 645
 646 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 647 {
 648         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 649 }
 650 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 651
 652 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 653                            unsigned long payload)
 654 {
 655         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 656 }
 657 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 658
 659 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 660                                     u32 error_code, unsigned long payload)
 661 {
 662         kvm_multiple_exception(vcpu, nr, true, error_code,
 663                                true, payload, false);
 664 }
 665
 666 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 667 {
 668         if (err)
 669                 kvm_inject_gp(vcpu, 0);
 670         else
 671                 return kvm_skip_emulated_instruction(vcpu);
 672
 673         return 1;
 674 }
 675 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 676
 677 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 678 {
 679         ++vcpu->stat.pf_guest;
 680         vcpu->arch.exception.nested_apf =
 681                 is_guest_mode(vcpu) && fault->async_page_fault;
 682         if (vcpu->arch.exception.nested_apf) {
 683                 vcpu->arch.apf.nested_apf_token = fault->address;
 684                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 685         } else {
 686                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 687                                         fault->address);
 688         }
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 691
 692 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 693                                     struct x86_exception *fault)
 694 {
 695         struct kvm_mmu *fault_mmu;
 696         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 697
 698         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 699                                                vcpu->arch.walk_mmu;
 700
 701         /*
 702          * Invalidate the TLB entry for the faulting address, if it exists,
 703          * else the access will fault indefinitely (and to emulate hardware).
 704          */
 705         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 706             !(fault->error_code & PFERR_RSVD_MASK))
 707                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 708                                        fault_mmu->root_hpa);
 709
 710         fault_mmu->inject_page_fault(vcpu, fault);
 711         return fault->nested_page_fault;
 712 }
 713 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 714
 715 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 716 {
 717         atomic_inc(&vcpu->arch.nmi_queued);
 718         kvm_make_request(KVM_REQ_NMI, vcpu);
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 721
 722 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 723 {
 724         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 727
 728 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 729 {
 730         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 731 }
 732 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 733
 734 /*
 735  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 736  * a #GP and return false.
 737  */
 738 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 739 {
 740         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 741                 return true;
 742         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 743         return false;
 744 }
 745 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 746
 747 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 748 {
 749         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 750                 return true;
 751
 752         kvm_queue_exception(vcpu, UD_VECTOR);
 753         return false;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_require_dr);
 756
 757 /*
 758  * This function will be used to read from the physical memory of the currently
 759  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 760  * can read from guest physical or from the guest's guest physical memory.
 761  */
 762 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 763                             gfn_t ngfn, void *data, int offset, int len,
 764                             u32 access)
 765 {
 766         struct x86_exception exception;
 767         gfn_t real_gfn;
 768         gpa_t ngpa;
 769
 770         ngpa     = gfn_to_gpa(ngfn);
 771         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 772         if (real_gfn == UNMAPPED_GVA)
 773                 return -EFAULT;
 774
 775         real_gfn = gpa_to_gfn(real_gfn);
 776
 777         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 780
 781 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 782                                void *data, int offset, int len, u32 access)
 783 {
 784         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 785                                        data, offset, len, access);
 786 }
 787
 788 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 789 {
 790         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 791 }
 792
 793 /*
 794  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 795  */
 796 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 797 {
 798         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 799         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 800         int i;
 801         int ret;
 802         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 803
 804         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 805                                       offset * sizeof(u64), sizeof(pdpte),
 806                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 807         if (ret < 0) {
 808                 ret = 0;
 809                 goto out;
 810         }
 811         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 812                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 813                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 814                         ret = 0;
 815                         goto out;
 816                 }
 817         }
 818         ret = 1;
 819
 820         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 821         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 822
 823 out:
 824
 825         return ret;
 826 }
 827 EXPORT_SYMBOL_GPL(load_pdptrs);
 828
 829 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 830 {
 831         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 832         int offset;
 833         gfn_t gfn;
 834         int r;
 835
 836         if (!is_pae_paging(vcpu))
 837                 return false;
 838
 839         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 840                 return true;
 841
 842         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 843         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 844         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 845                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 846         if (r < 0)
 847                 return true;
 848
 849         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 850 }
 851 EXPORT_SYMBOL_GPL(pdptrs_changed);
 852
 853 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 854 {
 855         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 856
 857         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 858                 kvm_clear_async_pf_completion_queue(vcpu);
 859                 kvm_async_pf_hash_reset(vcpu);
 860         }
 861
 862         if ((cr0 ^ old_cr0) & update_bits)
 863                 kvm_mmu_reset_context(vcpu);
 864
 865         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 866             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 867             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 868                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 869 }
 870 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 871
 872 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 873 {
 874         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 875         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 876
 877         cr0 |= X86_CR0_ET;
 878
 879 #ifdef CONFIG_X86_64
 880         if (cr0 & 0xffffffff00000000UL)
 881                 return 1;
 882 #endif
 883
 884         cr0 &= ~CR0_RESERVED_BITS;
 885
 886         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 887                 return 1;
 888
 889         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 890                 return 1;
 891
 892 #ifdef CONFIG_X86_64
 893         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 894             (cr0 & X86_CR0_PG)) {
 895                 int cs_db, cs_l;
 896
 897                 if (!is_pae(vcpu))
 898                         return 1;
 899                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 900                 if (cs_l)
 901                         return 1;
 902         }
 903 #endif
 904         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 905             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 906             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 907                 return 1;
 908
 909         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 910                 return 1;
 911
 912         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 913
 914         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 915
 916         return 0;
 917 }
 918 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 919
 920 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 921 {
 922         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_lmsw);
 925
 926 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 927 {
 928         if (vcpu->arch.guest_state_protected)
 929                 return;
 930
 931         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 932
 933                 if (vcpu->arch.xcr0 != host_xcr0)
 934                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 935
 936                 if (vcpu->arch.xsaves_enabled &&
 937                     vcpu->arch.ia32_xss != host_xss)
 938                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 939         }
 940
 941         if (static_cpu_has(X86_FEATURE_PKU) &&
 942             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 943              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 944             vcpu->arch.pkru != vcpu->arch.host_pkru)
 945                 __write_pkru(vcpu->arch.pkru);
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 948
 949 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 950 {
 951         if (vcpu->arch.guest_state_protected)
 952                 return;
 953
 954         if (static_cpu_has(X86_FEATURE_PKU) &&
 955             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 956              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 957                 vcpu->arch.pkru = rdpkru();
 958                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 959                         __write_pkru(vcpu->arch.host_pkru);
 960         }
 961
 962         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 963
 964                 if (vcpu->arch.xcr0 != host_xcr0)
 965                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 966
 967                 if (vcpu->arch.xsaves_enabled &&
 968                     vcpu->arch.ia32_xss != host_xss)
 969                         wrmsrl(MSR_IA32_XSS, host_xss);
 970         }
 971
 972 }
 973 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 974
 975 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 976 {
 977         u64 xcr0 = xcr;
 978         u64 old_xcr0 = vcpu->arch.xcr0;
 979         u64 valid_bits;
 980
 981         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 982         if (index != XCR_XFEATURE_ENABLED_MASK)
 983                 return 1;
 984         if (!(xcr0 & XFEATURE_MASK_FP))
 985                 return 1;
 986         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 987                 return 1;
 988
 989         /*
 990          * Do not allow the guest to set bits that we do not support
 991          * saving.  However, xcr0 bit 0 is always set, even if the
 992          * emulated CPU does not support XSAVE (see fx_init).
 993          */
 994         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 995         if (xcr0 & ~valid_bits)
 996                 return 1;
 997
 998         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 999             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1000                 return 1;
1001
1002         if (xcr0 & XFEATURE_MASK_AVX512) {
1003                 if (!(xcr0 & XFEATURE_MASK_YMM))
1004                         return 1;
1005                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1006                         return 1;
1007         }
1008         vcpu->arch.xcr0 = xcr0;
1009
1010         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1011                 kvm_update_cpuid_runtime(vcpu);
1012         return 0;
1013 }
1014
1015 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1016 {
1017         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1018             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1019                 kvm_inject_gp(vcpu, 0);
1020                 return 1;
1021         }
1022
1023         return kvm_skip_emulated_instruction(vcpu);
1024 }
1025 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1026
1027 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1028 {
1029         if (cr4 & cr4_reserved_bits)
1030                 return false;
1031
1032         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1033                 return false;
1034
1035         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1036 }
1037 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1038
1039 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1040 {
1041         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1042                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1043
1044         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1045             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1046                 kvm_mmu_reset_context(vcpu);
1047 }
1048 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1049
1050 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1051 {
1052         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1053         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1054                                    X86_CR4_SMEP;
1055
1056         if (!kvm_is_valid_cr4(vcpu, cr4))
1057                 return 1;
1058
1059         if (is_long_mode(vcpu)) {
1060                 if (!(cr4 & X86_CR4_PAE))
1061                         return 1;
1062                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1063                         return 1;
1064         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1065                    && ((cr4 ^ old_cr4) & pdptr_bits)
1066                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1067                                    kvm_read_cr3(vcpu)))
1068                 return 1;
1069
1070         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1071                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1072                         return 1;
1073
1074                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1075                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1076                         return 1;
1077         }
1078
1079         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1080
1081         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1082
1083         return 0;
1084 }
1085 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1086
1087 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1088 {
1089         bool skip_tlb_flush = false;
1090 #ifdef CONFIG_X86_64
1091         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1092
1093         if (pcid_enabled) {
1094                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1095                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1096         }
1097 #endif
1098
1099         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1100                 if (!skip_tlb_flush) {
1101                         kvm_mmu_sync_roots(vcpu);
1102                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1103                 }
1104                 return 0;
1105         }
1106
1107         /*
1108          * Do not condition the GPA check on long mode, this helper is used to
1109          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1110          * the current vCPU mode is accurate.
1111          */
1112         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1113                 return 1;
1114
1115         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1116                 return 1;
1117
1118         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1119         vcpu->arch.cr3 = cr3;
1120         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1121
1122         return 0;
1123 }
1124 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1125
1126 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1127 {
1128         if (cr8 & CR8_RESERVED_BITS)
1129                 return 1;
1130         if (lapic_in_kernel(vcpu))
1131                 kvm_lapic_set_tpr(vcpu, cr8);
1132         else
1133                 vcpu->arch.cr8 = cr8;
1134         return 0;
1135 }
1136 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1137
1138 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1139 {
1140         if (lapic_in_kernel(vcpu))
1141                 return kvm_lapic_get_cr8(vcpu);
1142         else
1143                 return vcpu->arch.cr8;
1144 }
1145 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1146
1147 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1148 {
1149         int i;
1150
1151         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1152                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1153                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1154                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1155         }
1156 }
1157
1158 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1159 {
1160         unsigned long dr7;
1161
1162         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1163                 dr7 = vcpu->arch.guest_debug_dr7;
1164         else
1165                 dr7 = vcpu->arch.dr7;
1166         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1167         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1168         if (dr7 & DR7_BP_EN_MASK)
1169                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1172
1173 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1174 {
1175         u64 fixed = DR6_FIXED_1;
1176
1177         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1178                 fixed |= DR6_RTM;
1179         return fixed;
1180 }
1181
1182 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1183 {
1184         size_t size = ARRAY_SIZE(vcpu->arch.db);
1185
1186         switch (dr) {
1187         case 0 ... 3:
1188                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1189                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1190                         vcpu->arch.eff_db[dr] = val;
1191                 break;
1192         case 4:
1193         case 6:
1194                 if (!kvm_dr6_valid(val))
1195                         return 1; /* #GP */
1196                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1197                 break;
1198         case 5:
1199         default: /* 7 */
1200                 if (!kvm_dr7_valid(val))
1201                         return 1; /* #GP */
1202                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1203                 kvm_update_dr7(vcpu);
1204                 break;
1205         }
1206
1207         return 0;
1208 }
1209 EXPORT_SYMBOL_GPL(kvm_set_dr);
1210
1211 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1212 {
1213         size_t size = ARRAY_SIZE(vcpu->arch.db);
1214
1215         switch (dr) {
1216         case 0 ... 3:
1217                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1218                 break;
1219         case 4:
1220         case 6:
1221                 *val = vcpu->arch.dr6;
1222                 break;
1223         case 5:
1224         default: /* 7 */
1225                 *val = vcpu->arch.dr7;
1226                 break;
1227         }
1228 }
1229 EXPORT_SYMBOL_GPL(kvm_get_dr);
1230
1231 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1232 {
1233         u32 ecx = kvm_rcx_read(vcpu);
1234         u64 data;
1235
1236         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1237                 kvm_inject_gp(vcpu, 0);
1238                 return 1;
1239         }
1240
1241         kvm_rax_write(vcpu, (u32)data);
1242         kvm_rdx_write(vcpu, data >> 32);
1243         return kvm_skip_emulated_instruction(vcpu);
1244 }
1245 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1246
1247 /*
1248  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1249  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1250  *
1251  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1252  * extract the supported MSRs from the related const lists.
1253  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1254  * capabilities of the host cpu. This capabilities test skips MSRs that are
1255  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1256  * may depend on host virtualization features rather than host cpu features.
1257  */
1258
1259 static const u32 msrs_to_save_all[] = {
1260         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1261         MSR_STAR,
1262 #ifdef CONFIG_X86_64
1263         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1264 #endif
1265         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1266         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1267         MSR_IA32_SPEC_CTRL,
1268         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1269         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1270         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1271         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1272         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1273         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1274         MSR_IA32_UMWAIT_CONTROL,
1275
1276         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1277         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1278         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1279         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1280         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1281         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1282         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1283         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1284         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1285         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1286         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1287         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1288         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1289         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1290         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1291         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1292         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1293         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1294         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1295         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1296         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1297         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1298 };
1299
1300 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1301 static unsigned num_msrs_to_save;
1302
1303 static const u32 emulated_msrs_all[] = {
1304         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1305         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1306         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1307         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1308         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1309         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1310         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1311         HV_X64_MSR_RESET,
1312         HV_X64_MSR_VP_INDEX,
1313         HV_X64_MSR_VP_RUNTIME,
1314         HV_X64_MSR_SCONTROL,
1315         HV_X64_MSR_STIMER0_CONFIG,
1316         HV_X64_MSR_VP_ASSIST_PAGE,
1317         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1318         HV_X64_MSR_TSC_EMULATION_STATUS,
1319         HV_X64_MSR_SYNDBG_OPTIONS,
1320         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1321         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1322         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1323
1324         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1325         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1326
1327         MSR_IA32_TSC_ADJUST,
1328         MSR_IA32_TSC_DEADLINE,
1329         MSR_IA32_ARCH_CAPABILITIES,
1330         MSR_IA32_PERF_CAPABILITIES,
1331         MSR_IA32_MISC_ENABLE,
1332         MSR_IA32_MCG_STATUS,
1333         MSR_IA32_MCG_CTL,
1334         MSR_IA32_MCG_EXT_CTL,
1335         MSR_IA32_SMBASE,
1336         MSR_SMI_COUNT,
1337         MSR_PLATFORM_INFO,
1338         MSR_MISC_FEATURES_ENABLES,
1339         MSR_AMD64_VIRT_SPEC_CTRL,
1340         MSR_IA32_POWER_CTL,
1341         MSR_IA32_UCODE_REV,
1342
1343         /*
1344          * The following list leaves out MSRs whose values are determined
1345          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1346          * We always support the "true" VMX control MSRs, even if the host
1347          * processor does not, so I am putting these registers here rather
1348          * than in msrs_to_save_all.
1349          */
1350         MSR_IA32_VMX_BASIC,
1351         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1352         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1353         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1354         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1355         MSR_IA32_VMX_MISC,
1356         MSR_IA32_VMX_CR0_FIXED0,
1357         MSR_IA32_VMX_CR4_FIXED0,
1358         MSR_IA32_VMX_VMCS_ENUM,
1359         MSR_IA32_VMX_PROCBASED_CTLS2,
1360         MSR_IA32_VMX_EPT_VPID_CAP,
1361         MSR_IA32_VMX_VMFUNC,
1362
1363         MSR_K7_HWCR,
1364         MSR_KVM_POLL_CONTROL,
1365 };
1366
1367 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1368 static unsigned num_emulated_msrs;
1369
1370 /*
1371  * List of msr numbers which are used to expose MSR-based features that
1372  * can be used by a hypervisor to validate requested CPU features.
1373  */
1374 static const u32 msr_based_features_all[] = {
1375         MSR_IA32_VMX_BASIC,
1376         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1377         MSR_IA32_VMX_PINBASED_CTLS,
1378         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1379         MSR_IA32_VMX_PROCBASED_CTLS,
1380         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1381         MSR_IA32_VMX_EXIT_CTLS,
1382         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1383         MSR_IA32_VMX_ENTRY_CTLS,
1384         MSR_IA32_VMX_MISC,
1385         MSR_IA32_VMX_CR0_FIXED0,
1386         MSR_IA32_VMX_CR0_FIXED1,
1387         MSR_IA32_VMX_CR4_FIXED0,
1388         MSR_IA32_VMX_CR4_FIXED1,
1389         MSR_IA32_VMX_VMCS_ENUM,
1390         MSR_IA32_VMX_PROCBASED_CTLS2,
1391         MSR_IA32_VMX_EPT_VPID_CAP,
1392         MSR_IA32_VMX_VMFUNC,
1393
1394         MSR_F10H_DECFG,
1395         MSR_IA32_UCODE_REV,
1396         MSR_IA32_ARCH_CAPABILITIES,
1397         MSR_IA32_PERF_CAPABILITIES,
1398 };
1399
1400 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1401 static unsigned int num_msr_based_features;
1402
1403 static u64 kvm_get_arch_capabilities(void)
1404 {
1405         u64 data = 0;
1406
1407         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1408                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1409
1410         /*
1411          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1412          * the nested hypervisor runs with NX huge pages.  If it is not,
1413          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1414          * L1 guests, so it need not worry about its own (L2) guests.
1415          */
1416         data |= ARCH_CAP_PSCHANGE_MC_NO;
1417
1418         /*
1419          * If we're doing cache flushes (either "always" or "cond")
1420          * we will do one whenever the guest does a vmlaunch/vmresume.
1421          * If an outer hypervisor is doing the cache flush for us
1422          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1423          * capability to the guest too, and if EPT is disabled we're not
1424          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1425          * require a nested hypervisor to do a flush of its own.
1426          */
1427         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1428                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1429
1430         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1431                 data |= ARCH_CAP_RDCL_NO;
1432         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1433                 data |= ARCH_CAP_SSB_NO;
1434         if (!boot_cpu_has_bug(X86_BUG_MDS))
1435                 data |= ARCH_CAP_MDS_NO;
1436
1437         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1438                 /*
1439                  * If RTM=0 because the kernel has disabled TSX, the host might
1440                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1441                  * and therefore knows that there cannot be TAA) but keep
1442                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1443                  * and we want to allow migrating those guests to tsx=off hosts.
1444                  */
1445                 data &= ~ARCH_CAP_TAA_NO;
1446         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1447                 data |= ARCH_CAP_TAA_NO;
1448         } else {
1449                 /*
1450                  * Nothing to do here; we emulate TSX_CTRL if present on the
1451                  * host so the guest can choose between disabling TSX or
1452                  * using VERW to clear CPU buffers.
1453                  */
1454         }
1455
1456         return data;
1457 }
1458
1459 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1460 {
1461         switch (msr->index) {
1462         case MSR_IA32_ARCH_CAPABILITIES:
1463                 msr->data = kvm_get_arch_capabilities();
1464                 break;
1465         case MSR_IA32_UCODE_REV:
1466                 rdmsrl_safe(msr->index, &msr->data);
1467                 break;
1468         default:
1469                 return static_call(kvm_x86_get_msr_feature)(msr);
1470         }
1471         return 0;
1472 }
1473
1474 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1475 {
1476         struct kvm_msr_entry msr;
1477         int r;
1478
1479         msr.index = index;
1480         r = kvm_get_msr_feature(&msr);
1481
1482         if (r == KVM_MSR_RET_INVALID) {
1483                 /* Unconditionally clear the output for simplicity */
1484                 *data = 0;
1485                 if (kvm_msr_ignored_check(index, 0, false))
1486                         r = 0;
1487         }
1488
1489         if (r)
1490                 return r;
1491
1492         *data = msr.data;
1493
1494         return 0;
1495 }
1496
1497 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1498 {
1499         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1500                 return false;
1501
1502         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1503                 return false;
1504
1505         if (efer & (EFER_LME | EFER_LMA) &&
1506             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1507                 return false;
1508
1509         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1510                 return false;
1511
1512         return true;
1513
1514 }
1515 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1516 {
1517         if (efer & efer_reserved_bits)
1518                 return false;
1519
1520         return __kvm_valid_efer(vcpu, efer);
1521 }
1522 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1523
1524 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1525 {
1526         u64 old_efer = vcpu->arch.efer;
1527         u64 efer = msr_info->data;
1528         int r;
1529
1530         if (efer & efer_reserved_bits)
1531                 return 1;
1532
1533         if (!msr_info->host_initiated) {
1534                 if (!__kvm_valid_efer(vcpu, efer))
1535                         return 1;
1536
1537                 if (is_paging(vcpu) &&
1538                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1539                         return 1;
1540         }
1541
1542         efer &= ~EFER_LMA;
1543         efer |= vcpu->arch.efer & EFER_LMA;
1544
1545         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1546         if (r) {
1547                 WARN_ON(r > 0);
1548                 return r;
1549         }
1550
1551         /* Update reserved bits */
1552         if ((efer ^ old_efer) & EFER_NX)
1553                 kvm_mmu_reset_context(vcpu);
1554
1555         return 0;
1556 }
1557
1558 void kvm_enable_efer_bits(u64 mask)
1559 {
1560        efer_reserved_bits &= ~mask;
1561 }
1562 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1563
1564 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1565 {
1566         struct kvm_x86_msr_filter *msr_filter;
1567         struct msr_bitmap_range *ranges;
1568         struct kvm *kvm = vcpu->kvm;
1569         bool allowed;
1570         int idx;
1571         u32 i;
1572
1573         /* x2APIC MSRs do not support filtering. */
1574         if (index >= 0x800 && index <= 0x8ff)
1575                 return true;
1576
1577         idx = srcu_read_lock(&kvm->srcu);
1578
1579         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1580         if (!msr_filter) {
1581                 allowed = true;
1582                 goto out;
1583         }
1584
1585         allowed = msr_filter->default_allow;
1586         ranges = msr_filter->ranges;
1587
1588         for (i = 0; i < msr_filter->count; i++) {
1589                 u32 start = ranges[i].base;
1590                 u32 end = start + ranges[i].nmsrs;
1591                 u32 flags = ranges[i].flags;
1592                 unsigned long *bitmap = ranges[i].bitmap;
1593
1594                 if ((index >= start) && (index < end) && (flags & type)) {
1595                         allowed = !!test_bit(index - start, bitmap);
1596                         break;
1597                 }
1598         }
1599
1600 out:
1601         srcu_read_unlock(&kvm->srcu, idx);
1602
1603         return allowed;
1604 }
1605 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1606
1607 /*
1608  * Write @data into the MSR specified by @index.  Select MSR specific fault
1609  * checks are bypassed if @host_initiated is %true.
1610  * Returns 0 on success, non-0 otherwise.
1611  * Assumes vcpu_load() was already called.
1612  */
1613 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1614                          bool host_initiated)
1615 {
1616         struct msr_data msr;
1617
1618         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1619                 return KVM_MSR_RET_FILTERED;
1620
1621         switch (index) {
1622         case MSR_FS_BASE:
1623         case MSR_GS_BASE:
1624         case MSR_KERNEL_GS_BASE:
1625         case MSR_CSTAR:
1626         case MSR_LSTAR:
1627                 if (is_noncanonical_address(data, vcpu))
1628                         return 1;
1629                 break;
1630         case MSR_IA32_SYSENTER_EIP:
1631         case MSR_IA32_SYSENTER_ESP:
1632                 /*
1633                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1634                  * non-canonical address is written on Intel but not on
1635                  * AMD (which ignores the top 32-bits, because it does
1636                  * not implement 64-bit SYSENTER).
1637                  *
1638                  * 64-bit code should hence be able to write a non-canonical
1639                  * value on AMD.  Making the address canonical ensures that
1640                  * vmentry does not fail on Intel after writing a non-canonical
1641                  * value, and that something deterministic happens if the guest
1642                  * invokes 64-bit SYSENTER.
1643                  */
1644                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1645         }
1646
1647         msr.data = data;
1648         msr.index = index;
1649         msr.host_initiated = host_initiated;
1650
1651         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1652 }
1653
1654 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1655                                      u32 index, u64 data, bool host_initiated)
1656 {
1657         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1658
1659         if (ret == KVM_MSR_RET_INVALID)
1660                 if (kvm_msr_ignored_check(index, data, true))
1661                         ret = 0;
1662
1663         return ret;
1664 }
1665
1666 /*
1667  * Read the MSR specified by @index into @data.  Select MSR specific fault
1668  * checks are bypassed if @host_initiated is %true.
1669  * Returns 0 on success, non-0 otherwise.
1670  * Assumes vcpu_load() was already called.
1671  */
1672 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1673                   bool host_initiated)
1674 {
1675         struct msr_data msr;
1676         int ret;
1677
1678         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1679                 return KVM_MSR_RET_FILTERED;
1680
1681         msr.index = index;
1682         msr.host_initiated = host_initiated;
1683
1684         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1685         if (!ret)
1686                 *data = msr.data;
1687         return ret;
1688 }
1689
1690 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1691                                      u32 index, u64 *data, bool host_initiated)
1692 {
1693         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1694
1695         if (ret == KVM_MSR_RET_INVALID) {
1696                 /* Unconditionally clear *data for simplicity */
1697                 *data = 0;
1698                 if (kvm_msr_ignored_check(index, 0, false))
1699                         ret = 0;
1700         }
1701
1702         return ret;
1703 }
1704
1705 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1706 {
1707         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1708 }
1709 EXPORT_SYMBOL_GPL(kvm_get_msr);
1710
1711 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1712 {
1713         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1714 }
1715 EXPORT_SYMBOL_GPL(kvm_set_msr);
1716
1717 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1718 {
1719         int err = vcpu->run->msr.error;
1720         if (!err) {
1721                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1722                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1723         }
1724
1725         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1726 }
1727
1728 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1729 {
1730         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1731 }
1732
1733 static u64 kvm_msr_reason(int r)
1734 {
1735         switch (r) {
1736         case KVM_MSR_RET_INVALID:
1737                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1738         case KVM_MSR_RET_FILTERED:
1739                 return KVM_MSR_EXIT_REASON_FILTER;
1740         default:
1741                 return KVM_MSR_EXIT_REASON_INVAL;
1742         }
1743 }
1744
1745 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1746                               u32 exit_reason, u64 data,
1747                               int (*completion)(struct kvm_vcpu *vcpu),
1748                               int r)
1749 {
1750         u64 msr_reason = kvm_msr_reason(r);
1751
1752         /* Check if the user wanted to know about this MSR fault */
1753         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1754                 return 0;
1755
1756         vcpu->run->exit_reason = exit_reason;
1757         vcpu->run->msr.error = 0;
1758         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1759         vcpu->run->msr.reason = msr_reason;
1760         vcpu->run->msr.index = index;
1761         vcpu->run->msr.data = data;
1762         vcpu->arch.complete_userspace_io = completion;
1763
1764         return 1;
1765 }
1766
1767 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1768 {
1769         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1770                                    complete_emulated_rdmsr, r);
1771 }
1772
1773 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1774 {
1775         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1776                                    complete_emulated_wrmsr, r);
1777 }
1778
1779 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1780 {
1781         u32 ecx = kvm_rcx_read(vcpu);
1782         u64 data;
1783         int r;
1784
1785         r = kvm_get_msr(vcpu, ecx, &data);
1786
1787         /* MSR read failed? See if we should ask user space */
1788         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1789                 /* Bounce to user space */
1790                 return 0;
1791         }
1792
1793         if (!r) {
1794                 trace_kvm_msr_read(ecx, data);
1795
1796                 kvm_rax_write(vcpu, data & -1u);
1797                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1798         } else {
1799                 trace_kvm_msr_read_ex(ecx);
1800         }
1801
1802         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1803 }
1804 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1805
1806 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1807 {
1808         u32 ecx = kvm_rcx_read(vcpu);
1809         u64 data = kvm_read_edx_eax(vcpu);
1810         int r;
1811
1812         r = kvm_set_msr(vcpu, ecx, data);
1813
1814         /* MSR write failed? See if we should ask user space */
1815         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1816                 /* Bounce to user space */
1817                 return 0;
1818
1819         /* Signal all other negative errors to userspace */
1820         if (r < 0)
1821                 return r;
1822
1823         if (!r)
1824                 trace_kvm_msr_write(ecx, data);
1825         else
1826                 trace_kvm_msr_write_ex(ecx, data);
1827
1828         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1829 }
1830 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1831
1832 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1833 {
1834         return kvm_skip_emulated_instruction(vcpu);
1835 }
1836 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1837
1838 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1839 {
1840         /* Treat an INVD instruction as a NOP and just skip it. */
1841         return kvm_emulate_as_nop(vcpu);
1842 }
1843 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1844
1845 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1846 {
1847         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1848         return kvm_emulate_as_nop(vcpu);
1849 }
1850 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1851
1852 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1853 {
1854         kvm_queue_exception(vcpu, UD_VECTOR);
1855         return 1;
1856 }
1857 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1858
1859 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1860 {
1861         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1862         return kvm_emulate_as_nop(vcpu);
1863 }
1864 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1865
1866 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1867 {
1868         xfer_to_guest_mode_prepare();
1869         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1870                 xfer_to_guest_mode_work_pending();
1871 }
1872
1873 /*
1874  * The fast path for frequent and performance sensitive wrmsr emulation,
1875  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1876  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1877  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1878  * other cases which must be called after interrupts are enabled on the host.
1879  */
1880 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1881 {
1882         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1883                 return 1;
1884
1885         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1886                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1887                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1888                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1889
1890                 data &= ~(1 << 12);
1891                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1892                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1893                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1894                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1895                 return 0;
1896         }
1897
1898         return 1;
1899 }
1900
1901 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1902 {
1903         if (!kvm_can_use_hv_timer(vcpu))
1904                 return 1;
1905
1906         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1907         return 0;
1908 }
1909
1910 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1911 {
1912         u32 msr = kvm_rcx_read(vcpu);
1913         u64 data;
1914         fastpath_t ret = EXIT_FASTPATH_NONE;
1915
1916         switch (msr) {
1917         case APIC_BASE_MSR + (APIC_ICR >> 4):
1918                 data = kvm_read_edx_eax(vcpu);
1919                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1920                         kvm_skip_emulated_instruction(vcpu);
1921                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1922                 }
1923                 break;
1924         case MSR_IA32_TSC_DEADLINE:
1925                 data = kvm_read_edx_eax(vcpu);
1926                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1927                         kvm_skip_emulated_instruction(vcpu);
1928                         ret = EXIT_FASTPATH_REENTER_GUEST;
1929                 }
1930                 break;
1931         default:
1932                 break;
1933         }
1934
1935         if (ret != EXIT_FASTPATH_NONE)
1936                 trace_kvm_msr_write(msr, data);
1937
1938         return ret;
1939 }
1940 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1941
1942 /*
1943  * Adapt set_msr() to msr_io()'s calling convention
1944  */
1945 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1946 {
1947         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1948 }
1949
1950 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1951 {
1952         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1953 }
1954
1955 #ifdef CONFIG_X86_64
1956 struct pvclock_clock {
1957         int vclock_mode;
1958         u64 cycle_last;
1959         u64 mask;
1960         u32 mult;
1961         u32 shift;
1962         u64 base_cycles;
1963         u64 offset;
1964 };
1965
1966 struct pvclock_gtod_data {
1967         seqcount_t      seq;
1968
1969         struct pvclock_clock clock; /* extract of a clocksource struct */
1970         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1971
1972         ktime_t         offs_boot;
1973         u64             wall_time_sec;
1974 };
1975
1976 static struct pvclock_gtod_data pvclock_gtod_data;
1977
1978 static void update_pvclock_gtod(struct timekeeper *tk)
1979 {
1980         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1981
1982         write_seqcount_begin(&vdata->seq);
1983
1984         /* copy pvclock gtod data */
1985         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1986         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1987         vdata->clock.mask               = tk->tkr_mono.mask;
1988         vdata->clock.mult               = tk->tkr_mono.mult;
1989         vdata->clock.shift              = tk->tkr_mono.shift;
1990         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1991         vdata->clock.offset             = tk->tkr_mono.base;
1992
1993         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1994         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1995         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1996         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1997         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1998         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1999         vdata->raw_clock.offset         = tk->tkr_raw.base;
2000
2001         vdata->wall_time_sec            = tk->xtime_sec;
2002
2003         vdata->offs_boot                = tk->offs_boot;
2004
2005         write_seqcount_end(&vdata->seq);
2006 }
2007
2008 static s64 get_kvmclock_base_ns(void)
2009 {
2010         /* Count up from boot time, but with the frequency of the raw clock.  */
2011         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2012 }
2013 #else
2014 static s64 get_kvmclock_base_ns(void)
2015 {
2016         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2017         return ktime_get_boottime_ns();
2018 }
2019 #endif
2020
2021 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2022 {
2023         int version;
2024         int r;
2025         struct pvclock_wall_clock wc;
2026         u32 wc_sec_hi;
2027         u64 wall_nsec;
2028
2029         if (!wall_clock)
2030                 return;
2031
2032         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2033         if (r)
2034                 return;
2035
2036         if (version & 1)
2037                 ++version;  /* first time write, random junk */
2038
2039         ++version;
2040
2041         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2042                 return;
2043
2044         /*
2045          * The guest calculates current wall clock time by adding
2046          * system time (updated by kvm_guest_time_update below) to the
2047          * wall clock specified here.  We do the reverse here.
2048          */
2049         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2050
2051         wc.nsec = do_div(wall_nsec, 1000000000);
2052         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2053         wc.version = version;
2054
2055         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2056
2057         if (sec_hi_ofs) {
2058                 wc_sec_hi = wall_nsec >> 32;
2059                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2060                                 &wc_sec_hi, sizeof(wc_sec_hi));
2061         }
2062
2063         version++;
2064         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2065 }
2066
2067 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2068                                   bool old_msr, bool host_initiated)
2069 {
2070         struct kvm_arch *ka = &vcpu->kvm->arch;
2071
2072         if (vcpu->vcpu_id == 0 && !host_initiated) {
2073                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2074                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2075
2076                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2077         }
2078
2079         vcpu->arch.time = system_time;
2080         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2081
2082         /* we verify if the enable bit is set... */
2083         vcpu->arch.pv_time_enabled = false;
2084         if (!(system_time & 1))
2085                 return;
2086
2087         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2088                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2089                                        sizeof(struct pvclock_vcpu_time_info)))
2090                 vcpu->arch.pv_time_enabled = true;
2091
2092         return;
2093 }
2094
2095 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2096 {
2097         do_shl32_div32(dividend, divisor);
2098         return dividend;
2099 }
2100
2101 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2102                                s8 *pshift, u32 *pmultiplier)
2103 {
2104         uint64_t scaled64;
2105         int32_t  shift = 0;
2106         uint64_t tps64;
2107         uint32_t tps32;
2108
2109         tps64 = base_hz;
2110         scaled64 = scaled_hz;
2111         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2112                 tps64 >>= 1;
2113                 shift--;
2114         }
2115
2116         tps32 = (uint32_t)tps64;
2117         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2118                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2119                         scaled64 >>= 1;
2120                 else
2121                         tps32 <<= 1;
2122                 shift++;
2123         }
2124
2125         *pshift = shift;
2126         *pmultiplier = div_frac(scaled64, tps32);
2127 }
2128
2129 #ifdef CONFIG_X86_64
2130 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2131 #endif
2132
2133 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2134 static unsigned long max_tsc_khz;
2135
2136 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2137 {
2138         u64 v = (u64)khz * (1000000 + ppm);
2139         do_div(v, 1000000);
2140         return v;
2141 }
2142
2143 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2144 {
2145         u64 ratio;
2146
2147         /* Guest TSC same frequency as host TSC? */
2148         if (!scale) {
2149                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2150                 return 0;
2151         }
2152
2153         /* TSC scaling supported? */
2154         if (!kvm_has_tsc_control) {
2155                 if (user_tsc_khz > tsc_khz) {
2156                         vcpu->arch.tsc_catchup = 1;
2157                         vcpu->arch.tsc_always_catchup = 1;
2158                         return 0;
2159                 } else {
2160                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2161                         return -1;
2162                 }
2163         }
2164
2165         /* TSC scaling required  - calculate ratio */
2166         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2167                                 user_tsc_khz, tsc_khz);
2168
2169         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2170                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2171                                     user_tsc_khz);
2172                 return -1;
2173         }
2174
2175         vcpu->arch.tsc_scaling_ratio = ratio;
2176         return 0;
2177 }
2178
2179 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2180 {
2181         u32 thresh_lo, thresh_hi;
2182         int use_scaling = 0;
2183
2184         /* tsc_khz can be zero if TSC calibration fails */
2185         if (user_tsc_khz == 0) {
2186                 /* set tsc_scaling_ratio to a safe value */
2187                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2188                 return -1;
2189         }
2190
2191         /* Compute a scale to convert nanoseconds in TSC cycles */
2192         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2193                            &vcpu->arch.virtual_tsc_shift,
2194                            &vcpu->arch.virtual_tsc_mult);
2195         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2196
2197         /*
2198          * Compute the variation in TSC rate which is acceptable
2199          * within the range of tolerance and decide if the
2200          * rate being applied is within that bounds of the hardware
2201          * rate.  If so, no scaling or compensation need be done.
2202          */
2203         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2204         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2205         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2206                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2207                 use_scaling = 1;
2208         }
2209         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2210 }
2211
2212 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2213 {
2214         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2215                                       vcpu->arch.virtual_tsc_mult,
2216                                       vcpu->arch.virtual_tsc_shift);
2217         tsc += vcpu->arch.this_tsc_write;
2218         return tsc;
2219 }
2220
2221 static inline int gtod_is_based_on_tsc(int mode)
2222 {
2223         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2224 }
2225
2226 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2227 {
2228 #ifdef CONFIG_X86_64
2229         bool vcpus_matched;
2230         struct kvm_arch *ka = &vcpu->kvm->arch;
2231         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2232
2233         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2234                          atomic_read(&vcpu->kvm->online_vcpus));
2235
2236         /*
2237          * Once the masterclock is enabled, always perform request in
2238          * order to update it.
2239          *
2240          * In order to enable masterclock, the host clocksource must be TSC
2241          * and the vcpus need to have matched TSCs.  When that happens,
2242          * perform request to enable masterclock.
2243          */
2244         if (ka->use_master_clock ||
2245             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2246                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2247
2248         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2249                             atomic_read(&vcpu->kvm->online_vcpus),
2250                             ka->use_master_clock, gtod->clock.vclock_mode);
2251 #endif
2252 }
2253
2254 /*
2255  * Multiply tsc by a fixed point number represented by ratio.
2256  *
2257  * The most significant 64-N bits (mult) of ratio represent the
2258  * integral part of the fixed point number; the remaining N bits
2259  * (frac) represent the fractional part, ie. ratio represents a fixed
2260  * point number (mult + frac * 2^(-N)).
2261  *
2262  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2263  */
2264 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2265 {
2266         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2267 }
2268
2269 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2270 {
2271         u64 _tsc = tsc;
2272         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2273
2274         if (ratio != kvm_default_tsc_scaling_ratio)
2275                 _tsc = __scale_tsc(ratio, tsc);
2276
2277         return _tsc;
2278 }
2279 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2280
2281 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2282 {
2283         u64 tsc;
2284
2285         tsc = kvm_scale_tsc(vcpu, rdtsc());
2286
2287         return target_tsc - tsc;
2288 }
2289
2290 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2291 {
2292         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2293 }
2294 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2295
2296 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2297 {
2298         vcpu->arch.l1_tsc_offset = offset;
2299         vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2300 }
2301
2302 static inline bool kvm_check_tsc_unstable(void)
2303 {
2304 #ifdef CONFIG_X86_64
2305         /*
2306          * TSC is marked unstable when we're running on Hyper-V,
2307          * 'TSC page' clocksource is good.
2308          */
2309         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2310                 return false;
2311 #endif
2312         return check_tsc_unstable();
2313 }
2314
2315 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2316 {
2317         struct kvm *kvm = vcpu->kvm;
2318         u64 offset, ns, elapsed;
2319         unsigned long flags;
2320         bool matched;
2321         bool already_matched;
2322         bool synchronizing = false;
2323
2324         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2325         offset = kvm_compute_tsc_offset(vcpu, data);
2326         ns = get_kvmclock_base_ns();
2327         elapsed = ns - kvm->arch.last_tsc_nsec;
2328
2329         if (vcpu->arch.virtual_tsc_khz) {
2330                 if (data == 0) {
2331                         /*
2332                          * detection of vcpu initialization -- need to sync
2333                          * with other vCPUs. This particularly helps to keep
2334                          * kvm_clock stable after CPU hotplug
2335                          */
2336                         synchronizing = true;
2337                 } else {
2338                         u64 tsc_exp = kvm->arch.last_tsc_write +
2339                                                 nsec_to_cycles(vcpu, elapsed);
2340                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2341                         /*
2342                          * Special case: TSC write with a small delta (1 second)
2343                          * of virtual cycle time against real time is
2344                          * interpreted as an attempt to synchronize the CPU.
2345                          */
2346                         synchronizing = data < tsc_exp + tsc_hz &&
2347                                         data + tsc_hz > tsc_exp;
2348                 }
2349         }
2350
2351         /*
2352          * For a reliable TSC, we can match TSC offsets, and for an unstable
2353          * TSC, we add elapsed time in this computation.  We could let the
2354          * compensation code attempt to catch up if we fall behind, but
2355          * it's better to try to match offsets from the beginning.
2356          */
2357         if (synchronizing &&
2358             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2359                 if (!kvm_check_tsc_unstable()) {
2360                         offset = kvm->arch.cur_tsc_offset;
2361                 } else {
2362                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2363                         data += delta;
2364                         offset = kvm_compute_tsc_offset(vcpu, data);
2365                 }
2366                 matched = true;
2367                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2368         } else {
2369                 /*
2370                  * We split periods of matched TSC writes into generations.
2371                  * For each generation, we track the original measured
2372                  * nanosecond time, offset, and write, so if TSCs are in
2373                  * sync, we can match exact offset, and if not, we can match
2374                  * exact software computation in compute_guest_tsc()
2375                  *
2376                  * These values are tracked in kvm->arch.cur_xxx variables.
2377                  */
2378                 kvm->arch.cur_tsc_generation++;
2379                 kvm->arch.cur_tsc_nsec = ns;
2380                 kvm->arch.cur_tsc_write = data;
2381                 kvm->arch.cur_tsc_offset = offset;
2382                 matched = false;
2383         }
2384
2385         /*
2386          * We also track th most recent recorded KHZ, write and time to
2387          * allow the matching interval to be extended at each write.
2388          */
2389         kvm->arch.last_tsc_nsec = ns;
2390         kvm->arch.last_tsc_write = data;
2391         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2392
2393         vcpu->arch.last_guest_tsc = data;
2394
2395         /* Keep track of which generation this VCPU has synchronized to */
2396         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2397         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2398         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2399
2400         kvm_vcpu_write_tsc_offset(vcpu, offset);
2401         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2402
2403         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2404         if (!matched) {
2405                 kvm->arch.nr_vcpus_matched_tsc = 0;
2406         } else if (!already_matched) {
2407                 kvm->arch.nr_vcpus_matched_tsc++;
2408         }
2409
2410         kvm_track_tsc_matching(vcpu);
2411         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2412 }
2413
2414 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2415                                            s64 adjustment)
2416 {
2417         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2418         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2419 }
2420
2421 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2422 {
2423         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2424                 WARN_ON(adjustment < 0);
2425         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2426         adjust_tsc_offset_guest(vcpu, adjustment);
2427 }
2428
2429 #ifdef CONFIG_X86_64
2430
2431 static u64 read_tsc(void)
2432 {
2433         u64 ret = (u64)rdtsc_ordered();
2434         u64 last = pvclock_gtod_data.clock.cycle_last;
2435
2436         if (likely(ret >= last))
2437                 return ret;
2438
2439         /*
2440          * GCC likes to generate cmov here, but this branch is extremely
2441          * predictable (it's just a function of time and the likely is
2442          * very likely) and there's a data dependence, so force GCC
2443          * to generate a branch instead.  I don't barrier() because
2444          * we don't actually need a barrier, and if this function
2445          * ever gets inlined it will generate worse code.
2446          */
2447         asm volatile ("");
2448         return last;
2449 }
2450
2451 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2452                           int *mode)
2453 {
2454         long v;
2455         u64 tsc_pg_val;
2456
2457         switch (clock->vclock_mode) {
2458         case VDSO_CLOCKMODE_HVCLOCK:
2459                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2460                                                   tsc_timestamp);
2461                 if (tsc_pg_val != U64_MAX) {
2462                         /* TSC page valid */
2463                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2464                         v = (tsc_pg_val - clock->cycle_last) &
2465                                 clock->mask;
2466                 } else {
2467                         /* TSC page invalid */
2468                         *mode = VDSO_CLOCKMODE_NONE;
2469                 }
2470                 break;
2471         case VDSO_CLOCKMODE_TSC:
2472                 *mode = VDSO_CLOCKMODE_TSC;
2473                 *tsc_timestamp = read_tsc();
2474                 v = (*tsc_timestamp - clock->cycle_last) &
2475                         clock->mask;
2476                 break;
2477         default:
2478                 *mode = VDSO_CLOCKMODE_NONE;
2479         }
2480
2481         if (*mode == VDSO_CLOCKMODE_NONE)
2482                 *tsc_timestamp = v = 0;
2483
2484         return v * clock->mult;
2485 }
2486
2487 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2488 {
2489         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2490         unsigned long seq;
2491         int mode;
2492         u64 ns;
2493
2494         do {
2495                 seq = read_seqcount_begin(&gtod->seq);
2496                 ns = gtod->raw_clock.base_cycles;
2497                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2498                 ns >>= gtod->raw_clock.shift;
2499                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2500         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2501         *t = ns;
2502
2503         return mode;
2504 }
2505
2506 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2507 {
2508         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2509         unsigned long seq;
2510         int mode;
2511         u64 ns;
2512
2513         do {
2514                 seq = read_seqcount_begin(&gtod->seq);
2515                 ts->tv_sec = gtod->wall_time_sec;
2516                 ns = gtod->clock.base_cycles;
2517                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2518                 ns >>= gtod->clock.shift;
2519         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2520
2521         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2522         ts->tv_nsec = ns;
2523
2524         return mode;
2525 }
2526
2527 /* returns true if host is using TSC based clocksource */
2528 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2529 {
2530         /* checked again under seqlock below */
2531         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2532                 return false;
2533
2534         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2535                                                       tsc_timestamp));
2536 }
2537
2538 /* returns true if host is using TSC based clocksource */
2539 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2540                                            u64 *tsc_timestamp)
2541 {
2542         /* checked again under seqlock below */
2543         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2544                 return false;
2545
2546         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2547 }
2548 #endif
2549
2550 /*
2551  *
2552  * Assuming a stable TSC across physical CPUS, and a stable TSC
2553  * across virtual CPUs, the following condition is possible.
2554  * Each numbered line represents an event visible to both
2555  * CPUs at the next numbered event.
2556  *
2557  * "timespecX" represents host monotonic time. "tscX" represents
2558  * RDTSC value.
2559  *
2560  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2561  *
2562  * 1.  read timespec0,tsc0
2563  * 2.                                   | timespec1 = timespec0 + N
2564  *                                      | tsc1 = tsc0 + M
2565  * 3. transition to guest               | transition to guest
2566  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2567  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2568  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2569  *
2570  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2571  *
2572  *      - ret0 < ret1
2573  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2574  *              ...
2575  *      - 0 < N - M => M < N
2576  *
2577  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2578  * always the case (the difference between two distinct xtime instances
2579  * might be smaller then the difference between corresponding TSC reads,
2580  * when updating guest vcpus pvclock areas).
2581  *
2582  * To avoid that problem, do not allow visibility of distinct
2583  * system_timestamp/tsc_timestamp values simultaneously: use a master
2584  * copy of host monotonic time values. Update that master copy
2585  * in lockstep.
2586  *
2587  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2588  *
2589  */
2590
2591 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2592 {
2593 #ifdef CONFIG_X86_64
2594         struct kvm_arch *ka = &kvm->arch;
2595         int vclock_mode;
2596         bool host_tsc_clocksource, vcpus_matched;
2597
2598         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2599                         atomic_read(&kvm->online_vcpus));
2600
2601         /*
2602          * If the host uses TSC clock, then passthrough TSC as stable
2603          * to the guest.
2604          */
2605         host_tsc_clocksource = kvm_get_time_and_clockread(
2606                                         &ka->master_kernel_ns,
2607                                         &ka->master_cycle_now);
2608
2609         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2610                                 && !ka->backwards_tsc_observed
2611                                 && !ka->boot_vcpu_runs_old_kvmclock;
2612
2613         if (ka->use_master_clock)
2614                 atomic_set(&kvm_guest_has_master_clock, 1);
2615
2616         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2617         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2618                                         vcpus_matched);
2619 #endif
2620 }
2621
2622 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2623 {
2624         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2625 }
2626
2627 static void kvm_gen_update_masterclock(struct kvm *kvm)
2628 {
2629 #ifdef CONFIG_X86_64
2630         int i;
2631         struct kvm_vcpu *vcpu;
2632         struct kvm_arch *ka = &kvm->arch;
2633         unsigned long flags;
2634
2635         kvm_hv_invalidate_tsc_page(kvm);
2636
2637         kvm_make_mclock_inprogress_request(kvm);
2638
2639         /* no guest entries from this point */
2640         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2641         pvclock_update_vm_gtod_copy(kvm);
2642         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2643
2644         kvm_for_each_vcpu(i, vcpu, kvm)
2645                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2646
2647         /* guest entries allowed */
2648         kvm_for_each_vcpu(i, vcpu, kvm)
2649                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2650 #endif
2651 }
2652
2653 u64 get_kvmclock_ns(struct kvm *kvm)
2654 {
2655         struct kvm_arch *ka = &kvm->arch;
2656         struct pvclock_vcpu_time_info hv_clock;
2657         unsigned long flags;
2658         u64 ret;
2659
2660         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2661         if (!ka->use_master_clock) {
2662                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2663                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2664         }
2665
2666         hv_clock.tsc_timestamp = ka->master_cycle_now;
2667         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2668         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2669
2670         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2671         get_cpu();
2672
2673         if (__this_cpu_read(cpu_tsc_khz)) {
2674                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2675                                    &hv_clock.tsc_shift,
2676                                    &hv_clock.tsc_to_system_mul);
2677                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2678         } else
2679                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2680
2681         put_cpu();
2682
2683         return ret;
2684 }
2685
2686 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2687                                    struct gfn_to_hva_cache *cache,
2688                                    unsigned int offset)
2689 {
2690         struct kvm_vcpu_arch *vcpu = &v->arch;
2691         struct pvclock_vcpu_time_info guest_hv_clock;
2692
2693         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2694                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2695                 return;
2696
2697         /* This VCPU is paused, but it's legal for a guest to read another
2698          * VCPU's kvmclock, so we really have to follow the specification where
2699          * it says that version is odd if data is being modified, and even after
2700          * it is consistent.
2701          *
2702          * Version field updates must be kept separate.  This is because
2703          * kvm_write_guest_cached might use a "rep movs" instruction, and
2704          * writes within a string instruction are weakly ordered.  So there
2705          * are three writes overall.
2706          *
2707          * As a small optimization, only write the version field in the first
2708          * and third write.  The vcpu->pv_time cache is still valid, because the
2709          * version field is the first in the struct.
2710          */
2711         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2712
2713         if (guest_hv_clock.version & 1)
2714                 ++guest_hv_clock.version;  /* first time write, random junk */
2715
2716         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2717         kvm_write_guest_offset_cached(v->kvm, cache,
2718                                       &vcpu->hv_clock, offset,
2719                                       sizeof(vcpu->hv_clock.version));
2720
2721         smp_wmb();
2722
2723         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2724         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2725
2726         if (vcpu->pvclock_set_guest_stopped_request) {
2727                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2728                 vcpu->pvclock_set_guest_stopped_request = false;
2729         }
2730
2731         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2732
2733         kvm_write_guest_offset_cached(v->kvm, cache,
2734                                       &vcpu->hv_clock, offset,
2735                                       sizeof(vcpu->hv_clock));
2736
2737         smp_wmb();
2738
2739         vcpu->hv_clock.version++;
2740         kvm_write_guest_offset_cached(v->kvm, cache,
2741                                      &vcpu->hv_clock, offset,
2742                                      sizeof(vcpu->hv_clock.version));
2743 }
2744
2745 static int kvm_guest_time_update(struct kvm_vcpu *v)
2746 {
2747         unsigned long flags, tgt_tsc_khz;
2748         struct kvm_vcpu_arch *vcpu = &v->arch;
2749         struct kvm_arch *ka = &v->kvm->arch;
2750         s64 kernel_ns;
2751         u64 tsc_timestamp, host_tsc;
2752         u8 pvclock_flags;
2753         bool use_master_clock;
2754
2755         kernel_ns = 0;
2756         host_tsc = 0;
2757
2758         /*
2759          * If the host uses TSC clock, then passthrough TSC as stable
2760          * to the guest.
2761          */
2762         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2763         use_master_clock = ka->use_master_clock;
2764         if (use_master_clock) {
2765                 host_tsc = ka->master_cycle_now;
2766                 kernel_ns = ka->master_kernel_ns;
2767         }
2768         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2769
2770         /* Keep irq disabled to prevent changes to the clock */
2771         local_irq_save(flags);
2772         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2773         if (unlikely(tgt_tsc_khz == 0)) {
2774                 local_irq_restore(flags);
2775                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2776                 return 1;
2777         }
2778         if (!use_master_clock) {
2779                 host_tsc = rdtsc();
2780                 kernel_ns = get_kvmclock_base_ns();
2781         }
2782
2783         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2784
2785         /*
2786          * We may have to catch up the TSC to match elapsed wall clock
2787          * time for two reasons, even if kvmclock is used.
2788          *   1) CPU could have been running below the maximum TSC rate
2789          *   2) Broken TSC compensation resets the base at each VCPU
2790          *      entry to avoid unknown leaps of TSC even when running
2791          *      again on the same CPU.  This may cause apparent elapsed
2792          *      time to disappear, and the guest to stand still or run
2793          *      very slowly.
2794          */
2795         if (vcpu->tsc_catchup) {
2796                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2797                 if (tsc > tsc_timestamp) {
2798                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2799                         tsc_timestamp = tsc;
2800                 }
2801         }
2802
2803         local_irq_restore(flags);
2804
2805         /* With all the info we got, fill in the values */
2806
2807         if (kvm_has_tsc_control)
2808                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2809
2810         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2811                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2812                                    &vcpu->hv_clock.tsc_shift,
2813                                    &vcpu->hv_clock.tsc_to_system_mul);
2814                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2815         }
2816
2817         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2818         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2819         vcpu->last_guest_tsc = tsc_timestamp;
2820
2821         /* If the host uses TSC clocksource, then it is stable */
2822         pvclock_flags = 0;
2823         if (use_master_clock)
2824                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2825
2826         vcpu->hv_clock.flags = pvclock_flags;
2827
2828         if (vcpu->pv_time_enabled)
2829                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2830         if (vcpu->xen.vcpu_info_set)
2831                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2832                                        offsetof(struct compat_vcpu_info, time));
2833         if (vcpu->xen.vcpu_time_info_set)
2834                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2835         if (v == kvm_get_vcpu(v->kvm, 0))
2836                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2837         return 0;
2838 }
2839
2840 /*
2841  * kvmclock updates which are isolated to a given vcpu, such as
2842  * vcpu->cpu migration, should not allow system_timestamp from
2843  * the rest of the vcpus to remain static. Otherwise ntp frequency
2844  * correction applies to one vcpu's system_timestamp but not
2845  * the others.
2846  *
2847  * So in those cases, request a kvmclock update for all vcpus.
2848  * We need to rate-limit these requests though, as they can
2849  * considerably slow guests that have a large number of vcpus.
2850  * The time for a remote vcpu to update its kvmclock is bound
2851  * by the delay we use to rate-limit the updates.
2852  */
2853
2854 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2855
2856 static void kvmclock_update_fn(struct work_struct *work)
2857 {
2858         int i;
2859         struct delayed_work *dwork = to_delayed_work(work);
2860         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2861                                            kvmclock_update_work);
2862         struct kvm *kvm = container_of(ka, struct kvm, arch);
2863         struct kvm_vcpu *vcpu;
2864
2865         kvm_for_each_vcpu(i, vcpu, kvm) {
2866                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2867                 kvm_vcpu_kick(vcpu);
2868         }
2869 }
2870
2871 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2872 {
2873         struct kvm *kvm = v->kvm;
2874
2875         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2876         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2877                                         KVMCLOCK_UPDATE_DELAY);
2878 }
2879
2880 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2881
2882 static void kvmclock_sync_fn(struct work_struct *work)
2883 {
2884         struct delayed_work *dwork = to_delayed_work(work);
2885         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2886                                            kvmclock_sync_work);
2887         struct kvm *kvm = container_of(ka, struct kvm, arch);
2888
2889         if (!kvmclock_periodic_sync)
2890                 return;
2891
2892         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2893         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2894                                         KVMCLOCK_SYNC_PERIOD);
2895 }
2896
2897 /*
2898  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2899  */
2900 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2901 {
2902         /* McStatusWrEn enabled? */
2903         if (guest_cpuid_is_amd_or_hygon(vcpu))
2904                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2905
2906         return false;
2907 }
2908
2909 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2910 {
2911         u64 mcg_cap = vcpu->arch.mcg_cap;
2912         unsigned bank_num = mcg_cap & 0xff;
2913         u32 msr = msr_info->index;
2914         u64 data = msr_info->data;
2915
2916         switch (msr) {
2917         case MSR_IA32_MCG_STATUS:
2918                 vcpu->arch.mcg_status = data;
2919                 break;
2920         case MSR_IA32_MCG_CTL:
2921                 if (!(mcg_cap & MCG_CTL_P) &&
2922                     (data || !msr_info->host_initiated))
2923                         return 1;
2924                 if (data != 0 && data != ~(u64)0)
2925                         return 1;
2926                 vcpu->arch.mcg_ctl = data;
2927                 break;
2928         default:
2929                 if (msr >= MSR_IA32_MC0_CTL &&
2930                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2931                         u32 offset = array_index_nospec(
2932                                 msr - MSR_IA32_MC0_CTL,
2933                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2934
2935                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2936                          * some Linux kernels though clear bit 10 in bank 4 to
2937                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2938                          * this to avoid an uncatched #GP in the guest
2939                          */
2940                         if ((offset & 0x3) == 0 &&
2941                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2942                                 return -1;
2943
2944                         /* MCi_STATUS */
2945                         if (!msr_info->host_initiated &&
2946                             (offset & 0x3) == 1 && data != 0) {
2947                                 if (!can_set_mci_status(vcpu))
2948                                         return -1;
2949                         }
2950
2951                         vcpu->arch.mce_banks[offset] = data;
2952                         break;
2953                 }
2954                 return 1;
2955         }
2956         return 0;
2957 }
2958
2959 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2960 {
2961         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2962
2963         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2964 }
2965
2966 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2967 {
2968         gpa_t gpa = data & ~0x3f;
2969
2970         /* Bits 4:5 are reserved, Should be zero */
2971         if (data & 0x30)
2972                 return 1;
2973
2974         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2975             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2976                 return 1;
2977
2978         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2979             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2980                 return 1;
2981
2982         if (!lapic_in_kernel(vcpu))
2983                 return data ? 1 : 0;
2984
2985         vcpu->arch.apf.msr_en_val = data;
2986
2987         if (!kvm_pv_async_pf_enabled(vcpu)) {
2988                 kvm_clear_async_pf_completion_queue(vcpu);
2989                 kvm_async_pf_hash_reset(vcpu);
2990                 return 0;
2991         }
2992
2993         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2994                                         sizeof(u64)))
2995                 return 1;
2996
2997         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2998         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2999
3000         kvm_async_pf_wakeup_all(vcpu);
3001
3002         return 0;
3003 }
3004
3005 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3006 {
3007         /* Bits 8-63 are reserved */
3008         if (data >> 8)
3009                 return 1;
3010
3011         if (!lapic_in_kernel(vcpu))
3012                 return 1;
3013
3014         vcpu->arch.apf.msr_int_val = data;
3015
3016         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3017
3018         return 0;
3019 }
3020
3021 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3022 {
3023         vcpu->arch.pv_time_enabled = false;
3024         vcpu->arch.time = 0;
3025 }
3026
3027 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3028 {
3029         ++vcpu->stat.tlb_flush;
3030         static_call(kvm_x86_tlb_flush_all)(vcpu);
3031 }
3032
3033 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3034 {
3035         ++vcpu->stat.tlb_flush;
3036         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3037 }
3038
3039 static void record_steal_time(struct kvm_vcpu *vcpu)
3040 {
3041         struct kvm_host_map map;
3042         struct kvm_steal_time *st;
3043
3044         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3045                 kvm_xen_runstate_set_running(vcpu);
3046                 return;
3047         }
3048
3049         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3050                 return;
3051
3052         /* -EAGAIN is returned in atomic context so we can just return. */
3053         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3054                         &map, &vcpu->arch.st.cache, false))
3055                 return;
3056
3057         st = map.hva +
3058                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3059
3060         /*
3061          * Doing a TLB flush here, on the guest's behalf, can avoid
3062          * expensive IPIs.
3063          */
3064         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3065                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3066                                        st->preempted & KVM_VCPU_FLUSH_TLB);
3067                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
3068                         kvm_vcpu_flush_tlb_guest(vcpu);
3069         }
3070
3071         vcpu->arch.st.preempted = 0;
3072
3073         if (st->version & 1)
3074                 st->version += 1;  /* first time write, random junk */
3075
3076         st->version += 1;
3077
3078         smp_wmb();
3079
3080         st->steal += current->sched_info.run_delay -
3081                 vcpu->arch.st.last_steal;
3082         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3083
3084         smp_wmb();
3085
3086         st->version += 1;
3087
3088         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3089 }
3090
3091 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3092 {
3093         bool pr = false;
3094         u32 msr = msr_info->index;
3095         u64 data = msr_info->data;
3096
3097         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3098                 return kvm_xen_write_hypercall_page(vcpu, data);
3099
3100         switch (msr) {
3101         case MSR_AMD64_NB_CFG:
3102         case MSR_IA32_UCODE_WRITE:
3103         case MSR_VM_HSAVE_PA:
3104         case MSR_AMD64_PATCH_LOADER:
3105         case MSR_AMD64_BU_CFG2:
3106         case MSR_AMD64_DC_CFG:
3107         case MSR_F15H_EX_CFG:
3108                 break;
3109
3110         case MSR_IA32_UCODE_REV:
3111                 if (msr_info->host_initiated)
3112                         vcpu->arch.microcode_version = data;
3113                 break;
3114         case MSR_IA32_ARCH_CAPABILITIES:
3115                 if (!msr_info->host_initiated)
3116                         return 1;
3117                 vcpu->arch.arch_capabilities = data;
3118                 break;
3119         case MSR_IA32_PERF_CAPABILITIES: {
3120                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3121
3122                 if (!msr_info->host_initiated)
3123                         return 1;
3124                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3125                         return 1;
3126                 if (data & ~msr_ent.data)
3127                         return 1;
3128
3129                 vcpu->arch.perf_capabilities = data;
3130
3131                 return 0;
3132                 }
3133         case MSR_EFER:
3134                 return set_efer(vcpu, msr_info);
3135         case MSR_K7_HWCR:
3136                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3137                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3138                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3139
3140                 /* Handle McStatusWrEn */
3141                 if (data == BIT_ULL(18)) {
3142                         vcpu->arch.msr_hwcr = data;
3143                 } else if (data != 0) {
3144                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3145                                     data);
3146                         return 1;
3147                 }
3148                 break;
3149         case MSR_FAM10H_MMIO_CONF_BASE:
3150                 if (data != 0) {
3151                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3152                                     "0x%llx\n", data);
3153                         return 1;
3154                 }
3155                 break;
3156         case 0x200 ... 0x2ff:
3157                 return kvm_mtrr_set_msr(vcpu, msr, data);
3158         case MSR_IA32_APICBASE:
3159                 return kvm_set_apic_base(vcpu, msr_info);
3160         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3161                 return kvm_x2apic_msr_write(vcpu, msr, data);
3162         case MSR_IA32_TSC_DEADLINE:
3163                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3164                 break;
3165         case MSR_IA32_TSC_ADJUST:
3166                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3167                         if (!msr_info->host_initiated) {
3168                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3169                                 adjust_tsc_offset_guest(vcpu, adj);
3170                         }
3171                         vcpu->arch.ia32_tsc_adjust_msr = data;
3172                 }
3173                 break;
3174         case MSR_IA32_MISC_ENABLE:
3175                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3176                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3177                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3178                                 return 1;
3179                         vcpu->arch.ia32_misc_enable_msr = data;
3180                         kvm_update_cpuid_runtime(vcpu);
3181                 } else {
3182                         vcpu->arch.ia32_misc_enable_msr = data;
3183                 }
3184                 break;
3185         case MSR_IA32_SMBASE:
3186                 if (!msr_info->host_initiated)
3187                         return 1;
3188                 vcpu->arch.smbase = data;
3189                 break;
3190         case MSR_IA32_POWER_CTL:
3191                 vcpu->arch.msr_ia32_power_ctl = data;
3192                 break;
3193         case MSR_IA32_TSC:
3194                 if (msr_info->host_initiated) {
3195                         kvm_synchronize_tsc(vcpu, data);
3196                 } else {
3197                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3198                         adjust_tsc_offset_guest(vcpu, adj);
3199                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3200                 }
3201                 break;
3202         case MSR_IA32_XSS:
3203                 if (!msr_info->host_initiated &&
3204                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3205                         return 1;
3206                 /*
3207                  * KVM supports exposing PT to the guest, but does not support
3208                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3209                  * XSAVES/XRSTORS to save/restore PT MSRs.
3210                  */
3211                 if (data & ~supported_xss)
3212                         return 1;
3213                 vcpu->arch.ia32_xss = data;
3214                 break;
3215         case MSR_SMI_COUNT:
3216                 if (!msr_info->host_initiated)
3217                         return 1;
3218                 vcpu->arch.smi_count = data;
3219                 break;
3220         case MSR_KVM_WALL_CLOCK_NEW:
3221                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3222                         return 1;
3223
3224                 vcpu->kvm->arch.wall_clock = data;
3225                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3226                 break;
3227         case MSR_KVM_WALL_CLOCK:
3228                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3229                         return 1;
3230
3231                 vcpu->kvm->arch.wall_clock = data;
3232                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3233                 break;
3234         case MSR_KVM_SYSTEM_TIME_NEW:
3235                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3236                         return 1;
3237
3238                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3239                 break;
3240         case MSR_KVM_SYSTEM_TIME:
3241                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3242                         return 1;
3243
3244                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3245                 break;
3246         case MSR_KVM_ASYNC_PF_EN:
3247                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3248                         return 1;
3249
3250                 if (kvm_pv_enable_async_pf(vcpu, data))
3251                         return 1;
3252                 break;
3253         case MSR_KVM_ASYNC_PF_INT:
3254                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3255                         return 1;
3256
3257                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3258                         return 1;
3259                 break;
3260         case MSR_KVM_ASYNC_PF_ACK:
3261                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3262                         return 1;
3263                 if (data & 0x1) {
3264                         vcpu->arch.apf.pageready_pending = false;
3265                         kvm_check_async_pf_completion(vcpu);
3266                 }
3267                 break;
3268         case MSR_KVM_STEAL_TIME:
3269                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3270                         return 1;
3271
3272                 if (unlikely(!sched_info_on()))
3273                         return 1;
3274
3275                 if (data & KVM_STEAL_RESERVED_MASK)
3276                         return 1;
3277
3278                 vcpu->arch.st.msr_val = data;
3279
3280                 if (!(data & KVM_MSR_ENABLED))
3281                         break;
3282
3283                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3284
3285                 break;
3286         case MSR_KVM_PV_EOI_EN:
3287                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3288                         return 1;
3289
3290                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3291                         return 1;
3292                 break;
3293
3294         case MSR_KVM_POLL_CONTROL:
3295                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3296                         return 1;
3297
3298                 /* only enable bit supported */
3299                 if (data & (-1ULL << 1))
3300                         return 1;
3301
3302                 vcpu->arch.msr_kvm_poll_control = data;
3303                 break;
3304
3305         case MSR_IA32_MCG_CTL:
3306         case MSR_IA32_MCG_STATUS:
3307         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3308                 return set_msr_mce(vcpu, msr_info);
3309
3310         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3311         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3312                 pr = true;
3313                 fallthrough;
3314         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3315         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3316                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3317                         return kvm_pmu_set_msr(vcpu, msr_info);
3318
3319                 if (pr || data != 0)
3320                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3321                                     "0x%x data 0x%llx\n", msr, data);
3322                 break;
3323         case MSR_K7_CLK_CTL:
3324                 /*
3325                  * Ignore all writes to this no longer documented MSR.
3326                  * Writes are only relevant for old K7 processors,
3327                  * all pre-dating SVM, but a recommended workaround from
3328                  * AMD for these chips. It is possible to specify the
3329                  * affected processor models on the command line, hence
3330                  * the need to ignore the workaround.
3331                  */
3332                 break;
3333         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3334         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3335         case HV_X64_MSR_SYNDBG_OPTIONS:
3336         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3337         case HV_X64_MSR_CRASH_CTL:
3338         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3339         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3340         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3341         case HV_X64_MSR_TSC_EMULATION_STATUS:
3342                 return kvm_hv_set_msr_common(vcpu, msr, data,
3343                                              msr_info->host_initiated);
3344         case MSR_IA32_BBL_CR_CTL3:
3345                 /* Drop writes to this legacy MSR -- see rdmsr
3346                  * counterpart for further detail.
3347                  */
3348                 if (report_ignored_msrs)
3349                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3350                                 msr, data);
3351                 break;
3352         case MSR_AMD64_OSVW_ID_LENGTH:
3353                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3354                         return 1;
3355                 vcpu->arch.osvw.length = data;
3356                 break;
3357         case MSR_AMD64_OSVW_STATUS:
3358                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3359                         return 1;
3360                 vcpu->arch.osvw.status = data;
3361                 break;
3362         case MSR_PLATFORM_INFO:
3363                 if (!msr_info->host_initiated ||
3364                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3365                      cpuid_fault_enabled(vcpu)))
3366                         return 1;
3367                 vcpu->arch.msr_platform_info = data;
3368                 break;
3369         case MSR_MISC_FEATURES_ENABLES:
3370                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3371                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3372                      !supports_cpuid_fault(vcpu)))
3373                         return 1;
3374                 vcpu->arch.msr_misc_features_enables = data;
3375                 break;
3376         default:
3377                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3378                         return kvm_pmu_set_msr(vcpu, msr_info);
3379                 return KVM_MSR_RET_INVALID;
3380         }
3381         return 0;
3382 }
3383 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3384
3385 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3386 {
3387         u64 data;
3388         u64 mcg_cap = vcpu->arch.mcg_cap;
3389         unsigned bank_num = mcg_cap & 0xff;
3390
3391         switch (msr) {
3392         case MSR_IA32_P5_MC_ADDR:
3393         case MSR_IA32_P5_MC_TYPE:
3394                 data = 0;
3395                 break;
3396         case MSR_IA32_MCG_CAP:
3397                 data = vcpu->arch.mcg_cap;
3398                 break;
3399         case MSR_IA32_MCG_CTL:
3400                 if (!(mcg_cap & MCG_CTL_P) && !host)
3401                         return 1;
3402                 data = vcpu->arch.mcg_ctl;
3403                 break;
3404         case MSR_IA32_MCG_STATUS:
3405                 data = vcpu->arch.mcg_status;
3406                 break;
3407         default:
3408                 if (msr >= MSR_IA32_MC0_CTL &&
3409                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3410                         u32 offset = array_index_nospec(
3411                                 msr - MSR_IA32_MC0_CTL,
3412                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3413
3414                         data = vcpu->arch.mce_banks[offset];
3415                         break;
3416                 }
3417                 return 1;
3418         }
3419         *pdata = data;
3420         return 0;
3421 }
3422
3423 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3424 {
3425         switch (msr_info->index) {
3426         case MSR_IA32_PLATFORM_ID:
3427         case MSR_IA32_EBL_CR_POWERON:
3428         case MSR_IA32_LASTBRANCHFROMIP:
3429         case MSR_IA32_LASTBRANCHTOIP:
3430         case MSR_IA32_LASTINTFROMIP:
3431         case MSR_IA32_LASTINTTOIP:
3432         case MSR_K8_SYSCFG:
3433         case MSR_K8_TSEG_ADDR:
3434         case MSR_K8_TSEG_MASK:
3435         case MSR_VM_HSAVE_PA:
3436         case MSR_K8_INT_PENDING_MSG:
3437         case MSR_AMD64_NB_CFG:
3438         case MSR_FAM10H_MMIO_CONF_BASE:
3439         case MSR_AMD64_BU_CFG2:
3440         case MSR_IA32_PERF_CTL:
3441         case MSR_AMD64_DC_CFG:
3442         case MSR_F15H_EX_CFG:
3443         /*
3444          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3445          * limit) MSRs. Just return 0, as we do not want to expose the host
3446          * data here. Do not conditionalize this on CPUID, as KVM does not do
3447          * so for existing CPU-specific MSRs.
3448          */
3449         case MSR_RAPL_POWER_UNIT:
3450         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3451         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3452         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3453         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3454                 msr_info->data = 0;
3455                 break;
3456         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3457                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3458                         return kvm_pmu_get_msr(vcpu, msr_info);
3459                 if (!msr_info->host_initiated)
3460                         return 1;
3461                 msr_info->data = 0;
3462                 break;
3463         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3464         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3465         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3466         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3467                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3468                         return kvm_pmu_get_msr(vcpu, msr_info);
3469                 msr_info->data = 0;
3470                 break;
3471         case MSR_IA32_UCODE_REV:
3472                 msr_info->data = vcpu->arch.microcode_version;
3473                 break;
3474         case MSR_IA32_ARCH_CAPABILITIES:
3475                 if (!msr_info->host_initiated &&
3476                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3477                         return 1;
3478                 msr_info->data = vcpu->arch.arch_capabilities;
3479                 break;
3480         case MSR_IA32_PERF_CAPABILITIES:
3481                 if (!msr_info->host_initiated &&
3482                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3483                         return 1;
3484                 msr_info->data = vcpu->arch.perf_capabilities;
3485                 break;
3486         case MSR_IA32_POWER_CTL:
3487                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3488                 break;
3489         case MSR_IA32_TSC: {
3490                 /*
3491                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3492                  * even when not intercepted. AMD manual doesn't explicitly
3493                  * state this but appears to behave the same.
3494                  *
3495                  * On userspace reads and writes, however, we unconditionally
3496                  * return L1's TSC value to ensure backwards-compatible
3497                  * behavior for migration.
3498                  */
3499                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3500                                                             vcpu->arch.tsc_offset;
3501
3502                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3503                 break;
3504         }
3505         case MSR_MTRRcap:
3506         case 0x200 ... 0x2ff:
3507                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3508         case 0xcd: /* fsb frequency */
3509                 msr_info->data = 3;
3510                 break;
3511                 /*
3512                  * MSR_EBC_FREQUENCY_ID
3513                  * Conservative value valid for even the basic CPU models.
3514                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3515                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3516                  * and 266MHz for model 3, or 4. Set Core Clock
3517                  * Frequency to System Bus Frequency Ratio to 1 (bits
3518                  * 31:24) even though these are only valid for CPU
3519                  * models > 2, however guests may end up dividing or
3520                  * multiplying by zero otherwise.
3521                  */
3522         case MSR_EBC_FREQUENCY_ID:
3523                 msr_info->data = 1 << 24;
3524                 break;
3525         case MSR_IA32_APICBASE:
3526                 msr_info->data = kvm_get_apic_base(vcpu);
3527                 break;
3528         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3529                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3530         case MSR_IA32_TSC_DEADLINE:
3531                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3532                 break;
3533         case MSR_IA32_TSC_ADJUST:
3534                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3535                 break;
3536         case MSR_IA32_MISC_ENABLE:
3537                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3538                 break;
3539         case MSR_IA32_SMBASE:
3540                 if (!msr_info->host_initiated)
3541                         return 1;
3542                 msr_info->data = vcpu->arch.smbase;
3543                 break;
3544         case MSR_SMI_COUNT:
3545                 msr_info->data = vcpu->arch.smi_count;
3546                 break;
3547         case MSR_IA32_PERF_STATUS:
3548                 /* TSC increment by tick */
3549                 msr_info->data = 1000ULL;
3550                 /* CPU multiplier */
3551                 msr_info->data |= (((uint64_t)4ULL) << 40);
3552                 break;
3553         case MSR_EFER:
3554                 msr_info->data = vcpu->arch.efer;
3555                 break;
3556         case MSR_KVM_WALL_CLOCK:
3557                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3558                         return 1;
3559
3560                 msr_info->data = vcpu->kvm->arch.wall_clock;
3561                 break;
3562         case MSR_KVM_WALL_CLOCK_NEW:
3563                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3564                         return 1;
3565
3566                 msr_info->data = vcpu->kvm->arch.wall_clock;
3567                 break;
3568         case MSR_KVM_SYSTEM_TIME:
3569                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3570                         return 1;
3571
3572                 msr_info->data = vcpu->arch.time;
3573                 break;
3574         case MSR_KVM_SYSTEM_TIME_NEW:
3575                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3576                         return 1;
3577
3578                 msr_info->data = vcpu->arch.time;
3579                 break;
3580         case MSR_KVM_ASYNC_PF_EN:
3581                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3582                         return 1;
3583
3584                 msr_info->data = vcpu->arch.apf.msr_en_val;
3585                 break;
3586         case MSR_KVM_ASYNC_PF_INT:
3587                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3588                         return 1;
3589
3590                 msr_info->data = vcpu->arch.apf.msr_int_val;
3591                 break;
3592         case MSR_KVM_ASYNC_PF_ACK:
3593                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3594                         return 1;
3595
3596                 msr_info->data = 0;
3597                 break;
3598         case MSR_KVM_STEAL_TIME:
3599                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3600                         return 1;
3601
3602                 msr_info->data = vcpu->arch.st.msr_val;
3603                 break;
3604         case MSR_KVM_PV_EOI_EN:
3605                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3606                         return 1;
3607
3608                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3609                 break;
3610         case MSR_KVM_POLL_CONTROL:
3611                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3612                         return 1;
3613
3614                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3615                 break;
3616         case MSR_IA32_P5_MC_ADDR:
3617         case MSR_IA32_P5_MC_TYPE:
3618         case MSR_IA32_MCG_CAP:
3619         case MSR_IA32_MCG_CTL:
3620         case MSR_IA32_MCG_STATUS:
3621         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3622                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3623                                    msr_info->host_initiated);
3624         case MSR_IA32_XSS:
3625                 if (!msr_info->host_initiated &&
3626                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3627                         return 1;
3628                 msr_info->data = vcpu->arch.ia32_xss;
3629                 break;
3630         case MSR_K7_CLK_CTL:
3631                 /*
3632                  * Provide expected ramp-up count for K7. All other
3633                  * are set to zero, indicating minimum divisors for
3634                  * every field.
3635                  *
3636                  * This prevents guest kernels on AMD host with CPU
3637                  * type 6, model 8 and higher from exploding due to
3638                  * the rdmsr failing.
3639                  */
3640                 msr_info->data = 0x20000000;
3641                 break;
3642         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3643         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3644         case HV_X64_MSR_SYNDBG_OPTIONS:
3645         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3646         case HV_X64_MSR_CRASH_CTL:
3647         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3648         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3649         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3650         case HV_X64_MSR_TSC_EMULATION_STATUS:
3651                 return kvm_hv_get_msr_common(vcpu,
3652                                              msr_info->index, &msr_info->data,
3653                                              msr_info->host_initiated);
3654         case MSR_IA32_BBL_CR_CTL3:
3655                 /* This legacy MSR exists but isn't fully documented in current
3656                  * silicon.  It is however accessed by winxp in very narrow
3657                  * scenarios where it sets bit #19, itself documented as
3658                  * a "reserved" bit.  Best effort attempt to source coherent
3659                  * read data here should the balance of the register be
3660                  * interpreted by the guest:
3661                  *
3662                  * L2 cache control register 3: 64GB range, 256KB size,
3663                  * enabled, latency 0x1, configured
3664                  */
3665                 msr_info->data = 0xbe702111;
3666                 break;
3667         case MSR_AMD64_OSVW_ID_LENGTH:
3668                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3669                         return 1;
3670                 msr_info->data = vcpu->arch.osvw.length;
3671                 break;
3672         case MSR_AMD64_OSVW_STATUS:
3673                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3674                         return 1;
3675                 msr_info->data = vcpu->arch.osvw.status;
3676                 break;
3677         case MSR_PLATFORM_INFO:
3678                 if (!msr_info->host_initiated &&
3679                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3680                         return 1;
3681                 msr_info->data = vcpu->arch.msr_platform_info;
3682                 break;
3683         case MSR_MISC_FEATURES_ENABLES:
3684                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3685                 break;
3686         case MSR_K7_HWCR:
3687                 msr_info->data = vcpu->arch.msr_hwcr;
3688                 break;
3689         default:
3690                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3691                         return kvm_pmu_get_msr(vcpu, msr_info);
3692                 return KVM_MSR_RET_INVALID;
3693         }
3694         return 0;
3695 }
3696 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3697
3698 /*
3699  * Read or write a bunch of msrs. All parameters are kernel addresses.
3700  *
3701  * @return number of msrs set successfully.
3702  */
3703 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3704                     struct kvm_msr_entry *entries,
3705                     int (*do_msr)(struct kvm_vcpu *vcpu,
3706                                   unsigned index, u64 *data))
3707 {
3708         int i;
3709
3710         for (i = 0; i < msrs->nmsrs; ++i)
3711                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3712                         break;
3713
3714         return i;
3715 }
3716
3717 /*
3718  * Read or write a bunch of msrs. Parameters are user addresses.
3719  *
3720  * @return number of msrs set successfully.
3721  */
3722 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3723                   int (*do_msr)(struct kvm_vcpu *vcpu,
3724                                 unsigned index, u64 *data),
3725                   int writeback)
3726 {
3727         struct kvm_msrs msrs;
3728         struct kvm_msr_entry *entries;
3729         int r, n;
3730         unsigned size;
3731
3732         r = -EFAULT;
3733         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3734                 goto out;
3735
3736         r = -E2BIG;
3737         if (msrs.nmsrs >= MAX_IO_MSRS)
3738                 goto out;
3739
3740         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3741         entries = memdup_user(user_msrs->entries, size);
3742         if (IS_ERR(entries)) {
3743                 r = PTR_ERR(entries);
3744                 goto out;
3745         }
3746
3747         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3748         if (r < 0)
3749                 goto out_free;
3750
3751         r = -EFAULT;
3752         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3753                 goto out_free;
3754
3755         r = n;
3756
3757 out_free:
3758         kfree(entries);
3759 out:
3760         return r;
3761 }
3762
3763 static inline bool kvm_can_mwait_in_guest(void)
3764 {
3765         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3766                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3767                 boot_cpu_has(X86_FEATURE_ARAT);
3768 }
3769
3770 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3771                                             struct kvm_cpuid2 __user *cpuid_arg)
3772 {
3773         struct kvm_cpuid2 cpuid;
3774         int r;
3775
3776         r = -EFAULT;
3777         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3778                 return r;
3779
3780         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3781         if (r)
3782                 return r;
3783
3784         r = -EFAULT;
3785         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3786                 return r;
3787
3788         return 0;
3789 }
3790
3791 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3792 {
3793         int r = 0;
3794
3795         switch (ext) {
3796         case KVM_CAP_IRQCHIP:
3797         case KVM_CAP_HLT:
3798         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3799         case KVM_CAP_SET_TSS_ADDR:
3800         case KVM_CAP_EXT_CPUID:
3801         case KVM_CAP_EXT_EMUL_CPUID:
3802         case KVM_CAP_CLOCKSOURCE:
3803         case KVM_CAP_PIT:
3804         case KVM_CAP_NOP_IO_DELAY:
3805         case KVM_CAP_MP_STATE:
3806         case KVM_CAP_SYNC_MMU:
3807         case KVM_CAP_USER_NMI:
3808         case KVM_CAP_REINJECT_CONTROL:
3809         case KVM_CAP_IRQ_INJECT_STATUS:
3810         case KVM_CAP_IOEVENTFD:
3811         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3812         case KVM_CAP_PIT2:
3813         case KVM_CAP_PIT_STATE2:
3814         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3815         case KVM_CAP_VCPU_EVENTS:
3816         case KVM_CAP_HYPERV:
3817         case KVM_CAP_HYPERV_VAPIC:
3818         case KVM_CAP_HYPERV_SPIN:
3819         case KVM_CAP_HYPERV_SYNIC:
3820         case KVM_CAP_HYPERV_SYNIC2:
3821         case KVM_CAP_HYPERV_VP_INDEX:
3822         case KVM_CAP_HYPERV_EVENTFD:
3823         case KVM_CAP_HYPERV_TLBFLUSH:
3824         case KVM_CAP_HYPERV_SEND_IPI:
3825         case KVM_CAP_HYPERV_CPUID:
3826         case KVM_CAP_SYS_HYPERV_CPUID:
3827         case KVM_CAP_PCI_SEGMENT:
3828         case KVM_CAP_DEBUGREGS:
3829         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3830         case KVM_CAP_XSAVE:
3831         case KVM_CAP_ASYNC_PF:
3832         case KVM_CAP_ASYNC_PF_INT:
3833         case KVM_CAP_GET_TSC_KHZ:
3834         case KVM_CAP_KVMCLOCK_CTRL:
3835         case KVM_CAP_READONLY_MEM:
3836         case KVM_CAP_HYPERV_TIME:
3837         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3838         case KVM_CAP_TSC_DEADLINE_TIMER:
3839         case KVM_CAP_DISABLE_QUIRKS:
3840         case KVM_CAP_SET_BOOT_CPU_ID:
3841         case KVM_CAP_SPLIT_IRQCHIP:
3842         case KVM_CAP_IMMEDIATE_EXIT:
3843         case KVM_CAP_PMU_EVENT_FILTER:
3844         case KVM_CAP_GET_MSR_FEATURES:
3845         case KVM_CAP_MSR_PLATFORM_INFO:
3846         case KVM_CAP_EXCEPTION_PAYLOAD:
3847         case KVM_CAP_SET_GUEST_DEBUG:
3848         case KVM_CAP_LAST_CPU:
3849         case KVM_CAP_X86_USER_SPACE_MSR:
3850         case KVM_CAP_X86_MSR_FILTER:
3851         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3852 #ifdef CONFIG_X86_SGX_KVM
3853         case KVM_CAP_SGX_ATTRIBUTE:
3854 #endif
3855         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3856                 r = 1;
3857                 break;
3858         case KVM_CAP_SET_GUEST_DEBUG2:
3859                 return KVM_GUESTDBG_VALID_MASK;
3860 #ifdef CONFIG_KVM_XEN
3861         case KVM_CAP_XEN_HVM:
3862                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3863                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3864                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3865                 if (sched_info_on())
3866                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3867                 break;
3868 #endif
3869         case KVM_CAP_SYNC_REGS:
3870                 r = KVM_SYNC_X86_VALID_FIELDS;
3871                 break;
3872         case KVM_CAP_ADJUST_CLOCK:
3873                 r = KVM_CLOCK_TSC_STABLE;
3874                 break;
3875         case KVM_CAP_X86_DISABLE_EXITS:
3876                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3877                       KVM_X86_DISABLE_EXITS_CSTATE;
3878                 if(kvm_can_mwait_in_guest())
3879                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3880                 break;
3881         case KVM_CAP_X86_SMM:
3882                 /* SMBASE is usually relocated above 1M on modern chipsets,
3883                  * and SMM handlers might indeed rely on 4G segment limits,
3884                  * so do not report SMM to be available if real mode is
3885                  * emulated via vm86 mode.  Still, do not go to great lengths
3886                  * to avoid userspace's usage of the feature, because it is a
3887                  * fringe case that is not enabled except via specific settings
3888                  * of the module parameters.
3889                  */
3890                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3891                 break;
3892         case KVM_CAP_VAPIC:
3893                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3894                 break;
3895         case KVM_CAP_NR_VCPUS:
3896                 r = KVM_SOFT_MAX_VCPUS;
3897                 break;
3898         case KVM_CAP_MAX_VCPUS:
3899                 r = KVM_MAX_VCPUS;
3900                 break;
3901         case KVM_CAP_MAX_VCPU_ID:
3902                 r = KVM_MAX_VCPU_ID;
3903                 break;
3904         case KVM_CAP_PV_MMU:    /* obsolete */
3905                 r = 0;
3906                 break;
3907         case KVM_CAP_MCE:
3908                 r = KVM_MAX_MCE_BANKS;
3909                 break;
3910         case KVM_CAP_XCRS:
3911                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3912                 break;
3913         case KVM_CAP_TSC_CONTROL:
3914                 r = kvm_has_tsc_control;
3915                 break;
3916         case KVM_CAP_X2APIC_API:
3917                 r = KVM_X2APIC_API_VALID_FLAGS;
3918                 break;
3919         case KVM_CAP_NESTED_STATE:
3920                 r = kvm_x86_ops.nested_ops->get_state ?
3921                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3922                 break;
3923         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3924                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3925                 break;
3926         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3927                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3928                 break;
3929         case KVM_CAP_SMALLER_MAXPHYADDR:
3930                 r = (int) allow_smaller_maxphyaddr;
3931                 break;
3932         case KVM_CAP_STEAL_TIME:
3933                 r = sched_info_on();
3934                 break;
3935         case KVM_CAP_X86_BUS_LOCK_EXIT:
3936                 if (kvm_has_bus_lock_exit)
3937                         r = KVM_BUS_LOCK_DETECTION_OFF |
3938                             KVM_BUS_LOCK_DETECTION_EXIT;
3939                 else
3940                         r = 0;
3941                 break;
3942         default:
3943                 break;
3944         }
3945         return r;
3946
3947 }
3948
3949 long kvm_arch_dev_ioctl(struct file *filp,
3950                         unsigned int ioctl, unsigned long arg)
3951 {
3952         void __user *argp = (void __user *)arg;
3953         long r;
3954
3955         switch (ioctl) {
3956         case KVM_GET_MSR_INDEX_LIST: {
3957                 struct kvm_msr_list __user *user_msr_list = argp;
3958                 struct kvm_msr_list msr_list;
3959                 unsigned n;
3960
3961                 r = -EFAULT;
3962                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3963                         goto out;
3964                 n = msr_list.nmsrs;
3965                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3966                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3967                         goto out;
3968                 r = -E2BIG;
3969                 if (n < msr_list.nmsrs)
3970                         goto out;
3971                 r = -EFAULT;
3972                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3973                                  num_msrs_to_save * sizeof(u32)))
3974                         goto out;
3975                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3976                                  &emulated_msrs,
3977                                  num_emulated_msrs * sizeof(u32)))
3978                         goto out;
3979                 r = 0;
3980                 break;
3981         }
3982         case KVM_GET_SUPPORTED_CPUID:
3983         case KVM_GET_EMULATED_CPUID: {
3984                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3985                 struct kvm_cpuid2 cpuid;
3986
3987                 r = -EFAULT;
3988                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3989                         goto out;
3990
3991                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3992                                             ioctl);
3993                 if (r)
3994                         goto out;
3995
3996                 r = -EFAULT;
3997                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3998                         goto out;
3999                 r = 0;
4000                 break;
4001         }
4002         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4003                 r = -EFAULT;
4004                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4005                                  sizeof(kvm_mce_cap_supported)))
4006                         goto out;
4007                 r = 0;
4008                 break;
4009         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4010                 struct kvm_msr_list __user *user_msr_list = argp;
4011                 struct kvm_msr_list msr_list;
4012                 unsigned int n;
4013
4014                 r = -EFAULT;
4015                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4016                         goto out;
4017                 n = msr_list.nmsrs;
4018                 msr_list.nmsrs = num_msr_based_features;
4019                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4020                         goto out;
4021                 r = -E2BIG;
4022                 if (n < msr_list.nmsrs)
4023                         goto out;
4024                 r = -EFAULT;
4025                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4026                                  num_msr_based_features * sizeof(u32)))
4027                         goto out;
4028                 r = 0;
4029                 break;
4030         }
4031         case KVM_GET_MSRS:
4032                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4033                 break;
4034         case KVM_GET_SUPPORTED_HV_CPUID:
4035                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4036                 break;
4037         default:
4038                 r = -EINVAL;
4039                 break;
4040         }
4041 out:
4042         return r;
4043 }
4044
4045 static void wbinvd_ipi(void *garbage)
4046 {
4047         wbinvd();
4048 }
4049
4050 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4051 {
4052         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4053 }
4054
4055 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4056 {
4057         /* Address WBINVD may be executed by guest */
4058         if (need_emulate_wbinvd(vcpu)) {
4059                 if (static_call(kvm_x86_has_wbinvd_exit)())
4060                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4061                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4062                         smp_call_function_single(vcpu->cpu,
4063                                         wbinvd_ipi, NULL, 1);
4064         }
4065
4066         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4067
4068         /* Save host pkru register if supported */
4069         vcpu->arch.host_pkru = read_pkru();
4070
4071         /* Apply any externally detected TSC adjustments (due to suspend) */
4072         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4073                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4074                 vcpu->arch.tsc_offset_adjustment = 0;
4075                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4076         }
4077
4078         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4079                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4080                                 rdtsc() - vcpu->arch.last_host_tsc;
4081                 if (tsc_delta < 0)
4082                         mark_tsc_unstable("KVM discovered backwards TSC");
4083
4084                 if (kvm_check_tsc_unstable()) {
4085                         u64 offset = kvm_compute_tsc_offset(vcpu,
4086                                                 vcpu->arch.last_guest_tsc);
4087                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4088                         vcpu->arch.tsc_catchup = 1;
4089                 }
4090
4091                 if (kvm_lapic_hv_timer_in_use(vcpu))
4092                         kvm_lapic_restart_hv_timer(vcpu);
4093
4094                 /*
4095                  * On a host with synchronized TSC, there is no need to update
4096                  * kvmclock on vcpu->cpu migration
4097                  */
4098                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4099                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4100                 if (vcpu->cpu != cpu)
4101                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4102                 vcpu->cpu = cpu;
4103         }
4104
4105         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4106 }
4107
4108 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4109 {
4110         struct kvm_host_map map;
4111         struct kvm_steal_time *st;
4112
4113         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4114                 return;
4115
4116         if (vcpu->arch.st.preempted)
4117                 return;
4118
4119         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4120                         &vcpu->arch.st.cache, true))
4121                 return;
4122
4123         st = map.hva +
4124                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4125
4126         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4127
4128         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4129 }
4130
4131 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4132 {
4133         int idx;
4134
4135         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4136                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4137
4138         /*
4139          * Take the srcu lock as memslots will be accessed to check the gfn
4140          * cache generation against the memslots generation.
4141          */
4142         idx = srcu_read_lock(&vcpu->kvm->srcu);
4143         if (kvm_xen_msr_enabled(vcpu->kvm))
4144                 kvm_xen_runstate_set_preempted(vcpu);
4145         else
4146                 kvm_steal_time_set_preempted(vcpu);
4147         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4148
4149         static_call(kvm_x86_vcpu_put)(vcpu);
4150         vcpu->arch.last_host_tsc = rdtsc();
4151         /*
4152          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4153          * on every vmexit, but if not, we might have a stale dr6 from the
4154          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4155          */
4156         set_debugreg(0, 6);
4157 }
4158
4159 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4160                                     struct kvm_lapic_state *s)
4161 {
4162         if (vcpu->arch.apicv_active)
4163                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4164
4165         return kvm_apic_get_state(vcpu, s);
4166 }
4167
4168 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4169                                     struct kvm_lapic_state *s)
4170 {
4171         int r;
4172
4173         r = kvm_apic_set_state(vcpu, s);
4174         if (r)
4175                 return r;
4176         update_cr8_intercept(vcpu);
4177
4178         return 0;
4179 }
4180
4181 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4182 {
4183         /*
4184          * We can accept userspace's request for interrupt injection
4185          * as long as we have a place to store the interrupt number.
4186          * The actual injection will happen when the CPU is able to
4187          * deliver the interrupt.
4188          */
4189         if (kvm_cpu_has_extint(vcpu))
4190                 return false;
4191
4192         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4193         return (!lapic_in_kernel(vcpu) ||
4194                 kvm_apic_accept_pic_intr(vcpu));
4195 }
4196
4197 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4198 {
4199         return kvm_arch_interrupt_allowed(vcpu) &&
4200                 kvm_cpu_accept_dm_intr(vcpu);
4201 }
4202
4203 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4204                                     struct kvm_interrupt *irq)
4205 {
4206         if (irq->irq >= KVM_NR_INTERRUPTS)
4207                 return -EINVAL;
4208
4209         if (!irqchip_in_kernel(vcpu->kvm)) {
4210                 kvm_queue_interrupt(vcpu, irq->irq, false);
4211                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4212                 return 0;
4213         }
4214
4215         /*
4216          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4217          * fail for in-kernel 8259.
4218          */
4219         if (pic_in_kernel(vcpu->kvm))
4220                 return -ENXIO;
4221
4222         if (vcpu->arch.pending_external_vector != -1)
4223                 return -EEXIST;
4224
4225         vcpu->arch.pending_external_vector = irq->irq;
4226         kvm_make_request(KVM_REQ_EVENT, vcpu);
4227         return 0;
4228 }
4229
4230 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4231 {
4232         kvm_inject_nmi(vcpu);
4233
4234         return 0;
4235 }
4236
4237 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4238 {
4239         kvm_make_request(KVM_REQ_SMI, vcpu);
4240
4241         return 0;
4242 }
4243
4244 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4245                                            struct kvm_tpr_access_ctl *tac)
4246 {
4247         if (tac->flags)
4248                 return -EINVAL;
4249         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4250         return 0;
4251 }
4252
4253 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4254                                         u64 mcg_cap)
4255 {
4256         int r;
4257         unsigned bank_num = mcg_cap & 0xff, bank;
4258
4259         r = -EINVAL;
4260         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4261                 goto out;
4262         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4263                 goto out;
4264         r = 0;
4265         vcpu->arch.mcg_cap = mcg_cap;
4266         /* Init IA32_MCG_CTL to all 1s */
4267         if (mcg_cap & MCG_CTL_P)
4268                 vcpu->arch.mcg_ctl = ~(u64)0;
4269         /* Init IA32_MCi_CTL to all 1s */
4270         for (bank = 0; bank < bank_num; bank++)
4271                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4272
4273         static_call(kvm_x86_setup_mce)(vcpu);
4274 out:
4275         return r;
4276 }
4277
4278 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4279                                       struct kvm_x86_mce *mce)
4280 {
4281         u64 mcg_cap = vcpu->arch.mcg_cap;
4282         unsigned bank_num = mcg_cap & 0xff;
4283         u64 *banks = vcpu->arch.mce_banks;
4284
4285         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4286                 return -EINVAL;
4287         /*
4288          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4289          * reporting is disabled
4290          */
4291         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4292             vcpu->arch.mcg_ctl != ~(u64)0)
4293                 return 0;
4294         banks += 4 * mce->bank;
4295         /*
4296          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4297          * reporting is disabled for the bank
4298          */
4299         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4300                 return 0;
4301         if (mce->status & MCI_STATUS_UC) {
4302                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4303                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4304                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4305                         return 0;
4306                 }
4307                 if (banks[1] & MCI_STATUS_VAL)
4308                         mce->status |= MCI_STATUS_OVER;
4309                 banks[2] = mce->addr;
4310                 banks[3] = mce->misc;
4311                 vcpu->arch.mcg_status = mce->mcg_status;
4312                 banks[1] = mce->status;
4313                 kvm_queue_exception(vcpu, MC_VECTOR);
4314         } else if (!(banks[1] & MCI_STATUS_VAL)
4315                    || !(banks[1] & MCI_STATUS_UC)) {
4316                 if (banks[1] & MCI_STATUS_VAL)
4317                         mce->status |= MCI_STATUS_OVER;
4318                 banks[2] = mce->addr;
4319                 banks[3] = mce->misc;
4320                 banks[1] = mce->status;
4321         } else
4322                 banks[1] |= MCI_STATUS_OVER;
4323         return 0;
4324 }
4325
4326 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4327                                                struct kvm_vcpu_events *events)
4328 {
4329         process_nmi(vcpu);
4330
4331         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4332                 process_smi(vcpu);
4333
4334         /*
4335          * In guest mode, payload delivery should be deferred,
4336          * so that the L1 hypervisor can intercept #PF before
4337          * CR2 is modified (or intercept #DB before DR6 is
4338          * modified under nVMX). Unless the per-VM capability,
4339          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4340          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4341          * opportunistically defer the exception payload, deliver it if the
4342          * capability hasn't been requested before processing a
4343          * KVM_GET_VCPU_EVENTS.
4344          */
4345         if (!vcpu->kvm->arch.exception_payload_enabled &&
4346             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4347                 kvm_deliver_exception_payload(vcpu);
4348
4349         /*
4350          * The API doesn't provide the instruction length for software
4351          * exceptions, so don't report them. As long as the guest RIP
4352          * isn't advanced, we should expect to encounter the exception
4353          * again.
4354          */
4355         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4356                 events->exception.injected = 0;
4357                 events->exception.pending = 0;
4358         } else {
4359                 events->exception.injected = vcpu->arch.exception.injected;
4360                 events->exception.pending = vcpu->arch.exception.pending;
4361                 /*
4362                  * For ABI compatibility, deliberately conflate
4363                  * pending and injected exceptions when
4364                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4365                  */
4366                 if (!vcpu->kvm->arch.exception_payload_enabled)
4367                         events->exception.injected |=
4368                                 vcpu->arch.exception.pending;
4369         }
4370         events->exception.nr = vcpu->arch.exception.nr;
4371         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4372         events->exception.error_code = vcpu->arch.exception.error_code;
4373         events->exception_has_payload = vcpu->arch.exception.has_payload;
4374         events->exception_payload = vcpu->arch.exception.payload;
4375
4376         events->interrupt.injected =
4377                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4378         events->interrupt.nr = vcpu->arch.interrupt.nr;
4379         events->interrupt.soft = 0;
4380         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4381
4382         events->nmi.injected = vcpu->arch.nmi_injected;
4383         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4384         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4385         events->nmi.pad = 0;
4386
4387         events->sipi_vector = 0; /* never valid when reporting to user space */
4388
4389         events->smi.smm = is_smm(vcpu);
4390         events->smi.pending = vcpu->arch.smi_pending;
4391         events->smi.smm_inside_nmi =
4392                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4393         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4394
4395         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4396                          | KVM_VCPUEVENT_VALID_SHADOW
4397                          | KVM_VCPUEVENT_VALID_SMM);
4398         if (vcpu->kvm->arch.exception_payload_enabled)
4399                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4400
4401         memset(&events->reserved, 0, sizeof(events->reserved));
4402 }
4403
4404 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4405
4406 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4407                                               struct kvm_vcpu_events *events)
4408 {
4409         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4410                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4411                               | KVM_VCPUEVENT_VALID_SHADOW
4412                               | KVM_VCPUEVENT_VALID_SMM
4413                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4414                 return -EINVAL;
4415
4416         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4417                 if (!vcpu->kvm->arch.exception_payload_enabled)
4418                         return -EINVAL;
4419                 if (events->exception.pending)
4420                         events->exception.injected = 0;
4421                 else
4422                         events->exception_has_payload = 0;
4423         } else {
4424                 events->exception.pending = 0;
4425                 events->exception_has_payload = 0;
4426         }
4427
4428         if ((events->exception.injected || events->exception.pending) &&
4429             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4430                 return -EINVAL;
4431
4432         /* INITs are latched while in SMM */
4433         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4434             (events->smi.smm || events->smi.pending) &&
4435             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4436                 return -EINVAL;
4437
4438         process_nmi(vcpu);
4439         vcpu->arch.exception.injected = events->exception.injected;
4440         vcpu->arch.exception.pending = events->exception.pending;
4441         vcpu->arch.exception.nr = events->exception.nr;
4442         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4443         vcpu->arch.exception.error_code = events->exception.error_code;
4444         vcpu->arch.exception.has_payload = events->exception_has_payload;
4445         vcpu->arch.exception.payload = events->exception_payload;
4446
4447         vcpu->arch.interrupt.injected = events->interrupt.injected;
4448         vcpu->arch.interrupt.nr = events->interrupt.nr;
4449         vcpu->arch.interrupt.soft = events->interrupt.soft;
4450         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4451                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4452                                                 events->interrupt.shadow);
4453
4454         vcpu->arch.nmi_injected = events->nmi.injected;
4455         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4456                 vcpu->arch.nmi_pending = events->nmi.pending;
4457         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4458
4459         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4460             lapic_in_kernel(vcpu))
4461                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4462
4463         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4464                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4465                         if (events->smi.smm)
4466                                 vcpu->arch.hflags |= HF_SMM_MASK;
4467                         else
4468                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4469                         kvm_smm_changed(vcpu);
4470                 }
4471
4472                 vcpu->arch.smi_pending = events->smi.pending;
4473
4474                 if (events->smi.smm) {
4475                         if (events->smi.smm_inside_nmi)
4476                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4477                         else
4478                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4479                 }
4480
4481                 if (lapic_in_kernel(vcpu)) {
4482                         if (events->smi.latched_init)
4483                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4484                         else
4485                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4486                 }
4487         }
4488
4489         kvm_make_request(KVM_REQ_EVENT, vcpu);
4490
4491         return 0;
4492 }
4493
4494 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4495                                              struct kvm_debugregs *dbgregs)
4496 {
4497         unsigned long val;
4498
4499         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4500         kvm_get_dr(vcpu, 6, &val);
4501         dbgregs->dr6 = val;
4502         dbgregs->dr7 = vcpu->arch.dr7;
4503         dbgregs->flags = 0;
4504         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4505 }
4506
4507 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4508                                             struct kvm_debugregs *dbgregs)
4509 {
4510         if (dbgregs->flags)
4511                 return -EINVAL;
4512
4513         if (!kvm_dr6_valid(dbgregs->dr6))
4514                 return -EINVAL;
4515         if (!kvm_dr7_valid(dbgregs->dr7))
4516                 return -EINVAL;
4517
4518         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4519         kvm_update_dr0123(vcpu);
4520         vcpu->arch.dr6 = dbgregs->dr6;
4521         vcpu->arch.dr7 = dbgregs->dr7;
4522         kvm_update_dr7(vcpu);
4523
4524         return 0;
4525 }
4526
4527 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4528
4529 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4530 {
4531         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4532         u64 xstate_bv = xsave->header.xfeatures;
4533         u64 valid;
4534
4535         /*
4536          * Copy legacy XSAVE area, to avoid complications with CPUID
4537          * leaves 0 and 1 in the loop below.
4538          */
4539         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4540
4541         /* Set XSTATE_BV */
4542         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4543         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4544
4545         /*
4546          * Copy each region from the possibly compacted offset to the
4547          * non-compacted offset.
4548          */
4549         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4550         while (valid) {
4551                 u64 xfeature_mask = valid & -valid;
4552                 int xfeature_nr = fls64(xfeature_mask) - 1;
4553                 void *src = get_xsave_addr(xsave, xfeature_nr);
4554
4555                 if (src) {
4556                         u32 size, offset, ecx, edx;
4557                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4558                                     &size, &offset, &ecx, &edx);
4559                         if (xfeature_nr == XFEATURE_PKRU)
4560                                 memcpy(dest + offset, &vcpu->arch.pkru,
4561                                        sizeof(vcpu->arch.pkru));
4562                         else
4563                                 memcpy(dest + offset, src, size);
4564
4565                 }
4566
4567                 valid -= xfeature_mask;
4568         }
4569 }
4570
4571 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4572 {
4573         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4574         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4575         u64 valid;
4576
4577         /*
4578          * Copy legacy XSAVE area, to avoid complications with CPUID
4579          * leaves 0 and 1 in the loop below.
4580          */
4581         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4582
4583         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4584         xsave->header.xfeatures = xstate_bv;
4585         if (boot_cpu_has(X86_FEATURE_XSAVES))
4586                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4587
4588         /*
4589          * Copy each region from the non-compacted offset to the
4590          * possibly compacted offset.
4591          */
4592         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4593         while (valid) {
4594                 u64 xfeature_mask = valid & -valid;
4595                 int xfeature_nr = fls64(xfeature_mask) - 1;
4596                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4597
4598                 if (dest) {
4599                         u32 size, offset, ecx, edx;
4600                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4601                                     &size, &offset, &ecx, &edx);
4602                         if (xfeature_nr == XFEATURE_PKRU)
4603                                 memcpy(&vcpu->arch.pkru, src + offset,
4604                                        sizeof(vcpu->arch.pkru));
4605                         else
4606                                 memcpy(dest, src + offset, size);
4607                 }
4608
4609                 valid -= xfeature_mask;
4610         }
4611 }
4612
4613 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4614                                          struct kvm_xsave *guest_xsave)
4615 {
4616         if (!vcpu->arch.guest_fpu)
4617                 return;
4618
4619         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4620                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4621                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4622         } else {
4623                 memcpy(guest_xsave->region,
4624                         &vcpu->arch.guest_fpu->state.fxsave,
4625                         sizeof(struct fxregs_state));
4626                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4627                         XFEATURE_MASK_FPSSE;
4628         }
4629 }
4630
4631 #define XSAVE_MXCSR_OFFSET 24
4632
4633 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4634                                         struct kvm_xsave *guest_xsave)
4635 {
4636         u64 xstate_bv;
4637         u32 mxcsr;
4638
4639         if (!vcpu->arch.guest_fpu)
4640                 return 0;
4641
4642         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4643         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4644
4645         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4646                 /*
4647                  * Here we allow setting states that are not present in
4648                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4649                  * with old userspace.
4650                  */
4651                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4652                         return -EINVAL;
4653                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4654         } else {
4655                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4656                         mxcsr & ~mxcsr_feature_mask)
4657                         return -EINVAL;
4658                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4659                         guest_xsave->region, sizeof(struct fxregs_state));
4660         }
4661         return 0;
4662 }
4663
4664 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4665                                         struct kvm_xcrs *guest_xcrs)
4666 {
4667         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4668                 guest_xcrs->nr_xcrs = 0;
4669                 return;
4670         }
4671
4672         guest_xcrs->nr_xcrs = 1;
4673         guest_xcrs->flags = 0;
4674         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4675         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4676 }
4677
4678 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4679                                        struct kvm_xcrs *guest_xcrs)
4680 {
4681         int i, r = 0;
4682
4683         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4684                 return -EINVAL;
4685
4686         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4687                 return -EINVAL;
4688
4689         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4690                 /* Only support XCR0 currently */
4691                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4692                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4693                                 guest_xcrs->xcrs[i].value);
4694                         break;
4695                 }
4696         if (r)
4697                 r = -EINVAL;
4698         return r;
4699 }
4700
4701 /*
4702  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4703  * stopped by the hypervisor.  This function will be called from the host only.
4704  * EINVAL is returned when the host attempts to set the flag for a guest that
4705  * does not support pv clocks.
4706  */
4707 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4708 {
4709         if (!vcpu->arch.pv_time_enabled)
4710                 return -EINVAL;
4711         vcpu->arch.pvclock_set_guest_stopped_request = true;
4712         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4713         return 0;
4714 }
4715
4716 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4717                                      struct kvm_enable_cap *cap)
4718 {
4719         int r;
4720         uint16_t vmcs_version;
4721         void __user *user_ptr;
4722
4723         if (cap->flags)
4724                 return -EINVAL;
4725
4726         switch (cap->cap) {
4727         case KVM_CAP_HYPERV_SYNIC2:
4728                 if (cap->args[0])
4729                         return -EINVAL;
4730                 fallthrough;
4731
4732         case KVM_CAP_HYPERV_SYNIC:
4733                 if (!irqchip_in_kernel(vcpu->kvm))
4734                         return -EINVAL;
4735                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4736                                              KVM_CAP_HYPERV_SYNIC2);
4737         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4738                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4739                         return -ENOTTY;
4740                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4741                 if (!r) {
4742                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4743                         if (copy_to_user(user_ptr, &vmcs_version,
4744                                          sizeof(vmcs_version)))
4745                                 r = -EFAULT;
4746                 }
4747                 return r;
4748         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4749                 if (!kvm_x86_ops.enable_direct_tlbflush)
4750                         return -ENOTTY;
4751
4752                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4753
4754         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4755                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4756                 if (vcpu->arch.pv_cpuid.enforce)
4757                         kvm_update_pv_runtime(vcpu);
4758
4759                 return 0;
4760         default:
4761                 return -EINVAL;
4762         }
4763 }
4764
4765 long kvm_arch_vcpu_ioctl(struct file *filp,
4766                          unsigned int ioctl, unsigned long arg)
4767 {
4768         struct kvm_vcpu *vcpu = filp->private_data;
4769         void __user *argp = (void __user *)arg;
4770         int r;
4771         union {
4772                 struct kvm_lapic_state *lapic;
4773                 struct kvm_xsave *xsave;
4774                 struct kvm_xcrs *xcrs;
4775                 void *buffer;
4776         } u;
4777
4778         vcpu_load(vcpu);
4779
4780         u.buffer = NULL;
4781         switch (ioctl) {
4782         case KVM_GET_LAPIC: {
4783                 r = -EINVAL;
4784                 if (!lapic_in_kernel(vcpu))
4785                         goto out;
4786                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4787                                 GFP_KERNEL_ACCOUNT);
4788
4789                 r = -ENOMEM;
4790                 if (!u.lapic)
4791                         goto out;
4792                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4793                 if (r)
4794                         goto out;
4795                 r = -EFAULT;
4796                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4797                         goto out;
4798                 r = 0;
4799                 break;
4800         }
4801         case KVM_SET_LAPIC: {
4802                 r = -EINVAL;
4803                 if (!lapic_in_kernel(vcpu))
4804                         goto out;
4805                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4806                 if (IS_ERR(u.lapic)) {
4807                         r = PTR_ERR(u.lapic);
4808                         goto out_nofree;
4809                 }
4810
4811                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4812                 break;
4813         }
4814         case KVM_INTERRUPT: {
4815                 struct kvm_interrupt irq;
4816
4817                 r = -EFAULT;
4818                 if (copy_from_user(&irq, argp, sizeof(irq)))
4819                         goto out;
4820                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4821                 break;
4822         }
4823         case KVM_NMI: {
4824                 r = kvm_vcpu_ioctl_nmi(vcpu);
4825                 break;
4826         }
4827         case KVM_SMI: {
4828                 r = kvm_vcpu_ioctl_smi(vcpu);
4829                 break;
4830         }
4831         case KVM_SET_CPUID: {
4832                 struct kvm_cpuid __user *cpuid_arg = argp;
4833                 struct kvm_cpuid cpuid;
4834
4835                 r = -EFAULT;
4836                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4837                         goto out;
4838                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4839                 break;
4840         }
4841         case KVM_SET_CPUID2: {
4842                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4843                 struct kvm_cpuid2 cpuid;
4844
4845                 r = -EFAULT;
4846                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4847                         goto out;
4848                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4849                                               cpuid_arg->entries);
4850                 break;
4851         }
4852         case KVM_GET_CPUID2: {
4853                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4854                 struct kvm_cpuid2 cpuid;
4855
4856                 r = -EFAULT;
4857                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4858                         goto out;
4859                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4860                                               cpuid_arg->entries);
4861                 if (r)
4862                         goto out;
4863                 r = -EFAULT;
4864                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4865                         goto out;
4866                 r = 0;
4867                 break;
4868         }
4869         case KVM_GET_MSRS: {
4870                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4871                 r = msr_io(vcpu, argp, do_get_msr, 1);
4872                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4873                 break;
4874         }
4875         case KVM_SET_MSRS: {
4876                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4877                 r = msr_io(vcpu, argp, do_set_msr, 0);
4878                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4879                 break;
4880         }
4881         case KVM_TPR_ACCESS_REPORTING: {
4882                 struct kvm_tpr_access_ctl tac;
4883
4884                 r = -EFAULT;
4885                 if (copy_from_user(&tac, argp, sizeof(tac)))
4886                         goto out;
4887                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4888                 if (r)
4889                         goto out;
4890                 r = -EFAULT;
4891                 if (copy_to_user(argp, &tac, sizeof(tac)))
4892                         goto out;
4893                 r = 0;
4894                 break;
4895         };
4896         case KVM_SET_VAPIC_ADDR: {
4897                 struct kvm_vapic_addr va;
4898                 int idx;
4899
4900                 r = -EINVAL;
4901                 if (!lapic_in_kernel(vcpu))
4902                         goto out;
4903                 r = -EFAULT;
4904                 if (copy_from_user(&va, argp, sizeof(va)))
4905                         goto out;
4906                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4907                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4908                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4909                 break;
4910         }
4911         case KVM_X86_SETUP_MCE: {
4912                 u64 mcg_cap;
4913
4914                 r = -EFAULT;
4915                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4916                         goto out;
4917                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4918                 break;
4919         }
4920         case KVM_X86_SET_MCE: {
4921                 struct kvm_x86_mce mce;
4922
4923                 r = -EFAULT;
4924                 if (copy_from_user(&mce, argp, sizeof(mce)))
4925                         goto out;
4926                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4927                 break;
4928         }
4929         case KVM_GET_VCPU_EVENTS: {
4930                 struct kvm_vcpu_events events;
4931
4932                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4933
4934                 r = -EFAULT;
4935                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4936                         break;
4937                 r = 0;
4938                 break;
4939         }
4940         case KVM_SET_VCPU_EVENTS: {
4941                 struct kvm_vcpu_events events;
4942
4943                 r = -EFAULT;
4944                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4945                         break;
4946
4947                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4948                 break;
4949         }
4950         case KVM_GET_DEBUGREGS: {
4951                 struct kvm_debugregs dbgregs;
4952
4953                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4954
4955                 r = -EFAULT;
4956                 if (copy_to_user(argp, &dbgregs,
4957                                  sizeof(struct kvm_debugregs)))
4958                         break;
4959                 r = 0;
4960                 break;
4961         }
4962         case KVM_SET_DEBUGREGS: {
4963                 struct kvm_debugregs dbgregs;
4964
4965                 r = -EFAULT;
4966                 if (copy_from_user(&dbgregs, argp,
4967                                    sizeof(struct kvm_debugregs)))
4968                         break;
4969
4970                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4971                 break;
4972         }
4973         case KVM_GET_XSAVE: {
4974                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4975                 r = -ENOMEM;
4976                 if (!u.xsave)
4977                         break;
4978
4979                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4980
4981                 r = -EFAULT;
4982                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4983                         break;
4984                 r = 0;
4985                 break;
4986         }
4987         case KVM_SET_XSAVE: {
4988                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4989                 if (IS_ERR(u.xsave)) {
4990                         r = PTR_ERR(u.xsave);
4991                         goto out_nofree;
4992                 }
4993
4994                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4995                 break;
4996         }
4997         case KVM_GET_XCRS: {
4998                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4999                 r = -ENOMEM;
5000                 if (!u.xcrs)
5001                         break;
5002
5003                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5004
5005                 r = -EFAULT;
5006                 if (copy_to_user(argp, u.xcrs,
5007                                  sizeof(struct kvm_xcrs)))
5008                         break;
5009                 r = 0;
5010                 break;
5011         }
5012         case KVM_SET_XCRS: {
5013                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5014                 if (IS_ERR(u.xcrs)) {
5015                         r = PTR_ERR(u.xcrs);
5016                         goto out_nofree;
5017                 }
5018
5019                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5020                 break;
5021         }
5022         case KVM_SET_TSC_KHZ: {
5023                 u32 user_tsc_khz;
5024
5025                 r = -EINVAL;
5026                 user_tsc_khz = (u32)arg;
5027
5028                 if (kvm_has_tsc_control &&
5029                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5030                         goto out;
5031
5032                 if (user_tsc_khz == 0)
5033                         user_tsc_khz = tsc_khz;
5034
5035                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5036                         r = 0;
5037
5038                 goto out;
5039         }
5040         case KVM_GET_TSC_KHZ: {
5041                 r = vcpu->arch.virtual_tsc_khz;
5042                 goto out;
5043         }
5044         case KVM_KVMCLOCK_CTRL: {
5045                 r = kvm_set_guest_paused(vcpu);
5046                 goto out;
5047         }
5048         case KVM_ENABLE_CAP: {
5049                 struct kvm_enable_cap cap;
5050
5051                 r = -EFAULT;
5052                 if (copy_from_user(&cap, argp, sizeof(cap)))
5053                         goto out;
5054                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5055                 break;
5056         }
5057         case KVM_GET_NESTED_STATE: {
5058                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5059                 u32 user_data_size;
5060
5061                 r = -EINVAL;
5062                 if (!kvm_x86_ops.nested_ops->get_state)
5063                         break;
5064
5065                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5066                 r = -EFAULT;
5067                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5068                         break;
5069
5070                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5071                                                      user_data_size);
5072                 if (r < 0)
5073                         break;
5074
5075                 if (r > user_data_size) {
5076                         if (put_user(r, &user_kvm_nested_state->size))
5077                                 r = -EFAULT;
5078                         else
5079                                 r = -E2BIG;
5080                         break;
5081                 }
5082
5083                 r = 0;
5084                 break;
5085         }
5086         case KVM_SET_NESTED_STATE: {
5087                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5088                 struct kvm_nested_state kvm_state;
5089                 int idx;
5090
5091                 r = -EINVAL;
5092                 if (!kvm_x86_ops.nested_ops->set_state)
5093                         break;
5094
5095                 r = -EFAULT;
5096                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5097                         break;
5098
5099                 r = -EINVAL;
5100                 if (kvm_state.size < sizeof(kvm_state))
5101                         break;
5102
5103                 if (kvm_state.flags &
5104                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5105                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5106                       | KVM_STATE_NESTED_GIF_SET))
5107                         break;
5108
5109                 /* nested_run_pending implies guest_mode.  */
5110                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5111                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5112                         break;
5113
5114                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5115                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5116                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5117                 break;
5118         }
5119         case KVM_GET_SUPPORTED_HV_CPUID:
5120                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5121                 break;
5122 #ifdef CONFIG_KVM_XEN
5123         case KVM_XEN_VCPU_GET_ATTR: {
5124                 struct kvm_xen_vcpu_attr xva;
5125
5126                 r = -EFAULT;
5127                 if (copy_from_user(&xva, argp, sizeof(xva)))
5128                         goto out;
5129                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5130                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5131                         r = -EFAULT;
5132                 break;
5133         }
5134         case KVM_XEN_VCPU_SET_ATTR: {
5135                 struct kvm_xen_vcpu_attr xva;
5136
5137                 r = -EFAULT;
5138                 if (copy_from_user(&xva, argp, sizeof(xva)))
5139                         goto out;
5140                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5141                 break;
5142         }
5143 #endif
5144         default:
5145                 r = -EINVAL;
5146         }
5147 out:
5148         kfree(u.buffer);
5149 out_nofree:
5150         vcpu_put(vcpu);
5151         return r;
5152 }
5153
5154 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5155 {
5156         return VM_FAULT_SIGBUS;
5157 }
5158
5159 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5160 {
5161         int ret;
5162
5163         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5164                 return -EINVAL;
5165         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5166         return ret;
5167 }
5168
5169 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5170                                               u64 ident_addr)
5171 {
5172         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5173 }
5174
5175 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5176                                          unsigned long kvm_nr_mmu_pages)
5177 {
5178         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5179                 return -EINVAL;
5180
5181         mutex_lock(&kvm->slots_lock);
5182
5183         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5184         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5185
5186         mutex_unlock(&kvm->slots_lock);
5187         return 0;
5188 }
5189
5190 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5191 {
5192         return kvm->arch.n_max_mmu_pages;
5193 }
5194
5195 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5196 {
5197         struct kvm_pic *pic = kvm->arch.vpic;
5198         int r;
5199
5200         r = 0;
5201         switch (chip->chip_id) {
5202         case KVM_IRQCHIP_PIC_MASTER:
5203                 memcpy(&chip->chip.pic, &pic->pics[0],
5204                         sizeof(struct kvm_pic_state));
5205                 break;
5206         case KVM_IRQCHIP_PIC_SLAVE:
5207                 memcpy(&chip->chip.pic, &pic->pics[1],
5208                         sizeof(struct kvm_pic_state));
5209                 break;
5210         case KVM_IRQCHIP_IOAPIC:
5211                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5212                 break;
5213         default:
5214                 r = -EINVAL;
5215                 break;
5216         }
5217         return r;
5218 }
5219
5220 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5221 {
5222         struct kvm_pic *pic = kvm->arch.vpic;
5223         int r;
5224
5225         r = 0;
5226         switch (chip->chip_id) {
5227         case KVM_IRQCHIP_PIC_MASTER:
5228                 spin_lock(&pic->lock);
5229                 memcpy(&pic->pics[0], &chip->chip.pic,
5230                         sizeof(struct kvm_pic_state));
5231                 spin_unlock(&pic->lock);
5232                 break;
5233         case KVM_IRQCHIP_PIC_SLAVE:
5234                 spin_lock(&pic->lock);
5235                 memcpy(&pic->pics[1], &chip->chip.pic,
5236                         sizeof(struct kvm_pic_state));
5237                 spin_unlock(&pic->lock);
5238                 break;
5239         case KVM_IRQCHIP_IOAPIC:
5240                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5241                 break;
5242         default:
5243                 r = -EINVAL;
5244                 break;
5245         }
5246         kvm_pic_update_irq(pic);
5247         return r;
5248 }
5249
5250 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5251 {
5252         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5253
5254         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5255
5256         mutex_lock(&kps->lock);
5257         memcpy(ps, &kps->channels, sizeof(*ps));
5258         mutex_unlock(&kps->lock);
5259         return 0;
5260 }
5261
5262 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5263 {
5264         int i;
5265         struct kvm_pit *pit = kvm->arch.vpit;
5266
5267         mutex_lock(&pit->pit_state.lock);
5268         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5269         for (i = 0; i < 3; i++)
5270                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5271         mutex_unlock(&pit->pit_state.lock);
5272         return 0;
5273 }
5274
5275 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5276 {
5277         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5278         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5279                 sizeof(ps->channels));
5280         ps->flags = kvm->arch.vpit->pit_state.flags;
5281         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5282         memset(&ps->reserved, 0, sizeof(ps->reserved));
5283         return 0;
5284 }
5285
5286 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5287 {
5288         int start = 0;
5289         int i;
5290         u32 prev_legacy, cur_legacy;
5291         struct kvm_pit *pit = kvm->arch.vpit;
5292
5293         mutex_lock(&pit->pit_state.lock);
5294         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5295         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5296         if (!prev_legacy && cur_legacy)
5297                 start = 1;
5298         memcpy(&pit->pit_state.channels, &ps->channels,
5299                sizeof(pit->pit_state.channels));
5300         pit->pit_state.flags = ps->flags;
5301         for (i = 0; i < 3; i++)
5302                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5303                                    start && i == 0);
5304         mutex_unlock(&pit->pit_state.lock);
5305         return 0;
5306 }
5307
5308 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5309                                  struct kvm_reinject_control *control)
5310 {
5311         struct kvm_pit *pit = kvm->arch.vpit;
5312
5313         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5314          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5315          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5316          */
5317         mutex_lock(&pit->pit_state.lock);
5318         kvm_pit_set_reinject(pit, control->pit_reinject);
5319         mutex_unlock(&pit->pit_state.lock);
5320
5321         return 0;
5322 }
5323
5324 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5325 {
5326
5327         /*
5328          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5329          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5330          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5331          * VM-Exit.
5332          */
5333         struct kvm_vcpu *vcpu;
5334         int i;
5335
5336         kvm_for_each_vcpu(i, vcpu, kvm)
5337                 kvm_vcpu_kick(vcpu);
5338 }
5339
5340 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5341                         bool line_status)
5342 {
5343         if (!irqchip_in_kernel(kvm))
5344                 return -ENXIO;
5345
5346         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5347                                         irq_event->irq, irq_event->level,
5348                                         line_status);
5349         return 0;
5350 }
5351
5352 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5353                             struct kvm_enable_cap *cap)
5354 {
5355         int r;
5356
5357         if (cap->flags)
5358                 return -EINVAL;
5359
5360         switch (cap->cap) {
5361         case KVM_CAP_DISABLE_QUIRKS:
5362                 kvm->arch.disabled_quirks = cap->args[0];
5363                 r = 0;
5364                 break;
5365         case KVM_CAP_SPLIT_IRQCHIP: {
5366                 mutex_lock(&kvm->lock);
5367                 r = -EINVAL;
5368                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5369                         goto split_irqchip_unlock;
5370                 r = -EEXIST;
5371                 if (irqchip_in_kernel(kvm))
5372                         goto split_irqchip_unlock;
5373                 if (kvm->created_vcpus)
5374                         goto split_irqchip_unlock;
5375                 r = kvm_setup_empty_irq_routing(kvm);
5376                 if (r)
5377                         goto split_irqchip_unlock;
5378                 /* Pairs with irqchip_in_kernel. */
5379                 smp_wmb();
5380                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5381                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5382                 r = 0;
5383 split_irqchip_unlock:
5384                 mutex_unlock(&kvm->lock);
5385                 break;
5386         }
5387         case KVM_CAP_X2APIC_API:
5388                 r = -EINVAL;
5389                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5390                         break;
5391
5392                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5393                         kvm->arch.x2apic_format = true;
5394                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5395                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5396
5397                 r = 0;
5398                 break;
5399         case KVM_CAP_X86_DISABLE_EXITS:
5400                 r = -EINVAL;
5401                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5402                         break;
5403
5404                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5405                         kvm_can_mwait_in_guest())
5406                         kvm->arch.mwait_in_guest = true;
5407                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5408                         kvm->arch.hlt_in_guest = true;
5409                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5410                         kvm->arch.pause_in_guest = true;
5411                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5412                         kvm->arch.cstate_in_guest = true;
5413                 r = 0;
5414                 break;
5415         case KVM_CAP_MSR_PLATFORM_INFO:
5416                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5417                 r = 0;
5418                 break;
5419         case KVM_CAP_EXCEPTION_PAYLOAD:
5420                 kvm->arch.exception_payload_enabled = cap->args[0];
5421                 r = 0;
5422                 break;
5423         case KVM_CAP_X86_USER_SPACE_MSR:
5424                 kvm->arch.user_space_msr_mask = cap->args[0];
5425                 r = 0;
5426                 break;
5427         case KVM_CAP_X86_BUS_LOCK_EXIT:
5428                 r = -EINVAL;
5429                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5430                         break;
5431
5432                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5433                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5434                         break;
5435
5436                 if (kvm_has_bus_lock_exit &&
5437                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5438                         kvm->arch.bus_lock_detection_enabled = true;
5439                 r = 0;
5440                 break;
5441 #ifdef CONFIG_X86_SGX_KVM
5442         case KVM_CAP_SGX_ATTRIBUTE: {
5443                 unsigned long allowed_attributes = 0;
5444
5445                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5446                 if (r)
5447                         break;
5448
5449                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5450                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5451                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5452                         kvm->arch.sgx_provisioning_allowed = true;
5453                 else
5454                         r = -EINVAL;
5455                 break;
5456         }
5457 #endif
5458         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5459                 r = -EINVAL;
5460                 if (kvm_x86_ops.vm_copy_enc_context_from)
5461                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5462                 return r;
5463         default:
5464                 r = -EINVAL;
5465                 break;
5466         }
5467         return r;
5468 }
5469
5470 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5471 {
5472         struct kvm_x86_msr_filter *msr_filter;
5473
5474         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5475         if (!msr_filter)
5476                 return NULL;
5477
5478         msr_filter->default_allow = default_allow;
5479         return msr_filter;
5480 }
5481
5482 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5483 {
5484         u32 i;
5485
5486         if (!msr_filter)
5487                 return;
5488
5489         for (i = 0; i < msr_filter->count; i++)
5490                 kfree(msr_filter->ranges[i].bitmap);
5491
5492         kfree(msr_filter);
5493 }
5494
5495 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5496                               struct kvm_msr_filter_range *user_range)
5497 {
5498         unsigned long *bitmap = NULL;
5499         size_t bitmap_size;
5500
5501         if (!user_range->nmsrs)
5502                 return 0;
5503
5504         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5505                 return -EINVAL;
5506
5507         if (!user_range->flags)
5508                 return -EINVAL;
5509
5510         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5511         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5512                 return -EINVAL;
5513
5514         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5515         if (IS_ERR(bitmap))
5516                 return PTR_ERR(bitmap);
5517
5518         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5519                 .flags = user_range->flags,
5520                 .base = user_range->base,
5521                 .nmsrs = user_range->nmsrs,
5522                 .bitmap = bitmap,
5523         };
5524
5525         msr_filter->count++;
5526         return 0;
5527 }
5528
5529 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5530 {
5531         struct kvm_msr_filter __user *user_msr_filter = argp;
5532         struct kvm_x86_msr_filter *new_filter, *old_filter;
5533         struct kvm_msr_filter filter;
5534         bool default_allow;
5535         bool empty = true;
5536         int r = 0;
5537         u32 i;
5538
5539         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5540                 return -EFAULT;
5541
5542         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5543                 empty &= !filter.ranges[i].nmsrs;
5544
5545         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5546         if (empty && !default_allow)
5547                 return -EINVAL;
5548
5549         new_filter = kvm_alloc_msr_filter(default_allow);
5550         if (!new_filter)
5551                 return -ENOMEM;
5552
5553         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5554                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5555                 if (r) {
5556                         kvm_free_msr_filter(new_filter);
5557                         return r;
5558                 }
5559         }
5560
5561         mutex_lock(&kvm->lock);
5562
5563         /* The per-VM filter is protected by kvm->lock... */
5564         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5565
5566         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5567         synchronize_srcu(&kvm->srcu);
5568
5569         kvm_free_msr_filter(old_filter);
5570
5571         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5572         mutex_unlock(&kvm->lock);
5573
5574         return 0;
5575 }
5576
5577 long kvm_arch_vm_ioctl(struct file *filp,
5578                        unsigned int ioctl, unsigned long arg)
5579 {
5580         struct kvm *kvm = filp->private_data;
5581         void __user *argp = (void __user *)arg;
5582         int r = -ENOTTY;
5583         /*
5584          * This union makes it completely explicit to gcc-3.x
5585          * that these two variables' stack usage should be
5586          * combined, not added together.
5587          */
5588         union {
5589                 struct kvm_pit_state ps;
5590                 struct kvm_pit_state2 ps2;
5591                 struct kvm_pit_config pit_config;
5592         } u;
5593
5594         switch (ioctl) {
5595         case KVM_SET_TSS_ADDR:
5596                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5597                 break;
5598         case KVM_SET_IDENTITY_MAP_ADDR: {
5599                 u64 ident_addr;
5600
5601                 mutex_lock(&kvm->lock);
5602                 r = -EINVAL;
5603                 if (kvm->created_vcpus)
5604                         goto set_identity_unlock;
5605                 r = -EFAULT;
5606                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5607                         goto set_identity_unlock;
5608                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5609 set_identity_unlock:
5610                 mutex_unlock(&kvm->lock);
5611                 break;
5612         }
5613         case KVM_SET_NR_MMU_PAGES:
5614                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5615                 break;
5616         case KVM_GET_NR_MMU_PAGES:
5617                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5618                 break;
5619         case KVM_CREATE_IRQCHIP: {
5620                 mutex_lock(&kvm->lock);
5621
5622                 r = -EEXIST;
5623                 if (irqchip_in_kernel(kvm))
5624                         goto create_irqchip_unlock;
5625
5626                 r = -EINVAL;
5627                 if (kvm->created_vcpus)
5628                         goto create_irqchip_unlock;
5629
5630                 r = kvm_pic_init(kvm);
5631                 if (r)
5632                         goto create_irqchip_unlock;
5633
5634                 r = kvm_ioapic_init(kvm);
5635                 if (r) {
5636                         kvm_pic_destroy(kvm);
5637                         goto create_irqchip_unlock;
5638                 }
5639
5640                 r = kvm_setup_default_irq_routing(kvm);
5641                 if (r) {
5642                         kvm_ioapic_destroy(kvm);
5643                         kvm_pic_destroy(kvm);
5644                         goto create_irqchip_unlock;
5645                 }
5646                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5647                 smp_wmb();
5648                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5649         create_irqchip_unlock:
5650                 mutex_unlock(&kvm->lock);
5651                 break;
5652         }
5653         case KVM_CREATE_PIT:
5654                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5655                 goto create_pit;
5656         case KVM_CREATE_PIT2:
5657                 r = -EFAULT;
5658                 if (copy_from_user(&u.pit_config, argp,
5659                                    sizeof(struct kvm_pit_config)))
5660                         goto out;
5661         create_pit:
5662                 mutex_lock(&kvm->lock);
5663                 r = -EEXIST;
5664                 if (kvm->arch.vpit)
5665                         goto create_pit_unlock;
5666                 r = -ENOMEM;
5667                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5668                 if (kvm->arch.vpit)
5669                         r = 0;
5670         create_pit_unlock:
5671                 mutex_unlock(&kvm->lock);
5672                 break;
5673         case KVM_GET_IRQCHIP: {
5674                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5675                 struct kvm_irqchip *chip;
5676
5677                 chip = memdup_user(argp, sizeof(*chip));
5678                 if (IS_ERR(chip)) {
5679                         r = PTR_ERR(chip);
5680                         goto out;
5681                 }
5682
5683                 r = -ENXIO;
5684                 if (!irqchip_kernel(kvm))
5685                         goto get_irqchip_out;
5686                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5687                 if (r)
5688                         goto get_irqchip_out;
5689                 r = -EFAULT;
5690                 if (copy_to_user(argp, chip, sizeof(*chip)))
5691                         goto get_irqchip_out;
5692                 r = 0;
5693         get_irqchip_out:
5694                 kfree(chip);
5695                 break;
5696         }
5697         case KVM_SET_IRQCHIP: {
5698                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5699                 struct kvm_irqchip *chip;
5700
5701                 chip = memdup_user(argp, sizeof(*chip));
5702                 if (IS_ERR(chip)) {
5703                         r = PTR_ERR(chip);
5704                         goto out;
5705                 }
5706
5707                 r = -ENXIO;
5708                 if (!irqchip_kernel(kvm))
5709                         goto set_irqchip_out;
5710                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5711         set_irqchip_out:
5712                 kfree(chip);
5713                 break;
5714         }
5715         case KVM_GET_PIT: {
5716                 r = -EFAULT;
5717                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5718                         goto out;
5719                 r = -ENXIO;
5720                 if (!kvm->arch.vpit)
5721                         goto out;
5722                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5723                 if (r)
5724                         goto out;
5725                 r = -EFAULT;
5726                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5727                         goto out;
5728                 r = 0;
5729                 break;
5730         }
5731         case KVM_SET_PIT: {
5732                 r = -EFAULT;
5733                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5734                         goto out;
5735                 mutex_lock(&kvm->lock);
5736                 r = -ENXIO;
5737                 if (!kvm->arch.vpit)
5738                         goto set_pit_out;
5739                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5740 set_pit_out:
5741                 mutex_unlock(&kvm->lock);
5742                 break;
5743         }
5744         case KVM_GET_PIT2: {
5745                 r = -ENXIO;
5746                 if (!kvm->arch.vpit)
5747                         goto out;
5748                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5749                 if (r)
5750                         goto out;
5751                 r = -EFAULT;
5752                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5753                         goto out;
5754                 r = 0;
5755                 break;
5756         }
5757         case KVM_SET_PIT2: {
5758                 r = -EFAULT;
5759                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5760                         goto out;
5761                 mutex_lock(&kvm->lock);
5762                 r = -ENXIO;
5763                 if (!kvm->arch.vpit)
5764                         goto set_pit2_out;
5765                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5766 set_pit2_out:
5767                 mutex_unlock(&kvm->lock);
5768                 break;
5769         }
5770         case KVM_REINJECT_CONTROL: {
5771                 struct kvm_reinject_control control;
5772                 r =  -EFAULT;
5773                 if (copy_from_user(&control, argp, sizeof(control)))
5774                         goto out;
5775                 r = -ENXIO;
5776                 if (!kvm->arch.vpit)
5777                         goto out;
5778                 r = kvm_vm_ioctl_reinject(kvm, &control);
5779                 break;
5780         }
5781         case KVM_SET_BOOT_CPU_ID:
5782                 r = 0;
5783                 mutex_lock(&kvm->lock);
5784                 if (kvm->created_vcpus)
5785                         r = -EBUSY;
5786                 else
5787                         kvm->arch.bsp_vcpu_id = arg;
5788                 mutex_unlock(&kvm->lock);
5789                 break;
5790 #ifdef CONFIG_KVM_XEN
5791         case KVM_XEN_HVM_CONFIG: {
5792                 struct kvm_xen_hvm_config xhc;
5793                 r = -EFAULT;
5794                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5795                         goto out;
5796                 r = kvm_xen_hvm_config(kvm, &xhc);
5797                 break;
5798         }
5799         case KVM_XEN_HVM_GET_ATTR: {
5800                 struct kvm_xen_hvm_attr xha;
5801
5802                 r = -EFAULT;
5803                 if (copy_from_user(&xha, argp, sizeof(xha)))
5804                         goto out;
5805                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5806                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5807                         r = -EFAULT;
5808                 break;
5809         }
5810         case KVM_XEN_HVM_SET_ATTR: {
5811                 struct kvm_xen_hvm_attr xha;
5812
5813                 r = -EFAULT;
5814                 if (copy_from_user(&xha, argp, sizeof(xha)))
5815                         goto out;
5816                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5817                 break;
5818         }
5819 #endif
5820         case KVM_SET_CLOCK: {
5821                 struct kvm_arch *ka = &kvm->arch;
5822                 struct kvm_clock_data user_ns;
5823                 u64 now_ns;
5824
5825                 r = -EFAULT;
5826                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5827                         goto out;
5828
5829                 r = -EINVAL;
5830                 if (user_ns.flags)
5831                         goto out;
5832
5833                 r = 0;
5834                 /*
5835                  * TODO: userspace has to take care of races with VCPU_RUN, so
5836                  * kvm_gen_update_masterclock() can be cut down to locked
5837                  * pvclock_update_vm_gtod_copy().
5838                  */
5839                 kvm_gen_update_masterclock(kvm);
5840
5841                 /*
5842                  * This pairs with kvm_guest_time_update(): when masterclock is
5843                  * in use, we use master_kernel_ns + kvmclock_offset to set
5844                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5845                  * is slightly ahead) here we risk going negative on unsigned
5846                  * 'system_time' when 'user_ns.clock' is very small.
5847                  */
5848                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
5849                 if (kvm->arch.use_master_clock)
5850                         now_ns = ka->master_kernel_ns;
5851                 else
5852                         now_ns = get_kvmclock_base_ns();
5853                 ka->kvmclock_offset = user_ns.clock - now_ns;
5854                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
5855
5856                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5857                 break;
5858         }
5859         case KVM_GET_CLOCK: {
5860                 struct kvm_clock_data user_ns;
5861                 u64 now_ns;
5862
5863                 now_ns = get_kvmclock_ns(kvm);
5864                 user_ns.clock = now_ns;
5865                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5866                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5867
5868                 r = -EFAULT;
5869                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5870                         goto out;
5871                 r = 0;
5872                 break;
5873         }
5874         case KVM_MEMORY_ENCRYPT_OP: {
5875                 r = -ENOTTY;
5876                 if (kvm_x86_ops.mem_enc_op)
5877                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5878                 break;
5879         }
5880         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5881                 struct kvm_enc_region region;
5882
5883                 r = -EFAULT;
5884                 if (copy_from_user(&region, argp, sizeof(region)))
5885                         goto out;
5886
5887                 r = -ENOTTY;
5888                 if (kvm_x86_ops.mem_enc_reg_region)
5889                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
5890                 break;
5891         }
5892         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5893                 struct kvm_enc_region region;
5894
5895                 r = -EFAULT;
5896                 if (copy_from_user(&region, argp, sizeof(region)))
5897                         goto out;
5898
5899                 r = -ENOTTY;
5900                 if (kvm_x86_ops.mem_enc_unreg_region)
5901                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
5902                 break;
5903         }
5904         case KVM_HYPERV_EVENTFD: {
5905                 struct kvm_hyperv_eventfd hvevfd;
5906
5907                 r = -EFAULT;
5908                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5909                         goto out;
5910                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5911                 break;
5912         }
5913         case KVM_SET_PMU_EVENT_FILTER:
5914                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5915                 break;
5916         case KVM_X86_SET_MSR_FILTER:
5917                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5918                 break;
5919         default:
5920                 r = -ENOTTY;
5921         }
5922 out:
5923         return r;
5924 }
5925
5926 static void kvm_init_msr_list(void)
5927 {
5928         struct x86_pmu_capability x86_pmu;
5929         u32 dummy[2];
5930         unsigned i;
5931
5932         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5933                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5934
5935         perf_get_x86_pmu_capability(&x86_pmu);
5936
5937         num_msrs_to_save = 0;
5938         num_emulated_msrs = 0;
5939         num_msr_based_features = 0;
5940
5941         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5942                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5943                         continue;
5944
5945                 /*
5946                  * Even MSRs that are valid in the host may not be exposed
5947                  * to the guests in some cases.
5948                  */
5949                 switch (msrs_to_save_all[i]) {
5950                 case MSR_IA32_BNDCFGS:
5951                         if (!kvm_mpx_supported())
5952                                 continue;
5953                         break;
5954                 case MSR_TSC_AUX:
5955                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
5956                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
5957                                 continue;
5958                         break;
5959                 case MSR_IA32_UMWAIT_CONTROL:
5960                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5961                                 continue;
5962                         break;
5963                 case MSR_IA32_RTIT_CTL:
5964                 case MSR_IA32_RTIT_STATUS:
5965                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5966                                 continue;
5967                         break;
5968                 case MSR_IA32_RTIT_CR3_MATCH:
5969                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5970                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5971                                 continue;
5972                         break;
5973                 case MSR_IA32_RTIT_OUTPUT_BASE:
5974                 case MSR_IA32_RTIT_OUTPUT_MASK:
5975                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5976                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5977                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5978                                 continue;
5979                         break;
5980                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5981                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5982                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5983                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5984                                 continue;
5985                         break;
5986                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5987                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5988                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5989                                 continue;
5990                         break;
5991                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5992                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5993                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5994                                 continue;
5995                         break;
5996                 default:
5997                         break;
5998                 }
5999
6000                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6001         }
6002
6003         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6004                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6005                         continue;
6006
6007                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6008         }
6009
6010         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6011                 struct kvm_msr_entry msr;
6012
6013                 msr.index = msr_based_features_all[i];
6014                 if (kvm_get_msr_feature(&msr))
6015                         continue;
6016
6017                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6018         }
6019 }
6020
6021 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6022                            const void *v)
6023 {
6024         int handled = 0;
6025         int n;
6026
6027         do {
6028                 n = min(len, 8);
6029                 if (!(lapic_in_kernel(vcpu) &&
6030                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6031                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6032                         break;
6033                 handled += n;
6034                 addr += n;
6035                 len -= n;
6036                 v += n;
6037         } while (len);
6038
6039         return handled;
6040 }
6041
6042 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6043 {
6044         int handled = 0;
6045         int n;
6046
6047         do {
6048                 n = min(len, 8);
6049                 if (!(lapic_in_kernel(vcpu) &&
6050                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6051                                          addr, n, v))
6052                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6053                         break;
6054                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6055                 handled += n;
6056                 addr += n;
6057                 len -= n;
6058                 v += n;
6059         } while (len);
6060
6061         return handled;
6062 }
6063
6064 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6065                         struct kvm_segment *var, int seg)
6066 {
6067         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6068 }
6069
6070 void kvm_get_segment(struct kvm_vcpu *vcpu,
6071                      struct kvm_segment *var, int seg)
6072 {
6073         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6074 }
6075
6076 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6077                            struct x86_exception *exception)
6078 {
6079         gpa_t t_gpa;
6080
6081         BUG_ON(!mmu_is_nested(vcpu));
6082
6083         /* NPT walks are always user-walks */
6084         access |= PFERR_USER_MASK;
6085         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6086
6087         return t_gpa;
6088 }
6089
6090 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6091                               struct x86_exception *exception)
6092 {
6093         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6094         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6095 }
6096 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6097
6098  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6099                                 struct x86_exception *exception)
6100 {
6101         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6102         access |= PFERR_FETCH_MASK;
6103         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6104 }
6105
6106 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6107                                struct x86_exception *exception)
6108 {
6109         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6110         access |= PFERR_WRITE_MASK;
6111         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6112 }
6113 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6114
6115 /* uses this to access any guest's mapped memory without checking CPL */
6116 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6117                                 struct x86_exception *exception)
6118 {
6119         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6120 }
6121
6122 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6123                                       struct kvm_vcpu *vcpu, u32 access,
6124                                       struct x86_exception *exception)
6125 {
6126         void *data = val;
6127         int r = X86EMUL_CONTINUE;
6128
6129         while (bytes) {
6130                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6131                                                             exception);
6132                 unsigned offset = addr & (PAGE_SIZE-1);
6133                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6134                 int ret;
6135
6136                 if (gpa == UNMAPPED_GVA)
6137                         return X86EMUL_PROPAGATE_FAULT;
6138                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6139                                                offset, toread);
6140                 if (ret < 0) {
6141                         r = X86EMUL_IO_NEEDED;
6142                         goto out;
6143                 }
6144
6145                 bytes -= toread;
6146                 data += toread;
6147                 addr += toread;
6148         }
6149 out:
6150         return r;
6151 }
6152
6153 /* used for instruction fetching */
6154 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6155                                 gva_t addr, void *val, unsigned int bytes,
6156                                 struct x86_exception *exception)
6157 {
6158         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6159         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6160         unsigned offset;
6161         int ret;
6162
6163         /* Inline kvm_read_guest_virt_helper for speed.  */
6164         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6165                                                     exception);
6166         if (unlikely(gpa == UNMAPPED_GVA))
6167                 return X86EMUL_PROPAGATE_FAULT;
6168
6169         offset = addr & (PAGE_SIZE-1);
6170         if (WARN_ON(offset + bytes > PAGE_SIZE))
6171                 bytes = (unsigned)PAGE_SIZE - offset;
6172         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6173                                        offset, bytes);
6174         if (unlikely(ret < 0))
6175                 return X86EMUL_IO_NEEDED;
6176
6177         return X86EMUL_CONTINUE;
6178 }
6179
6180 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6181                                gva_t addr, void *val, unsigned int bytes,
6182                                struct x86_exception *exception)
6183 {
6184         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6185
6186         /*
6187          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6188          * is returned, but our callers are not ready for that and they blindly
6189          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6190          * uninitialized kernel stack memory into cr2 and error code.
6191          */
6192         memset(exception, 0, sizeof(*exception));
6193         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6194                                           exception);
6195 }
6196 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6197
6198 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6199                              gva_t addr, void *val, unsigned int bytes,
6200                              struct x86_exception *exception, bool system)
6201 {
6202         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6203         u32 access = 0;
6204
6205         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6206                 access |= PFERR_USER_MASK;
6207
6208         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6209 }
6210
6211 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6212                 unsigned long addr, void *val, unsigned int bytes)
6213 {
6214         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6215         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6216
6217         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6218 }
6219
6220 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6221                                       struct kvm_vcpu *vcpu, u32 access,
6222                                       struct x86_exception *exception)
6223 {
6224         void *data = val;
6225         int r = X86EMUL_CONTINUE;
6226
6227         while (bytes) {
6228                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6229                                                              access,
6230                                                              exception);
6231                 unsigned offset = addr & (PAGE_SIZE-1);
6232                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6233                 int ret;
6234
6235                 if (gpa == UNMAPPED_GVA)
6236                         return X86EMUL_PROPAGATE_FAULT;
6237                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6238                 if (ret < 0) {
6239                         r = X86EMUL_IO_NEEDED;
6240                         goto out;
6241                 }
6242
6243                 bytes -= towrite;
6244                 data += towrite;
6245                 addr += towrite;
6246         }
6247 out:
6248         return r;
6249 }
6250
6251 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6252                               unsigned int bytes, struct x86_exception *exception,
6253                               bool system)
6254 {
6255         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6256         u32 access = PFERR_WRITE_MASK;
6257
6258         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6259                 access |= PFERR_USER_MASK;
6260
6261         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6262                                            access, exception);
6263 }
6264
6265 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6266                                 unsigned int bytes, struct x86_exception *exception)
6267 {
6268         /* kvm_write_guest_virt_system can pull in tons of pages. */
6269         vcpu->arch.l1tf_flush_l1d = true;
6270
6271         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6272                                            PFERR_WRITE_MASK, exception);
6273 }
6274 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6275
6276 int handle_ud(struct kvm_vcpu *vcpu)
6277 {
6278         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6279         int emul_type = EMULTYPE_TRAP_UD;
6280         char sig[5]; /* ud2; .ascii "kvm" */
6281         struct x86_exception e;
6282
6283         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6284                 return 1;
6285
6286         if (force_emulation_prefix &&
6287             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6288                                 sig, sizeof(sig), &e) == 0 &&
6289             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6290                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6291                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6292         }
6293
6294         return kvm_emulate_instruction(vcpu, emul_type);
6295 }
6296 EXPORT_SYMBOL_GPL(handle_ud);
6297
6298 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6299                             gpa_t gpa, bool write)
6300 {
6301         /* For APIC access vmexit */
6302         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6303                 return 1;
6304
6305         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6306                 trace_vcpu_match_mmio(gva, gpa, write, true);
6307                 return 1;
6308         }
6309
6310         return 0;
6311 }
6312
6313 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6314                                 gpa_t *gpa, struct x86_exception *exception,
6315                                 bool write)
6316 {
6317         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6318                 | (write ? PFERR_WRITE_MASK : 0);
6319
6320         /*
6321          * currently PKRU is only applied to ept enabled guest so
6322          * there is no pkey in EPT page table for L1 guest or EPT
6323          * shadow page table for L2 guest.
6324          */
6325         if (vcpu_match_mmio_gva(vcpu, gva)
6326             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6327                                  vcpu->arch.mmio_access, 0, access)) {
6328                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6329                                         (gva & (PAGE_SIZE - 1));
6330                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6331                 return 1;
6332         }
6333
6334         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6335
6336         if (*gpa == UNMAPPED_GVA)
6337                 return -1;
6338
6339         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6340 }
6341
6342 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6343                         const void *val, int bytes)
6344 {
6345         int ret;
6346
6347         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6348         if (ret < 0)
6349                 return 0;
6350         kvm_page_track_write(vcpu, gpa, val, bytes);
6351         return 1;
6352 }
6353
6354 struct read_write_emulator_ops {
6355         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6356                                   int bytes);
6357         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6358                                   void *val, int bytes);
6359         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6360                                int bytes, void *val);
6361         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6362                                     void *val, int bytes);
6363         bool write;
6364 };
6365
6366 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6367 {
6368         if (vcpu->mmio_read_completed) {
6369                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6370                                vcpu->mmio_fragments[0].gpa, val);
6371                 vcpu->mmio_read_completed = 0;
6372                 return 1;
6373         }
6374
6375         return 0;
6376 }
6377
6378 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6379                         void *val, int bytes)
6380 {
6381         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6382 }
6383
6384 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6385                          void *val, int bytes)
6386 {
6387         return emulator_write_phys(vcpu, gpa, val, bytes);
6388 }
6389
6390 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6391 {
6392         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6393         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6394 }
6395
6396 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6397                           void *val, int bytes)
6398 {
6399         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6400         return X86EMUL_IO_NEEDED;
6401 }
6402
6403 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6404                            void *val, int bytes)
6405 {
6406         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6407
6408         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6409         return X86EMUL_CONTINUE;
6410 }
6411
6412 static const struct read_write_emulator_ops read_emultor = {
6413         .read_write_prepare = read_prepare,
6414         .read_write_emulate = read_emulate,
6415         .read_write_mmio = vcpu_mmio_read,
6416         .read_write_exit_mmio = read_exit_mmio,
6417 };
6418
6419 static const struct read_write_emulator_ops write_emultor = {
6420         .read_write_emulate = write_emulate,
6421         .read_write_mmio = write_mmio,
6422         .read_write_exit_mmio = write_exit_mmio,
6423         .write = true,
6424 };
6425
6426 static int emulator_read_write_onepage(unsigned long addr, void *val,
6427                                        unsigned int bytes,
6428                                        struct x86_exception *exception,
6429                                        struct kvm_vcpu *vcpu,
6430                                        const struct read_write_emulator_ops *ops)
6431 {
6432         gpa_t gpa;
6433         int handled, ret;
6434         bool write = ops->write;
6435         struct kvm_mmio_fragment *frag;
6436         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6437
6438         /*
6439          * If the exit was due to a NPF we may already have a GPA.
6440          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6441          * Note, this cannot be used on string operations since string
6442          * operation using rep will only have the initial GPA from the NPF
6443          * occurred.
6444          */
6445         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6446             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6447                 gpa = ctxt->gpa_val;
6448                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6449         } else {
6450                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6451                 if (ret < 0)
6452                         return X86EMUL_PROPAGATE_FAULT;
6453         }
6454
6455         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6456                 return X86EMUL_CONTINUE;
6457
6458         /*
6459          * Is this MMIO handled locally?
6460          */
6461         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6462         if (handled == bytes)
6463                 return X86EMUL_CONTINUE;
6464
6465         gpa += handled;
6466         bytes -= handled;
6467         val += handled;
6468
6469         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6470         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6471         frag->gpa = gpa;
6472         frag->data = val;
6473         frag->len = bytes;
6474         return X86EMUL_CONTINUE;
6475 }
6476
6477 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6478                         unsigned long addr,
6479                         void *val, unsigned int bytes,
6480                         struct x86_exception *exception,
6481                         const struct read_write_emulator_ops *ops)
6482 {
6483         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6484         gpa_t gpa;
6485         int rc;
6486
6487         if (ops->read_write_prepare &&
6488                   ops->read_write_prepare(vcpu, val, bytes))
6489                 return X86EMUL_CONTINUE;
6490
6491         vcpu->mmio_nr_fragments = 0;
6492
6493         /* Crossing a page boundary? */
6494         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6495                 int now;
6496
6497                 now = -addr & ~PAGE_MASK;
6498                 rc = emulator_read_write_onepage(addr, val, now, exception,
6499                                                  vcpu, ops);
6500
6501                 if (rc != X86EMUL_CONTINUE)
6502                         return rc;
6503                 addr += now;
6504                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6505                         addr = (u32)addr;
6506                 val += now;
6507                 bytes -= now;
6508         }
6509
6510         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6511                                          vcpu, ops);
6512         if (rc != X86EMUL_CONTINUE)
6513                 return rc;
6514
6515         if (!vcpu->mmio_nr_fragments)
6516                 return rc;
6517
6518         gpa = vcpu->mmio_fragments[0].gpa;
6519
6520         vcpu->mmio_needed = 1;
6521         vcpu->mmio_cur_fragment = 0;
6522
6523         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6524         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6525         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6526         vcpu->run->mmio.phys_addr = gpa;
6527
6528         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6529 }
6530
6531 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6532                                   unsigned long addr,
6533                                   void *val,
6534                                   unsigned int bytes,
6535                                   struct x86_exception *exception)
6536 {
6537         return emulator_read_write(ctxt, addr, val, bytes,
6538                                    exception, &read_emultor);
6539 }
6540
6541 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6542                             unsigned long addr,
6543                             const void *val,
6544                             unsigned int bytes,
6545                             struct x86_exception *exception)
6546 {
6547         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6548                                    exception, &write_emultor);
6549 }
6550
6551 #define CMPXCHG_TYPE(t, ptr, old, new) \
6552         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6553
6554 #ifdef CONFIG_X86_64
6555 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6556 #else
6557 #  define CMPXCHG64(ptr, old, new) \
6558         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6559 #endif
6560
6561 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6562                                      unsigned long addr,
6563                                      const void *old,
6564                                      const void *new,
6565                                      unsigned int bytes,
6566                                      struct x86_exception *exception)
6567 {
6568         struct kvm_host_map map;
6569         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6570         u64 page_line_mask;
6571         gpa_t gpa;
6572         char *kaddr;
6573         bool exchanged;
6574
6575         /* guests cmpxchg8b have to be emulated atomically */
6576         if (bytes > 8 || (bytes & (bytes - 1)))
6577                 goto emul_write;
6578
6579         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6580
6581         if (gpa == UNMAPPED_GVA ||
6582             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6583                 goto emul_write;
6584
6585         /*
6586          * Emulate the atomic as a straight write to avoid #AC if SLD is
6587          * enabled in the host and the access splits a cache line.
6588          */
6589         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6590                 page_line_mask = ~(cache_line_size() - 1);
6591         else
6592                 page_line_mask = PAGE_MASK;
6593
6594         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6595                 goto emul_write;
6596
6597         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6598                 goto emul_write;
6599
6600         kaddr = map.hva + offset_in_page(gpa);
6601
6602         switch (bytes) {
6603         case 1:
6604                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6605                 break;
6606         case 2:
6607                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6608                 break;
6609         case 4:
6610                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6611                 break;
6612         case 8:
6613                 exchanged = CMPXCHG64(kaddr, old, new);
6614                 break;
6615         default:
6616                 BUG();
6617         }
6618
6619         kvm_vcpu_unmap(vcpu, &map, true);
6620
6621         if (!exchanged)
6622                 return X86EMUL_CMPXCHG_FAILED;
6623
6624         kvm_page_track_write(vcpu, gpa, new, bytes);
6625
6626         return X86EMUL_CONTINUE;
6627
6628 emul_write:
6629         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6630
6631         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6632 }
6633
6634 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6635 {
6636         int r = 0, i;
6637
6638         for (i = 0; i < vcpu->arch.pio.count; i++) {
6639                 if (vcpu->arch.pio.in)
6640                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6641                                             vcpu->arch.pio.size, pd);
6642                 else
6643                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6644                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6645                                              pd);
6646                 if (r)
6647                         break;
6648                 pd += vcpu->arch.pio.size;
6649         }
6650         return r;
6651 }
6652
6653 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6654                                unsigned short port, void *val,
6655                                unsigned int count, bool in)
6656 {
6657         vcpu->arch.pio.port = port;
6658         vcpu->arch.pio.in = in;
6659         vcpu->arch.pio.count  = count;
6660         vcpu->arch.pio.size = size;
6661
6662         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6663                 vcpu->arch.pio.count = 0;
6664                 return 1;
6665         }
6666
6667         vcpu->run->exit_reason = KVM_EXIT_IO;
6668         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6669         vcpu->run->io.size = size;
6670         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6671         vcpu->run->io.count = count;
6672         vcpu->run->io.port = port;
6673
6674         return 0;
6675 }
6676
6677 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6678                            unsigned short port, void *val, unsigned int count)
6679 {
6680         int ret;
6681
6682         if (vcpu->arch.pio.count)
6683                 goto data_avail;
6684
6685         memset(vcpu->arch.pio_data, 0, size * count);
6686
6687         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6688         if (ret) {
6689 data_avail:
6690                 memcpy(val, vcpu->arch.pio_data, size * count);
6691                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6692                 vcpu->arch.pio.count = 0;
6693                 return 1;
6694         }
6695
6696         return 0;
6697 }
6698
6699 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6700                                     int size, unsigned short port, void *val,
6701                                     unsigned int count)
6702 {
6703         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6704
6705 }
6706
6707 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6708                             unsigned short port, const void *val,
6709                             unsigned int count)
6710 {
6711         memcpy(vcpu->arch.pio_data, val, size * count);
6712         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6713         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6714 }
6715
6716 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6717                                      int size, unsigned short port,
6718                                      const void *val, unsigned int count)
6719 {
6720         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6721 }
6722
6723 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6724 {
6725         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6726 }
6727
6728 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6729 {
6730         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6731 }
6732
6733 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6734 {
6735         if (!need_emulate_wbinvd(vcpu))
6736                 return X86EMUL_CONTINUE;
6737
6738         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6739                 int cpu = get_cpu();
6740
6741                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6742                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6743                                 wbinvd_ipi, NULL, 1);
6744                 put_cpu();
6745                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6746         } else
6747                 wbinvd();
6748         return X86EMUL_CONTINUE;
6749 }
6750
6751 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6752 {
6753         kvm_emulate_wbinvd_noskip(vcpu);
6754         return kvm_skip_emulated_instruction(vcpu);
6755 }
6756 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6757
6758
6759
6760 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6761 {
6762         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6763 }
6764
6765 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6766                             unsigned long *dest)
6767 {
6768         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6769 }
6770
6771 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6772                            unsigned long value)
6773 {
6774
6775         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6776 }
6777
6778 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6779 {
6780         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6781 }
6782
6783 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6784 {
6785         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6786         unsigned long value;
6787
6788         switch (cr) {
6789         case 0:
6790                 value = kvm_read_cr0(vcpu);
6791                 break;
6792         case 2:
6793                 value = vcpu->arch.cr2;
6794                 break;
6795         case 3:
6796                 value = kvm_read_cr3(vcpu);
6797                 break;
6798         case 4:
6799                 value = kvm_read_cr4(vcpu);
6800                 break;
6801         case 8:
6802                 value = kvm_get_cr8(vcpu);
6803                 break;
6804         default:
6805                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6806                 return 0;
6807         }
6808
6809         return value;
6810 }
6811
6812 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6813 {
6814         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6815         int res = 0;
6816
6817         switch (cr) {
6818         case 0:
6819                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6820                 break;
6821         case 2:
6822                 vcpu->arch.cr2 = val;
6823                 break;
6824         case 3:
6825                 res = kvm_set_cr3(vcpu, val);
6826                 break;
6827         case 4:
6828                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6829                 break;
6830         case 8:
6831                 res = kvm_set_cr8(vcpu, val);
6832                 break;
6833         default:
6834                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6835                 res = -1;
6836         }
6837
6838         return res;
6839 }
6840
6841 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6842 {
6843         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6844 }
6845
6846 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6847 {
6848         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6849 }
6850
6851 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6852 {
6853         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6854 }
6855
6856 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6857 {
6858         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6859 }
6860
6861 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6862 {
6863         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6864 }
6865
6866 static unsigned long emulator_get_cached_segment_base(
6867         struct x86_emulate_ctxt *ctxt, int seg)
6868 {
6869         return get_segment_base(emul_to_vcpu(ctxt), seg);
6870 }
6871
6872 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6873                                  struct desc_struct *desc, u32 *base3,
6874                                  int seg)
6875 {
6876         struct kvm_segment var;
6877
6878         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6879         *selector = var.selector;
6880
6881         if (var.unusable) {
6882                 memset(desc, 0, sizeof(*desc));
6883                 if (base3)
6884                         *base3 = 0;
6885                 return false;
6886         }
6887
6888         if (var.g)
6889                 var.limit >>= 12;
6890         set_desc_limit(desc, var.limit);
6891         set_desc_base(desc, (unsigned long)var.base);
6892 #ifdef CONFIG_X86_64
6893         if (base3)
6894                 *base3 = var.base >> 32;
6895 #endif
6896         desc->type = var.type;
6897         desc->s = var.s;
6898         desc->dpl = var.dpl;
6899         desc->p = var.present;
6900         desc->avl = var.avl;
6901         desc->l = var.l;
6902         desc->d = var.db;
6903         desc->g = var.g;
6904
6905         return true;
6906 }
6907
6908 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6909                                  struct desc_struct *desc, u32 base3,
6910                                  int seg)
6911 {
6912         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6913         struct kvm_segment var;
6914
6915         var.selector = selector;
6916         var.base = get_desc_base(desc);
6917 #ifdef CONFIG_X86_64
6918         var.base |= ((u64)base3) << 32;
6919 #endif
6920         var.limit = get_desc_limit(desc);
6921         if (desc->g)
6922                 var.limit = (var.limit << 12) | 0xfff;
6923         var.type = desc->type;
6924         var.dpl = desc->dpl;
6925         var.db = desc->d;
6926         var.s = desc->s;
6927         var.l = desc->l;
6928         var.g = desc->g;
6929         var.avl = desc->avl;
6930         var.present = desc->p;
6931         var.unusable = !var.present;
6932         var.padding = 0;
6933
6934         kvm_set_segment(vcpu, &var, seg);
6935         return;
6936 }
6937
6938 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6939                             u32 msr_index, u64 *pdata)
6940 {
6941         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6942         int r;
6943
6944         r = kvm_get_msr(vcpu, msr_index, pdata);
6945
6946         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6947                 /* Bounce to user space */
6948                 return X86EMUL_IO_NEEDED;
6949         }
6950
6951         return r;
6952 }
6953
6954 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6955                             u32 msr_index, u64 data)
6956 {
6957         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6958         int r;
6959
6960         r = kvm_set_msr(vcpu, msr_index, data);
6961
6962         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6963                 /* Bounce to user space */
6964                 return X86EMUL_IO_NEEDED;
6965         }
6966
6967         return r;
6968 }
6969
6970 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6971 {
6972         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6973
6974         return vcpu->arch.smbase;
6975 }
6976
6977 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6978 {
6979         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6980
6981         vcpu->arch.smbase = smbase;
6982 }
6983
6984 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6985                               u32 pmc)
6986 {
6987         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6988 }
6989
6990 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6991                              u32 pmc, u64 *pdata)
6992 {
6993         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6994 }
6995
6996 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6997 {
6998         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6999 }
7000
7001 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7002                               struct x86_instruction_info *info,
7003                               enum x86_intercept_stage stage)
7004 {
7005         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7006                                             &ctxt->exception);
7007 }
7008
7009 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7010                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7011                               bool exact_only)
7012 {
7013         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7014 }
7015
7016 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7017 {
7018         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7019 }
7020
7021 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7022 {
7023         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7024 }
7025
7026 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7027 {
7028         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7029 }
7030
7031 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7032 {
7033         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7034 }
7035
7036 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7037 {
7038         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7039 }
7040
7041 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7042 {
7043         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7044 }
7045
7046 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7047 {
7048         return emul_to_vcpu(ctxt)->arch.hflags;
7049 }
7050
7051 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
7052 {
7053         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
7054 }
7055
7056 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
7057                                   const char *smstate)
7058 {
7059         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
7060 }
7061
7062 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7063 {
7064         kvm_smm_changed(emul_to_vcpu(ctxt));
7065 }
7066
7067 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7068 {
7069         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7070 }
7071
7072 static const struct x86_emulate_ops emulate_ops = {
7073         .read_gpr            = emulator_read_gpr,
7074         .write_gpr           = emulator_write_gpr,
7075         .read_std            = emulator_read_std,
7076         .write_std           = emulator_write_std,
7077         .read_phys           = kvm_read_guest_phys_system,
7078         .fetch               = kvm_fetch_guest_virt,
7079         .read_emulated       = emulator_read_emulated,
7080         .write_emulated      = emulator_write_emulated,
7081         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7082         .invlpg              = emulator_invlpg,
7083         .pio_in_emulated     = emulator_pio_in_emulated,
7084         .pio_out_emulated    = emulator_pio_out_emulated,
7085         .get_segment         = emulator_get_segment,
7086         .set_segment         = emulator_set_segment,
7087         .get_cached_segment_base = emulator_get_cached_segment_base,
7088         .get_gdt             = emulator_get_gdt,
7089         .get_idt             = emulator_get_idt,
7090         .set_gdt             = emulator_set_gdt,
7091         .set_idt             = emulator_set_idt,
7092         .get_cr              = emulator_get_cr,
7093         .set_cr              = emulator_set_cr,
7094         .cpl                 = emulator_get_cpl,
7095         .get_dr              = emulator_get_dr,
7096         .set_dr              = emulator_set_dr,
7097         .get_smbase          = emulator_get_smbase,
7098         .set_smbase          = emulator_set_smbase,
7099         .set_msr             = emulator_set_msr,
7100         .get_msr             = emulator_get_msr,
7101         .check_pmc           = emulator_check_pmc,
7102         .read_pmc            = emulator_read_pmc,
7103         .halt                = emulator_halt,
7104         .wbinvd              = emulator_wbinvd,
7105         .fix_hypercall       = emulator_fix_hypercall,
7106         .intercept           = emulator_intercept,
7107         .get_cpuid           = emulator_get_cpuid,
7108         .guest_has_long_mode = emulator_guest_has_long_mode,
7109         .guest_has_movbe     = emulator_guest_has_movbe,
7110         .guest_has_fxsr      = emulator_guest_has_fxsr,
7111         .set_nmi_mask        = emulator_set_nmi_mask,
7112         .get_hflags          = emulator_get_hflags,
7113         .set_hflags          = emulator_set_hflags,
7114         .pre_leave_smm       = emulator_pre_leave_smm,
7115         .post_leave_smm      = emulator_post_leave_smm,
7116         .set_xcr             = emulator_set_xcr,
7117 };
7118
7119 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7120 {
7121         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7122         /*
7123          * an sti; sti; sequence only disable interrupts for the first
7124          * instruction. So, if the last instruction, be it emulated or
7125          * not, left the system with the INT_STI flag enabled, it
7126          * means that the last instruction is an sti. We should not
7127          * leave the flag on in this case. The same goes for mov ss
7128          */
7129         if (int_shadow & mask)
7130                 mask = 0;
7131         if (unlikely(int_shadow || mask)) {
7132                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7133                 if (!mask)
7134                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7135         }
7136 }
7137
7138 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7139 {
7140         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7141         if (ctxt->exception.vector == PF_VECTOR)
7142                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7143
7144         if (ctxt->exception.error_code_valid)
7145                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7146                                       ctxt->exception.error_code);
7147         else
7148                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7149         return false;
7150 }
7151
7152 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7153 {
7154         struct x86_emulate_ctxt *ctxt;
7155
7156         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7157         if (!ctxt) {
7158                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7159                 return NULL;
7160         }
7161
7162         ctxt->vcpu = vcpu;
7163         ctxt->ops = &emulate_ops;
7164         vcpu->arch.emulate_ctxt = ctxt;
7165
7166         return ctxt;
7167 }
7168
7169 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7170 {
7171         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7172         int cs_db, cs_l;
7173
7174         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7175
7176         ctxt->gpa_available = false;
7177         ctxt->eflags = kvm_get_rflags(vcpu);
7178         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7179
7180         ctxt->eip = kvm_rip_read(vcpu);
7181         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7182                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7183                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7184                      cs_db                              ? X86EMUL_MODE_PROT32 :
7185                                                           X86EMUL_MODE_PROT16;
7186         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7187         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7188         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7189
7190         init_decode_cache(ctxt);
7191         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7192 }
7193
7194 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7195 {
7196         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7197         int ret;
7198
7199         init_emulate_ctxt(vcpu);
7200
7201         ctxt->op_bytes = 2;
7202         ctxt->ad_bytes = 2;
7203         ctxt->_eip = ctxt->eip + inc_eip;
7204         ret = emulate_int_real(ctxt, irq);
7205
7206         if (ret != X86EMUL_CONTINUE) {
7207                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7208         } else {
7209                 ctxt->eip = ctxt->_eip;
7210                 kvm_rip_write(vcpu, ctxt->eip);
7211                 kvm_set_rflags(vcpu, ctxt->eflags);
7212         }
7213 }
7214 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7215
7216 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7217 {
7218         ++vcpu->stat.insn_emulation_fail;
7219         trace_kvm_emulate_insn_failed(vcpu);
7220
7221         if (emulation_type & EMULTYPE_VMWARE_GP) {
7222                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7223                 return 1;
7224         }
7225
7226         if (emulation_type & EMULTYPE_SKIP) {
7227                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7228                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7229                 vcpu->run->internal.ndata = 0;
7230                 return 0;
7231         }
7232
7233         kvm_queue_exception(vcpu, UD_VECTOR);
7234
7235         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7236                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7237                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7238                 vcpu->run->internal.ndata = 0;
7239                 return 0;
7240         }
7241
7242         return 1;
7243 }
7244
7245 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7246                                   bool write_fault_to_shadow_pgtable,
7247                                   int emulation_type)
7248 {
7249         gpa_t gpa = cr2_or_gpa;
7250         kvm_pfn_t pfn;
7251
7252         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7253                 return false;
7254
7255         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7256             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7257                 return false;
7258
7259         if (!vcpu->arch.mmu->direct_map) {
7260                 /*
7261                  * Write permission should be allowed since only
7262                  * write access need to be emulated.
7263                  */
7264                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7265
7266                 /*
7267                  * If the mapping is invalid in guest, let cpu retry
7268                  * it to generate fault.
7269                  */
7270                 if (gpa == UNMAPPED_GVA)
7271                         return true;
7272         }
7273
7274         /*
7275          * Do not retry the unhandleable instruction if it faults on the
7276          * readonly host memory, otherwise it will goto a infinite loop:
7277          * retry instruction -> write #PF -> emulation fail -> retry
7278          * instruction -> ...
7279          */
7280         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7281
7282         /*
7283          * If the instruction failed on the error pfn, it can not be fixed,
7284          * report the error to userspace.
7285          */
7286         if (is_error_noslot_pfn(pfn))
7287                 return false;
7288
7289         kvm_release_pfn_clean(pfn);
7290
7291         /* The instructions are well-emulated on direct mmu. */
7292         if (vcpu->arch.mmu->direct_map) {
7293                 unsigned int indirect_shadow_pages;
7294
7295                 write_lock(&vcpu->kvm->mmu_lock);
7296                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7297                 write_unlock(&vcpu->kvm->mmu_lock);
7298
7299                 if (indirect_shadow_pages)
7300                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7301
7302                 return true;
7303         }
7304
7305         /*
7306          * if emulation was due to access to shadowed page table
7307          * and it failed try to unshadow page and re-enter the
7308          * guest to let CPU execute the instruction.
7309          */
7310         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7311
7312         /*
7313          * If the access faults on its page table, it can not
7314          * be fixed by unprotecting shadow page and it should
7315          * be reported to userspace.
7316          */
7317         return !write_fault_to_shadow_pgtable;
7318 }
7319
7320 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7321                               gpa_t cr2_or_gpa,  int emulation_type)
7322 {
7323         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7324         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7325
7326         last_retry_eip = vcpu->arch.last_retry_eip;
7327         last_retry_addr = vcpu->arch.last_retry_addr;
7328
7329         /*
7330          * If the emulation is caused by #PF and it is non-page_table
7331          * writing instruction, it means the VM-EXIT is caused by shadow
7332          * page protected, we can zap the shadow page and retry this
7333          * instruction directly.
7334          *
7335          * Note: if the guest uses a non-page-table modifying instruction
7336          * on the PDE that points to the instruction, then we will unmap
7337          * the instruction and go to an infinite loop. So, we cache the
7338          * last retried eip and the last fault address, if we meet the eip
7339          * and the address again, we can break out of the potential infinite
7340          * loop.
7341          */
7342         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7343
7344         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7345                 return false;
7346
7347         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7348             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7349                 return false;
7350
7351         if (x86_page_table_writing_insn(ctxt))
7352                 return false;
7353
7354         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7355                 return false;
7356
7357         vcpu->arch.last_retry_eip = ctxt->eip;
7358         vcpu->arch.last_retry_addr = cr2_or_gpa;
7359
7360         if (!vcpu->arch.mmu->direct_map)
7361                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7362
7363         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7364
7365         return true;
7366 }
7367
7368 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7369 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7370
7371 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7372 {
7373         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7374                 /* This is a good place to trace that we are exiting SMM.  */
7375                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7376
7377                 /* Process a latched INIT or SMI, if any.  */
7378                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7379         }
7380
7381         kvm_mmu_reset_context(vcpu);
7382 }
7383
7384 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7385                                 unsigned long *db)
7386 {
7387         u32 dr6 = 0;
7388         int i;
7389         u32 enable, rwlen;
7390
7391         enable = dr7;
7392         rwlen = dr7 >> 16;
7393         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7394                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7395                         dr6 |= (1 << i);
7396         return dr6;
7397 }
7398
7399 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7400 {
7401         struct kvm_run *kvm_run = vcpu->run;
7402
7403         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7404                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7405                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7406                 kvm_run->debug.arch.exception = DB_VECTOR;
7407                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7408                 return 0;
7409         }
7410         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7411         return 1;
7412 }
7413
7414 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7415 {
7416         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7417         int r;
7418
7419         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7420         if (unlikely(!r))
7421                 return 0;
7422
7423         /*
7424          * rflags is the old, "raw" value of the flags.  The new value has
7425          * not been saved yet.
7426          *
7427          * This is correct even for TF set by the guest, because "the
7428          * processor will not generate this exception after the instruction
7429          * that sets the TF flag".
7430          */
7431         if (unlikely(rflags & X86_EFLAGS_TF))
7432                 r = kvm_vcpu_do_singlestep(vcpu);
7433         return r;
7434 }
7435 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7436
7437 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7438 {
7439         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7440             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7441                 struct kvm_run *kvm_run = vcpu->run;
7442                 unsigned long eip = kvm_get_linear_rip(vcpu);
7443                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7444                                            vcpu->arch.guest_debug_dr7,
7445                                            vcpu->arch.eff_db);
7446
7447                 if (dr6 != 0) {
7448                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7449                         kvm_run->debug.arch.pc = eip;
7450                         kvm_run->debug.arch.exception = DB_VECTOR;
7451                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7452                         *r = 0;
7453                         return true;
7454                 }
7455         }
7456
7457         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7458             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7459                 unsigned long eip = kvm_get_linear_rip(vcpu);
7460                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7461                                            vcpu->arch.dr7,
7462                                            vcpu->arch.db);
7463
7464                 if (dr6 != 0) {
7465                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7466                         *r = 1;
7467                         return true;
7468                 }
7469         }
7470
7471         return false;
7472 }
7473
7474 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7475 {
7476         switch (ctxt->opcode_len) {
7477         case 1:
7478                 switch (ctxt->b) {
7479                 case 0xe4:      /* IN */
7480                 case 0xe5:
7481                 case 0xec:
7482                 case 0xed:
7483                 case 0xe6:      /* OUT */
7484                 case 0xe7:
7485                 case 0xee:
7486                 case 0xef:
7487                 case 0x6c:      /* INS */
7488                 case 0x6d:
7489                 case 0x6e:      /* OUTS */
7490                 case 0x6f:
7491                         return true;
7492                 }
7493                 break;
7494         case 2:
7495                 switch (ctxt->b) {
7496                 case 0x33:      /* RDPMC */
7497                         return true;
7498                 }
7499                 break;
7500         }
7501
7502         return false;
7503 }
7504
7505 /*
7506  * Decode to be emulated instruction. Return EMULATION_OK if success.
7507  */
7508 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7509                                     void *insn, int insn_len)
7510 {
7511         int r = EMULATION_OK;
7512         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7513
7514         init_emulate_ctxt(vcpu);
7515
7516         /*
7517          * We will reenter on the same instruction since we do not set
7518          * complete_userspace_io. This does not handle watchpoints yet,
7519          * those would be handled in the emulate_ops.
7520          */
7521         if (!(emulation_type & EMULTYPE_SKIP) &&
7522             kvm_vcpu_check_breakpoint(vcpu, &r))
7523                 return r;
7524
7525         ctxt->interruptibility = 0;
7526         ctxt->have_exception = false;
7527         ctxt->exception.vector = -1;
7528         ctxt->perm_ok = false;
7529
7530         ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7531
7532         r = x86_decode_insn(ctxt, insn, insn_len);
7533
7534         trace_kvm_emulate_insn_start(vcpu);
7535         ++vcpu->stat.insn_emulation;
7536
7537         return r;
7538 }
7539 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7540
7541 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7542                             int emulation_type, void *insn, int insn_len)
7543 {
7544         int r;
7545         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7546         bool writeback = true;
7547         bool write_fault_to_spt;
7548
7549         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7550                 return 1;
7551
7552         vcpu->arch.l1tf_flush_l1d = true;
7553
7554         /*
7555          * Clear write_fault_to_shadow_pgtable here to ensure it is
7556          * never reused.
7557          */
7558         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7559         vcpu->arch.write_fault_to_shadow_pgtable = false;
7560
7561         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7562                 kvm_clear_exception_queue(vcpu);
7563
7564                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7565                                                     insn, insn_len);
7566                 if (r != EMULATION_OK)  {
7567                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7568                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7569                                 kvm_queue_exception(vcpu, UD_VECTOR);
7570                                 return 1;
7571                         }
7572                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7573                                                   write_fault_to_spt,
7574                                                   emulation_type))
7575                                 return 1;
7576                         if (ctxt->have_exception) {
7577                                 /*
7578                                  * #UD should result in just EMULATION_FAILED, and trap-like
7579                                  * exception should not be encountered during decode.
7580                                  */
7581                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7582                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7583                                 inject_emulated_exception(vcpu);
7584                                 return 1;
7585                         }
7586                         return handle_emulation_failure(vcpu, emulation_type);
7587                 }
7588         }
7589
7590         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7591             !is_vmware_backdoor_opcode(ctxt)) {
7592                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7593                 return 1;
7594         }
7595
7596         /*
7597          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7598          * for kvm_skip_emulated_instruction().  The caller is responsible for
7599          * updating interruptibility state and injecting single-step #DBs.
7600          */
7601         if (emulation_type & EMULTYPE_SKIP) {
7602                 kvm_rip_write(vcpu, ctxt->_eip);
7603                 if (ctxt->eflags & X86_EFLAGS_RF)
7604                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7605                 return 1;
7606         }
7607
7608         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7609                 return 1;
7610
7611         /* this is needed for vmware backdoor interface to work since it
7612            changes registers values  during IO operation */
7613         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7614                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7615                 emulator_invalidate_register_cache(ctxt);
7616         }
7617
7618 restart:
7619         if (emulation_type & EMULTYPE_PF) {
7620                 /* Save the faulting GPA (cr2) in the address field */
7621                 ctxt->exception.address = cr2_or_gpa;
7622
7623                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7624                 if (vcpu->arch.mmu->direct_map) {
7625                         ctxt->gpa_available = true;
7626                         ctxt->gpa_val = cr2_or_gpa;
7627                 }
7628         } else {
7629                 /* Sanitize the address out of an abundance of paranoia. */
7630                 ctxt->exception.address = 0;
7631         }
7632
7633         r = x86_emulate_insn(ctxt);
7634
7635         if (r == EMULATION_INTERCEPTED)
7636                 return 1;
7637
7638         if (r == EMULATION_FAILED) {
7639                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7640                                         emulation_type))
7641                         return 1;
7642
7643                 return handle_emulation_failure(vcpu, emulation_type);
7644         }
7645
7646         if (ctxt->have_exception) {
7647                 r = 1;
7648                 if (inject_emulated_exception(vcpu))
7649                         return r;
7650         } else if (vcpu->arch.pio.count) {
7651                 if (!vcpu->arch.pio.in) {
7652                         /* FIXME: return into emulator if single-stepping.  */
7653                         vcpu->arch.pio.count = 0;
7654                 } else {
7655                         writeback = false;
7656                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7657                 }
7658                 r = 0;
7659         } else if (vcpu->mmio_needed) {
7660                 ++vcpu->stat.mmio_exits;
7661
7662                 if (!vcpu->mmio_is_write)
7663                         writeback = false;
7664                 r = 0;
7665                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7666         } else if (r == EMULATION_RESTART)
7667                 goto restart;
7668         else
7669                 r = 1;
7670
7671         if (writeback) {
7672                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7673                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7674                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7675                 if (!ctxt->have_exception ||
7676                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7677                         kvm_rip_write(vcpu, ctxt->eip);
7678                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7679                                 r = kvm_vcpu_do_singlestep(vcpu);
7680                         if (kvm_x86_ops.update_emulated_instruction)
7681                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7682                         __kvm_set_rflags(vcpu, ctxt->eflags);
7683                 }
7684
7685                 /*
7686                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7687                  * do nothing, and it will be requested again as soon as
7688                  * the shadow expires.  But we still need to check here,
7689                  * because POPF has no interrupt shadow.
7690                  */
7691                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7692                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7693         } else
7694                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7695
7696         return r;
7697 }
7698
7699 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7700 {
7701         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7702 }
7703 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7704
7705 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7706                                         void *insn, int insn_len)
7707 {
7708         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7709 }
7710 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7711
7712 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7713 {
7714         vcpu->arch.pio.count = 0;
7715         return 1;
7716 }
7717
7718 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7719 {
7720         vcpu->arch.pio.count = 0;
7721
7722         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7723                 return 1;
7724
7725         return kvm_skip_emulated_instruction(vcpu);
7726 }
7727
7728 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7729                             unsigned short port)
7730 {
7731         unsigned long val = kvm_rax_read(vcpu);
7732         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7733
7734         if (ret)
7735                 return ret;
7736
7737         /*
7738          * Workaround userspace that relies on old KVM behavior of %rip being
7739          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7740          */
7741         if (port == 0x7e &&
7742             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7743                 vcpu->arch.complete_userspace_io =
7744                         complete_fast_pio_out_port_0x7e;
7745                 kvm_skip_emulated_instruction(vcpu);
7746         } else {
7747                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7748                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7749         }
7750         return 0;
7751 }
7752
7753 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7754 {
7755         unsigned long val;
7756
7757         /* We should only ever be called with arch.pio.count equal to 1 */
7758         BUG_ON(vcpu->arch.pio.count != 1);
7759
7760         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7761                 vcpu->arch.pio.count = 0;
7762                 return 1;
7763         }
7764
7765         /* For size less than 4 we merge, else we zero extend */
7766         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7767
7768         /*
7769          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7770          * the copy and tracing
7771          */
7772         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7773         kvm_rax_write(vcpu, val);
7774
7775         return kvm_skip_emulated_instruction(vcpu);
7776 }
7777
7778 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7779                            unsigned short port)
7780 {
7781         unsigned long val;
7782         int ret;
7783
7784         /* For size less than 4 we merge, else we zero extend */
7785         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7786
7787         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7788         if (ret) {
7789                 kvm_rax_write(vcpu, val);
7790                 return ret;
7791         }
7792
7793         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7794         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7795
7796         return 0;
7797 }
7798
7799 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7800 {
7801         int ret;
7802
7803         if (in)
7804                 ret = kvm_fast_pio_in(vcpu, size, port);
7805         else
7806                 ret = kvm_fast_pio_out(vcpu, size, port);
7807         return ret && kvm_skip_emulated_instruction(vcpu);
7808 }
7809 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7810
7811 static int kvmclock_cpu_down_prep(unsigned int cpu)
7812 {
7813         __this_cpu_write(cpu_tsc_khz, 0);
7814         return 0;
7815 }
7816
7817 static void tsc_khz_changed(void *data)
7818 {
7819         struct cpufreq_freqs *freq = data;
7820         unsigned long khz = 0;
7821
7822         if (data)
7823                 khz = freq->new;
7824         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7825                 khz = cpufreq_quick_get(raw_smp_processor_id());
7826         if (!khz)
7827                 khz = tsc_khz;
7828         __this_cpu_write(cpu_tsc_khz, khz);
7829 }
7830
7831 #ifdef CONFIG_X86_64
7832 static void kvm_hyperv_tsc_notifier(void)
7833 {
7834         struct kvm *kvm;
7835         struct kvm_vcpu *vcpu;
7836         int cpu;
7837         unsigned long flags;
7838
7839         mutex_lock(&kvm_lock);
7840         list_for_each_entry(kvm, &vm_list, vm_list)
7841                 kvm_make_mclock_inprogress_request(kvm);
7842
7843         hyperv_stop_tsc_emulation();
7844
7845         /* TSC frequency always matches when on Hyper-V */
7846         for_each_present_cpu(cpu)
7847                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7848         kvm_max_guest_tsc_khz = tsc_khz;
7849
7850         list_for_each_entry(kvm, &vm_list, vm_list) {
7851                 struct kvm_arch *ka = &kvm->arch;
7852
7853                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
7854                 pvclock_update_vm_gtod_copy(kvm);
7855                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
7856
7857                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7858                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7859
7860                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7861                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7862         }
7863         mutex_unlock(&kvm_lock);
7864 }
7865 #endif
7866
7867 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7868 {
7869         struct kvm *kvm;
7870         struct kvm_vcpu *vcpu;
7871         int i, send_ipi = 0;
7872
7873         /*
7874          * We allow guests to temporarily run on slowing clocks,
7875          * provided we notify them after, or to run on accelerating
7876          * clocks, provided we notify them before.  Thus time never
7877          * goes backwards.
7878          *
7879          * However, we have a problem.  We can't atomically update
7880          * the frequency of a given CPU from this function; it is
7881          * merely a notifier, which can be called from any CPU.
7882          * Changing the TSC frequency at arbitrary points in time
7883          * requires a recomputation of local variables related to
7884          * the TSC for each VCPU.  We must flag these local variables
7885          * to be updated and be sure the update takes place with the
7886          * new frequency before any guests proceed.
7887          *
7888          * Unfortunately, the combination of hotplug CPU and frequency
7889          * change creates an intractable locking scenario; the order
7890          * of when these callouts happen is undefined with respect to
7891          * CPU hotplug, and they can race with each other.  As such,
7892          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7893          * undefined; you can actually have a CPU frequency change take
7894          * place in between the computation of X and the setting of the
7895          * variable.  To protect against this problem, all updates of
7896          * the per_cpu tsc_khz variable are done in an interrupt
7897          * protected IPI, and all callers wishing to update the value
7898          * must wait for a synchronous IPI to complete (which is trivial
7899          * if the caller is on the CPU already).  This establishes the
7900          * necessary total order on variable updates.
7901          *
7902          * Note that because a guest time update may take place
7903          * anytime after the setting of the VCPU's request bit, the
7904          * correct TSC value must be set before the request.  However,
7905          * to ensure the update actually makes it to any guest which
7906          * starts running in hardware virtualization between the set
7907          * and the acquisition of the spinlock, we must also ping the
7908          * CPU after setting the request bit.
7909          *
7910          */
7911
7912         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7913
7914         mutex_lock(&kvm_lock);
7915         list_for_each_entry(kvm, &vm_list, vm_list) {
7916                 kvm_for_each_vcpu(i, vcpu, kvm) {
7917                         if (vcpu->cpu != cpu)
7918                                 continue;
7919                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7920                         if (vcpu->cpu != raw_smp_processor_id())
7921                                 send_ipi = 1;
7922                 }
7923         }
7924         mutex_unlock(&kvm_lock);
7925
7926         if (freq->old < freq->new && send_ipi) {
7927                 /*
7928                  * We upscale the frequency.  Must make the guest
7929                  * doesn't see old kvmclock values while running with
7930                  * the new frequency, otherwise we risk the guest sees
7931                  * time go backwards.
7932                  *
7933                  * In case we update the frequency for another cpu
7934                  * (which might be in guest context) send an interrupt
7935                  * to kick the cpu out of guest context.  Next time
7936                  * guest context is entered kvmclock will be updated,
7937                  * so the guest will not see stale values.
7938                  */
7939                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7940         }
7941 }
7942
7943 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7944                                      void *data)
7945 {
7946         struct cpufreq_freqs *freq = data;
7947         int cpu;
7948
7949         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7950                 return 0;
7951         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7952                 return 0;
7953
7954         for_each_cpu(cpu, freq->policy->cpus)
7955                 __kvmclock_cpufreq_notifier(freq, cpu);
7956
7957         return 0;
7958 }
7959
7960 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7961         .notifier_call  = kvmclock_cpufreq_notifier
7962 };
7963
7964 static int kvmclock_cpu_online(unsigned int cpu)
7965 {
7966         tsc_khz_changed(NULL);
7967         return 0;
7968 }
7969
7970 static void kvm_timer_init(void)
7971 {
7972         max_tsc_khz = tsc_khz;
7973
7974         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7975 #ifdef CONFIG_CPU_FREQ
7976                 struct cpufreq_policy *policy;
7977                 int cpu;
7978
7979                 cpu = get_cpu();
7980                 policy = cpufreq_cpu_get(cpu);
7981                 if (policy) {
7982                         if (policy->cpuinfo.max_freq)
7983                                 max_tsc_khz = policy->cpuinfo.max_freq;
7984                         cpufreq_cpu_put(policy);
7985                 }
7986                 put_cpu();
7987 #endif
7988                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7989                                           CPUFREQ_TRANSITION_NOTIFIER);
7990         }
7991
7992         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7993                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7994 }
7995
7996 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7997 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7998
7999 int kvm_is_in_guest(void)
8000 {
8001         return __this_cpu_read(current_vcpu) != NULL;
8002 }
8003
8004 static int kvm_is_user_mode(void)
8005 {
8006         int user_mode = 3;
8007
8008         if (__this_cpu_read(current_vcpu))
8009                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8010
8011         return user_mode != 0;
8012 }
8013
8014 static unsigned long kvm_get_guest_ip(void)
8015 {
8016         unsigned long ip = 0;
8017
8018         if (__this_cpu_read(current_vcpu))
8019                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8020
8021         return ip;
8022 }
8023
8024 static void kvm_handle_intel_pt_intr(void)
8025 {
8026         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8027
8028         kvm_make_request(KVM_REQ_PMI, vcpu);
8029         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8030                         (unsigned long *)&vcpu->arch.pmu.global_status);
8031 }
8032
8033 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8034         .is_in_guest            = kvm_is_in_guest,
8035         .is_user_mode           = kvm_is_user_mode,
8036         .get_guest_ip           = kvm_get_guest_ip,
8037         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8038 };
8039
8040 #ifdef CONFIG_X86_64
8041 static void pvclock_gtod_update_fn(struct work_struct *work)
8042 {
8043         struct kvm *kvm;
8044
8045         struct kvm_vcpu *vcpu;
8046         int i;
8047
8048         mutex_lock(&kvm_lock);
8049         list_for_each_entry(kvm, &vm_list, vm_list)
8050                 kvm_for_each_vcpu(i, vcpu, kvm)
8051                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8052         atomic_set(&kvm_guest_has_master_clock, 0);
8053         mutex_unlock(&kvm_lock);
8054 }
8055
8056 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8057
8058 /*
8059  * Notification about pvclock gtod data update.
8060  */
8061 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8062                                void *priv)
8063 {
8064         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8065         struct timekeeper *tk = priv;
8066
8067         update_pvclock_gtod(tk);
8068
8069         /* disable master clock if host does not trust, or does not
8070          * use, TSC based clocksource.
8071          */
8072         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8073             atomic_read(&kvm_guest_has_master_clock) != 0)
8074                 queue_work(system_long_wq, &pvclock_gtod_work);
8075
8076         return 0;
8077 }
8078
8079 static struct notifier_block pvclock_gtod_notifier = {
8080         .notifier_call = pvclock_gtod_notify,
8081 };
8082 #endif
8083
8084 int kvm_arch_init(void *opaque)
8085 {
8086         struct kvm_x86_init_ops *ops = opaque;
8087         int r;
8088
8089         if (kvm_x86_ops.hardware_enable) {
8090                 printk(KERN_ERR "kvm: already loaded the other module\n");
8091                 r = -EEXIST;
8092                 goto out;
8093         }
8094
8095         if (!ops->cpu_has_kvm_support()) {
8096                 pr_err_ratelimited("kvm: no hardware support\n");
8097                 r = -EOPNOTSUPP;
8098                 goto out;
8099         }
8100         if (ops->disabled_by_bios()) {
8101                 pr_err_ratelimited("kvm: disabled by bios\n");
8102                 r = -EOPNOTSUPP;
8103                 goto out;
8104         }
8105
8106         /*
8107          * KVM explicitly assumes that the guest has an FPU and
8108          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8109          * vCPU's FPU state as a fxregs_state struct.
8110          */
8111         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8112                 printk(KERN_ERR "kvm: inadequate fpu\n");
8113                 r = -EOPNOTSUPP;
8114                 goto out;
8115         }
8116
8117         r = -ENOMEM;
8118         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8119                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8120                                           NULL);
8121         if (!x86_fpu_cache) {
8122                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8123                 goto out;
8124         }
8125
8126         x86_emulator_cache = kvm_alloc_emulator_cache();
8127         if (!x86_emulator_cache) {
8128                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8129                 goto out_free_x86_fpu_cache;
8130         }
8131
8132         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8133         if (!user_return_msrs) {
8134                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8135                 goto out_free_x86_emulator_cache;
8136         }
8137         kvm_nr_uret_msrs = 0;
8138
8139         r = kvm_mmu_module_init();
8140         if (r)
8141                 goto out_free_percpu;
8142
8143         kvm_timer_init();
8144
8145         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8146
8147         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8148                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8149                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8150         }
8151
8152         if (pi_inject_timer == -1)
8153                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8154 #ifdef CONFIG_X86_64
8155         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8156
8157         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8158                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8159 #endif
8160
8161         return 0;
8162
8163 out_free_percpu:
8164         free_percpu(user_return_msrs);
8165 out_free_x86_emulator_cache:
8166         kmem_cache_destroy(x86_emulator_cache);
8167 out_free_x86_fpu_cache:
8168         kmem_cache_destroy(x86_fpu_cache);
8169 out:
8170         return r;
8171 }
8172
8173 void kvm_arch_exit(void)
8174 {
8175 #ifdef CONFIG_X86_64
8176         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8177                 clear_hv_tscchange_cb();
8178 #endif
8179         kvm_lapic_exit();
8180         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8181
8182         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8183                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8184                                             CPUFREQ_TRANSITION_NOTIFIER);
8185         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8186 #ifdef CONFIG_X86_64
8187         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8188 #endif
8189         kvm_x86_ops.hardware_enable = NULL;
8190         kvm_mmu_module_exit();
8191         free_percpu(user_return_msrs);
8192         kmem_cache_destroy(x86_fpu_cache);
8193 #ifdef CONFIG_KVM_XEN
8194         static_key_deferred_flush(&kvm_xen_enabled);
8195         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8196 #endif
8197 }
8198
8199 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8200 {
8201         ++vcpu->stat.halt_exits;
8202         if (lapic_in_kernel(vcpu)) {
8203                 vcpu->arch.mp_state = state;
8204                 return 1;
8205         } else {
8206                 vcpu->run->exit_reason = reason;
8207                 return 0;
8208         }
8209 }
8210
8211 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8212 {
8213         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8214 }
8215 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8216
8217 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8218 {
8219         int ret = kvm_skip_emulated_instruction(vcpu);
8220         /*
8221          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8222          * KVM_EXIT_DEBUG here.
8223          */
8224         return kvm_vcpu_halt(vcpu) && ret;
8225 }
8226 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8227
8228 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8229 {
8230         int ret = kvm_skip_emulated_instruction(vcpu);
8231
8232         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8233 }
8234 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8235
8236 #ifdef CONFIG_X86_64
8237 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8238                                 unsigned long clock_type)
8239 {
8240         struct kvm_clock_pairing clock_pairing;
8241         struct timespec64 ts;
8242         u64 cycle;
8243         int ret;
8244
8245         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8246                 return -KVM_EOPNOTSUPP;
8247
8248         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8249                 return -KVM_EOPNOTSUPP;
8250
8251         clock_pairing.sec = ts.tv_sec;
8252         clock_pairing.nsec = ts.tv_nsec;
8253         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8254         clock_pairing.flags = 0;
8255         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8256
8257         ret = 0;
8258         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8259                             sizeof(struct kvm_clock_pairing)))
8260                 ret = -KVM_EFAULT;
8261
8262         return ret;
8263 }
8264 #endif
8265
8266 /*
8267  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8268  *
8269  * @apicid - apicid of vcpu to be kicked.
8270  */
8271 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8272 {
8273         struct kvm_lapic_irq lapic_irq;
8274
8275         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8276         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8277         lapic_irq.level = 0;
8278         lapic_irq.dest_id = apicid;
8279         lapic_irq.msi_redir_hint = false;
8280
8281         lapic_irq.delivery_mode = APIC_DM_REMRD;
8282         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8283 }
8284
8285 bool kvm_apicv_activated(struct kvm *kvm)
8286 {
8287         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8288 }
8289 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8290
8291 void kvm_apicv_init(struct kvm *kvm, bool enable)
8292 {
8293         if (enable)
8294                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8295                           &kvm->arch.apicv_inhibit_reasons);
8296         else
8297                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8298                         &kvm->arch.apicv_inhibit_reasons);
8299 }
8300 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8301
8302 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8303 {
8304         struct kvm_vcpu *target = NULL;
8305         struct kvm_apic_map *map;
8306
8307         vcpu->stat.directed_yield_attempted++;
8308
8309         rcu_read_lock();
8310         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8311
8312         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8313                 target = map->phys_map[dest_id]->vcpu;
8314
8315         rcu_read_unlock();
8316
8317         if (!target || !READ_ONCE(target->ready))
8318                 goto no_yield;
8319
8320         /* Ignore requests to yield to self */
8321         if (vcpu == target)
8322                 goto no_yield;
8323
8324         if (kvm_vcpu_yield_to(target) <= 0)
8325                 goto no_yield;
8326
8327         vcpu->stat.directed_yield_successful++;
8328
8329 no_yield:
8330         return;
8331 }
8332
8333 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8334 {
8335         unsigned long nr, a0, a1, a2, a3, ret;
8336         int op_64_bit;
8337
8338         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8339                 return kvm_xen_hypercall(vcpu);
8340
8341         if (kvm_hv_hypercall_enabled(vcpu))
8342                 return kvm_hv_hypercall(vcpu);
8343
8344         nr = kvm_rax_read(vcpu);
8345         a0 = kvm_rbx_read(vcpu);
8346         a1 = kvm_rcx_read(vcpu);
8347         a2 = kvm_rdx_read(vcpu);
8348         a3 = kvm_rsi_read(vcpu);
8349
8350         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8351
8352         op_64_bit = is_64_bit_mode(vcpu);
8353         if (!op_64_bit) {
8354                 nr &= 0xFFFFFFFF;
8355                 a0 &= 0xFFFFFFFF;
8356                 a1 &= 0xFFFFFFFF;
8357                 a2 &= 0xFFFFFFFF;
8358                 a3 &= 0xFFFFFFFF;
8359         }
8360
8361         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8362                 ret = -KVM_EPERM;
8363                 goto out;
8364         }
8365
8366         ret = -KVM_ENOSYS;
8367
8368         switch (nr) {
8369         case KVM_HC_VAPIC_POLL_IRQ:
8370                 ret = 0;
8371                 break;
8372         case KVM_HC_KICK_CPU:
8373                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8374                         break;
8375
8376                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8377                 kvm_sched_yield(vcpu, a1);
8378                 ret = 0;
8379                 break;
8380 #ifdef CONFIG_X86_64
8381         case KVM_HC_CLOCK_PAIRING:
8382                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8383                 break;
8384 #endif
8385         case KVM_HC_SEND_IPI:
8386                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8387                         break;
8388
8389                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8390                 break;
8391         case KVM_HC_SCHED_YIELD:
8392                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8393                         break;
8394
8395                 kvm_sched_yield(vcpu, a0);
8396                 ret = 0;
8397                 break;
8398         default:
8399                 ret = -KVM_ENOSYS;
8400                 break;
8401         }
8402 out:
8403         if (!op_64_bit)
8404                 ret = (u32)ret;
8405         kvm_rax_write(vcpu, ret);
8406
8407         ++vcpu->stat.hypercalls;
8408         return kvm_skip_emulated_instruction(vcpu);
8409 }
8410 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8411
8412 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8413 {
8414         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8415         char instruction[3];
8416         unsigned long rip = kvm_rip_read(vcpu);
8417
8418         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8419
8420         return emulator_write_emulated(ctxt, rip, instruction, 3,
8421                 &ctxt->exception);
8422 }
8423
8424 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8425 {
8426         return vcpu->run->request_interrupt_window &&
8427                 likely(!pic_in_kernel(vcpu->kvm));
8428 }
8429
8430 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8431 {
8432         struct kvm_run *kvm_run = vcpu->run;
8433
8434         /*
8435          * if_flag is obsolete and useless, so do not bother
8436          * setting it for SEV-ES guests.  Userspace can just
8437          * use kvm_run->ready_for_interrupt_injection.
8438          */
8439         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8440                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8441
8442         kvm_run->cr8 = kvm_get_cr8(vcpu);
8443         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8444         kvm_run->ready_for_interrupt_injection =
8445                 pic_in_kernel(vcpu->kvm) ||
8446                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8447
8448         if (is_smm(vcpu))
8449                 kvm_run->flags |= KVM_RUN_X86_SMM;
8450 }
8451
8452 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8453 {
8454         int max_irr, tpr;
8455
8456         if (!kvm_x86_ops.update_cr8_intercept)
8457                 return;
8458
8459         if (!lapic_in_kernel(vcpu))
8460                 return;
8461
8462         if (vcpu->arch.apicv_active)
8463                 return;
8464
8465         if (!vcpu->arch.apic->vapic_addr)
8466                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8467         else
8468                 max_irr = -1;
8469
8470         if (max_irr != -1)
8471                 max_irr >>= 4;
8472
8473         tpr = kvm_lapic_get_cr8(vcpu);
8474
8475         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8476 }
8477
8478
8479 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8480 {
8481         if (WARN_ON_ONCE(!is_guest_mode(vcpu)))
8482                 return -EIO;
8483
8484         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8485                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8486                 return 1;
8487         }
8488
8489         return kvm_x86_ops.nested_ops->check_events(vcpu);
8490 }
8491
8492 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8493 {
8494         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8495                 vcpu->arch.exception.error_code = false;
8496         static_call(kvm_x86_queue_exception)(vcpu);
8497 }
8498
8499 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8500 {
8501         int r;
8502         bool can_inject = true;
8503
8504         /* try to reinject previous events if any */
8505
8506         if (vcpu->arch.exception.injected) {
8507                 kvm_inject_exception(vcpu);
8508                 can_inject = false;
8509         }
8510         /*
8511          * Do not inject an NMI or interrupt if there is a pending
8512          * exception.  Exceptions and interrupts are recognized at
8513          * instruction boundaries, i.e. the start of an instruction.
8514          * Trap-like exceptions, e.g. #DB, have higher priority than
8515          * NMIs and interrupts, i.e. traps are recognized before an
8516          * NMI/interrupt that's pending on the same instruction.
8517          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8518          * priority, but are only generated (pended) during instruction
8519          * execution, i.e. a pending fault-like exception means the
8520          * fault occurred on the *previous* instruction and must be
8521          * serviced prior to recognizing any new events in order to
8522          * fully complete the previous instruction.
8523          */
8524         else if (!vcpu->arch.exception.pending) {
8525                 if (vcpu->arch.nmi_injected) {
8526                         static_call(kvm_x86_set_nmi)(vcpu);
8527                         can_inject = false;
8528                 } else if (vcpu->arch.interrupt.injected) {
8529                         static_call(kvm_x86_set_irq)(vcpu);
8530                         can_inject = false;
8531                 }
8532         }
8533
8534         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8535                      vcpu->arch.exception.pending);
8536
8537         /*
8538          * Call check_nested_events() even if we reinjected a previous event
8539          * in order for caller to determine if it should require immediate-exit
8540          * from L2 to L1 due to pending L1 events which require exit
8541          * from L2 to L1.
8542          */
8543         if (is_guest_mode(vcpu)) {
8544                 r = kvm_check_nested_events(vcpu);
8545                 if (r < 0)
8546                         goto busy;
8547         }
8548
8549         /* try to inject new event if pending */
8550         if (vcpu->arch.exception.pending) {
8551                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8552                                         vcpu->arch.exception.has_error_code,
8553                                         vcpu->arch.exception.error_code);
8554
8555                 vcpu->arch.exception.pending = false;
8556                 vcpu->arch.exception.injected = true;
8557
8558                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8559                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8560                                              X86_EFLAGS_RF);
8561
8562                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8563                         kvm_deliver_exception_payload(vcpu);
8564                         if (vcpu->arch.dr7 & DR7_GD) {
8565                                 vcpu->arch.dr7 &= ~DR7_GD;
8566                                 kvm_update_dr7(vcpu);
8567                         }
8568                 }
8569
8570                 kvm_inject_exception(vcpu);
8571                 can_inject = false;
8572         }
8573
8574         /*
8575          * Finally, inject interrupt events.  If an event cannot be injected
8576          * due to architectural conditions (e.g. IF=0) a window-open exit
8577          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8578          * and can architecturally be injected, but we cannot do it right now:
8579          * an interrupt could have arrived just now and we have to inject it
8580          * as a vmexit, or there could already an event in the queue, which is
8581          * indicated by can_inject.  In that case we request an immediate exit
8582          * in order to make progress and get back here for another iteration.
8583          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8584          */
8585         if (vcpu->arch.smi_pending) {
8586                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8587                 if (r < 0)
8588                         goto busy;
8589                 if (r) {
8590                         vcpu->arch.smi_pending = false;
8591                         ++vcpu->arch.smi_count;
8592                         enter_smm(vcpu);
8593                         can_inject = false;
8594                 } else
8595                         static_call(kvm_x86_enable_smi_window)(vcpu);
8596         }
8597
8598         if (vcpu->arch.nmi_pending) {
8599                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8600                 if (r < 0)
8601                         goto busy;
8602                 if (r) {
8603                         --vcpu->arch.nmi_pending;
8604                         vcpu->arch.nmi_injected = true;
8605                         static_call(kvm_x86_set_nmi)(vcpu);
8606                         can_inject = false;
8607                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8608                 }
8609                 if (vcpu->arch.nmi_pending)
8610                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8611         }
8612
8613         if (kvm_cpu_has_injectable_intr(vcpu)) {
8614                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8615                 if (r < 0)
8616                         goto busy;
8617                 if (r) {
8618                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8619                         static_call(kvm_x86_set_irq)(vcpu);
8620                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8621                 }
8622                 if (kvm_cpu_has_injectable_intr(vcpu))
8623                         static_call(kvm_x86_enable_irq_window)(vcpu);
8624         }
8625
8626         if (is_guest_mode(vcpu) &&
8627             kvm_x86_ops.nested_ops->hv_timer_pending &&
8628             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8629                 *req_immediate_exit = true;
8630
8631         WARN_ON(vcpu->arch.exception.pending);
8632         return;
8633
8634 busy:
8635         *req_immediate_exit = true;
8636         return;
8637 }
8638
8639 static void process_nmi(struct kvm_vcpu *vcpu)
8640 {
8641         unsigned limit = 2;
8642
8643         /*
8644          * x86 is limited to one NMI running, and one NMI pending after it.
8645          * If an NMI is already in progress, limit further NMIs to just one.
8646          * Otherwise, allow two (and we'll inject the first one immediately).
8647          */
8648         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8649                 limit = 1;
8650
8651         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8652         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8653         kvm_make_request(KVM_REQ_EVENT, vcpu);
8654 }
8655
8656 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8657 {
8658         u32 flags = 0;
8659         flags |= seg->g       << 23;
8660         flags |= seg->db      << 22;
8661         flags |= seg->l       << 21;
8662         flags |= seg->avl     << 20;
8663         flags |= seg->present << 15;
8664         flags |= seg->dpl     << 13;
8665         flags |= seg->s       << 12;
8666         flags |= seg->type    << 8;
8667         return flags;
8668 }
8669
8670 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8671 {
8672         struct kvm_segment seg;
8673         int offset;
8674
8675         kvm_get_segment(vcpu, &seg, n);
8676         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8677
8678         if (n < 3)
8679                 offset = 0x7f84 + n * 12;
8680         else
8681                 offset = 0x7f2c + (n - 3) * 12;
8682
8683         put_smstate(u32, buf, offset + 8, seg.base);
8684         put_smstate(u32, buf, offset + 4, seg.limit);
8685         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8686 }
8687
8688 #ifdef CONFIG_X86_64
8689 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8690 {
8691         struct kvm_segment seg;
8692         int offset;
8693         u16 flags;
8694
8695         kvm_get_segment(vcpu, &seg, n);
8696         offset = 0x7e00 + n * 16;
8697
8698         flags = enter_smm_get_segment_flags(&seg) >> 8;
8699         put_smstate(u16, buf, offset, seg.selector);
8700         put_smstate(u16, buf, offset + 2, flags);
8701         put_smstate(u32, buf, offset + 4, seg.limit);
8702         put_smstate(u64, buf, offset + 8, seg.base);
8703 }
8704 #endif
8705
8706 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8707 {
8708         struct desc_ptr dt;
8709         struct kvm_segment seg;
8710         unsigned long val;
8711         int i;
8712
8713         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8714         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8715         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8716         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8717
8718         for (i = 0; i < 8; i++)
8719                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8720
8721         kvm_get_dr(vcpu, 6, &val);
8722         put_smstate(u32, buf, 0x7fcc, (u32)val);
8723         kvm_get_dr(vcpu, 7, &val);
8724         put_smstate(u32, buf, 0x7fc8, (u32)val);
8725
8726         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8727         put_smstate(u32, buf, 0x7fc4, seg.selector);
8728         put_smstate(u32, buf, 0x7f64, seg.base);
8729         put_smstate(u32, buf, 0x7f60, seg.limit);
8730         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8731
8732         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8733         put_smstate(u32, buf, 0x7fc0, seg.selector);
8734         put_smstate(u32, buf, 0x7f80, seg.base);
8735         put_smstate(u32, buf, 0x7f7c, seg.limit);
8736         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8737
8738         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8739         put_smstate(u32, buf, 0x7f74, dt.address);
8740         put_smstate(u32, buf, 0x7f70, dt.size);
8741
8742         static_call(kvm_x86_get_idt)(vcpu, &dt);
8743         put_smstate(u32, buf, 0x7f58, dt.address);
8744         put_smstate(u32, buf, 0x7f54, dt.size);
8745
8746         for (i = 0; i < 6; i++)
8747                 enter_smm_save_seg_32(vcpu, buf, i);
8748
8749         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8750
8751         /* revision id */
8752         put_smstate(u32, buf, 0x7efc, 0x00020000);
8753         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8754 }
8755
8756 #ifdef CONFIG_X86_64
8757 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8758 {
8759         struct desc_ptr dt;
8760         struct kvm_segment seg;
8761         unsigned long val;
8762         int i;
8763
8764         for (i = 0; i < 16; i++)
8765                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8766
8767         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8768         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8769
8770         kvm_get_dr(vcpu, 6, &val);
8771         put_smstate(u64, buf, 0x7f68, val);
8772         kvm_get_dr(vcpu, 7, &val);
8773         put_smstate(u64, buf, 0x7f60, val);
8774
8775         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8776         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8777         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8778
8779         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8780
8781         /* revision id */
8782         put_smstate(u32, buf, 0x7efc, 0x00020064);
8783
8784         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8785
8786         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8787         put_smstate(u16, buf, 0x7e90, seg.selector);
8788         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8789         put_smstate(u32, buf, 0x7e94, seg.limit);
8790         put_smstate(u64, buf, 0x7e98, seg.base);
8791
8792         static_call(kvm_x86_get_idt)(vcpu, &dt);
8793         put_smstate(u32, buf, 0x7e84, dt.size);
8794         put_smstate(u64, buf, 0x7e88, dt.address);
8795
8796         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8797         put_smstate(u16, buf, 0x7e70, seg.selector);
8798         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8799         put_smstate(u32, buf, 0x7e74, seg.limit);
8800         put_smstate(u64, buf, 0x7e78, seg.base);
8801
8802         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8803         put_smstate(u32, buf, 0x7e64, dt.size);
8804         put_smstate(u64, buf, 0x7e68, dt.address);
8805
8806         for (i = 0; i < 6; i++)
8807                 enter_smm_save_seg_64(vcpu, buf, i);
8808 }
8809 #endif
8810
8811 static void enter_smm(struct kvm_vcpu *vcpu)
8812 {
8813         struct kvm_segment cs, ds;
8814         struct desc_ptr dt;
8815         char buf[512];
8816         u32 cr0;
8817
8818         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8819         memset(buf, 0, 512);
8820 #ifdef CONFIG_X86_64
8821         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8822                 enter_smm_save_state_64(vcpu, buf);
8823         else
8824 #endif
8825                 enter_smm_save_state_32(vcpu, buf);
8826
8827         /*
8828          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8829          * vCPU state (e.g. leave guest mode) after we've saved the state into
8830          * the SMM state-save area.
8831          */
8832         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8833
8834         vcpu->arch.hflags |= HF_SMM_MASK;
8835         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8836
8837         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8838                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8839         else
8840                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8841
8842         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8843         kvm_rip_write(vcpu, 0x8000);
8844
8845         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8846         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8847         vcpu->arch.cr0 = cr0;
8848
8849         static_call(kvm_x86_set_cr4)(vcpu, 0);
8850
8851         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8852         dt.address = dt.size = 0;
8853         static_call(kvm_x86_set_idt)(vcpu, &dt);
8854
8855         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8856
8857         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8858         cs.base = vcpu->arch.smbase;
8859
8860         ds.selector = 0;
8861         ds.base = 0;
8862
8863         cs.limit    = ds.limit = 0xffffffff;
8864         cs.type     = ds.type = 0x3;
8865         cs.dpl      = ds.dpl = 0;
8866         cs.db       = ds.db = 0;
8867         cs.s        = ds.s = 1;
8868         cs.l        = ds.l = 0;
8869         cs.g        = ds.g = 1;
8870         cs.avl      = ds.avl = 0;
8871         cs.present  = ds.present = 1;
8872         cs.unusable = ds.unusable = 0;
8873         cs.padding  = ds.padding = 0;
8874
8875         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8876         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8877         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8878         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8879         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8880         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8881
8882 #ifdef CONFIG_X86_64
8883         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8884                 static_call(kvm_x86_set_efer)(vcpu, 0);
8885 #endif
8886
8887         kvm_update_cpuid_runtime(vcpu);
8888         kvm_mmu_reset_context(vcpu);
8889 }
8890
8891 static void process_smi(struct kvm_vcpu *vcpu)
8892 {
8893         vcpu->arch.smi_pending = true;
8894         kvm_make_request(KVM_REQ_EVENT, vcpu);
8895 }
8896
8897 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8898                                        unsigned long *vcpu_bitmap)
8899 {
8900         cpumask_var_t cpus;
8901
8902         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8903
8904         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8905                                     NULL, vcpu_bitmap, cpus);
8906
8907         free_cpumask_var(cpus);
8908 }
8909
8910 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8911 {
8912         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8913 }
8914
8915 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8916 {
8917         if (!lapic_in_kernel(vcpu))
8918                 return;
8919
8920         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8921         kvm_apic_update_apicv(vcpu);
8922         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
8923 }
8924 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8925
8926 /*
8927  * NOTE: Do not hold any lock prior to calling this.
8928  *
8929  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8930  * locked, because it calls __x86_set_memory_region() which does
8931  * synchronize_srcu(&kvm->srcu).
8932  */
8933 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8934 {
8935         struct kvm_vcpu *except;
8936         unsigned long old, new, expected;
8937
8938         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8939             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
8940                 return;
8941
8942         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8943         do {
8944                 expected = new = old;
8945                 if (activate)
8946                         __clear_bit(bit, &new);
8947                 else
8948                         __set_bit(bit, &new);
8949                 if (new == old)
8950                         break;
8951                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8952         } while (old != expected);
8953
8954         if (!!old == !!new)
8955                 return;
8956
8957         trace_kvm_apicv_update_request(activate, bit);
8958         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8959                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
8960
8961         /*
8962          * Sending request to update APICV for all other vcpus,
8963          * while update the calling vcpu immediately instead of
8964          * waiting for another #VMEXIT to handle the request.
8965          */
8966         except = kvm_get_running_vcpu();
8967         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8968                                          except);
8969         if (except)
8970                 kvm_vcpu_update_apicv(except);
8971 }
8972 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8973
8974 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8975 {
8976         if (!kvm_apic_present(vcpu))
8977                 return;
8978
8979         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8980
8981         if (irqchip_split(vcpu->kvm))
8982                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8983         else {
8984                 if (vcpu->arch.apicv_active)
8985                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
8986                 if (ioapic_in_kernel(vcpu->kvm))
8987                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8988         }
8989
8990         if (is_guest_mode(vcpu))
8991                 vcpu->arch.load_eoi_exitmap_pending = true;
8992         else
8993                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8994 }
8995
8996 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8997 {
8998         u64 eoi_exit_bitmap[4];
8999
9000         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9001                 return;
9002
9003         if (to_hv_vcpu(vcpu))
9004                 bitmap_or((ulong *)eoi_exit_bitmap,
9005                           vcpu->arch.ioapic_handled_vectors,
9006                           to_hv_synic(vcpu)->vec_bitmap, 256);
9007
9008         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9009 }
9010
9011 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9012                                             unsigned long start, unsigned long end)
9013 {
9014         unsigned long apic_address;
9015
9016         /*
9017          * The physical address of apic access page is stored in the VMCS.
9018          * Update it when it becomes invalid.
9019          */
9020         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9021         if (start <= apic_address && apic_address < end)
9022                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9023 }
9024
9025 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9026 {
9027         if (!lapic_in_kernel(vcpu))
9028                 return;
9029
9030         if (!kvm_x86_ops.set_apic_access_page_addr)
9031                 return;
9032
9033         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9034 }
9035
9036 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9037 {
9038         smp_send_reschedule(vcpu->cpu);
9039 }
9040 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9041
9042 /*
9043  * Returns 1 to let vcpu_run() continue the guest execution loop without
9044  * exiting to the userspace.  Otherwise, the value will be returned to the
9045  * userspace.
9046  */
9047 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9048 {
9049         int r;
9050         bool req_int_win =
9051                 dm_request_for_irq_injection(vcpu) &&
9052                 kvm_cpu_accept_dm_intr(vcpu);
9053         fastpath_t exit_fastpath;
9054
9055         bool req_immediate_exit = false;
9056
9057         /* Forbid vmenter if vcpu dirty ring is soft-full */
9058         if (unlikely(vcpu->kvm->dirty_ring_size &&
9059                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9060                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9061                 trace_kvm_dirty_ring_exit(vcpu);
9062                 r = 0;
9063                 goto out;
9064         }
9065
9066         if (kvm_request_pending(vcpu)) {
9067                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9068                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9069                                 r = 0;
9070                                 goto out;
9071                         }
9072                 }
9073                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9074                         kvm_mmu_unload(vcpu);
9075                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9076                         __kvm_migrate_timers(vcpu);
9077                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9078                         kvm_gen_update_masterclock(vcpu->kvm);
9079                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9080                         kvm_gen_kvmclock_update(vcpu);
9081                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9082                         r = kvm_guest_time_update(vcpu);
9083                         if (unlikely(r))
9084                                 goto out;
9085                 }
9086                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9087                         kvm_mmu_sync_roots(vcpu);
9088                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9089                         kvm_mmu_load_pgd(vcpu);
9090                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9091                         kvm_vcpu_flush_tlb_all(vcpu);
9092
9093                         /* Flushing all ASIDs flushes the current ASID... */
9094                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9095                 }
9096                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9097                         kvm_vcpu_flush_tlb_current(vcpu);
9098                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9099                         kvm_vcpu_flush_tlb_guest(vcpu);
9100
9101                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9102                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9103                         r = 0;
9104                         goto out;
9105                 }
9106                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9107                         if (is_guest_mode(vcpu)) {
9108                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9109                         } else {
9110                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9111                                 vcpu->mmio_needed = 0;
9112                                 r = 0;
9113                                 goto out;
9114                         }
9115                 }
9116                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9117                         /* Page is swapped out. Do synthetic halt */
9118                         vcpu->arch.apf.halted = true;
9119                         r = 1;
9120                         goto out;
9121                 }
9122                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9123                         record_steal_time(vcpu);
9124                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9125                         process_smi(vcpu);
9126                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9127                         process_nmi(vcpu);
9128                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9129                         kvm_pmu_handle_event(vcpu);
9130                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9131                         kvm_pmu_deliver_pmi(vcpu);
9132                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9133                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9134                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9135                                      vcpu->arch.ioapic_handled_vectors)) {
9136                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9137                                 vcpu->run->eoi.vector =
9138                                                 vcpu->arch.pending_ioapic_eoi;
9139                                 r = 0;
9140                                 goto out;
9141                         }
9142                 }
9143                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9144                         vcpu_scan_ioapic(vcpu);
9145                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9146                         vcpu_load_eoi_exitmap(vcpu);
9147                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9148                         kvm_vcpu_reload_apic_access_page(vcpu);
9149                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9150                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9151                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9152                         r = 0;
9153                         goto out;
9154                 }
9155                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9156                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9157                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9158                         r = 0;
9159                         goto out;
9160                 }
9161                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9162                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9163
9164                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9165                         vcpu->run->hyperv = hv_vcpu->exit;
9166                         r = 0;
9167                         goto out;
9168                 }
9169
9170                 /*
9171                  * KVM_REQ_HV_STIMER has to be processed after
9172                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9173                  * depend on the guest clock being up-to-date
9174                  */
9175                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9176                         kvm_hv_process_stimers(vcpu);
9177                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9178                         kvm_vcpu_update_apicv(vcpu);
9179                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9180                         kvm_check_async_pf_completion(vcpu);
9181                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9182                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9183
9184                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9185                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9186         }
9187
9188         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9189             kvm_xen_has_interrupt(vcpu)) {
9190                 ++vcpu->stat.req_event;
9191                 kvm_apic_accept_events(vcpu);
9192                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9193                         r = 1;
9194                         goto out;
9195                 }
9196
9197                 inject_pending_event(vcpu, &req_immediate_exit);
9198                 if (req_int_win)
9199                         static_call(kvm_x86_enable_irq_window)(vcpu);
9200
9201                 if (kvm_lapic_enabled(vcpu)) {
9202                         update_cr8_intercept(vcpu);
9203                         kvm_lapic_sync_to_vapic(vcpu);
9204                 }
9205         }
9206
9207         r = kvm_mmu_reload(vcpu);
9208         if (unlikely(r)) {
9209                 goto cancel_injection;
9210         }
9211
9212         preempt_disable();
9213
9214         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9215
9216         /*
9217          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9218          * IPI are then delayed after guest entry, which ensures that they
9219          * result in virtual interrupt delivery.
9220          */
9221         local_irq_disable();
9222         vcpu->mode = IN_GUEST_MODE;
9223
9224         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9225
9226         /*
9227          * 1) We should set ->mode before checking ->requests.  Please see
9228          * the comment in kvm_vcpu_exiting_guest_mode().
9229          *
9230          * 2) For APICv, we should set ->mode before checking PID.ON. This
9231          * pairs with the memory barrier implicit in pi_test_and_set_on
9232          * (see vmx_deliver_posted_interrupt).
9233          *
9234          * 3) This also orders the write to mode from any reads to the page
9235          * tables done while the VCPU is running.  Please see the comment
9236          * in kvm_flush_remote_tlbs.
9237          */
9238         smp_mb__after_srcu_read_unlock();
9239
9240         /*
9241          * This handles the case where a posted interrupt was
9242          * notified with kvm_vcpu_kick.
9243          */
9244         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9245                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9246
9247         if (kvm_vcpu_exit_request(vcpu)) {
9248                 vcpu->mode = OUTSIDE_GUEST_MODE;
9249                 smp_wmb();
9250                 local_irq_enable();
9251                 preempt_enable();
9252                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9253                 r = 1;
9254                 goto cancel_injection;
9255         }
9256
9257         if (req_immediate_exit) {
9258                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9259                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9260         }
9261
9262         fpregs_assert_state_consistent();
9263         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9264                 switch_fpu_return();
9265
9266         if (unlikely(vcpu->arch.switch_db_regs)) {
9267                 set_debugreg(0, 7);
9268                 set_debugreg(vcpu->arch.eff_db[0], 0);
9269                 set_debugreg(vcpu->arch.eff_db[1], 1);
9270                 set_debugreg(vcpu->arch.eff_db[2], 2);
9271                 set_debugreg(vcpu->arch.eff_db[3], 3);
9272                 set_debugreg(vcpu->arch.dr6, 6);
9273                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9274         }
9275
9276         for (;;) {
9277                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9278                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9279                         break;
9280
9281                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9282                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9283                         break;
9284                 }
9285
9286                 if (vcpu->arch.apicv_active)
9287                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9288         }
9289
9290         /*
9291          * Do this here before restoring debug registers on the host.  And
9292          * since we do this before handling the vmexit, a DR access vmexit
9293          * can (a) read the correct value of the debug registers, (b) set
9294          * KVM_DEBUGREG_WONT_EXIT again.
9295          */
9296         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9297                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9298                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9299                 kvm_update_dr0123(vcpu);
9300                 kvm_update_dr7(vcpu);
9301                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9302         }
9303
9304         /*
9305          * If the guest has used debug registers, at least dr7
9306          * will be disabled while returning to the host.
9307          * If we don't have active breakpoints in the host, we don't
9308          * care about the messed up debug address registers. But if
9309          * we have some of them active, restore the old state.
9310          */
9311         if (hw_breakpoint_active())
9312                 hw_breakpoint_restore();
9313
9314         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9315         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9316
9317         vcpu->mode = OUTSIDE_GUEST_MODE;
9318         smp_wmb();
9319
9320         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9321
9322         /*
9323          * Consume any pending interrupts, including the possible source of
9324          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9325          * An instruction is required after local_irq_enable() to fully unblock
9326          * interrupts on processors that implement an interrupt shadow, the
9327          * stat.exits increment will do nicely.
9328          */
9329         kvm_before_interrupt(vcpu);
9330         local_irq_enable();
9331         ++vcpu->stat.exits;
9332         local_irq_disable();
9333         kvm_after_interrupt(vcpu);
9334
9335         if (lapic_in_kernel(vcpu)) {
9336                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9337                 if (delta != S64_MIN) {
9338                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9339                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9340                 }
9341         }
9342
9343         local_irq_enable();
9344         preempt_enable();
9345
9346         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9347
9348         /*
9349          * Profile KVM exit RIPs:
9350          */
9351         if (unlikely(prof_on == KVM_PROFILING)) {
9352                 unsigned long rip = kvm_rip_read(vcpu);
9353                 profile_hit(KVM_PROFILING, (void *)rip);
9354         }
9355
9356         if (unlikely(vcpu->arch.tsc_always_catchup))
9357                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9358
9359         if (vcpu->arch.apic_attention)
9360                 kvm_lapic_sync_from_vapic(vcpu);
9361
9362         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9363         return r;
9364
9365 cancel_injection:
9366         if (req_immediate_exit)
9367                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9368         static_call(kvm_x86_cancel_injection)(vcpu);
9369         if (unlikely(vcpu->arch.apic_attention))
9370                 kvm_lapic_sync_from_vapic(vcpu);
9371 out:
9372         return r;
9373 }
9374
9375 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9376 {
9377         if (!kvm_arch_vcpu_runnable(vcpu) &&
9378             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9379                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9380                 kvm_vcpu_block(vcpu);
9381                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9382
9383                 if (kvm_x86_ops.post_block)
9384                         static_call(kvm_x86_post_block)(vcpu);
9385
9386                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9387                         return 1;
9388         }
9389
9390         kvm_apic_accept_events(vcpu);
9391         switch(vcpu->arch.mp_state) {
9392         case KVM_MP_STATE_HALTED:
9393         case KVM_MP_STATE_AP_RESET_HOLD:
9394                 vcpu->arch.pv.pv_unhalted = false;
9395                 vcpu->arch.mp_state =
9396                         KVM_MP_STATE_RUNNABLE;
9397                 fallthrough;
9398         case KVM_MP_STATE_RUNNABLE:
9399                 vcpu->arch.apf.halted = false;
9400                 break;
9401         case KVM_MP_STATE_INIT_RECEIVED:
9402                 break;
9403         default:
9404                 return -EINTR;
9405         }
9406         return 1;
9407 }
9408
9409 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9410 {
9411         if (is_guest_mode(vcpu))
9412                 kvm_check_nested_events(vcpu);
9413
9414         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9415                 !vcpu->arch.apf.halted);
9416 }
9417
9418 static int vcpu_run(struct kvm_vcpu *vcpu)
9419 {
9420         int r;
9421         struct kvm *kvm = vcpu->kvm;
9422
9423         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9424         vcpu->arch.l1tf_flush_l1d = true;
9425
9426         for (;;) {
9427                 if (kvm_vcpu_running(vcpu)) {
9428                         r = vcpu_enter_guest(vcpu);
9429                 } else {
9430                         r = vcpu_block(kvm, vcpu);
9431                 }
9432
9433                 if (r <= 0)
9434                         break;
9435
9436                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9437                 if (kvm_cpu_has_pending_timer(vcpu))
9438                         kvm_inject_pending_timer_irqs(vcpu);
9439
9440                 if (dm_request_for_irq_injection(vcpu) &&
9441                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9442                         r = 0;
9443                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9444                         ++vcpu->stat.request_irq_exits;
9445                         break;
9446                 }
9447
9448                 if (__xfer_to_guest_mode_work_pending()) {
9449                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9450                         r = xfer_to_guest_mode_handle_work(vcpu);
9451                         if (r)
9452                                 return r;
9453                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9454                 }
9455         }
9456
9457         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9458
9459         return r;
9460 }
9461
9462 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9463 {
9464         int r;
9465
9466         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9467         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9468         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9469         return r;
9470 }
9471
9472 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9473 {
9474         BUG_ON(!vcpu->arch.pio.count);
9475
9476         return complete_emulated_io(vcpu);
9477 }
9478
9479 /*
9480  * Implements the following, as a state machine:
9481  *
9482  * read:
9483  *   for each fragment
9484  *     for each mmio piece in the fragment
9485  *       write gpa, len
9486  *       exit
9487  *       copy data
9488  *   execute insn
9489  *
9490  * write:
9491  *   for each fragment
9492  *     for each mmio piece in the fragment
9493  *       write gpa, len
9494  *       copy data
9495  *       exit
9496  */
9497 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9498 {
9499         struct kvm_run *run = vcpu->run;
9500         struct kvm_mmio_fragment *frag;
9501         unsigned len;
9502
9503         BUG_ON(!vcpu->mmio_needed);
9504
9505         /* Complete previous fragment */
9506         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9507         len = min(8u, frag->len);
9508         if (!vcpu->mmio_is_write)
9509                 memcpy(frag->data, run->mmio.data, len);
9510
9511         if (frag->len <= 8) {
9512                 /* Switch to the next fragment. */
9513                 frag++;
9514                 vcpu->mmio_cur_fragment++;
9515         } else {
9516                 /* Go forward to the next mmio piece. */
9517                 frag->data += len;
9518                 frag->gpa += len;
9519                 frag->len -= len;
9520         }
9521
9522         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9523                 vcpu->mmio_needed = 0;
9524
9525                 /* FIXME: return into emulator if single-stepping.  */
9526                 if (vcpu->mmio_is_write)
9527                         return 1;
9528                 vcpu->mmio_read_completed = 1;
9529                 return complete_emulated_io(vcpu);
9530         }
9531
9532         run->exit_reason = KVM_EXIT_MMIO;
9533         run->mmio.phys_addr = frag->gpa;
9534         if (vcpu->mmio_is_write)
9535                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9536         run->mmio.len = min(8u, frag->len);
9537         run->mmio.is_write = vcpu->mmio_is_write;
9538         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9539         return 0;
9540 }
9541
9542 static void kvm_save_current_fpu(struct fpu *fpu)
9543 {
9544         /*
9545          * If the target FPU state is not resident in the CPU registers, just
9546          * memcpy() from current, else save CPU state directly to the target.
9547          */
9548         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9549                 memcpy(&fpu->state, &current->thread.fpu.state,
9550                        fpu_kernel_xstate_size);
9551         else
9552                 copy_fpregs_to_fpstate(fpu);
9553 }
9554
9555 /* Swap (qemu) user FPU context for the guest FPU context. */
9556 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9557 {
9558         fpregs_lock();
9559
9560         kvm_save_current_fpu(vcpu->arch.user_fpu);
9561
9562         /*
9563          * Guests with protected state can't have it set by the hypervisor,
9564          * so skip trying to set it.
9565          */
9566         if (vcpu->arch.guest_fpu)
9567                 /* PKRU is separately restored in kvm_x86_ops.run. */
9568                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9569                                         ~XFEATURE_MASK_PKRU);
9570
9571         fpregs_mark_activate();
9572         fpregs_unlock();
9573
9574         trace_kvm_fpu(1);
9575 }
9576
9577 /* When vcpu_run ends, restore user space FPU context. */
9578 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9579 {
9580         fpregs_lock();
9581
9582         /*
9583          * Guests with protected state can't have it read by the hypervisor,
9584          * so skip trying to save it.
9585          */
9586         if (vcpu->arch.guest_fpu)
9587                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9588
9589         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9590
9591         fpregs_mark_activate();
9592         fpregs_unlock();
9593
9594         ++vcpu->stat.fpu_reload;
9595         trace_kvm_fpu(0);
9596 }
9597
9598 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9599 {
9600         struct kvm_run *kvm_run = vcpu->run;
9601         int r;
9602
9603         vcpu_load(vcpu);
9604         kvm_sigset_activate(vcpu);
9605         kvm_run->flags = 0;
9606         kvm_load_guest_fpu(vcpu);
9607
9608         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9609                 if (kvm_run->immediate_exit) {
9610                         r = -EINTR;
9611                         goto out;
9612                 }
9613                 kvm_vcpu_block(vcpu);
9614                 kvm_apic_accept_events(vcpu);
9615                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9616                 r = -EAGAIN;
9617                 if (signal_pending(current)) {
9618                         r = -EINTR;
9619                         kvm_run->exit_reason = KVM_EXIT_INTR;
9620                         ++vcpu->stat.signal_exits;
9621                 }
9622                 goto out;
9623         }
9624
9625         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9626                 r = -EINVAL;
9627                 goto out;
9628         }
9629
9630         if (kvm_run->kvm_dirty_regs) {
9631                 r = sync_regs(vcpu);
9632                 if (r != 0)
9633                         goto out;
9634         }
9635
9636         /* re-sync apic's tpr */
9637         if (!lapic_in_kernel(vcpu)) {
9638                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9639                         r = -EINVAL;
9640                         goto out;
9641                 }
9642         }
9643
9644         if (unlikely(vcpu->arch.complete_userspace_io)) {
9645                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9646                 vcpu->arch.complete_userspace_io = NULL;
9647                 r = cui(vcpu);
9648                 if (r <= 0)
9649                         goto out;
9650         } else
9651                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9652
9653         if (kvm_run->immediate_exit)
9654                 r = -EINTR;
9655         else
9656                 r = vcpu_run(vcpu);
9657
9658 out:
9659         kvm_put_guest_fpu(vcpu);
9660         if (kvm_run->kvm_valid_regs)
9661                 store_regs(vcpu);
9662         post_kvm_run_save(vcpu);
9663         kvm_sigset_deactivate(vcpu);
9664
9665         vcpu_put(vcpu);
9666         return r;
9667 }
9668
9669 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9670 {
9671         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9672                 /*
9673                  * We are here if userspace calls get_regs() in the middle of
9674                  * instruction emulation. Registers state needs to be copied
9675                  * back from emulation context to vcpu. Userspace shouldn't do
9676                  * that usually, but some bad designed PV devices (vmware
9677                  * backdoor interface) need this to work
9678                  */
9679                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9680                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9681         }
9682         regs->rax = kvm_rax_read(vcpu);
9683         regs->rbx = kvm_rbx_read(vcpu);
9684         regs->rcx = kvm_rcx_read(vcpu);
9685         regs->rdx = kvm_rdx_read(vcpu);
9686         regs->rsi = kvm_rsi_read(vcpu);
9687         regs->rdi = kvm_rdi_read(vcpu);
9688         regs->rsp = kvm_rsp_read(vcpu);
9689         regs->rbp = kvm_rbp_read(vcpu);
9690 #ifdef CONFIG_X86_64
9691         regs->r8 = kvm_r8_read(vcpu);
9692         regs->r9 = kvm_r9_read(vcpu);
9693         regs->r10 = kvm_r10_read(vcpu);
9694         regs->r11 = kvm_r11_read(vcpu);
9695         regs->r12 = kvm_r12_read(vcpu);
9696         regs->r13 = kvm_r13_read(vcpu);
9697         regs->r14 = kvm_r14_read(vcpu);
9698         regs->r15 = kvm_r15_read(vcpu);
9699 #endif
9700
9701         regs->rip = kvm_rip_read(vcpu);
9702         regs->rflags = kvm_get_rflags(vcpu);
9703 }
9704
9705 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9706 {
9707         vcpu_load(vcpu);
9708         __get_regs(vcpu, regs);
9709         vcpu_put(vcpu);
9710         return 0;
9711 }
9712
9713 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9714 {
9715         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9716         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9717
9718         kvm_rax_write(vcpu, regs->rax);
9719         kvm_rbx_write(vcpu, regs->rbx);
9720         kvm_rcx_write(vcpu, regs->rcx);
9721         kvm_rdx_write(vcpu, regs->rdx);
9722         kvm_rsi_write(vcpu, regs->rsi);
9723         kvm_rdi_write(vcpu, regs->rdi);
9724         kvm_rsp_write(vcpu, regs->rsp);
9725         kvm_rbp_write(vcpu, regs->rbp);
9726 #ifdef CONFIG_X86_64
9727         kvm_r8_write(vcpu, regs->r8);
9728         kvm_r9_write(vcpu, regs->r9);
9729         kvm_r10_write(vcpu, regs->r10);
9730         kvm_r11_write(vcpu, regs->r11);
9731         kvm_r12_write(vcpu, regs->r12);
9732         kvm_r13_write(vcpu, regs->r13);
9733         kvm_r14_write(vcpu, regs->r14);
9734         kvm_r15_write(vcpu, regs->r15);
9735 #endif
9736
9737         kvm_rip_write(vcpu, regs->rip);
9738         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9739
9740         vcpu->arch.exception.pending = false;
9741
9742         kvm_make_request(KVM_REQ_EVENT, vcpu);
9743 }
9744
9745 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9746 {
9747         vcpu_load(vcpu);
9748         __set_regs(vcpu, regs);
9749         vcpu_put(vcpu);
9750         return 0;
9751 }
9752
9753 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9754 {
9755         struct kvm_segment cs;
9756
9757         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9758         *db = cs.db;
9759         *l = cs.l;
9760 }
9761 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9762
9763 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9764 {
9765         struct desc_ptr dt;
9766
9767         if (vcpu->arch.guest_state_protected)
9768                 goto skip_protected_regs;
9769
9770         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9771         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9772         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9773         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9774         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9775         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9776
9777         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9778         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9779
9780         static_call(kvm_x86_get_idt)(vcpu, &dt);
9781         sregs->idt.limit = dt.size;
9782         sregs->idt.base = dt.address;
9783         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9784         sregs->gdt.limit = dt.size;
9785         sregs->gdt.base = dt.address;
9786
9787         sregs->cr2 = vcpu->arch.cr2;
9788         sregs->cr3 = kvm_read_cr3(vcpu);
9789
9790 skip_protected_regs:
9791         sregs->cr0 = kvm_read_cr0(vcpu);
9792         sregs->cr4 = kvm_read_cr4(vcpu);
9793         sregs->cr8 = kvm_get_cr8(vcpu);
9794         sregs->efer = vcpu->arch.efer;
9795         sregs->apic_base = kvm_get_apic_base(vcpu);
9796
9797         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9798
9799         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9800                 set_bit(vcpu->arch.interrupt.nr,
9801                         (unsigned long *)sregs->interrupt_bitmap);
9802 }
9803
9804 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9805                                   struct kvm_sregs *sregs)
9806 {
9807         vcpu_load(vcpu);
9808         __get_sregs(vcpu, sregs);
9809         vcpu_put(vcpu);
9810         return 0;
9811 }
9812
9813 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9814                                     struct kvm_mp_state *mp_state)
9815 {
9816         vcpu_load(vcpu);
9817         if (kvm_mpx_supported())
9818                 kvm_load_guest_fpu(vcpu);
9819
9820         kvm_apic_accept_events(vcpu);
9821         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9822              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9823             vcpu->arch.pv.pv_unhalted)
9824                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9825         else
9826                 mp_state->mp_state = vcpu->arch.mp_state;
9827
9828         if (kvm_mpx_supported())
9829                 kvm_put_guest_fpu(vcpu);
9830         vcpu_put(vcpu);
9831         return 0;
9832 }
9833
9834 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9835                                     struct kvm_mp_state *mp_state)
9836 {
9837         int ret = -EINVAL;
9838
9839         vcpu_load(vcpu);
9840
9841         if (!lapic_in_kernel(vcpu) &&
9842             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9843                 goto out;
9844
9845         /*
9846          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9847          * INIT state; latched init should be reported using
9848          * KVM_SET_VCPU_EVENTS, so reject it here.
9849          */
9850         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9851             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9852              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9853                 goto out;
9854
9855         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9856                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9857                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9858         } else
9859                 vcpu->arch.mp_state = mp_state->mp_state;
9860         kvm_make_request(KVM_REQ_EVENT, vcpu);
9861
9862         ret = 0;
9863 out:
9864         vcpu_put(vcpu);
9865         return ret;
9866 }
9867
9868 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9869                     int reason, bool has_error_code, u32 error_code)
9870 {
9871         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9872         int ret;
9873
9874         init_emulate_ctxt(vcpu);
9875
9876         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9877                                    has_error_code, error_code);
9878         if (ret) {
9879                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9880                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9881                 vcpu->run->internal.ndata = 0;
9882                 return 0;
9883         }
9884
9885         kvm_rip_write(vcpu, ctxt->eip);
9886         kvm_set_rflags(vcpu, ctxt->eflags);
9887         return 1;
9888 }
9889 EXPORT_SYMBOL_GPL(kvm_task_switch);
9890
9891 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9892 {
9893         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9894                 /*
9895                  * When EFER.LME and CR0.PG are set, the processor is in
9896                  * 64-bit mode (though maybe in a 32-bit code segment).
9897                  * CR4.PAE and EFER.LMA must be set.
9898                  */
9899                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9900                         return false;
9901                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
9902                         return false;
9903         } else {
9904                 /*
9905                  * Not in 64-bit mode: EFER.LMA is clear and the code
9906                  * segment cannot be 64-bit.
9907                  */
9908                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9909                         return false;
9910         }
9911
9912         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9913 }
9914
9915 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9916 {
9917         struct msr_data apic_base_msr;
9918         int mmu_reset_needed = 0;
9919         int pending_vec, max_bits, idx;
9920         struct desc_ptr dt;
9921         int ret = -EINVAL;
9922
9923         if (!kvm_is_valid_sregs(vcpu, sregs))
9924                 goto out;
9925
9926         apic_base_msr.data = sregs->apic_base;
9927         apic_base_msr.host_initiated = true;
9928         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9929                 goto out;
9930
9931         if (vcpu->arch.guest_state_protected)
9932                 goto skip_protected_regs;
9933
9934         dt.size = sregs->idt.limit;
9935         dt.address = sregs->idt.base;
9936         static_call(kvm_x86_set_idt)(vcpu, &dt);
9937         dt.size = sregs->gdt.limit;
9938         dt.address = sregs->gdt.base;
9939         static_call(kvm_x86_set_gdt)(vcpu, &dt);
9940
9941         vcpu->arch.cr2 = sregs->cr2;
9942         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9943         vcpu->arch.cr3 = sregs->cr3;
9944         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9945
9946         kvm_set_cr8(vcpu, sregs->cr8);
9947
9948         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9949         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
9950
9951         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9952         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
9953         vcpu->arch.cr0 = sregs->cr0;
9954
9955         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9956         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
9957
9958         idx = srcu_read_lock(&vcpu->kvm->srcu);
9959         if (is_pae_paging(vcpu)) {
9960                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9961                 mmu_reset_needed = 1;
9962         }
9963         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9964
9965         if (mmu_reset_needed)
9966                 kvm_mmu_reset_context(vcpu);
9967
9968         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9969         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9970         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9971         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9972         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9973         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9974
9975         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9976         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9977
9978         update_cr8_intercept(vcpu);
9979
9980         /* Older userspace won't unhalt the vcpu on reset. */
9981         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9982             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9983             !is_protmode(vcpu))
9984                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9985
9986 skip_protected_regs:
9987         max_bits = KVM_NR_INTERRUPTS;
9988         pending_vec = find_first_bit(
9989                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9990         if (pending_vec < max_bits) {
9991                 kvm_queue_interrupt(vcpu, pending_vec, false);
9992                 pr_debug("Set back pending irq %d\n", pending_vec);
9993         }
9994
9995         kvm_make_request(KVM_REQ_EVENT, vcpu);
9996
9997         ret = 0;
9998 out:
9999         return ret;
10000 }
10001
10002 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10003                                   struct kvm_sregs *sregs)
10004 {
10005         int ret;
10006
10007         vcpu_load(vcpu);
10008         ret = __set_sregs(vcpu, sregs);
10009         vcpu_put(vcpu);
10010         return ret;
10011 }
10012
10013 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10014                                         struct kvm_guest_debug *dbg)
10015 {
10016         unsigned long rflags;
10017         int i, r;
10018
10019         if (vcpu->arch.guest_state_protected)
10020                 return -EINVAL;
10021
10022         vcpu_load(vcpu);
10023
10024         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10025                 r = -EBUSY;
10026                 if (vcpu->arch.exception.pending)
10027                         goto out;
10028                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10029                         kvm_queue_exception(vcpu, DB_VECTOR);
10030                 else
10031                         kvm_queue_exception(vcpu, BP_VECTOR);
10032         }
10033
10034         /*
10035          * Read rflags as long as potentially injected trace flags are still
10036          * filtered out.
10037          */
10038         rflags = kvm_get_rflags(vcpu);
10039
10040         vcpu->guest_debug = dbg->control;
10041         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10042                 vcpu->guest_debug = 0;
10043
10044         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10045                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10046                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10047                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10048         } else {
10049                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10050                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10051         }
10052         kvm_update_dr7(vcpu);
10053
10054         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10055                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
10056                         get_segment_base(vcpu, VCPU_SREG_CS);
10057
10058         /*
10059          * Trigger an rflags update that will inject or remove the trace
10060          * flags.
10061          */
10062         kvm_set_rflags(vcpu, rflags);
10063
10064         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10065
10066         r = 0;
10067
10068 out:
10069         vcpu_put(vcpu);
10070         return r;
10071 }
10072
10073 /*
10074  * Translate a guest virtual address to a guest physical address.
10075  */
10076 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10077                                     struct kvm_translation *tr)
10078 {
10079         unsigned long vaddr = tr->linear_address;
10080         gpa_t gpa;
10081         int idx;
10082
10083         vcpu_load(vcpu);
10084
10085         idx = srcu_read_lock(&vcpu->kvm->srcu);
10086         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10087         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10088         tr->physical_address = gpa;
10089         tr->valid = gpa != UNMAPPED_GVA;
10090         tr->writeable = 1;
10091         tr->usermode = 0;
10092
10093         vcpu_put(vcpu);
10094         return 0;
10095 }
10096
10097 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10098 {
10099         struct fxregs_state *fxsave;
10100
10101         if (!vcpu->arch.guest_fpu)
10102                 return 0;
10103
10104         vcpu_load(vcpu);
10105
10106         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10107         memcpy(fpu->fpr, fxsave->st_space, 128);
10108         fpu->fcw = fxsave->cwd;
10109         fpu->fsw = fxsave->swd;
10110         fpu->ftwx = fxsave->twd;
10111         fpu->last_opcode = fxsave->fop;
10112         fpu->last_ip = fxsave->rip;
10113         fpu->last_dp = fxsave->rdp;
10114         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10115
10116         vcpu_put(vcpu);
10117         return 0;
10118 }
10119
10120 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10121 {
10122         struct fxregs_state *fxsave;
10123
10124         if (!vcpu->arch.guest_fpu)
10125                 return 0;
10126
10127         vcpu_load(vcpu);
10128
10129         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10130
10131         memcpy(fxsave->st_space, fpu->fpr, 128);
10132         fxsave->cwd = fpu->fcw;
10133         fxsave->swd = fpu->fsw;
10134         fxsave->twd = fpu->ftwx;
10135         fxsave->fop = fpu->last_opcode;
10136         fxsave->rip = fpu->last_ip;
10137         fxsave->rdp = fpu->last_dp;
10138         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10139
10140         vcpu_put(vcpu);
10141         return 0;
10142 }
10143
10144 static void store_regs(struct kvm_vcpu *vcpu)
10145 {
10146         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10147
10148         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10149                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10150
10151         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10152                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10153
10154         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10155                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10156                                 vcpu, &vcpu->run->s.regs.events);
10157 }
10158
10159 static int sync_regs(struct kvm_vcpu *vcpu)
10160 {
10161         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10162                 return -EINVAL;
10163
10164         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10165                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10166                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10167         }
10168         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10169                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10170                         return -EINVAL;
10171                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10172         }
10173         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10174                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10175                                 vcpu, &vcpu->run->s.regs.events))
10176                         return -EINVAL;
10177                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10178         }
10179
10180         return 0;
10181 }
10182
10183 static void fx_init(struct kvm_vcpu *vcpu)
10184 {
10185         if (!vcpu->arch.guest_fpu)
10186                 return;
10187
10188         fpstate_init(&vcpu->arch.guest_fpu->state);
10189         if (boot_cpu_has(X86_FEATURE_XSAVES))
10190                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10191                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10192
10193         /*
10194          * Ensure guest xcr0 is valid for loading
10195          */
10196         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10197
10198         vcpu->arch.cr0 |= X86_CR0_ET;
10199 }
10200
10201 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10202 {
10203         if (vcpu->arch.guest_fpu) {
10204                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10205                 vcpu->arch.guest_fpu = NULL;
10206         }
10207 }
10208 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10209
10210 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10211 {
10212         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10213                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10214                              "guest TSC will not be reliable\n");
10215
10216         return 0;
10217 }
10218
10219 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10220 {
10221         struct page *page;
10222         int r;
10223
10224         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10225                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10226         else
10227                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10228
10229         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10230
10231         r = kvm_mmu_create(vcpu);
10232         if (r < 0)
10233                 return r;
10234
10235         if (irqchip_in_kernel(vcpu->kvm)) {
10236                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10237                 if (r < 0)
10238                         goto fail_mmu_destroy;
10239                 if (kvm_apicv_activated(vcpu->kvm))
10240                         vcpu->arch.apicv_active = true;
10241         } else
10242                 static_branch_inc(&kvm_has_noapic_vcpu);
10243
10244         r = -ENOMEM;
10245
10246         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10247         if (!page)
10248                 goto fail_free_lapic;
10249         vcpu->arch.pio_data = page_address(page);
10250
10251         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10252                                        GFP_KERNEL_ACCOUNT);
10253         if (!vcpu->arch.mce_banks)
10254                 goto fail_free_pio_data;
10255         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10256
10257         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10258                                 GFP_KERNEL_ACCOUNT))
10259                 goto fail_free_mce_banks;
10260
10261         if (!alloc_emulate_ctxt(vcpu))
10262                 goto free_wbinvd_dirty_mask;
10263
10264         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10265                                                 GFP_KERNEL_ACCOUNT);
10266         if (!vcpu->arch.user_fpu) {
10267                 pr_err("kvm: failed to allocate userspace's fpu\n");
10268                 goto free_emulate_ctxt;
10269         }
10270
10271         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10272                                                  GFP_KERNEL_ACCOUNT);
10273         if (!vcpu->arch.guest_fpu) {
10274                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10275                 goto free_user_fpu;
10276         }
10277         fx_init(vcpu);
10278
10279         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10280         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10281
10282         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10283
10284         kvm_async_pf_hash_reset(vcpu);
10285         kvm_pmu_init(vcpu);
10286
10287         vcpu->arch.pending_external_vector = -1;
10288         vcpu->arch.preempted_in_kernel = false;
10289
10290         r = static_call(kvm_x86_vcpu_create)(vcpu);
10291         if (r)
10292                 goto free_guest_fpu;
10293
10294         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10295         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10296         kvm_vcpu_mtrr_init(vcpu);
10297         vcpu_load(vcpu);
10298         kvm_vcpu_reset(vcpu, false);
10299         kvm_init_mmu(vcpu, false);
10300         vcpu_put(vcpu);
10301         return 0;
10302
10303 free_guest_fpu:
10304         kvm_free_guest_fpu(vcpu);
10305 free_user_fpu:
10306         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10307 free_emulate_ctxt:
10308         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10309 free_wbinvd_dirty_mask:
10310         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10311 fail_free_mce_banks:
10312         kfree(vcpu->arch.mce_banks);
10313 fail_free_pio_data:
10314         free_page((unsigned long)vcpu->arch.pio_data);
10315 fail_free_lapic:
10316         kvm_free_lapic(vcpu);
10317 fail_mmu_destroy:
10318         kvm_mmu_destroy(vcpu);
10319         return r;
10320 }
10321
10322 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10323 {
10324         struct kvm *kvm = vcpu->kvm;
10325
10326         if (mutex_lock_killable(&vcpu->mutex))
10327                 return;
10328         vcpu_load(vcpu);
10329         kvm_synchronize_tsc(vcpu, 0);
10330         vcpu_put(vcpu);
10331
10332         /* poll control enabled by default */
10333         vcpu->arch.msr_kvm_poll_control = 1;
10334
10335         mutex_unlock(&vcpu->mutex);
10336
10337         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10338                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10339                                                 KVMCLOCK_SYNC_PERIOD);
10340 }
10341
10342 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10343 {
10344         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10345         int idx;
10346
10347         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10348
10349         kvmclock_reset(vcpu);
10350
10351         static_call(kvm_x86_vcpu_free)(vcpu);
10352
10353         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10354         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10355         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10356         kvm_free_guest_fpu(vcpu);
10357
10358         kvm_hv_vcpu_uninit(vcpu);
10359         kvm_pmu_destroy(vcpu);
10360         kfree(vcpu->arch.mce_banks);
10361         kvm_free_lapic(vcpu);
10362         idx = srcu_read_lock(&vcpu->kvm->srcu);
10363         kvm_mmu_destroy(vcpu);
10364         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10365         free_page((unsigned long)vcpu->arch.pio_data);
10366         kvfree(vcpu->arch.cpuid_entries);
10367         if (!lapic_in_kernel(vcpu))
10368                 static_branch_dec(&kvm_has_noapic_vcpu);
10369 }
10370
10371 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10372 {
10373         kvm_lapic_reset(vcpu, init_event);
10374
10375         vcpu->arch.hflags = 0;
10376
10377         vcpu->arch.smi_pending = 0;
10378         vcpu->arch.smi_count = 0;
10379         atomic_set(&vcpu->arch.nmi_queued, 0);
10380         vcpu->arch.nmi_pending = 0;
10381         vcpu->arch.nmi_injected = false;
10382         kvm_clear_interrupt_queue(vcpu);
10383         kvm_clear_exception_queue(vcpu);
10384
10385         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10386         kvm_update_dr0123(vcpu);
10387         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10388         vcpu->arch.dr7 = DR7_FIXED_1;
10389         kvm_update_dr7(vcpu);
10390
10391         vcpu->arch.cr2 = 0;
10392
10393         kvm_make_request(KVM_REQ_EVENT, vcpu);
10394         vcpu->arch.apf.msr_en_val = 0;
10395         vcpu->arch.apf.msr_int_val = 0;
10396         vcpu->arch.st.msr_val = 0;
10397
10398         kvmclock_reset(vcpu);
10399
10400         kvm_clear_async_pf_completion_queue(vcpu);
10401         kvm_async_pf_hash_reset(vcpu);
10402         vcpu->arch.apf.halted = false;
10403
10404         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10405                 void *mpx_state_buffer;
10406
10407                 /*
10408                  * To avoid have the INIT path from kvm_apic_has_events() that be
10409                  * called with loaded FPU and does not let userspace fix the state.
10410                  */
10411                 if (init_event)
10412                         kvm_put_guest_fpu(vcpu);
10413                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10414                                         XFEATURE_BNDREGS);
10415                 if (mpx_state_buffer)
10416                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10417                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10418                                         XFEATURE_BNDCSR);
10419                 if (mpx_state_buffer)
10420                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10421                 if (init_event)
10422                         kvm_load_guest_fpu(vcpu);
10423         }
10424
10425         if (!init_event) {
10426                 kvm_pmu_reset(vcpu);
10427                 vcpu->arch.smbase = 0x30000;
10428
10429                 vcpu->arch.msr_misc_features_enables = 0;
10430
10431                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10432         }
10433
10434         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10435         vcpu->arch.regs_avail = ~0;
10436         vcpu->arch.regs_dirty = ~0;
10437
10438         vcpu->arch.ia32_xss = 0;
10439
10440         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10441 }
10442
10443 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10444 {
10445         struct kvm_segment cs;
10446
10447         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10448         cs.selector = vector << 8;
10449         cs.base = vector << 12;
10450         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10451         kvm_rip_write(vcpu, 0);
10452 }
10453 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10454
10455 int kvm_arch_hardware_enable(void)
10456 {
10457         struct kvm *kvm;
10458         struct kvm_vcpu *vcpu;
10459         int i;
10460         int ret;
10461         u64 local_tsc;
10462         u64 max_tsc = 0;
10463         bool stable, backwards_tsc = false;
10464
10465         kvm_user_return_msr_cpu_online();
10466         ret = static_call(kvm_x86_hardware_enable)();
10467         if (ret != 0)
10468                 return ret;
10469
10470         local_tsc = rdtsc();
10471         stable = !kvm_check_tsc_unstable();
10472         list_for_each_entry(kvm, &vm_list, vm_list) {
10473                 kvm_for_each_vcpu(i, vcpu, kvm) {
10474                         if (!stable && vcpu->cpu == smp_processor_id())
10475                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10476                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10477                                 backwards_tsc = true;
10478                                 if (vcpu->arch.last_host_tsc > max_tsc)
10479                                         max_tsc = vcpu->arch.last_host_tsc;
10480                         }
10481                 }
10482         }
10483
10484         /*
10485          * Sometimes, even reliable TSCs go backwards.  This happens on
10486          * platforms that reset TSC during suspend or hibernate actions, but
10487          * maintain synchronization.  We must compensate.  Fortunately, we can
10488          * detect that condition here, which happens early in CPU bringup,
10489          * before any KVM threads can be running.  Unfortunately, we can't
10490          * bring the TSCs fully up to date with real time, as we aren't yet far
10491          * enough into CPU bringup that we know how much real time has actually
10492          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10493          * variables that haven't been updated yet.
10494          *
10495          * So we simply find the maximum observed TSC above, then record the
10496          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10497          * the adjustment will be applied.  Note that we accumulate
10498          * adjustments, in case multiple suspend cycles happen before some VCPU
10499          * gets a chance to run again.  In the event that no KVM threads get a
10500          * chance to run, we will miss the entire elapsed period, as we'll have
10501          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10502          * loose cycle time.  This isn't too big a deal, since the loss will be
10503          * uniform across all VCPUs (not to mention the scenario is extremely
10504          * unlikely). It is possible that a second hibernate recovery happens
10505          * much faster than a first, causing the observed TSC here to be
10506          * smaller; this would require additional padding adjustment, which is
10507          * why we set last_host_tsc to the local tsc observed here.
10508          *
10509          * N.B. - this code below runs only on platforms with reliable TSC,
10510          * as that is the only way backwards_tsc is set above.  Also note
10511          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10512          * have the same delta_cyc adjustment applied if backwards_tsc
10513          * is detected.  Note further, this adjustment is only done once,
10514          * as we reset last_host_tsc on all VCPUs to stop this from being
10515          * called multiple times (one for each physical CPU bringup).
10516          *
10517          * Platforms with unreliable TSCs don't have to deal with this, they
10518          * will be compensated by the logic in vcpu_load, which sets the TSC to
10519          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10520          * guarantee that they stay in perfect synchronization.
10521          */
10522         if (backwards_tsc) {
10523                 u64 delta_cyc = max_tsc - local_tsc;
10524                 list_for_each_entry(kvm, &vm_list, vm_list) {
10525                         kvm->arch.backwards_tsc_observed = true;
10526                         kvm_for_each_vcpu(i, vcpu, kvm) {
10527                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10528                                 vcpu->arch.last_host_tsc = local_tsc;
10529                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10530                         }
10531
10532                         /*
10533                          * We have to disable TSC offset matching.. if you were
10534                          * booting a VM while issuing an S4 host suspend....
10535                          * you may have some problem.  Solving this issue is
10536                          * left as an exercise to the reader.
10537                          */
10538                         kvm->arch.last_tsc_nsec = 0;
10539                         kvm->arch.last_tsc_write = 0;
10540                 }
10541
10542         }
10543         return 0;
10544 }
10545
10546 void kvm_arch_hardware_disable(void)
10547 {
10548         static_call(kvm_x86_hardware_disable)();
10549         drop_user_return_notifiers();
10550 }
10551
10552 int kvm_arch_hardware_setup(void *opaque)
10553 {
10554         struct kvm_x86_init_ops *ops = opaque;
10555         int r;
10556
10557         rdmsrl_safe(MSR_EFER, &host_efer);
10558
10559         if (boot_cpu_has(X86_FEATURE_XSAVES))
10560                 rdmsrl(MSR_IA32_XSS, host_xss);
10561
10562         r = ops->hardware_setup();
10563         if (r != 0)
10564                 return r;
10565
10566         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10567         kvm_ops_static_call_update();
10568
10569         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10570                 supported_xss = 0;
10571
10572 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10573         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10574 #undef __kvm_cpu_cap_has
10575
10576         if (kvm_has_tsc_control) {
10577                 /*
10578                  * Make sure the user can only configure tsc_khz values that
10579                  * fit into a signed integer.
10580                  * A min value is not calculated because it will always
10581                  * be 1 on all machines.
10582                  */
10583                 u64 max = min(0x7fffffffULL,
10584                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10585                 kvm_max_guest_tsc_khz = max;
10586
10587                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10588         }
10589
10590         kvm_init_msr_list();
10591         return 0;
10592 }
10593
10594 void kvm_arch_hardware_unsetup(void)
10595 {
10596         static_call(kvm_x86_hardware_unsetup)();
10597 }
10598
10599 int kvm_arch_check_processor_compat(void *opaque)
10600 {
10601         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10602         struct kvm_x86_init_ops *ops = opaque;
10603
10604         WARN_ON(!irqs_disabled());
10605
10606         if (__cr4_reserved_bits(cpu_has, c) !=
10607             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10608                 return -EIO;
10609
10610         return ops->check_processor_compatibility();
10611 }
10612
10613 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10614 {
10615         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10616 }
10617 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10618
10619 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10620 {
10621         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10622 }
10623
10624 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10625 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10626
10627 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10628 {
10629         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10630
10631         vcpu->arch.l1tf_flush_l1d = true;
10632         if (pmu->version && unlikely(pmu->event_count)) {
10633                 pmu->need_cleanup = true;
10634                 kvm_make_request(KVM_REQ_PMU, vcpu);
10635         }
10636         static_call(kvm_x86_sched_in)(vcpu, cpu);
10637 }
10638
10639 void kvm_arch_free_vm(struct kvm *kvm)
10640 {
10641         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10642         vfree(kvm);
10643 }
10644
10645
10646 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10647 {
10648         if (type)
10649                 return -EINVAL;
10650
10651         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10652         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10653         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10654         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10655         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10656         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10657
10658         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10659         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10660         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10661         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10662                 &kvm->arch.irq_sources_bitmap);
10663
10664         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10665         mutex_init(&kvm->arch.apic_map_lock);
10666         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10667
10668         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10669         pvclock_update_vm_gtod_copy(kvm);
10670
10671         kvm->arch.guest_can_read_msr_platform_info = true;
10672
10673         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10674         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10675
10676         kvm_hv_init_vm(kvm);
10677         kvm_page_track_init(kvm);
10678         kvm_mmu_init_vm(kvm);
10679
10680         return static_call(kvm_x86_vm_init)(kvm);
10681 }
10682
10683 int kvm_arch_post_init_vm(struct kvm *kvm)
10684 {
10685         return kvm_mmu_post_init_vm(kvm);
10686 }
10687
10688 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10689 {
10690         vcpu_load(vcpu);
10691         kvm_mmu_unload(vcpu);
10692         vcpu_put(vcpu);
10693 }
10694
10695 static void kvm_free_vcpus(struct kvm *kvm)
10696 {
10697         unsigned int i;
10698         struct kvm_vcpu *vcpu;
10699
10700         /*
10701          * Unpin any mmu pages first.
10702          */
10703         kvm_for_each_vcpu(i, vcpu, kvm) {
10704                 kvm_clear_async_pf_completion_queue(vcpu);
10705                 kvm_unload_vcpu_mmu(vcpu);
10706         }
10707         kvm_for_each_vcpu(i, vcpu, kvm)
10708                 kvm_vcpu_destroy(vcpu);
10709
10710         mutex_lock(&kvm->lock);
10711         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10712                 kvm->vcpus[i] = NULL;
10713
10714         atomic_set(&kvm->online_vcpus, 0);
10715         mutex_unlock(&kvm->lock);
10716 }
10717
10718 void kvm_arch_sync_events(struct kvm *kvm)
10719 {
10720         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10721         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10722         kvm_free_pit(kvm);
10723 }
10724
10725 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10726
10727 /**
10728  * __x86_set_memory_region: Setup KVM internal memory slot
10729  *
10730  * @kvm: the kvm pointer to the VM.
10731  * @id: the slot ID to setup.
10732  * @gpa: the GPA to install the slot (unused when @size == 0).
10733  * @size: the size of the slot. Set to zero to uninstall a slot.
10734  *
10735  * This function helps to setup a KVM internal memory slot.  Specify
10736  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10737  * slot.  The return code can be one of the following:
10738  *
10739  *   HVA:           on success (uninstall will return a bogus HVA)
10740  *   -errno:        on error
10741  *
10742  * The caller should always use IS_ERR() to check the return value
10743  * before use.  Note, the KVM internal memory slots are guaranteed to
10744  * remain valid and unchanged until the VM is destroyed, i.e., the
10745  * GPA->HVA translation will not change.  However, the HVA is a user
10746  * address, i.e. its accessibility is not guaranteed, and must be
10747  * accessed via __copy_{to,from}_user().
10748  */
10749 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10750                                       u32 size)
10751 {
10752         int i, r;
10753         unsigned long hva, old_npages;
10754         struct kvm_memslots *slots = kvm_memslots(kvm);
10755         struct kvm_memory_slot *slot;
10756
10757         /* Called with kvm->slots_lock held.  */
10758         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10759                 return ERR_PTR_USR(-EINVAL);
10760
10761         slot = id_to_memslot(slots, id);
10762         if (size) {
10763                 if (slot && slot->npages)
10764                         return ERR_PTR_USR(-EEXIST);
10765
10766                 /*
10767                  * MAP_SHARED to prevent internal slot pages from being moved
10768                  * by fork()/COW.
10769                  */
10770                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10771                               MAP_SHARED | MAP_ANONYMOUS, 0);
10772                 if (IS_ERR((void *)hva))
10773                         return (void __user *)hva;
10774         } else {
10775                 if (!slot || !slot->npages)
10776                         return NULL;
10777
10778                 old_npages = slot->npages;
10779                 hva = slot->userspace_addr;
10780         }
10781
10782         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10783                 struct kvm_userspace_memory_region m;
10784
10785                 m.slot = id | (i << 16);
10786                 m.flags = 0;
10787                 m.guest_phys_addr = gpa;
10788                 m.userspace_addr = hva;
10789                 m.memory_size = size;
10790                 r = __kvm_set_memory_region(kvm, &m);
10791                 if (r < 0)
10792                         return ERR_PTR_USR(r);
10793         }
10794
10795         if (!size)
10796                 vm_munmap(hva, old_npages * PAGE_SIZE);
10797
10798         return (void __user *)hva;
10799 }
10800 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10801
10802 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10803 {
10804         kvm_mmu_pre_destroy_vm(kvm);
10805 }
10806
10807 void kvm_arch_destroy_vm(struct kvm *kvm)
10808 {
10809         if (current->mm == kvm->mm) {
10810                 /*
10811                  * Free memory regions allocated on behalf of userspace,
10812                  * unless the the memory map has changed due to process exit
10813                  * or fd copying.
10814                  */
10815                 mutex_lock(&kvm->slots_lock);
10816                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10817                                         0, 0);
10818                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10819                                         0, 0);
10820                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10821                 mutex_unlock(&kvm->slots_lock);
10822         }
10823         static_call_cond(kvm_x86_vm_destroy)(kvm);
10824         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10825         kvm_pic_destroy(kvm);
10826         kvm_ioapic_destroy(kvm);
10827         kvm_free_vcpus(kvm);
10828         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10829         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10830         kvm_mmu_uninit_vm(kvm);
10831         kvm_page_track_cleanup(kvm);
10832         kvm_xen_destroy_vm(kvm);
10833         kvm_hv_destroy_vm(kvm);
10834 }
10835
10836 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10837 {
10838         int i;
10839
10840         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10841                 kvfree(slot->arch.rmap[i]);
10842                 slot->arch.rmap[i] = NULL;
10843
10844                 if (i == 0)
10845                         continue;
10846
10847                 kvfree(slot->arch.lpage_info[i - 1]);
10848                 slot->arch.lpage_info[i - 1] = NULL;
10849         }
10850
10851         kvm_page_track_free_memslot(slot);
10852 }
10853
10854 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10855                                       unsigned long npages)
10856 {
10857         int i;
10858
10859         /*
10860          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10861          * old arrays will be freed by __kvm_set_memory_region() if installing
10862          * the new memslot is successful.
10863          */
10864         memset(&slot->arch, 0, sizeof(slot->arch));
10865
10866         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10867                 struct kvm_lpage_info *linfo;
10868                 unsigned long ugfn;
10869                 int lpages;
10870                 int level = i + 1;
10871
10872                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10873                                       slot->base_gfn, level) + 1;
10874
10875                 slot->arch.rmap[i] =
10876                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10877                                  GFP_KERNEL_ACCOUNT);
10878                 if (!slot->arch.rmap[i])
10879                         goto out_free;
10880                 if (i == 0)
10881                         continue;
10882
10883                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10884                 if (!linfo)
10885                         goto out_free;
10886
10887                 slot->arch.lpage_info[i - 1] = linfo;
10888
10889                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10890                         linfo[0].disallow_lpage = 1;
10891                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10892                         linfo[lpages - 1].disallow_lpage = 1;
10893                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10894                 /*
10895                  * If the gfn and userspace address are not aligned wrt each
10896                  * other, disable large page support for this slot.
10897                  */
10898                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10899                         unsigned long j;
10900
10901                         for (j = 0; j < lpages; ++j)
10902                                 linfo[j].disallow_lpage = 1;
10903                 }
10904         }
10905
10906         if (kvm_page_track_create_memslot(slot, npages))
10907                 goto out_free;
10908
10909         return 0;
10910
10911 out_free:
10912         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10913                 kvfree(slot->arch.rmap[i]);
10914                 slot->arch.rmap[i] = NULL;
10915                 if (i == 0)
10916                         continue;
10917
10918                 kvfree(slot->arch.lpage_info[i - 1]);
10919                 slot->arch.lpage_info[i - 1] = NULL;
10920         }
10921         return -ENOMEM;
10922 }
10923
10924 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10925 {
10926         struct kvm_vcpu *vcpu;
10927         int i;
10928
10929         /*
10930          * memslots->generation has been incremented.
10931          * mmio generation may have reached its maximum value.
10932          */
10933         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10934
10935         /* Force re-initialization of steal_time cache */
10936         kvm_for_each_vcpu(i, vcpu, kvm)
10937                 kvm_vcpu_kick(vcpu);
10938 }
10939
10940 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10941                                 struct kvm_memory_slot *memslot,
10942                                 const struct kvm_userspace_memory_region *mem,
10943                                 enum kvm_mr_change change)
10944 {
10945         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10946                 return kvm_alloc_memslot_metadata(memslot,
10947                                                   mem->memory_size >> PAGE_SHIFT);
10948         return 0;
10949 }
10950
10951
10952 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
10953 {
10954         struct kvm_arch *ka = &kvm->arch;
10955
10956         if (!kvm_x86_ops.cpu_dirty_log_size)
10957                 return;
10958
10959         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
10960             (!enable && --ka->cpu_dirty_logging_count == 0))
10961                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
10962
10963         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
10964 }
10965
10966 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10967                                      struct kvm_memory_slot *old,
10968                                      struct kvm_memory_slot *new,
10969                                      enum kvm_mr_change change)
10970 {
10971         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
10972
10973         /*
10974          * Update CPU dirty logging if dirty logging is being toggled.  This
10975          * applies to all operations.
10976          */
10977         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
10978                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
10979
10980         /*
10981          * Nothing more to do for RO slots (which can't be dirtied and can't be
10982          * made writable) or CREATE/MOVE/DELETE of a slot.
10983          *
10984          * For a memslot with dirty logging disabled:
10985          * CREATE:      No dirty mappings will already exist.
10986          * MOVE/DELETE: The old mappings will already have been cleaned up by
10987          *              kvm_arch_flush_shadow_memslot()
10988          *
10989          * For a memslot with dirty logging enabled:
10990          * CREATE:      No shadow pages exist, thus nothing to write-protect
10991          *              and no dirty bits to clear.
10992          * MOVE/DELETE: The old mappings will already have been cleaned up by
10993          *              kvm_arch_flush_shadow_memslot().
10994          */
10995         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10996                 return;
10997
10998         /*
10999          * READONLY and non-flags changes were filtered out above, and the only
11000          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11001          * logging isn't being toggled on or off.
11002          */
11003         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11004                 return;
11005
11006         if (!log_dirty_pages) {
11007                 /*
11008                  * Dirty logging tracks sptes in 4k granularity, meaning that
11009                  * large sptes have to be split.  If live migration succeeds,
11010                  * the guest in the source machine will be destroyed and large
11011                  * sptes will be created in the destination.  However, if the
11012                  * guest continues to run in the source machine (for example if
11013                  * live migration fails), small sptes will remain around and
11014                  * cause bad performance.
11015                  *
11016                  * Scan sptes if dirty logging has been stopped, dropping those
11017                  * which can be collapsed into a single large-page spte.  Later
11018                  * page faults will create the large-page sptes.
11019                  */
11020                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11021         } else {
11022                 /* By default, write-protect everything to log writes. */
11023                 int level = PG_LEVEL_4K;
11024
11025                 if (kvm_x86_ops.cpu_dirty_log_size) {
11026                         /*
11027                          * Clear all dirty bits, unless pages are treated as
11028                          * dirty from the get-go.
11029                          */
11030                         if (!kvm_dirty_log_manual_protect_and_init_set(kvm))
11031                                 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11032
11033                         /*
11034                          * Write-protect large pages on write so that dirty
11035                          * logging happens at 4k granularity.  No need to
11036                          * write-protect small SPTEs since write accesses are
11037                          * logged by the CPU via dirty bits.
11038                          */
11039                         level = PG_LEVEL_2M;
11040                 } else if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
11041                         /*
11042                          * If we're with initial-all-set, we don't need
11043                          * to write protect any small page because
11044                          * they're reported as dirty already.  However
11045                          * we still need to write-protect huge pages
11046                          * so that the page split can happen lazily on
11047                          * the first write to the huge page.
11048                          */
11049                         level = PG_LEVEL_2M;
11050                 }
11051                 kvm_mmu_slot_remove_write_access(kvm, new, level);
11052         }
11053 }
11054
11055 void kvm_arch_commit_memory_region(struct kvm *kvm,
11056                                 const struct kvm_userspace_memory_region *mem,
11057                                 struct kvm_memory_slot *old,
11058                                 const struct kvm_memory_slot *new,
11059                                 enum kvm_mr_change change)
11060 {
11061         if (!kvm->arch.n_requested_mmu_pages)
11062                 kvm_mmu_change_mmu_pages(kvm,
11063                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11064
11065         /*
11066          * FIXME: const-ify all uses of struct kvm_memory_slot.
11067          */
11068         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11069
11070         /* Free the arrays associated with the old memslot. */
11071         if (change == KVM_MR_MOVE)
11072                 kvm_arch_free_memslot(kvm, old);
11073 }
11074
11075 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11076 {
11077         kvm_mmu_zap_all(kvm);
11078 }
11079
11080 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11081                                    struct kvm_memory_slot *slot)
11082 {
11083         kvm_page_track_flush_slot(kvm, slot);
11084 }
11085
11086 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11087 {
11088         return (is_guest_mode(vcpu) &&
11089                         kvm_x86_ops.guest_apic_has_interrupt &&
11090                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11091 }
11092
11093 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11094 {
11095         if (!list_empty_careful(&vcpu->async_pf.done))
11096                 return true;
11097
11098         if (kvm_apic_has_events(vcpu))
11099                 return true;
11100
11101         if (vcpu->arch.pv.pv_unhalted)
11102                 return true;
11103
11104         if (vcpu->arch.exception.pending)
11105                 return true;
11106
11107         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11108             (vcpu->arch.nmi_pending &&
11109              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11110                 return true;
11111
11112         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11113             (vcpu->arch.smi_pending &&
11114              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11115                 return true;
11116
11117         if (kvm_arch_interrupt_allowed(vcpu) &&
11118             (kvm_cpu_has_interrupt(vcpu) ||
11119             kvm_guest_apic_has_interrupt(vcpu)))
11120                 return true;
11121
11122         if (kvm_hv_has_stimer_pending(vcpu))
11123                 return true;
11124
11125         if (is_guest_mode(vcpu) &&
11126             kvm_x86_ops.nested_ops->hv_timer_pending &&
11127             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11128                 return true;
11129
11130         return false;
11131 }
11132
11133 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11134 {
11135         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11136 }
11137
11138 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11139 {
11140         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11141                 return true;
11142
11143         return false;
11144 }
11145
11146 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11147 {
11148         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11149                 return true;
11150
11151         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11152                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11153                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11154                 return true;
11155
11156         return kvm_arch_dy_has_pending_interrupt(vcpu);
11157 }
11158
11159 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11160 {
11161         if (vcpu->arch.guest_state_protected)
11162                 return true;
11163
11164         return vcpu->arch.preempted_in_kernel;
11165 }
11166
11167 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11168 {
11169         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11170 }
11171
11172 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11173 {
11174         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11175 }
11176
11177 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11178 {
11179         /* Can't read the RIP when guest state is protected, just return 0 */
11180         if (vcpu->arch.guest_state_protected)
11181                 return 0;
11182
11183         if (is_64_bit_mode(vcpu))
11184                 return kvm_rip_read(vcpu);
11185         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11186                      kvm_rip_read(vcpu));
11187 }
11188 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11189
11190 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11191 {
11192         return kvm_get_linear_rip(vcpu) == linear_rip;
11193 }
11194 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11195
11196 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11197 {
11198         unsigned long rflags;
11199
11200         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11201         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11202                 rflags &= ~X86_EFLAGS_TF;
11203         return rflags;
11204 }
11205 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11206
11207 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11208 {
11209         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11210             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11211                 rflags |= X86_EFLAGS_TF;
11212         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11213 }
11214
11215 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11216 {
11217         __kvm_set_rflags(vcpu, rflags);
11218         kvm_make_request(KVM_REQ_EVENT, vcpu);
11219 }
11220 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11221
11222 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11223 {
11224         int r;
11225
11226         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11227               work->wakeup_all)
11228                 return;
11229
11230         r = kvm_mmu_reload(vcpu);
11231         if (unlikely(r))
11232                 return;
11233
11234         if (!vcpu->arch.mmu->direct_map &&
11235               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11236                 return;
11237
11238         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11239 }
11240
11241 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11242 {
11243         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11244
11245         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11246 }
11247
11248 static inline u32 kvm_async_pf_next_probe(u32 key)
11249 {
11250         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11251 }
11252
11253 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11254 {
11255         u32 key = kvm_async_pf_hash_fn(gfn);
11256
11257         while (vcpu->arch.apf.gfns[key] != ~0)
11258                 key = kvm_async_pf_next_probe(key);
11259
11260         vcpu->arch.apf.gfns[key] = gfn;
11261 }
11262
11263 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11264 {
11265         int i;
11266         u32 key = kvm_async_pf_hash_fn(gfn);
11267
11268         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11269                      (vcpu->arch.apf.gfns[key] != gfn &&
11270                       vcpu->arch.apf.gfns[key] != ~0); i++)
11271                 key = kvm_async_pf_next_probe(key);
11272
11273         return key;
11274 }
11275
11276 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11277 {
11278         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11279 }
11280
11281 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11282 {
11283         u32 i, j, k;
11284
11285         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11286
11287         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11288                 return;
11289
11290         while (true) {
11291                 vcpu->arch.apf.gfns[i] = ~0;
11292                 do {
11293                         j = kvm_async_pf_next_probe(j);
11294                         if (vcpu->arch.apf.gfns[j] == ~0)
11295                                 return;
11296                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11297                         /*
11298                          * k lies cyclically in ]i,j]
11299                          * |    i.k.j |
11300                          * |....j i.k.| or  |.k..j i...|
11301                          */
11302                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11303                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11304                 i = j;
11305         }
11306 }
11307
11308 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11309 {
11310         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11311
11312         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11313                                       sizeof(reason));
11314 }
11315
11316 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11317 {
11318         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11319
11320         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11321                                              &token, offset, sizeof(token));
11322 }
11323
11324 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11325 {
11326         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11327         u32 val;
11328
11329         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11330                                          &val, offset, sizeof(val)))
11331                 return false;
11332
11333         return !val;
11334 }
11335
11336 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11337 {
11338         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11339                 return false;
11340
11341         if (!kvm_pv_async_pf_enabled(vcpu) ||
11342             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11343                 return false;
11344
11345         return true;
11346 }
11347
11348 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11349 {
11350         if (unlikely(!lapic_in_kernel(vcpu) ||
11351                      kvm_event_needs_reinjection(vcpu) ||
11352                      vcpu->arch.exception.pending))
11353                 return false;
11354
11355         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11356                 return false;
11357
11358         /*
11359          * If interrupts are off we cannot even use an artificial
11360          * halt state.
11361          */
11362         return kvm_arch_interrupt_allowed(vcpu);
11363 }
11364
11365 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11366                                      struct kvm_async_pf *work)
11367 {
11368         struct x86_exception fault;
11369
11370         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11371         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11372
11373         if (kvm_can_deliver_async_pf(vcpu) &&
11374             !apf_put_user_notpresent(vcpu)) {
11375                 fault.vector = PF_VECTOR;
11376                 fault.error_code_valid = true;
11377                 fault.error_code = 0;
11378                 fault.nested_page_fault = false;
11379                 fault.address = work->arch.token;
11380                 fault.async_page_fault = true;
11381                 kvm_inject_page_fault(vcpu, &fault);
11382                 return true;
11383         } else {
11384                 /*
11385                  * It is not possible to deliver a paravirtualized asynchronous
11386                  * page fault, but putting the guest in an artificial halt state
11387                  * can be beneficial nevertheless: if an interrupt arrives, we
11388                  * can deliver it timely and perhaps the guest will schedule
11389                  * another process.  When the instruction that triggered a page
11390                  * fault is retried, hopefully the page will be ready in the host.
11391                  */
11392                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11393                 return false;
11394         }
11395 }
11396
11397 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11398                                  struct kvm_async_pf *work)
11399 {
11400         struct kvm_lapic_irq irq = {
11401                 .delivery_mode = APIC_DM_FIXED,
11402                 .vector = vcpu->arch.apf.vec
11403         };
11404
11405         if (work->wakeup_all)
11406                 work->arch.token = ~0; /* broadcast wakeup */
11407         else
11408                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11409         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11410
11411         if ((work->wakeup_all || work->notpresent_injected) &&
11412             kvm_pv_async_pf_enabled(vcpu) &&
11413             !apf_put_user_ready(vcpu, work->arch.token)) {
11414                 vcpu->arch.apf.pageready_pending = true;
11415                 kvm_apic_set_irq(vcpu, &irq, NULL);
11416         }
11417
11418         vcpu->arch.apf.halted = false;
11419         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11420 }
11421
11422 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11423 {
11424         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11425         if (!vcpu->arch.apf.pageready_pending)
11426                 kvm_vcpu_kick(vcpu);
11427 }
11428
11429 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11430 {
11431         if (!kvm_pv_async_pf_enabled(vcpu))
11432                 return true;
11433         else
11434                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11435 }
11436
11437 void kvm_arch_start_assignment(struct kvm *kvm)
11438 {
11439         atomic_inc(&kvm->arch.assigned_device_count);
11440 }
11441 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11442
11443 void kvm_arch_end_assignment(struct kvm *kvm)
11444 {
11445         atomic_dec(&kvm->arch.assigned_device_count);
11446 }
11447 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11448
11449 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11450 {
11451         return atomic_read(&kvm->arch.assigned_device_count);
11452 }
11453 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11454
11455 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11456 {
11457         atomic_inc(&kvm->arch.noncoherent_dma_count);
11458 }
11459 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11460
11461 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11462 {
11463         atomic_dec(&kvm->arch.noncoherent_dma_count);
11464 }
11465 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11466
11467 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11468 {
11469         return atomic_read(&kvm->arch.noncoherent_dma_count);
11470 }
11471 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11472
11473 bool kvm_arch_has_irq_bypass(void)
11474 {
11475         return true;
11476 }
11477
11478 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11479                                       struct irq_bypass_producer *prod)
11480 {
11481         struct kvm_kernel_irqfd *irqfd =
11482                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11483         int ret;
11484
11485         irqfd->producer = prod;
11486         kvm_arch_start_assignment(irqfd->kvm);
11487         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11488                                          prod->irq, irqfd->gsi, 1);
11489
11490         if (ret)
11491                 kvm_arch_end_assignment(irqfd->kvm);
11492
11493         return ret;
11494 }
11495
11496 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11497                                       struct irq_bypass_producer *prod)
11498 {
11499         int ret;
11500         struct kvm_kernel_irqfd *irqfd =
11501                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11502
11503         WARN_ON(irqfd->producer != prod);
11504         irqfd->producer = NULL;
11505
11506         /*
11507          * When producer of consumer is unregistered, we change back to
11508          * remapped mode, so we can re-use the current implementation
11509          * when the irq is masked/disabled or the consumer side (KVM
11510          * int this case doesn't want to receive the interrupts.
11511         */
11512         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11513         if (ret)
11514                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11515                        " fails: %d\n", irqfd->consumer.token, ret);
11516
11517         kvm_arch_end_assignment(irqfd->kvm);
11518 }
11519
11520 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11521                                    uint32_t guest_irq, bool set)
11522 {
11523         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11524 }
11525
11526 bool kvm_vector_hashing_enabled(void)
11527 {
11528         return vector_hashing;
11529 }
11530
11531 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11532 {
11533         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11534 }
11535 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11536
11537
11538 int kvm_spec_ctrl_test_value(u64 value)
11539 {
11540         /*
11541          * test that setting IA32_SPEC_CTRL to given value
11542          * is allowed by the host processor
11543          */
11544
11545         u64 saved_value;
11546         unsigned long flags;
11547         int ret = 0;
11548
11549         local_irq_save(flags);
11550
11551         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11552                 ret = 1;
11553         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11554                 ret = 1;
11555         else
11556                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11557
11558         local_irq_restore(flags);
11559
11560         return ret;
11561 }
11562 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11563
11564 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11565 {
11566         struct x86_exception fault;
11567         u32 access = error_code &
11568                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11569
11570         if (!(error_code & PFERR_PRESENT_MASK) ||
11571             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11572                 /*
11573                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11574                  * tables probably do not match the TLB.  Just proceed
11575                  * with the error code that the processor gave.
11576                  */
11577                 fault.vector = PF_VECTOR;
11578                 fault.error_code_valid = true;
11579                 fault.error_code = error_code;
11580                 fault.nested_page_fault = false;
11581                 fault.address = gva;
11582         }
11583         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11584 }
11585 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11586
11587 /*
11588  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11589  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11590  * indicates whether exit to userspace is needed.
11591  */
11592 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11593                               struct x86_exception *e)
11594 {
11595         if (r == X86EMUL_PROPAGATE_FAULT) {
11596                 kvm_inject_emulated_page_fault(vcpu, e);
11597                 return 1;
11598         }
11599
11600         /*
11601          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11602          * while handling a VMX instruction KVM could've handled the request
11603          * correctly by exiting to userspace and performing I/O but there
11604          * doesn't seem to be a real use-case behind such requests, just return
11605          * KVM_EXIT_INTERNAL_ERROR for now.
11606          */
11607         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11608         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11609         vcpu->run->internal.ndata = 0;
11610
11611         return 0;
11612 }
11613 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11614
11615 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11616 {
11617         bool pcid_enabled;
11618         struct x86_exception e;
11619         unsigned i;
11620         unsigned long roots_to_free = 0;
11621         struct {
11622                 u64 pcid;
11623                 u64 gla;
11624         } operand;
11625         int r;
11626
11627         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11628         if (r != X86EMUL_CONTINUE)
11629                 return kvm_handle_memory_failure(vcpu, r, &e);
11630
11631         if (operand.pcid >> 12 != 0) {
11632                 kvm_inject_gp(vcpu, 0);
11633                 return 1;
11634         }
11635
11636         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11637
11638         switch (type) {
11639         case INVPCID_TYPE_INDIV_ADDR:
11640                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11641                     is_noncanonical_address(operand.gla, vcpu)) {
11642                         kvm_inject_gp(vcpu, 0);
11643                         return 1;
11644                 }
11645                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11646                 return kvm_skip_emulated_instruction(vcpu);
11647
11648         case INVPCID_TYPE_SINGLE_CTXT:
11649                 if (!pcid_enabled && (operand.pcid != 0)) {
11650                         kvm_inject_gp(vcpu, 0);
11651                         return 1;
11652                 }
11653
11654                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11655                         kvm_mmu_sync_roots(vcpu);
11656                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11657                 }
11658
11659                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11660                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11661                             == operand.pcid)
11662                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11663
11664                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11665                 /*
11666                  * If neither the current cr3 nor any of the prev_roots use the
11667                  * given PCID, then nothing needs to be done here because a
11668                  * resync will happen anyway before switching to any other CR3.
11669                  */
11670
11671                 return kvm_skip_emulated_instruction(vcpu);
11672
11673         case INVPCID_TYPE_ALL_NON_GLOBAL:
11674                 /*
11675                  * Currently, KVM doesn't mark global entries in the shadow
11676                  * page tables, so a non-global flush just degenerates to a
11677                  * global flush. If needed, we could optimize this later by
11678                  * keeping track of global entries in shadow page tables.
11679                  */
11680
11681                 fallthrough;
11682         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11683                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11684                 return kvm_skip_emulated_instruction(vcpu);
11685
11686         default:
11687                 BUG(); /* We have already checked above that type <= 3 */
11688         }
11689 }
11690 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11691
11692 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11693 {
11694         struct kvm_run *run = vcpu->run;
11695         struct kvm_mmio_fragment *frag;
11696         unsigned int len;
11697
11698         BUG_ON(!vcpu->mmio_needed);
11699
11700         /* Complete previous fragment */
11701         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11702         len = min(8u, frag->len);
11703         if (!vcpu->mmio_is_write)
11704                 memcpy(frag->data, run->mmio.data, len);
11705
11706         if (frag->len <= 8) {
11707                 /* Switch to the next fragment. */
11708                 frag++;
11709                 vcpu->mmio_cur_fragment++;
11710         } else {
11711                 /* Go forward to the next mmio piece. */
11712                 frag->data += len;
11713                 frag->gpa += len;
11714                 frag->len -= len;
11715         }
11716
11717         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11718                 vcpu->mmio_needed = 0;
11719
11720                 // VMG change, at this point, we're always done
11721                 // RIP has already been advanced
11722                 return 1;
11723         }
11724
11725         // More MMIO is needed
11726         run->mmio.phys_addr = frag->gpa;
11727         run->mmio.len = min(8u, frag->len);
11728         run->mmio.is_write = vcpu->mmio_is_write;
11729         if (run->mmio.is_write)
11730                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11731         run->exit_reason = KVM_EXIT_MMIO;
11732
11733         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11734
11735         return 0;
11736 }
11737
11738 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11739                           void *data)
11740 {
11741         int handled;
11742         struct kvm_mmio_fragment *frag;
11743
11744         if (!data)
11745                 return -EINVAL;
11746
11747         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11748         if (handled == bytes)
11749                 return 1;
11750
11751         bytes -= handled;
11752         gpa += handled;
11753         data += handled;
11754
11755         /*TODO: Check if need to increment number of frags */
11756         frag = vcpu->mmio_fragments;
11757         vcpu->mmio_nr_fragments = 1;
11758         frag->len = bytes;
11759         frag->gpa = gpa;
11760         frag->data = data;
11761
11762         vcpu->mmio_needed = 1;
11763         vcpu->mmio_cur_fragment = 0;
11764
11765         vcpu->run->mmio.phys_addr = gpa;
11766         vcpu->run->mmio.len = min(8u, frag->len);
11767         vcpu->run->mmio.is_write = 1;
11768         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11769         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11770
11771         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11772
11773         return 0;
11774 }
11775 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11776
11777 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11778                          void *data)
11779 {
11780         int handled;
11781         struct kvm_mmio_fragment *frag;
11782
11783         if (!data)
11784                 return -EINVAL;
11785
11786         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11787         if (handled == bytes)
11788                 return 1;
11789
11790         bytes -= handled;
11791         gpa += handled;
11792         data += handled;
11793
11794         /*TODO: Check if need to increment number of frags */
11795         frag = vcpu->mmio_fragments;
11796         vcpu->mmio_nr_fragments = 1;
11797         frag->len = bytes;
11798         frag->gpa = gpa;
11799         frag->data = data;
11800
11801         vcpu->mmio_needed = 1;
11802         vcpu->mmio_cur_fragment = 0;
11803
11804         vcpu->run->mmio.phys_addr = gpa;
11805         vcpu->run->mmio.len = min(8u, frag->len);
11806         vcpu->run->mmio.is_write = 0;
11807         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11808
11809         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11810
11811         return 0;
11812 }
11813 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11814
11815 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11816 {
11817         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11818                vcpu->arch.pio.count * vcpu->arch.pio.size);
11819         vcpu->arch.pio.count = 0;
11820
11821         return 1;
11822 }
11823
11824 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11825                            unsigned int port, void *data,  unsigned int count)
11826 {
11827         int ret;
11828
11829         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11830                                         data, count);
11831         if (ret)
11832                 return ret;
11833
11834         vcpu->arch.pio.count = 0;
11835
11836         return 0;
11837 }
11838
11839 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11840                           unsigned int port, void *data, unsigned int count)
11841 {
11842         int ret;
11843
11844         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11845                                        data, count);
11846         if (ret) {
11847                 vcpu->arch.pio.count = 0;
11848         } else {
11849                 vcpu->arch.guest_ins_data = data;
11850                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11851         }
11852
11853         return 0;
11854 }
11855
11856 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11857                          unsigned int port, void *data,  unsigned int count,
11858                          int in)
11859 {
11860         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11861                   : kvm_sev_es_outs(vcpu, size, port, data, count);
11862 }
11863 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11864
11865 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
11866 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11867 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11868 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11869 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11870 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11871 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11872 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11873 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11874 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11875 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11876 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11877 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11878 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11879 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11880 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11881 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11882 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11883 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11884 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11885 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11886 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11887 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11888 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11889 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11890 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11891 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);