arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/sched/isolation.h>
  55 #include <linux/mem_encrypt.h>
  56
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68 #include <asm/mshyperv.h>
  69 #include <asm/hypervisor.h>
  70 #include <asm/intel_pt.h>
  71 #include <clocksource/hyperv_timer.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__
  96 #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /*
 139  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 140  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 141  * advancement entirely.  Any other value is used as-is and disables adaptive
 142  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 143  */
 144 static int __read_mostly lapic_timer_advance_ns = -1;
 145 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 146
 147 static bool __read_mostly vector_hashing = true;
 148 module_param(vector_hashing, bool, S_IRUGO);
 149
 150 bool __read_mostly enable_vmware_backdoor = false;
 151 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 152 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 153
 154 static bool __read_mostly force_emulation_prefix = false;
 155 module_param(force_emulation_prefix, bool, S_IRUGO);
 156
 157 int __read_mostly pi_inject_timer = -1;
 158 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 159
 160 #define KVM_NR_SHARED_MSRS 16
 161
 162 struct kvm_shared_msrs_global {
 163         int nr;
 164         u32 msrs[KVM_NR_SHARED_MSRS];
 165 };
 166
 167 struct kvm_shared_msrs {
 168         struct user_return_notifier urn;
 169         bool registered;
 170         struct kvm_shared_msr_values {
 171                 u64 host;
 172                 u64 curr;
 173         } values[KVM_NR_SHARED_MSRS];
 174 };
 175
 176 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 177 static struct kvm_shared_msrs __percpu *shared_msrs;
 178
 179 struct kvm_stats_debugfs_item debugfs_entries[] = {
 180         { "pf_fixed", VCPU_STAT(pf_fixed) },
 181         { "pf_guest", VCPU_STAT(pf_guest) },
 182         { "tlb_flush", VCPU_STAT(tlb_flush) },
 183         { "invlpg", VCPU_STAT(invlpg) },
 184         { "exits", VCPU_STAT(exits) },
 185         { "io_exits", VCPU_STAT(io_exits) },
 186         { "mmio_exits", VCPU_STAT(mmio_exits) },
 187         { "signal_exits", VCPU_STAT(signal_exits) },
 188         { "irq_window", VCPU_STAT(irq_window_exits) },
 189         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 190         { "halt_exits", VCPU_STAT(halt_exits) },
 191         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 192         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 193         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 194         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 195         { "hypercalls", VCPU_STAT(hypercalls) },
 196         { "request_irq", VCPU_STAT(request_irq_exits) },
 197         { "irq_exits", VCPU_STAT(irq_exits) },
 198         { "host_state_reload", VCPU_STAT(host_state_reload) },
 199         { "fpu_reload", VCPU_STAT(fpu_reload) },
 200         { "insn_emulation", VCPU_STAT(insn_emulation) },
 201         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 202         { "irq_injections", VCPU_STAT(irq_injections) },
 203         { "nmi_injections", VCPU_STAT(nmi_injections) },
 204         { "req_event", VCPU_STAT(req_event) },
 205         { "l1d_flush", VCPU_STAT(l1d_flush) },
 206         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 207         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 208         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 209         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 210         { "mmu_flooded", VM_STAT(mmu_flooded) },
 211         { "mmu_recycled", VM_STAT(mmu_recycled) },
 212         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 213         { "mmu_unsync", VM_STAT(mmu_unsync) },
 214         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 215         { "largepages", VM_STAT(lpages, .mode = 0444) },
 216         { "max_mmu_page_hash_collisions",
 217                 VM_STAT(max_mmu_page_hash_collisions) },
 218         { NULL }
 219 };
 220
 221 u64 __read_mostly host_xcr0;
 222
 223 struct kmem_cache *x86_fpu_cache;
 224 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 225
 226 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 227
 228 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 229 {
 230         int i;
 231         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 232                 vcpu->arch.apf.gfns[i] = ~0;
 233 }
 234
 235 static void kvm_on_user_return(struct user_return_notifier *urn)
 236 {
 237         unsigned slot;
 238         struct kvm_shared_msrs *locals
 239                 = container_of(urn, struct kvm_shared_msrs, urn);
 240         struct kvm_shared_msr_values *values;
 241         unsigned long flags;
 242
 243         /*
 244          * Disabling irqs at this point since the following code could be
 245          * interrupted and executed through kvm_arch_hardware_disable()
 246          */
 247         local_irq_save(flags);
 248         if (locals->registered) {
 249                 locals->registered = false;
 250                 user_return_notifier_unregister(urn);
 251         }
 252         local_irq_restore(flags);
 253         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 254                 values = &locals->values[slot];
 255                 if (values->host != values->curr) {
 256                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 257                         values->curr = values->host;
 258                 }
 259         }
 260 }
 261
 262 static void shared_msr_update(unsigned slot, u32 msr)
 263 {
 264         u64 value;
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         /* only read, and nobody should modify it at this time,
 269          * so don't need lock */
 270         if (slot >= shared_msrs_global.nr) {
 271                 printk(KERN_ERR "kvm: invalid MSR slot!");
 272                 return;
 273         }
 274         rdmsrl_safe(msr, &value);
 275         smsr->values[slot].host = value;
 276         smsr->values[slot].curr = value;
 277 }
 278
 279 void kvm_define_shared_msr(unsigned slot, u32 msr)
 280 {
 281         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 282         shared_msrs_global.msrs[slot] = msr;
 283         if (slot >= shared_msrs_global.nr)
 284                 shared_msrs_global.nr = slot + 1;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 287
 288 static void kvm_shared_msr_cpu_online(void)
 289 {
 290         unsigned i;
 291
 292         for (i = 0; i < shared_msrs_global.nr; ++i)
 293                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 294 }
 295
 296 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 297 {
 298         unsigned int cpu = smp_processor_id();
 299         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 300         int err;
 301
 302         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 303                 return 0;
 304         smsr->values[slot].curr = value;
 305         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 306         if (err)
 307                 return 1;
 308
 309         if (!smsr->registered) {
 310                 smsr->urn.on_user_return = kvm_on_user_return;
 311                 user_return_notifier_register(&smsr->urn);
 312                 smsr->registered = true;
 313         }
 314         return 0;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 317
 318 static void drop_user_return_notifiers(void)
 319 {
 320         unsigned int cpu = smp_processor_id();
 321         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 322
 323         if (smsr->registered)
 324                 kvm_on_user_return(&smsr->urn);
 325 }
 326
 327 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 328 {
 329         return vcpu->arch.apic_base;
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 332
 333 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 334 {
 335         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 338
 339 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 340 {
 341         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 342         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 343         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 344                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 345
 346         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 347                 return 1;
 348         if (!msr_info->host_initiated) {
 349                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 350                         return 1;
 351                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 352                         return 1;
 353         }
 354
 355         kvm_lapic_set_base(vcpu, msr_info->data);
 356         return 0;
 357 }
 358 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 359
 360 asmlinkage __visible void kvm_spurious_fault(void)
 361 {
 362         /* Fault while not rebooting.  We want the trace. */
 363         BUG_ON(!kvm_rebooting);
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 366
 367 #define EXCPT_BENIGN            0
 368 #define EXCPT_CONTRIBUTORY      1
 369 #define EXCPT_PF                2
 370
 371 static int exception_class(int vector)
 372 {
 373         switch (vector) {
 374         case PF_VECTOR:
 375                 return EXCPT_PF;
 376         case DE_VECTOR:
 377         case TS_VECTOR:
 378         case NP_VECTOR:
 379         case SS_VECTOR:
 380         case GP_VECTOR:
 381                 return EXCPT_CONTRIBUTORY;
 382         default:
 383                 break;
 384         }
 385         return EXCPT_BENIGN;
 386 }
 387
 388 #define EXCPT_FAULT             0
 389 #define EXCPT_TRAP              1
 390 #define EXCPT_ABORT             2
 391 #define EXCPT_INTERRUPT         3
 392
 393 static int exception_type(int vector)
 394 {
 395         unsigned int mask;
 396
 397         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 398                 return EXCPT_INTERRUPT;
 399
 400         mask = 1 << vector;
 401
 402         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 403         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 404                 return EXCPT_TRAP;
 405
 406         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 407                 return EXCPT_ABORT;
 408
 409         /* Reserved exceptions will result in fault */
 410         return EXCPT_FAULT;
 411 }
 412
 413 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 414 {
 415         unsigned nr = vcpu->arch.exception.nr;
 416         bool has_payload = vcpu->arch.exception.has_payload;
 417         unsigned long payload = vcpu->arch.exception.payload;
 418
 419         if (!has_payload)
 420                 return;
 421
 422         switch (nr) {
 423         case DB_VECTOR:
 424                 /*
 425                  * "Certain debug exceptions may clear bit 0-3.  The
 426                  * remaining contents of the DR6 register are never
 427                  * cleared by the processor".
 428                  */
 429                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 430                 /*
 431                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 432                  */
 433                 vcpu->arch.dr6 |= DR6_RTM;
 434                 vcpu->arch.dr6 |= payload;
 435                 /*
 436                  * Bit 16 should be set in the payload whenever the #DB
 437                  * exception should clear DR6.RTM. This makes the payload
 438                  * compatible with the pending debug exceptions under VMX.
 439                  * Though not currently documented in the SDM, this also
 440                  * makes the payload compatible with the exit qualification
 441                  * for #DB exceptions under VMX.
 442                  */
 443                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 444                 break;
 445         case PF_VECTOR:
 446                 vcpu->arch.cr2 = payload;
 447                 break;
 448         }
 449
 450         vcpu->arch.exception.has_payload = false;
 451         vcpu->arch.exception.payload = 0;
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 454
 455 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 456                 unsigned nr, bool has_error, u32 error_code,
 457                 bool has_payload, unsigned long payload, bool reinject)
 458 {
 459         u32 prev_nr;
 460         int class1, class2;
 461
 462         kvm_make_request(KVM_REQ_EVENT, vcpu);
 463
 464         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 465         queue:
 466                 if (has_error && !is_protmode(vcpu))
 467                         has_error = false;
 468                 if (reinject) {
 469                         /*
 470                          * On vmentry, vcpu->arch.exception.pending is only
 471                          * true if an event injection was blocked by
 472                          * nested_run_pending.  In that case, however,
 473                          * vcpu_enter_guest requests an immediate exit,
 474                          * and the guest shouldn't proceed far enough to
 475                          * need reinjection.
 476                          */
 477                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 478                         vcpu->arch.exception.injected = true;
 479                         if (WARN_ON_ONCE(has_payload)) {
 480                                 /*
 481                                  * A reinjected event has already
 482                                  * delivered its payload.
 483                                  */
 484                                 has_payload = false;
 485                                 payload = 0;
 486                         }
 487                 } else {
 488                         vcpu->arch.exception.pending = true;
 489                         vcpu->arch.exception.injected = false;
 490                 }
 491                 vcpu->arch.exception.has_error_code = has_error;
 492                 vcpu->arch.exception.nr = nr;
 493                 vcpu->arch.exception.error_code = error_code;
 494                 vcpu->arch.exception.has_payload = has_payload;
 495                 vcpu->arch.exception.payload = payload;
 496                 /*
 497                  * In guest mode, payload delivery should be deferred,
 498                  * so that the L1 hypervisor can intercept #PF before
 499                  * CR2 is modified (or intercept #DB before DR6 is
 500                  * modified under nVMX).  However, for ABI
 501                  * compatibility with KVM_GET_VCPU_EVENTS and
 502                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 503                  * delivery unless userspace has enabled this
 504                  * functionality via the per-VM capability,
 505                  * KVM_CAP_EXCEPTION_PAYLOAD.
 506                  */
 507                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 508                     !is_guest_mode(vcpu))
 509                         kvm_deliver_exception_payload(vcpu);
 510                 return;
 511         }
 512
 513         /* to check exception */
 514         prev_nr = vcpu->arch.exception.nr;
 515         if (prev_nr == DF_VECTOR) {
 516                 /* triple fault -> shutdown */
 517                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 518                 return;
 519         }
 520         class1 = exception_class(prev_nr);
 521         class2 = exception_class(nr);
 522         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 523                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 524                 /*
 525                  * Generate double fault per SDM Table 5-5.  Set
 526                  * exception.pending = true so that the double fault
 527                  * can trigger a nested vmexit.
 528                  */
 529                 vcpu->arch.exception.pending = true;
 530                 vcpu->arch.exception.injected = false;
 531                 vcpu->arch.exception.has_error_code = true;
 532                 vcpu->arch.exception.nr = DF_VECTOR;
 533                 vcpu->arch.exception.error_code = 0;
 534                 vcpu->arch.exception.has_payload = false;
 535                 vcpu->arch.exception.payload = 0;
 536         } else
 537                 /* replace previous exception with a new one in a hope
 538                    that instruction re-execution will regenerate lost
 539                    exception */
 540                 goto queue;
 541 }
 542
 543 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 544 {
 545         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 548
 549 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 550 {
 551         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 554
 555 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 556                                   unsigned long payload)
 557 {
 558         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 559 }
 560
 561 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 562                                     u32 error_code, unsigned long payload)
 563 {
 564         kvm_multiple_exception(vcpu, nr, true, error_code,
 565                                true, payload, false);
 566 }
 567
 568 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 569 {
 570         if (err)
 571                 kvm_inject_gp(vcpu, 0);
 572         else
 573                 return kvm_skip_emulated_instruction(vcpu);
 574
 575         return 1;
 576 }
 577 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 578
 579 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 580 {
 581         ++vcpu->stat.pf_guest;
 582         vcpu->arch.exception.nested_apf =
 583                 is_guest_mode(vcpu) && fault->async_page_fault;
 584         if (vcpu->arch.exception.nested_apf) {
 585                 vcpu->arch.apf.nested_apf_token = fault->address;
 586                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 587         } else {
 588                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 589                                         fault->address);
 590         }
 591 }
 592 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 593
 594 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 595 {
 596         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 597                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 598         else
 599                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 600
 601         return fault->nested_page_fault;
 602 }
 603
 604 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 605 {
 606         atomic_inc(&vcpu->arch.nmi_queued);
 607         kvm_make_request(KVM_REQ_NMI, vcpu);
 608 }
 609 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 610
 611 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 612 {
 613         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 614 }
 615 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 616
 617 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 618 {
 619         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 622
 623 /*
 624  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 625  * a #GP and return false.
 626  */
 627 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 628 {
 629         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 630                 return true;
 631         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 632         return false;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 635
 636 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 637 {
 638         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 639                 return true;
 640
 641         kvm_queue_exception(vcpu, UD_VECTOR);
 642         return false;
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_require_dr);
 645
 646 /*
 647  * This function will be used to read from the physical memory of the currently
 648  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 649  * can read from guest physical or from the guest's guest physical memory.
 650  */
 651 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 652                             gfn_t ngfn, void *data, int offset, int len,
 653                             u32 access)
 654 {
 655         struct x86_exception exception;
 656         gfn_t real_gfn;
 657         gpa_t ngpa;
 658
 659         ngpa     = gfn_to_gpa(ngfn);
 660         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 661         if (real_gfn == UNMAPPED_GVA)
 662                 return -EFAULT;
 663
 664         real_gfn = gpa_to_gfn(real_gfn);
 665
 666         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 669
 670 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 671                                void *data, int offset, int len, u32 access)
 672 {
 673         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 674                                        data, offset, len, access);
 675 }
 676
 677 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 678 {
 679         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 680                rsvd_bits(1, 2);
 681 }
 682
 683 /*
 684  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 685  */
 686 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 687 {
 688         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 689         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 690         int i;
 691         int ret;
 692         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 693
 694         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 695                                       offset * sizeof(u64), sizeof(pdpte),
 696                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 697         if (ret < 0) {
 698                 ret = 0;
 699                 goto out;
 700         }
 701         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 702                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 703                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 704                         ret = 0;
 705                         goto out;
 706                 }
 707         }
 708         ret = 1;
 709
 710         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 711         __set_bit(VCPU_EXREG_PDPTR,
 712                   (unsigned long *)&vcpu->arch.regs_avail);
 713         __set_bit(VCPU_EXREG_PDPTR,
 714                   (unsigned long *)&vcpu->arch.regs_dirty);
 715 out:
 716
 717         return ret;
 718 }
 719 EXPORT_SYMBOL_GPL(load_pdptrs);
 720
 721 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 722 {
 723         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 724         bool changed = true;
 725         int offset;
 726         gfn_t gfn;
 727         int r;
 728
 729         if (!is_pae_paging(vcpu))
 730                 return false;
 731
 732         if (!test_bit(VCPU_EXREG_PDPTR,
 733                       (unsigned long *)&vcpu->arch.regs_avail))
 734                 return true;
 735
 736         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 737         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 738         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 739                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 740         if (r < 0)
 741                 goto out;
 742         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 743 out:
 744
 745         return changed;
 746 }
 747 EXPORT_SYMBOL_GPL(pdptrs_changed);
 748
 749 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 750 {
 751         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 752         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 753
 754         cr0 |= X86_CR0_ET;
 755
 756 #ifdef CONFIG_X86_64
 757         if (cr0 & 0xffffffff00000000UL)
 758                 return 1;
 759 #endif
 760
 761         cr0 &= ~CR0_RESERVED_BITS;
 762
 763         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 764                 return 1;
 765
 766         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 767                 return 1;
 768
 769         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 770 #ifdef CONFIG_X86_64
 771                 if ((vcpu->arch.efer & EFER_LME)) {
 772                         int cs_db, cs_l;
 773
 774                         if (!is_pae(vcpu))
 775                                 return 1;
 776                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 777                         if (cs_l)
 778                                 return 1;
 779                 } else
 780 #endif
 781                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 782                                                  kvm_read_cr3(vcpu)))
 783                         return 1;
 784         }
 785
 786         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 787                 return 1;
 788
 789         kvm_x86_ops->set_cr0(vcpu, cr0);
 790
 791         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 792                 kvm_clear_async_pf_completion_queue(vcpu);
 793                 kvm_async_pf_hash_reset(vcpu);
 794         }
 795
 796         if ((cr0 ^ old_cr0) & update_bits)
 797                 kvm_mmu_reset_context(vcpu);
 798
 799         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 800             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 801             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 802                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 803
 804         return 0;
 805 }
 806 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 807
 808 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 809 {
 810         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 811 }
 812 EXPORT_SYMBOL_GPL(kvm_lmsw);
 813
 814 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 815 {
 816         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 817                         !vcpu->guest_xcr0_loaded) {
 818                 /* kvm_set_xcr() also depends on this */
 819                 if (vcpu->arch.xcr0 != host_xcr0)
 820                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 821                 vcpu->guest_xcr0_loaded = 1;
 822         }
 823 }
 824 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 825
 826 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 827 {
 828         if (vcpu->guest_xcr0_loaded) {
 829                 if (vcpu->arch.xcr0 != host_xcr0)
 830                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 831                 vcpu->guest_xcr0_loaded = 0;
 832         }
 833 }
 834 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 835
 836 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 837 {
 838         u64 xcr0 = xcr;
 839         u64 old_xcr0 = vcpu->arch.xcr0;
 840         u64 valid_bits;
 841
 842         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 843         if (index != XCR_XFEATURE_ENABLED_MASK)
 844                 return 1;
 845         if (!(xcr0 & XFEATURE_MASK_FP))
 846                 return 1;
 847         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 848                 return 1;
 849
 850         /*
 851          * Do not allow the guest to set bits that we do not support
 852          * saving.  However, xcr0 bit 0 is always set, even if the
 853          * emulated CPU does not support XSAVE (see fx_init).
 854          */
 855         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 856         if (xcr0 & ~valid_bits)
 857                 return 1;
 858
 859         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 860             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 861                 return 1;
 862
 863         if (xcr0 & XFEATURE_MASK_AVX512) {
 864                 if (!(xcr0 & XFEATURE_MASK_YMM))
 865                         return 1;
 866                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 867                         return 1;
 868         }
 869         vcpu->arch.xcr0 = xcr0;
 870
 871         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 872                 kvm_update_cpuid(vcpu);
 873         return 0;
 874 }
 875
 876 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 877 {
 878         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 879             __kvm_set_xcr(vcpu, index, xcr)) {
 880                 kvm_inject_gp(vcpu, 0);
 881                 return 1;
 882         }
 883         return 0;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 886
 887 static int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 888 {
 889         if (cr4 & CR4_RESERVED_BITS)
 890                 return -EINVAL;
 891
 892         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 893                 return -EINVAL;
 894
 895         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 896                 return -EINVAL;
 897
 898         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 899                 return -EINVAL;
 900
 901         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 902                 return -EINVAL;
 903
 904         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 905                 return -EINVAL;
 906
 907         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 908                 return -EINVAL;
 909
 910         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 911                 return -EINVAL;
 912
 913         return 0;
 914 }
 915
 916 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 917 {
 918         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 919         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 920                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 921
 922         if (kvm_valid_cr4(vcpu, cr4))
 923                 return 1;
 924
 925         if (is_long_mode(vcpu)) {
 926                 if (!(cr4 & X86_CR4_PAE))
 927                         return 1;
 928         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 929                    && ((cr4 ^ old_cr4) & pdptr_bits)
 930                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 931                                    kvm_read_cr3(vcpu)))
 932                 return 1;
 933
 934         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 935                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 936                         return 1;
 937
 938                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 939                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 940                         return 1;
 941         }
 942
 943         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 944                 return 1;
 945
 946         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 947             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 948                 kvm_mmu_reset_context(vcpu);
 949
 950         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 951                 kvm_update_cpuid(vcpu);
 952
 953         return 0;
 954 }
 955 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 956
 957 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 958 {
 959         bool skip_tlb_flush = false;
 960 #ifdef CONFIG_X86_64
 961         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 962
 963         if (pcid_enabled) {
 964                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 965                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 966         }
 967 #endif
 968
 969         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 970                 if (!skip_tlb_flush) {
 971                         kvm_mmu_sync_roots(vcpu);
 972                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 973                 }
 974                 return 0;
 975         }
 976
 977         if (is_long_mode(vcpu) &&
 978             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 979                 return 1;
 980         else if (is_pae_paging(vcpu) &&
 981                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 982                 return 1;
 983
 984         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 985         vcpu->arch.cr3 = cr3;
 986         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 987
 988         return 0;
 989 }
 990 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 991
 992 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 993 {
 994         if (cr8 & CR8_RESERVED_BITS)
 995                 return 1;
 996         if (lapic_in_kernel(vcpu))
 997                 kvm_lapic_set_tpr(vcpu, cr8);
 998         else
 999                 vcpu->arch.cr8 = cr8;
1000         return 0;
1001 }
1002 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1003
1004 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1005 {
1006         if (lapic_in_kernel(vcpu))
1007                 return kvm_lapic_get_cr8(vcpu);
1008         else
1009                 return vcpu->arch.cr8;
1010 }
1011 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1012
1013 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1014 {
1015         int i;
1016
1017         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1018                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1019                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1020                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1021         }
1022 }
1023
1024 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1025 {
1026         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1027                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1028 }
1029
1030 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1031 {
1032         unsigned long dr7;
1033
1034         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1035                 dr7 = vcpu->arch.guest_debug_dr7;
1036         else
1037                 dr7 = vcpu->arch.dr7;
1038         kvm_x86_ops->set_dr7(vcpu, dr7);
1039         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1040         if (dr7 & DR7_BP_EN_MASK)
1041                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1042 }
1043
1044 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1045 {
1046         u64 fixed = DR6_FIXED_1;
1047
1048         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1049                 fixed |= DR6_RTM;
1050         return fixed;
1051 }
1052
1053 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1054 {
1055         switch (dr) {
1056         case 0 ... 3:
1057                 vcpu->arch.db[dr] = val;
1058                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1059                         vcpu->arch.eff_db[dr] = val;
1060                 break;
1061         case 4:
1062                 /* fall through */
1063         case 6:
1064                 if (val & 0xffffffff00000000ULL)
1065                         return -1; /* #GP */
1066                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1067                 kvm_update_dr6(vcpu);
1068                 break;
1069         case 5:
1070                 /* fall through */
1071         default: /* 7 */
1072                 if (val & 0xffffffff00000000ULL)
1073                         return -1; /* #GP */
1074                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1075                 kvm_update_dr7(vcpu);
1076                 break;
1077         }
1078
1079         return 0;
1080 }
1081
1082 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1083 {
1084         if (__kvm_set_dr(vcpu, dr, val)) {
1085                 kvm_inject_gp(vcpu, 0);
1086                 return 1;
1087         }
1088         return 0;
1089 }
1090 EXPORT_SYMBOL_GPL(kvm_set_dr);
1091
1092 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1093 {
1094         switch (dr) {
1095         case 0 ... 3:
1096                 *val = vcpu->arch.db[dr];
1097                 break;
1098         case 4:
1099                 /* fall through */
1100         case 6:
1101                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1102                         *val = vcpu->arch.dr6;
1103                 else
1104                         *val = kvm_x86_ops->get_dr6(vcpu);
1105                 break;
1106         case 5:
1107                 /* fall through */
1108         default: /* 7 */
1109                 *val = vcpu->arch.dr7;
1110                 break;
1111         }
1112         return 0;
1113 }
1114 EXPORT_SYMBOL_GPL(kvm_get_dr);
1115
1116 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1117 {
1118         u32 ecx = kvm_rcx_read(vcpu);
1119         u64 data;
1120         int err;
1121
1122         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1123         if (err)
1124                 return err;
1125         kvm_rax_write(vcpu, (u32)data);
1126         kvm_rdx_write(vcpu, data >> 32);
1127         return err;
1128 }
1129 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1130
1131 /*
1132  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1133  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1134  *
1135  * This list is modified at module load time to reflect the
1136  * capabilities of the host cpu. This capabilities test skips MSRs that are
1137  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1138  * may depend on host virtualization features rather than host cpu features.
1139  */
1140
1141 static u32 msrs_to_save[] = {
1142         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1143         MSR_STAR,
1144 #ifdef CONFIG_X86_64
1145         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1146 #endif
1147         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1148         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1149         MSR_IA32_SPEC_CTRL,
1150         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1151         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1152         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1153         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1154         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1155         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1156         MSR_IA32_UMWAIT_CONTROL,
1157
1158         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1159         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1160         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1161         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1162         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1163         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1164         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1165         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1166         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1167         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1168         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1169         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1170         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1171         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1172         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1173         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1174         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1175         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1176         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1177         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1178         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1179         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1180 };
1181
1182 static unsigned num_msrs_to_save;
1183
1184 static u32 emulated_msrs[] = {
1185         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1186         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1187         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1188         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1189         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1190         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1191         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1192         HV_X64_MSR_RESET,
1193         HV_X64_MSR_VP_INDEX,
1194         HV_X64_MSR_VP_RUNTIME,
1195         HV_X64_MSR_SCONTROL,
1196         HV_X64_MSR_STIMER0_CONFIG,
1197         HV_X64_MSR_VP_ASSIST_PAGE,
1198         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1199         HV_X64_MSR_TSC_EMULATION_STATUS,
1200
1201         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1202         MSR_KVM_PV_EOI_EN,
1203
1204         MSR_IA32_TSC_ADJUST,
1205         MSR_IA32_TSCDEADLINE,
1206         MSR_IA32_ARCH_CAPABILITIES,
1207         MSR_IA32_MISC_ENABLE,
1208         MSR_IA32_MCG_STATUS,
1209         MSR_IA32_MCG_CTL,
1210         MSR_IA32_MCG_EXT_CTL,
1211         MSR_IA32_SMBASE,
1212         MSR_SMI_COUNT,
1213         MSR_PLATFORM_INFO,
1214         MSR_MISC_FEATURES_ENABLES,
1215         MSR_AMD64_VIRT_SPEC_CTRL,
1216         MSR_IA32_POWER_CTL,
1217
1218         /*
1219          * The following list leaves out MSRs whose values are determined
1220          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1221          * We always support the "true" VMX control MSRs, even if the host
1222          * processor does not, so I am putting these registers here rather
1223          * than in msrs_to_save.
1224          */
1225         MSR_IA32_VMX_BASIC,
1226         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1227         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1228         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1229         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1230         MSR_IA32_VMX_MISC,
1231         MSR_IA32_VMX_CR0_FIXED0,
1232         MSR_IA32_VMX_CR4_FIXED0,
1233         MSR_IA32_VMX_VMCS_ENUM,
1234         MSR_IA32_VMX_PROCBASED_CTLS2,
1235         MSR_IA32_VMX_EPT_VPID_CAP,
1236         MSR_IA32_VMX_VMFUNC,
1237
1238         MSR_K7_HWCR,
1239         MSR_KVM_POLL_CONTROL,
1240 };
1241
1242 static unsigned num_emulated_msrs;
1243
1244 /*
1245  * List of msr numbers which are used to expose MSR-based features that
1246  * can be used by a hypervisor to validate requested CPU features.
1247  */
1248 static u32 msr_based_features[] = {
1249         MSR_IA32_VMX_BASIC,
1250         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1251         MSR_IA32_VMX_PINBASED_CTLS,
1252         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1253         MSR_IA32_VMX_PROCBASED_CTLS,
1254         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1255         MSR_IA32_VMX_EXIT_CTLS,
1256         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1257         MSR_IA32_VMX_ENTRY_CTLS,
1258         MSR_IA32_VMX_MISC,
1259         MSR_IA32_VMX_CR0_FIXED0,
1260         MSR_IA32_VMX_CR0_FIXED1,
1261         MSR_IA32_VMX_CR4_FIXED0,
1262         MSR_IA32_VMX_CR4_FIXED1,
1263         MSR_IA32_VMX_VMCS_ENUM,
1264         MSR_IA32_VMX_PROCBASED_CTLS2,
1265         MSR_IA32_VMX_EPT_VPID_CAP,
1266         MSR_IA32_VMX_VMFUNC,
1267
1268         MSR_F10H_DECFG,
1269         MSR_IA32_UCODE_REV,
1270         MSR_IA32_ARCH_CAPABILITIES,
1271 };
1272
1273 static unsigned int num_msr_based_features;
1274
1275 static u64 kvm_get_arch_capabilities(void)
1276 {
1277         u64 data = 0;
1278
1279         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1280                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1281
1282         /*
1283          * If we're doing cache flushes (either "always" or "cond")
1284          * we will do one whenever the guest does a vmlaunch/vmresume.
1285          * If an outer hypervisor is doing the cache flush for us
1286          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1287          * capability to the guest too, and if EPT is disabled we're not
1288          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1289          * require a nested hypervisor to do a flush of its own.
1290          */
1291         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1292                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1293
1294         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1295                 data |= ARCH_CAP_RDCL_NO;
1296         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1297                 data |= ARCH_CAP_SSB_NO;
1298         if (!boot_cpu_has_bug(X86_BUG_MDS))
1299                 data |= ARCH_CAP_MDS_NO;
1300
1301         /*
1302          * On TAA affected systems, export MDS_NO=0 when:
1303          *      - TSX is enabled on the host, i.e. X86_FEATURE_RTM=1.
1304          *      - Updated microcode is present. This is detected by
1305          *        the presence of ARCH_CAP_TSX_CTRL_MSR and ensures
1306          *        that VERW clears CPU buffers.
1307          *
1308          * When MDS_NO=0 is exported, guests deploy clear CPU buffer
1309          * mitigation and don't complain:
1310          *
1311          *      "Vulnerable: Clear CPU buffers attempted, no microcode"
1312          *
1313          * If TSX is disabled on the system, guests are also mitigated against
1314          * TAA and clear CPU buffer mitigation is not required for guests.
1315          */
1316         if (boot_cpu_has_bug(X86_BUG_TAA) && boot_cpu_has(X86_FEATURE_RTM) &&
1317             (data & ARCH_CAP_TSX_CTRL_MSR))
1318                 data &= ~ARCH_CAP_MDS_NO;
1319
1320         return data;
1321 }
1322
1323 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1324 {
1325         switch (msr->index) {
1326         case MSR_IA32_ARCH_CAPABILITIES:
1327                 msr->data = kvm_get_arch_capabilities();
1328                 break;
1329         case MSR_IA32_UCODE_REV:
1330                 rdmsrl_safe(msr->index, &msr->data);
1331                 break;
1332         default:
1333                 if (kvm_x86_ops->get_msr_feature(msr))
1334                         return 1;
1335         }
1336         return 0;
1337 }
1338
1339 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1340 {
1341         struct kvm_msr_entry msr;
1342         int r;
1343
1344         msr.index = index;
1345         r = kvm_get_msr_feature(&msr);
1346         if (r)
1347                 return r;
1348
1349         *data = msr.data;
1350
1351         return 0;
1352 }
1353
1354 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1355 {
1356         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1357                 return false;
1358
1359         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1360                 return false;
1361
1362         if (efer & (EFER_LME | EFER_LMA) &&
1363             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1364                 return false;
1365
1366         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1367                 return false;
1368
1369         return true;
1370
1371 }
1372 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1373 {
1374         if (efer & efer_reserved_bits)
1375                 return false;
1376
1377         return __kvm_valid_efer(vcpu, efer);
1378 }
1379 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1380
1381 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1382 {
1383         u64 old_efer = vcpu->arch.efer;
1384         u64 efer = msr_info->data;
1385
1386         if (efer & efer_reserved_bits)
1387                 return 1;
1388
1389         if (!msr_info->host_initiated) {
1390                 if (!__kvm_valid_efer(vcpu, efer))
1391                         return 1;
1392
1393                 if (is_paging(vcpu) &&
1394                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1395                         return 1;
1396         }
1397
1398         efer &= ~EFER_LMA;
1399         efer |= vcpu->arch.efer & EFER_LMA;
1400
1401         kvm_x86_ops->set_efer(vcpu, efer);
1402
1403         /* Update reserved bits */
1404         if ((efer ^ old_efer) & EFER_NX)
1405                 kvm_mmu_reset_context(vcpu);
1406
1407         return 0;
1408 }
1409
1410 void kvm_enable_efer_bits(u64 mask)
1411 {
1412        efer_reserved_bits &= ~mask;
1413 }
1414 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1415
1416 /*
1417  * Write @data into the MSR specified by @index.  Select MSR specific fault
1418  * checks are bypassed if @host_initiated is %true.
1419  * Returns 0 on success, non-0 otherwise.
1420  * Assumes vcpu_load() was already called.
1421  */
1422 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1423                          bool host_initiated)
1424 {
1425         struct msr_data msr;
1426
1427         switch (index) {
1428         case MSR_FS_BASE:
1429         case MSR_GS_BASE:
1430         case MSR_KERNEL_GS_BASE:
1431         case MSR_CSTAR:
1432         case MSR_LSTAR:
1433                 if (is_noncanonical_address(data, vcpu))
1434                         return 1;
1435                 break;
1436         case MSR_IA32_SYSENTER_EIP:
1437         case MSR_IA32_SYSENTER_ESP:
1438                 /*
1439                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1440                  * non-canonical address is written on Intel but not on
1441                  * AMD (which ignores the top 32-bits, because it does
1442                  * not implement 64-bit SYSENTER).
1443                  *
1444                  * 64-bit code should hence be able to write a non-canonical
1445                  * value on AMD.  Making the address canonical ensures that
1446                  * vmentry does not fail on Intel after writing a non-canonical
1447                  * value, and that something deterministic happens if the guest
1448                  * invokes 64-bit SYSENTER.
1449                  */
1450                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1451         }
1452
1453         msr.data = data;
1454         msr.index = index;
1455         msr.host_initiated = host_initiated;
1456
1457         return kvm_x86_ops->set_msr(vcpu, &msr);
1458 }
1459
1460 /*
1461  * Read the MSR specified by @index into @data.  Select MSR specific fault
1462  * checks are bypassed if @host_initiated is %true.
1463  * Returns 0 on success, non-0 otherwise.
1464  * Assumes vcpu_load() was already called.
1465  */
1466 static int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1467                          bool host_initiated)
1468 {
1469         struct msr_data msr;
1470         int ret;
1471
1472         msr.index = index;
1473         msr.host_initiated = host_initiated;
1474
1475         ret = kvm_x86_ops->get_msr(vcpu, &msr);
1476         if (!ret)
1477                 *data = msr.data;
1478         return ret;
1479 }
1480
1481 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1482 {
1483         return __kvm_get_msr(vcpu, index, data, false);
1484 }
1485 EXPORT_SYMBOL_GPL(kvm_get_msr);
1486
1487 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1488 {
1489         return __kvm_set_msr(vcpu, index, data, false);
1490 }
1491 EXPORT_SYMBOL_GPL(kvm_set_msr);
1492
1493 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1494 {
1495         u32 ecx = kvm_rcx_read(vcpu);
1496         u64 data;
1497
1498         if (kvm_get_msr(vcpu, ecx, &data)) {
1499                 trace_kvm_msr_read_ex(ecx);
1500                 kvm_inject_gp(vcpu, 0);
1501                 return 1;
1502         }
1503
1504         trace_kvm_msr_read(ecx, data);
1505
1506         kvm_rax_write(vcpu, data & -1u);
1507         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1508         return kvm_skip_emulated_instruction(vcpu);
1509 }
1510 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1511
1512 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1513 {
1514         u32 ecx = kvm_rcx_read(vcpu);
1515         u64 data = kvm_read_edx_eax(vcpu);
1516
1517         if (kvm_set_msr(vcpu, ecx, data)) {
1518                 trace_kvm_msr_write_ex(ecx, data);
1519                 kvm_inject_gp(vcpu, 0);
1520                 return 1;
1521         }
1522
1523         trace_kvm_msr_write(ecx, data);
1524         return kvm_skip_emulated_instruction(vcpu);
1525 }
1526 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1527
1528 /*
1529  * Adapt set_msr() to msr_io()'s calling convention
1530  */
1531 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1532 {
1533         return __kvm_get_msr(vcpu, index, data, true);
1534 }
1535
1536 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1537 {
1538         return __kvm_set_msr(vcpu, index, *data, true);
1539 }
1540
1541 #ifdef CONFIG_X86_64
1542 struct pvclock_gtod_data {
1543         seqcount_t      seq;
1544
1545         struct { /* extract of a clocksource struct */
1546                 int vclock_mode;
1547                 u64     cycle_last;
1548                 u64     mask;
1549                 u32     mult;
1550                 u32     shift;
1551         } clock;
1552
1553         u64             boot_ns;
1554         u64             nsec_base;
1555         u64             wall_time_sec;
1556 };
1557
1558 static struct pvclock_gtod_data pvclock_gtod_data;
1559
1560 static void update_pvclock_gtod(struct timekeeper *tk)
1561 {
1562         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1563         u64 boot_ns;
1564
1565         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1566
1567         write_seqcount_begin(&vdata->seq);
1568
1569         /* copy pvclock gtod data */
1570         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1571         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1572         vdata->clock.mask               = tk->tkr_mono.mask;
1573         vdata->clock.mult               = tk->tkr_mono.mult;
1574         vdata->clock.shift              = tk->tkr_mono.shift;
1575
1576         vdata->boot_ns                  = boot_ns;
1577         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1578
1579         vdata->wall_time_sec            = tk->xtime_sec;
1580
1581         write_seqcount_end(&vdata->seq);
1582 }
1583 #endif
1584
1585 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1586 {
1587         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1588         kvm_vcpu_kick(vcpu);
1589 }
1590
1591 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1592 {
1593         int version;
1594         int r;
1595         struct pvclock_wall_clock wc;
1596         struct timespec64 boot;
1597
1598         if (!wall_clock)
1599                 return;
1600
1601         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1602         if (r)
1603                 return;
1604
1605         if (version & 1)
1606                 ++version;  /* first time write, random junk */
1607
1608         ++version;
1609
1610         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1611                 return;
1612
1613         /*
1614          * The guest calculates current wall clock time by adding
1615          * system time (updated by kvm_guest_time_update below) to the
1616          * wall clock specified here.  guest system time equals host
1617          * system time for us, thus we must fill in host boot time here.
1618          */
1619         getboottime64(&boot);
1620
1621         if (kvm->arch.kvmclock_offset) {
1622                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1623                 boot = timespec64_sub(boot, ts);
1624         }
1625         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1626         wc.nsec = boot.tv_nsec;
1627         wc.version = version;
1628
1629         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1630
1631         version++;
1632         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1633 }
1634
1635 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1636 {
1637         do_shl32_div32(dividend, divisor);
1638         return dividend;
1639 }
1640
1641 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1642                                s8 *pshift, u32 *pmultiplier)
1643 {
1644         uint64_t scaled64;
1645         int32_t  shift = 0;
1646         uint64_t tps64;
1647         uint32_t tps32;
1648
1649         tps64 = base_hz;
1650         scaled64 = scaled_hz;
1651         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1652                 tps64 >>= 1;
1653                 shift--;
1654         }
1655
1656         tps32 = (uint32_t)tps64;
1657         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1658                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1659                         scaled64 >>= 1;
1660                 else
1661                         tps32 <<= 1;
1662                 shift++;
1663         }
1664
1665         *pshift = shift;
1666         *pmultiplier = div_frac(scaled64, tps32);
1667 }
1668
1669 #ifdef CONFIG_X86_64
1670 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1671 #endif
1672
1673 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1674 static unsigned long max_tsc_khz;
1675
1676 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1677 {
1678         u64 v = (u64)khz * (1000000 + ppm);
1679         do_div(v, 1000000);
1680         return v;
1681 }
1682
1683 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1684 {
1685         u64 ratio;
1686
1687         /* Guest TSC same frequency as host TSC? */
1688         if (!scale) {
1689                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1690                 return 0;
1691         }
1692
1693         /* TSC scaling supported? */
1694         if (!kvm_has_tsc_control) {
1695                 if (user_tsc_khz > tsc_khz) {
1696                         vcpu->arch.tsc_catchup = 1;
1697                         vcpu->arch.tsc_always_catchup = 1;
1698                         return 0;
1699                 } else {
1700                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1701                         return -1;
1702                 }
1703         }
1704
1705         /* TSC scaling required  - calculate ratio */
1706         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1707                                 user_tsc_khz, tsc_khz);
1708
1709         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1710                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1711                                     user_tsc_khz);
1712                 return -1;
1713         }
1714
1715         vcpu->arch.tsc_scaling_ratio = ratio;
1716         return 0;
1717 }
1718
1719 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1720 {
1721         u32 thresh_lo, thresh_hi;
1722         int use_scaling = 0;
1723
1724         /* tsc_khz can be zero if TSC calibration fails */
1725         if (user_tsc_khz == 0) {
1726                 /* set tsc_scaling_ratio to a safe value */
1727                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1728                 return -1;
1729         }
1730
1731         /* Compute a scale to convert nanoseconds in TSC cycles */
1732         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1733                            &vcpu->arch.virtual_tsc_shift,
1734                            &vcpu->arch.virtual_tsc_mult);
1735         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1736
1737         /*
1738          * Compute the variation in TSC rate which is acceptable
1739          * within the range of tolerance and decide if the
1740          * rate being applied is within that bounds of the hardware
1741          * rate.  If so, no scaling or compensation need be done.
1742          */
1743         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1744         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1745         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1746                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1747                 use_scaling = 1;
1748         }
1749         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1750 }
1751
1752 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1753 {
1754         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1755                                       vcpu->arch.virtual_tsc_mult,
1756                                       vcpu->arch.virtual_tsc_shift);
1757         tsc += vcpu->arch.this_tsc_write;
1758         return tsc;
1759 }
1760
1761 static inline int gtod_is_based_on_tsc(int mode)
1762 {
1763         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1764 }
1765
1766 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1767 {
1768 #ifdef CONFIG_X86_64
1769         bool vcpus_matched;
1770         struct kvm_arch *ka = &vcpu->kvm->arch;
1771         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1772
1773         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1774                          atomic_read(&vcpu->kvm->online_vcpus));
1775
1776         /*
1777          * Once the masterclock is enabled, always perform request in
1778          * order to update it.
1779          *
1780          * In order to enable masterclock, the host clocksource must be TSC
1781          * and the vcpus need to have matched TSCs.  When that happens,
1782          * perform request to enable masterclock.
1783          */
1784         if (ka->use_master_clock ||
1785             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1786                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1787
1788         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1789                             atomic_read(&vcpu->kvm->online_vcpus),
1790                             ka->use_master_clock, gtod->clock.vclock_mode);
1791 #endif
1792 }
1793
1794 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1795 {
1796         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1797         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1798 }
1799
1800 /*
1801  * Multiply tsc by a fixed point number represented by ratio.
1802  *
1803  * The most significant 64-N bits (mult) of ratio represent the
1804  * integral part of the fixed point number; the remaining N bits
1805  * (frac) represent the fractional part, ie. ratio represents a fixed
1806  * point number (mult + frac * 2^(-N)).
1807  *
1808  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1809  */
1810 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1811 {
1812         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1813 }
1814
1815 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1816 {
1817         u64 _tsc = tsc;
1818         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1819
1820         if (ratio != kvm_default_tsc_scaling_ratio)
1821                 _tsc = __scale_tsc(ratio, tsc);
1822
1823         return _tsc;
1824 }
1825 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1826
1827 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1828 {
1829         u64 tsc;
1830
1831         tsc = kvm_scale_tsc(vcpu, rdtsc());
1832
1833         return target_tsc - tsc;
1834 }
1835
1836 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1837 {
1838         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1839
1840         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1841 }
1842 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1843
1844 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1845 {
1846         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1847 }
1848
1849 static inline bool kvm_check_tsc_unstable(void)
1850 {
1851 #ifdef CONFIG_X86_64
1852         /*
1853          * TSC is marked unstable when we're running on Hyper-V,
1854          * 'TSC page' clocksource is good.
1855          */
1856         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1857                 return false;
1858 #endif
1859         return check_tsc_unstable();
1860 }
1861
1862 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1863 {
1864         struct kvm *kvm = vcpu->kvm;
1865         u64 offset, ns, elapsed;
1866         unsigned long flags;
1867         bool matched;
1868         bool already_matched;
1869         u64 data = msr->data;
1870         bool synchronizing = false;
1871
1872         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1873         offset = kvm_compute_tsc_offset(vcpu, data);
1874         ns = ktime_get_boottime_ns();
1875         elapsed = ns - kvm->arch.last_tsc_nsec;
1876
1877         if (vcpu->arch.virtual_tsc_khz) {
1878                 if (data == 0 && msr->host_initiated) {
1879                         /*
1880                          * detection of vcpu initialization -- need to sync
1881                          * with other vCPUs. This particularly helps to keep
1882                          * kvm_clock stable after CPU hotplug
1883                          */
1884                         synchronizing = true;
1885                 } else {
1886                         u64 tsc_exp = kvm->arch.last_tsc_write +
1887                                                 nsec_to_cycles(vcpu, elapsed);
1888                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1889                         /*
1890                          * Special case: TSC write with a small delta (1 second)
1891                          * of virtual cycle time against real time is
1892                          * interpreted as an attempt to synchronize the CPU.
1893                          */
1894                         synchronizing = data < tsc_exp + tsc_hz &&
1895                                         data + tsc_hz > tsc_exp;
1896                 }
1897         }
1898
1899         /*
1900          * For a reliable TSC, we can match TSC offsets, and for an unstable
1901          * TSC, we add elapsed time in this computation.  We could let the
1902          * compensation code attempt to catch up if we fall behind, but
1903          * it's better to try to match offsets from the beginning.
1904          */
1905         if (synchronizing &&
1906             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1907                 if (!kvm_check_tsc_unstable()) {
1908                         offset = kvm->arch.cur_tsc_offset;
1909                 } else {
1910                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1911                         data += delta;
1912                         offset = kvm_compute_tsc_offset(vcpu, data);
1913                 }
1914                 matched = true;
1915                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1916         } else {
1917                 /*
1918                  * We split periods of matched TSC writes into generations.
1919                  * For each generation, we track the original measured
1920                  * nanosecond time, offset, and write, so if TSCs are in
1921                  * sync, we can match exact offset, and if not, we can match
1922                  * exact software computation in compute_guest_tsc()
1923                  *
1924                  * These values are tracked in kvm->arch.cur_xxx variables.
1925                  */
1926                 kvm->arch.cur_tsc_generation++;
1927                 kvm->arch.cur_tsc_nsec = ns;
1928                 kvm->arch.cur_tsc_write = data;
1929                 kvm->arch.cur_tsc_offset = offset;
1930                 matched = false;
1931         }
1932
1933         /*
1934          * We also track th most recent recorded KHZ, write and time to
1935          * allow the matching interval to be extended at each write.
1936          */
1937         kvm->arch.last_tsc_nsec = ns;
1938         kvm->arch.last_tsc_write = data;
1939         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1940
1941         vcpu->arch.last_guest_tsc = data;
1942
1943         /* Keep track of which generation this VCPU has synchronized to */
1944         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1945         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1946         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1947
1948         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1949                 update_ia32_tsc_adjust_msr(vcpu, offset);
1950
1951         kvm_vcpu_write_tsc_offset(vcpu, offset);
1952         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1953
1954         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1955         if (!matched) {
1956                 kvm->arch.nr_vcpus_matched_tsc = 0;
1957         } else if (!already_matched) {
1958                 kvm->arch.nr_vcpus_matched_tsc++;
1959         }
1960
1961         kvm_track_tsc_matching(vcpu);
1962         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1963 }
1964
1965 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1966
1967 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1968                                            s64 adjustment)
1969 {
1970         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1971         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1972 }
1973
1974 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1975 {
1976         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1977                 WARN_ON(adjustment < 0);
1978         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1979         adjust_tsc_offset_guest(vcpu, adjustment);
1980 }
1981
1982 #ifdef CONFIG_X86_64
1983
1984 static u64 read_tsc(void)
1985 {
1986         u64 ret = (u64)rdtsc_ordered();
1987         u64 last = pvclock_gtod_data.clock.cycle_last;
1988
1989         if (likely(ret >= last))
1990                 return ret;
1991
1992         /*
1993          * GCC likes to generate cmov here, but this branch is extremely
1994          * predictable (it's just a function of time and the likely is
1995          * very likely) and there's a data dependence, so force GCC
1996          * to generate a branch instead.  I don't barrier() because
1997          * we don't actually need a barrier, and if this function
1998          * ever gets inlined it will generate worse code.
1999          */
2000         asm volatile ("");
2001         return last;
2002 }
2003
2004 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
2005 {
2006         long v;
2007         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2008         u64 tsc_pg_val;
2009
2010         switch (gtod->clock.vclock_mode) {
2011         case VCLOCK_HVCLOCK:
2012                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2013                                                   tsc_timestamp);
2014                 if (tsc_pg_val != U64_MAX) {
2015                         /* TSC page valid */
2016                         *mode = VCLOCK_HVCLOCK;
2017                         v = (tsc_pg_val - gtod->clock.cycle_last) &
2018                                 gtod->clock.mask;
2019                 } else {
2020                         /* TSC page invalid */
2021                         *mode = VCLOCK_NONE;
2022                 }
2023                 break;
2024         case VCLOCK_TSC:
2025                 *mode = VCLOCK_TSC;
2026                 *tsc_timestamp = read_tsc();
2027                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
2028                         gtod->clock.mask;
2029                 break;
2030         default:
2031                 *mode = VCLOCK_NONE;
2032         }
2033
2034         if (*mode == VCLOCK_NONE)
2035                 *tsc_timestamp = v = 0;
2036
2037         return v * gtod->clock.mult;
2038 }
2039
2040 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
2041 {
2042         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2043         unsigned long seq;
2044         int mode;
2045         u64 ns;
2046
2047         do {
2048                 seq = read_seqcount_begin(&gtod->seq);
2049                 ns = gtod->nsec_base;
2050                 ns += vgettsc(tsc_timestamp, &mode);
2051                 ns >>= gtod->clock.shift;
2052                 ns += gtod->boot_ns;
2053         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2054         *t = ns;
2055
2056         return mode;
2057 }
2058
2059 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2060 {
2061         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2062         unsigned long seq;
2063         int mode;
2064         u64 ns;
2065
2066         do {
2067                 seq = read_seqcount_begin(&gtod->seq);
2068                 ts->tv_sec = gtod->wall_time_sec;
2069                 ns = gtod->nsec_base;
2070                 ns += vgettsc(tsc_timestamp, &mode);
2071                 ns >>= gtod->clock.shift;
2072         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2073
2074         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2075         ts->tv_nsec = ns;
2076
2077         return mode;
2078 }
2079
2080 /* returns true if host is using TSC based clocksource */
2081 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2082 {
2083         /* checked again under seqlock below */
2084         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2085                 return false;
2086
2087         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
2088                                                       tsc_timestamp));
2089 }
2090
2091 /* returns true if host is using TSC based clocksource */
2092 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2093                                            u64 *tsc_timestamp)
2094 {
2095         /* checked again under seqlock below */
2096         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2097                 return false;
2098
2099         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2100 }
2101 #endif
2102
2103 /*
2104  *
2105  * Assuming a stable TSC across physical CPUS, and a stable TSC
2106  * across virtual CPUs, the following condition is possible.
2107  * Each numbered line represents an event visible to both
2108  * CPUs at the next numbered event.
2109  *
2110  * "timespecX" represents host monotonic time. "tscX" represents
2111  * RDTSC value.
2112  *
2113  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2114  *
2115  * 1.  read timespec0,tsc0
2116  * 2.                                   | timespec1 = timespec0 + N
2117  *                                      | tsc1 = tsc0 + M
2118  * 3. transition to guest               | transition to guest
2119  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2120  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2121  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2122  *
2123  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2124  *
2125  *      - ret0 < ret1
2126  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2127  *              ...
2128  *      - 0 < N - M => M < N
2129  *
2130  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2131  * always the case (the difference between two distinct xtime instances
2132  * might be smaller then the difference between corresponding TSC reads,
2133  * when updating guest vcpus pvclock areas).
2134  *
2135  * To avoid that problem, do not allow visibility of distinct
2136  * system_timestamp/tsc_timestamp values simultaneously: use a master
2137  * copy of host monotonic time values. Update that master copy
2138  * in lockstep.
2139  *
2140  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2141  *
2142  */
2143
2144 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2145 {
2146 #ifdef CONFIG_X86_64
2147         struct kvm_arch *ka = &kvm->arch;
2148         int vclock_mode;
2149         bool host_tsc_clocksource, vcpus_matched;
2150
2151         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2152                         atomic_read(&kvm->online_vcpus));
2153
2154         /*
2155          * If the host uses TSC clock, then passthrough TSC as stable
2156          * to the guest.
2157          */
2158         host_tsc_clocksource = kvm_get_time_and_clockread(
2159                                         &ka->master_kernel_ns,
2160                                         &ka->master_cycle_now);
2161
2162         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2163                                 && !ka->backwards_tsc_observed
2164                                 && !ka->boot_vcpu_runs_old_kvmclock;
2165
2166         if (ka->use_master_clock)
2167                 atomic_set(&kvm_guest_has_master_clock, 1);
2168
2169         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2170         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2171                                         vcpus_matched);
2172 #endif
2173 }
2174
2175 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2176 {
2177         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2178 }
2179
2180 static void kvm_gen_update_masterclock(struct kvm *kvm)
2181 {
2182 #ifdef CONFIG_X86_64
2183         int i;
2184         struct kvm_vcpu *vcpu;
2185         struct kvm_arch *ka = &kvm->arch;
2186
2187         spin_lock(&ka->pvclock_gtod_sync_lock);
2188         kvm_make_mclock_inprogress_request(kvm);
2189         /* no guest entries from this point */
2190         pvclock_update_vm_gtod_copy(kvm);
2191
2192         kvm_for_each_vcpu(i, vcpu, kvm)
2193                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2194
2195         /* guest entries allowed */
2196         kvm_for_each_vcpu(i, vcpu, kvm)
2197                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2198
2199         spin_unlock(&ka->pvclock_gtod_sync_lock);
2200 #endif
2201 }
2202
2203 u64 get_kvmclock_ns(struct kvm *kvm)
2204 {
2205         struct kvm_arch *ka = &kvm->arch;
2206         struct pvclock_vcpu_time_info hv_clock;
2207         u64 ret;
2208
2209         spin_lock(&ka->pvclock_gtod_sync_lock);
2210         if (!ka->use_master_clock) {
2211                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2212                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2213         }
2214
2215         hv_clock.tsc_timestamp = ka->master_cycle_now;
2216         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2217         spin_unlock(&ka->pvclock_gtod_sync_lock);
2218
2219         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2220         get_cpu();
2221
2222         if (__this_cpu_read(cpu_tsc_khz)) {
2223                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2224                                    &hv_clock.tsc_shift,
2225                                    &hv_clock.tsc_to_system_mul);
2226                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2227         } else
2228                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2229
2230         put_cpu();
2231
2232         return ret;
2233 }
2234
2235 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2236 {
2237         struct kvm_vcpu_arch *vcpu = &v->arch;
2238         struct pvclock_vcpu_time_info guest_hv_clock;
2239
2240         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2241                 &guest_hv_clock, sizeof(guest_hv_clock))))
2242                 return;
2243
2244         /* This VCPU is paused, but it's legal for a guest to read another
2245          * VCPU's kvmclock, so we really have to follow the specification where
2246          * it says that version is odd if data is being modified, and even after
2247          * it is consistent.
2248          *
2249          * Version field updates must be kept separate.  This is because
2250          * kvm_write_guest_cached might use a "rep movs" instruction, and
2251          * writes within a string instruction are weakly ordered.  So there
2252          * are three writes overall.
2253          *
2254          * As a small optimization, only write the version field in the first
2255          * and third write.  The vcpu->pv_time cache is still valid, because the
2256          * version field is the first in the struct.
2257          */
2258         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2259
2260         if (guest_hv_clock.version & 1)
2261                 ++guest_hv_clock.version;  /* first time write, random junk */
2262
2263         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2264         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2265                                 &vcpu->hv_clock,
2266                                 sizeof(vcpu->hv_clock.version));
2267
2268         smp_wmb();
2269
2270         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2271         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2272
2273         if (vcpu->pvclock_set_guest_stopped_request) {
2274                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2275                 vcpu->pvclock_set_guest_stopped_request = false;
2276         }
2277
2278         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2279
2280         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2281                                 &vcpu->hv_clock,
2282                                 sizeof(vcpu->hv_clock));
2283
2284         smp_wmb();
2285
2286         vcpu->hv_clock.version++;
2287         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2288                                 &vcpu->hv_clock,
2289                                 sizeof(vcpu->hv_clock.version));
2290 }
2291
2292 static int kvm_guest_time_update(struct kvm_vcpu *v)
2293 {
2294         unsigned long flags, tgt_tsc_khz;
2295         struct kvm_vcpu_arch *vcpu = &v->arch;
2296         struct kvm_arch *ka = &v->kvm->arch;
2297         s64 kernel_ns;
2298         u64 tsc_timestamp, host_tsc;
2299         u8 pvclock_flags;
2300         bool use_master_clock;
2301
2302         kernel_ns = 0;
2303         host_tsc = 0;
2304
2305         /*
2306          * If the host uses TSC clock, then passthrough TSC as stable
2307          * to the guest.
2308          */
2309         spin_lock(&ka->pvclock_gtod_sync_lock);
2310         use_master_clock = ka->use_master_clock;
2311         if (use_master_clock) {
2312                 host_tsc = ka->master_cycle_now;
2313                 kernel_ns = ka->master_kernel_ns;
2314         }
2315         spin_unlock(&ka->pvclock_gtod_sync_lock);
2316
2317         /* Keep irq disabled to prevent changes to the clock */
2318         local_irq_save(flags);
2319         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2320         if (unlikely(tgt_tsc_khz == 0)) {
2321                 local_irq_restore(flags);
2322                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2323                 return 1;
2324         }
2325         if (!use_master_clock) {
2326                 host_tsc = rdtsc();
2327                 kernel_ns = ktime_get_boottime_ns();
2328         }
2329
2330         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2331
2332         /*
2333          * We may have to catch up the TSC to match elapsed wall clock
2334          * time for two reasons, even if kvmclock is used.
2335          *   1) CPU could have been running below the maximum TSC rate
2336          *   2) Broken TSC compensation resets the base at each VCPU
2337          *      entry to avoid unknown leaps of TSC even when running
2338          *      again on the same CPU.  This may cause apparent elapsed
2339          *      time to disappear, and the guest to stand still or run
2340          *      very slowly.
2341          */
2342         if (vcpu->tsc_catchup) {
2343                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2344                 if (tsc > tsc_timestamp) {
2345                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2346                         tsc_timestamp = tsc;
2347                 }
2348         }
2349
2350         local_irq_restore(flags);
2351
2352         /* With all the info we got, fill in the values */
2353
2354         if (kvm_has_tsc_control)
2355                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2356
2357         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2358                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2359                                    &vcpu->hv_clock.tsc_shift,
2360                                    &vcpu->hv_clock.tsc_to_system_mul);
2361                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2362         }
2363
2364         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2365         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2366         vcpu->last_guest_tsc = tsc_timestamp;
2367
2368         /* If the host uses TSC clocksource, then it is stable */
2369         pvclock_flags = 0;
2370         if (use_master_clock)
2371                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2372
2373         vcpu->hv_clock.flags = pvclock_flags;
2374
2375         if (vcpu->pv_time_enabled)
2376                 kvm_setup_pvclock_page(v);
2377         if (v == kvm_get_vcpu(v->kvm, 0))
2378                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2379         return 0;
2380 }
2381
2382 /*
2383  * kvmclock updates which are isolated to a given vcpu, such as
2384  * vcpu->cpu migration, should not allow system_timestamp from
2385  * the rest of the vcpus to remain static. Otherwise ntp frequency
2386  * correction applies to one vcpu's system_timestamp but not
2387  * the others.
2388  *
2389  * So in those cases, request a kvmclock update for all vcpus.
2390  * We need to rate-limit these requests though, as they can
2391  * considerably slow guests that have a large number of vcpus.
2392  * The time for a remote vcpu to update its kvmclock is bound
2393  * by the delay we use to rate-limit the updates.
2394  */
2395
2396 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2397
2398 static void kvmclock_update_fn(struct work_struct *work)
2399 {
2400         int i;
2401         struct delayed_work *dwork = to_delayed_work(work);
2402         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2403                                            kvmclock_update_work);
2404         struct kvm *kvm = container_of(ka, struct kvm, arch);
2405         struct kvm_vcpu *vcpu;
2406
2407         kvm_for_each_vcpu(i, vcpu, kvm) {
2408                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2409                 kvm_vcpu_kick(vcpu);
2410         }
2411 }
2412
2413 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2414 {
2415         struct kvm *kvm = v->kvm;
2416
2417         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2418         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2419                                         KVMCLOCK_UPDATE_DELAY);
2420 }
2421
2422 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2423
2424 static void kvmclock_sync_fn(struct work_struct *work)
2425 {
2426         struct delayed_work *dwork = to_delayed_work(work);
2427         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2428                                            kvmclock_sync_work);
2429         struct kvm *kvm = container_of(ka, struct kvm, arch);
2430
2431         if (!kvmclock_periodic_sync)
2432                 return;
2433
2434         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2435         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2436                                         KVMCLOCK_SYNC_PERIOD);
2437 }
2438
2439 /*
2440  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2441  */
2442 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2443 {
2444         /* McStatusWrEn enabled? */
2445         if (guest_cpuid_is_amd(vcpu))
2446                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2447
2448         return false;
2449 }
2450
2451 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2452 {
2453         u64 mcg_cap = vcpu->arch.mcg_cap;
2454         unsigned bank_num = mcg_cap & 0xff;
2455         u32 msr = msr_info->index;
2456         u64 data = msr_info->data;
2457
2458         switch (msr) {
2459         case MSR_IA32_MCG_STATUS:
2460                 vcpu->arch.mcg_status = data;
2461                 break;
2462         case MSR_IA32_MCG_CTL:
2463                 if (!(mcg_cap & MCG_CTL_P) &&
2464                     (data || !msr_info->host_initiated))
2465                         return 1;
2466                 if (data != 0 && data != ~(u64)0)
2467                         return 1;
2468                 vcpu->arch.mcg_ctl = data;
2469                 break;
2470         default:
2471                 if (msr >= MSR_IA32_MC0_CTL &&
2472                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2473                         u32 offset = msr - MSR_IA32_MC0_CTL;
2474                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2475                          * some Linux kernels though clear bit 10 in bank 4 to
2476                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2477                          * this to avoid an uncatched #GP in the guest
2478                          */
2479                         if ((offset & 0x3) == 0 &&
2480                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2481                                 return -1;
2482
2483                         /* MCi_STATUS */
2484                         if (!msr_info->host_initiated &&
2485                             (offset & 0x3) == 1 && data != 0) {
2486                                 if (!can_set_mci_status(vcpu))
2487                                         return -1;
2488                         }
2489
2490                         vcpu->arch.mce_banks[offset] = data;
2491                         break;
2492                 }
2493                 return 1;
2494         }
2495         return 0;
2496 }
2497
2498 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2499 {
2500         struct kvm *kvm = vcpu->kvm;
2501         int lm = is_long_mode(vcpu);
2502         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2503                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2504         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2505                 : kvm->arch.xen_hvm_config.blob_size_32;
2506         u32 page_num = data & ~PAGE_MASK;
2507         u64 page_addr = data & PAGE_MASK;
2508         u8 *page;
2509         int r;
2510
2511         r = -E2BIG;
2512         if (page_num >= blob_size)
2513                 goto out;
2514         r = -ENOMEM;
2515         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2516         if (IS_ERR(page)) {
2517                 r = PTR_ERR(page);
2518                 goto out;
2519         }
2520         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2521                 goto out_free;
2522         r = 0;
2523 out_free:
2524         kfree(page);
2525 out:
2526         return r;
2527 }
2528
2529 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2530 {
2531         gpa_t gpa = data & ~0x3f;
2532
2533         /* Bits 3:5 are reserved, Should be zero */
2534         if (data & 0x38)
2535                 return 1;
2536
2537         vcpu->arch.apf.msr_val = data;
2538
2539         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2540                 kvm_clear_async_pf_completion_queue(vcpu);
2541                 kvm_async_pf_hash_reset(vcpu);
2542                 return 0;
2543         }
2544
2545         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2546                                         sizeof(u32)))
2547                 return 1;
2548
2549         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2550         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2551         kvm_async_pf_wakeup_all(vcpu);
2552         return 0;
2553 }
2554
2555 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2556 {
2557         vcpu->arch.pv_time_enabled = false;
2558         vcpu->arch.time = 0;
2559 }
2560
2561 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2562 {
2563         ++vcpu->stat.tlb_flush;
2564         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2565 }
2566
2567 static void record_steal_time(struct kvm_vcpu *vcpu)
2568 {
2569         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2570                 return;
2571
2572         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2573                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2574                 return;
2575
2576         /*
2577          * Doing a TLB flush here, on the guest's behalf, can avoid
2578          * expensive IPIs.
2579          */
2580         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2581                 vcpu->arch.st.steal.preempted & KVM_VCPU_FLUSH_TLB);
2582         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2583                 kvm_vcpu_flush_tlb(vcpu, false);
2584
2585         if (vcpu->arch.st.steal.version & 1)
2586                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2587
2588         vcpu->arch.st.steal.version += 1;
2589
2590         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2591                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2592
2593         smp_wmb();
2594
2595         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2596                 vcpu->arch.st.last_steal;
2597         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2598
2599         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2600                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2601
2602         smp_wmb();
2603
2604         vcpu->arch.st.steal.version += 1;
2605
2606         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2607                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2608 }
2609
2610 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2611 {
2612         bool pr = false;
2613         u32 msr = msr_info->index;
2614         u64 data = msr_info->data;
2615
2616         switch (msr) {
2617         case MSR_AMD64_NB_CFG:
2618         case MSR_IA32_UCODE_WRITE:
2619         case MSR_VM_HSAVE_PA:
2620         case MSR_AMD64_PATCH_LOADER:
2621         case MSR_AMD64_BU_CFG2:
2622         case MSR_AMD64_DC_CFG:
2623         case MSR_F15H_EX_CFG:
2624                 break;
2625
2626         case MSR_IA32_UCODE_REV:
2627                 if (msr_info->host_initiated)
2628                         vcpu->arch.microcode_version = data;
2629                 break;
2630         case MSR_IA32_ARCH_CAPABILITIES:
2631                 if (!msr_info->host_initiated)
2632                         return 1;
2633                 vcpu->arch.arch_capabilities = data;
2634                 break;
2635         case MSR_EFER:
2636                 return set_efer(vcpu, msr_info);
2637         case MSR_K7_HWCR:
2638                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2639                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2640                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2641
2642                 /* Handle McStatusWrEn */
2643                 if (data == BIT_ULL(18)) {
2644                         vcpu->arch.msr_hwcr = data;
2645                 } else if (data != 0) {
2646                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2647                                     data);
2648                         return 1;
2649                 }
2650                 break;
2651         case MSR_FAM10H_MMIO_CONF_BASE:
2652                 if (data != 0) {
2653                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2654                                     "0x%llx\n", data);
2655                         return 1;
2656                 }
2657                 break;
2658         case MSR_IA32_DEBUGCTLMSR:
2659                 if (!data) {
2660                         /* We support the non-activated case already */
2661                         break;
2662                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2663                         /* Values other than LBR and BTF are vendor-specific,
2664                            thus reserved and should throw a #GP */
2665                         return 1;
2666                 }
2667                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2668                             __func__, data);
2669                 break;
2670         case 0x200 ... 0x2ff:
2671                 return kvm_mtrr_set_msr(vcpu, msr, data);
2672         case MSR_IA32_APICBASE:
2673                 return kvm_set_apic_base(vcpu, msr_info);
2674         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2675                 return kvm_x2apic_msr_write(vcpu, msr, data);
2676         case MSR_IA32_TSCDEADLINE:
2677                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2678                 break;
2679         case MSR_IA32_TSC_ADJUST:
2680                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2681                         if (!msr_info->host_initiated) {
2682                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2683                                 adjust_tsc_offset_guest(vcpu, adj);
2684                         }
2685                         vcpu->arch.ia32_tsc_adjust_msr = data;
2686                 }
2687                 break;
2688         case MSR_IA32_MISC_ENABLE:
2689                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2690                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2691                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2692                                 return 1;
2693                         vcpu->arch.ia32_misc_enable_msr = data;
2694                         kvm_update_cpuid(vcpu);
2695                 } else {
2696                         vcpu->arch.ia32_misc_enable_msr = data;
2697                 }
2698                 break;
2699         case MSR_IA32_SMBASE:
2700                 if (!msr_info->host_initiated)
2701                         return 1;
2702                 vcpu->arch.smbase = data;
2703                 break;
2704         case MSR_IA32_POWER_CTL:
2705                 vcpu->arch.msr_ia32_power_ctl = data;
2706                 break;
2707         case MSR_IA32_TSC:
2708                 kvm_write_tsc(vcpu, msr_info);
2709                 break;
2710         case MSR_SMI_COUNT:
2711                 if (!msr_info->host_initiated)
2712                         return 1;
2713                 vcpu->arch.smi_count = data;
2714                 break;
2715         case MSR_KVM_WALL_CLOCK_NEW:
2716         case MSR_KVM_WALL_CLOCK:
2717                 vcpu->kvm->arch.wall_clock = data;
2718                 kvm_write_wall_clock(vcpu->kvm, data);
2719                 break;
2720         case MSR_KVM_SYSTEM_TIME_NEW:
2721         case MSR_KVM_SYSTEM_TIME: {
2722                 struct kvm_arch *ka = &vcpu->kvm->arch;
2723
2724                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2725                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2726
2727                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2728                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2729
2730                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2731                 }
2732
2733                 vcpu->arch.time = data;
2734                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2735
2736                 /* we verify if the enable bit is set... */
2737                 vcpu->arch.pv_time_enabled = false;
2738                 if (!(data & 1))
2739                         break;
2740
2741                 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2742                      &vcpu->arch.pv_time, data & ~1ULL,
2743                      sizeof(struct pvclock_vcpu_time_info)))
2744                         vcpu->arch.pv_time_enabled = true;
2745
2746                 break;
2747         }
2748         case MSR_KVM_ASYNC_PF_EN:
2749                 if (kvm_pv_enable_async_pf(vcpu, data))
2750                         return 1;
2751                 break;
2752         case MSR_KVM_STEAL_TIME:
2753
2754                 if (unlikely(!sched_info_on()))
2755                         return 1;
2756
2757                 if (data & KVM_STEAL_RESERVED_MASK)
2758                         return 1;
2759
2760                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2761                                                 data & KVM_STEAL_VALID_BITS,
2762                                                 sizeof(struct kvm_steal_time)))
2763                         return 1;
2764
2765                 vcpu->arch.st.msr_val = data;
2766
2767                 if (!(data & KVM_MSR_ENABLED))
2768                         break;
2769
2770                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2771
2772                 break;
2773         case MSR_KVM_PV_EOI_EN:
2774                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2775                         return 1;
2776                 break;
2777
2778         case MSR_KVM_POLL_CONTROL:
2779                 /* only enable bit supported */
2780                 if (data & (-1ULL << 1))
2781                         return 1;
2782
2783                 vcpu->arch.msr_kvm_poll_control = data;
2784                 break;
2785
2786         case MSR_IA32_MCG_CTL:
2787         case MSR_IA32_MCG_STATUS:
2788         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2789                 return set_msr_mce(vcpu, msr_info);
2790
2791         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2792         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2793                 pr = true; /* fall through */
2794         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2795         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2796                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2797                         return kvm_pmu_set_msr(vcpu, msr_info);
2798
2799                 if (pr || data != 0)
2800                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2801                                     "0x%x data 0x%llx\n", msr, data);
2802                 break;
2803         case MSR_K7_CLK_CTL:
2804                 /*
2805                  * Ignore all writes to this no longer documented MSR.
2806                  * Writes are only relevant for old K7 processors,
2807                  * all pre-dating SVM, but a recommended workaround from
2808                  * AMD for these chips. It is possible to specify the
2809                  * affected processor models on the command line, hence
2810                  * the need to ignore the workaround.
2811                  */
2812                 break;
2813         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2814         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2815         case HV_X64_MSR_CRASH_CTL:
2816         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2817         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2818         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2819         case HV_X64_MSR_TSC_EMULATION_STATUS:
2820                 return kvm_hv_set_msr_common(vcpu, msr, data,
2821                                              msr_info->host_initiated);
2822         case MSR_IA32_BBL_CR_CTL3:
2823                 /* Drop writes to this legacy MSR -- see rdmsr
2824                  * counterpart for further detail.
2825                  */
2826                 if (report_ignored_msrs)
2827                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2828                                 msr, data);
2829                 break;
2830         case MSR_AMD64_OSVW_ID_LENGTH:
2831                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2832                         return 1;
2833                 vcpu->arch.osvw.length = data;
2834                 break;
2835         case MSR_AMD64_OSVW_STATUS:
2836                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2837                         return 1;
2838                 vcpu->arch.osvw.status = data;
2839                 break;
2840         case MSR_PLATFORM_INFO:
2841                 if (!msr_info->host_initiated ||
2842                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2843                      cpuid_fault_enabled(vcpu)))
2844                         return 1;
2845                 vcpu->arch.msr_platform_info = data;
2846                 break;
2847         case MSR_MISC_FEATURES_ENABLES:
2848                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2849                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2850                      !supports_cpuid_fault(vcpu)))
2851                         return 1;
2852                 vcpu->arch.msr_misc_features_enables = data;
2853                 break;
2854         default:
2855                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2856                         return xen_hvm_config(vcpu, data);
2857                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2858                         return kvm_pmu_set_msr(vcpu, msr_info);
2859                 if (!ignore_msrs) {
2860                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2861                                     msr, data);
2862                         return 1;
2863                 } else {
2864                         if (report_ignored_msrs)
2865                                 vcpu_unimpl(vcpu,
2866                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2867                                         msr, data);
2868                         break;
2869                 }
2870         }
2871         return 0;
2872 }
2873 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2874
2875 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2876 {
2877         u64 data;
2878         u64 mcg_cap = vcpu->arch.mcg_cap;
2879         unsigned bank_num = mcg_cap & 0xff;
2880
2881         switch (msr) {
2882         case MSR_IA32_P5_MC_ADDR:
2883         case MSR_IA32_P5_MC_TYPE:
2884                 data = 0;
2885                 break;
2886         case MSR_IA32_MCG_CAP:
2887                 data = vcpu->arch.mcg_cap;
2888                 break;
2889         case MSR_IA32_MCG_CTL:
2890                 if (!(mcg_cap & MCG_CTL_P) && !host)
2891                         return 1;
2892                 data = vcpu->arch.mcg_ctl;
2893                 break;
2894         case MSR_IA32_MCG_STATUS:
2895                 data = vcpu->arch.mcg_status;
2896                 break;
2897         default:
2898                 if (msr >= MSR_IA32_MC0_CTL &&
2899                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2900                         u32 offset = msr - MSR_IA32_MC0_CTL;
2901                         data = vcpu->arch.mce_banks[offset];
2902                         break;
2903                 }
2904                 return 1;
2905         }
2906         *pdata = data;
2907         return 0;
2908 }
2909
2910 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2911 {
2912         switch (msr_info->index) {
2913         case MSR_IA32_PLATFORM_ID:
2914         case MSR_IA32_EBL_CR_POWERON:
2915         case MSR_IA32_DEBUGCTLMSR:
2916         case MSR_IA32_LASTBRANCHFROMIP:
2917         case MSR_IA32_LASTBRANCHTOIP:
2918         case MSR_IA32_LASTINTFROMIP:
2919         case MSR_IA32_LASTINTTOIP:
2920         case MSR_K8_SYSCFG:
2921         case MSR_K8_TSEG_ADDR:
2922         case MSR_K8_TSEG_MASK:
2923         case MSR_VM_HSAVE_PA:
2924         case MSR_K8_INT_PENDING_MSG:
2925         case MSR_AMD64_NB_CFG:
2926         case MSR_FAM10H_MMIO_CONF_BASE:
2927         case MSR_AMD64_BU_CFG2:
2928         case MSR_IA32_PERF_CTL:
2929         case MSR_AMD64_DC_CFG:
2930         case MSR_F15H_EX_CFG:
2931                 msr_info->data = 0;
2932                 break;
2933         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2934         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2935         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2936         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2937         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2938                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2939                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2940                 msr_info->data = 0;
2941                 break;
2942         case MSR_IA32_UCODE_REV:
2943                 msr_info->data = vcpu->arch.microcode_version;
2944                 break;
2945         case MSR_IA32_ARCH_CAPABILITIES:
2946                 if (!msr_info->host_initiated &&
2947                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2948                         return 1;
2949                 msr_info->data = vcpu->arch.arch_capabilities;
2950                 break;
2951         case MSR_IA32_POWER_CTL:
2952                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2953                 break;
2954         case MSR_IA32_TSC:
2955                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2956                 break;
2957         case MSR_MTRRcap:
2958         case 0x200 ... 0x2ff:
2959                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2960         case 0xcd: /* fsb frequency */
2961                 msr_info->data = 3;
2962                 break;
2963                 /*
2964                  * MSR_EBC_FREQUENCY_ID
2965                  * Conservative value valid for even the basic CPU models.
2966                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2967                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2968                  * and 266MHz for model 3, or 4. Set Core Clock
2969                  * Frequency to System Bus Frequency Ratio to 1 (bits
2970                  * 31:24) even though these are only valid for CPU
2971                  * models > 2, however guests may end up dividing or
2972                  * multiplying by zero otherwise.
2973                  */
2974         case MSR_EBC_FREQUENCY_ID:
2975                 msr_info->data = 1 << 24;
2976                 break;
2977         case MSR_IA32_APICBASE:
2978                 msr_info->data = kvm_get_apic_base(vcpu);
2979                 break;
2980         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2981                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2982                 break;
2983         case MSR_IA32_TSCDEADLINE:
2984                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2985                 break;
2986         case MSR_IA32_TSC_ADJUST:
2987                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2988                 break;
2989         case MSR_IA32_MISC_ENABLE:
2990                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2991                 break;
2992         case MSR_IA32_SMBASE:
2993                 if (!msr_info->host_initiated)
2994                         return 1;
2995                 msr_info->data = vcpu->arch.smbase;
2996                 break;
2997         case MSR_SMI_COUNT:
2998                 msr_info->data = vcpu->arch.smi_count;
2999                 break;
3000         case MSR_IA32_PERF_STATUS:
3001                 /* TSC increment by tick */
3002                 msr_info->data = 1000ULL;
3003                 /* CPU multiplier */
3004                 msr_info->data |= (((uint64_t)4ULL) << 40);
3005                 break;
3006         case MSR_EFER:
3007                 msr_info->data = vcpu->arch.efer;
3008                 break;
3009         case MSR_KVM_WALL_CLOCK:
3010         case MSR_KVM_WALL_CLOCK_NEW:
3011                 msr_info->data = vcpu->kvm->arch.wall_clock;
3012                 break;
3013         case MSR_KVM_SYSTEM_TIME:
3014         case MSR_KVM_SYSTEM_TIME_NEW:
3015                 msr_info->data = vcpu->arch.time;
3016                 break;
3017         case MSR_KVM_ASYNC_PF_EN:
3018                 msr_info->data = vcpu->arch.apf.msr_val;
3019                 break;
3020         case MSR_KVM_STEAL_TIME:
3021                 msr_info->data = vcpu->arch.st.msr_val;
3022                 break;
3023         case MSR_KVM_PV_EOI_EN:
3024                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3025                 break;
3026         case MSR_KVM_POLL_CONTROL:
3027                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3028                 break;
3029         case MSR_IA32_P5_MC_ADDR:
3030         case MSR_IA32_P5_MC_TYPE:
3031         case MSR_IA32_MCG_CAP:
3032         case MSR_IA32_MCG_CTL:
3033         case MSR_IA32_MCG_STATUS:
3034         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3035                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3036                                    msr_info->host_initiated);
3037         case MSR_K7_CLK_CTL:
3038                 /*
3039                  * Provide expected ramp-up count for K7. All other
3040                  * are set to zero, indicating minimum divisors for
3041                  * every field.
3042                  *
3043                  * This prevents guest kernels on AMD host with CPU
3044                  * type 6, model 8 and higher from exploding due to
3045                  * the rdmsr failing.
3046                  */
3047                 msr_info->data = 0x20000000;
3048                 break;
3049         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3050         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3051         case HV_X64_MSR_CRASH_CTL:
3052         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3053         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3054         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3055         case HV_X64_MSR_TSC_EMULATION_STATUS:
3056                 return kvm_hv_get_msr_common(vcpu,
3057                                              msr_info->index, &msr_info->data,
3058                                              msr_info->host_initiated);
3059                 break;
3060         case MSR_IA32_BBL_CR_CTL3:
3061                 /* This legacy MSR exists but isn't fully documented in current
3062                  * silicon.  It is however accessed by winxp in very narrow
3063                  * scenarios where it sets bit #19, itself documented as
3064                  * a "reserved" bit.  Best effort attempt to source coherent
3065                  * read data here should the balance of the register be
3066                  * interpreted by the guest:
3067                  *
3068                  * L2 cache control register 3: 64GB range, 256KB size,
3069                  * enabled, latency 0x1, configured
3070                  */
3071                 msr_info->data = 0xbe702111;
3072                 break;
3073         case MSR_AMD64_OSVW_ID_LENGTH:
3074                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3075                         return 1;
3076                 msr_info->data = vcpu->arch.osvw.length;
3077                 break;
3078         case MSR_AMD64_OSVW_STATUS:
3079                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3080                         return 1;
3081                 msr_info->data = vcpu->arch.osvw.status;
3082                 break;
3083         case MSR_PLATFORM_INFO:
3084                 if (!msr_info->host_initiated &&
3085                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3086                         return 1;
3087                 msr_info->data = vcpu->arch.msr_platform_info;
3088                 break;
3089         case MSR_MISC_FEATURES_ENABLES:
3090                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3091                 break;
3092         case MSR_K7_HWCR:
3093                 msr_info->data = vcpu->arch.msr_hwcr;
3094                 break;
3095         default:
3096                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3097                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3098                 if (!ignore_msrs) {
3099                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
3100                                                msr_info->index);
3101                         return 1;
3102                 } else {
3103                         if (report_ignored_msrs)
3104                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3105                                         msr_info->index);
3106                         msr_info->data = 0;
3107                 }
3108                 break;
3109         }
3110         return 0;
3111 }
3112 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3113
3114 /*
3115  * Read or write a bunch of msrs. All parameters are kernel addresses.
3116  *
3117  * @return number of msrs set successfully.
3118  */
3119 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3120                     struct kvm_msr_entry *entries,
3121                     int (*do_msr)(struct kvm_vcpu *vcpu,
3122                                   unsigned index, u64 *data))
3123 {
3124         int i;
3125
3126         for (i = 0; i < msrs->nmsrs; ++i)
3127                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3128                         break;
3129
3130         return i;
3131 }
3132
3133 /*
3134  * Read or write a bunch of msrs. Parameters are user addresses.
3135  *
3136  * @return number of msrs set successfully.
3137  */
3138 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3139                   int (*do_msr)(struct kvm_vcpu *vcpu,
3140                                 unsigned index, u64 *data),
3141                   int writeback)
3142 {
3143         struct kvm_msrs msrs;
3144         struct kvm_msr_entry *entries;
3145         int r, n;
3146         unsigned size;
3147
3148         r = -EFAULT;
3149         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3150                 goto out;
3151
3152         r = -E2BIG;
3153         if (msrs.nmsrs >= MAX_IO_MSRS)
3154                 goto out;
3155
3156         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3157         entries = memdup_user(user_msrs->entries, size);
3158         if (IS_ERR(entries)) {
3159                 r = PTR_ERR(entries);
3160                 goto out;
3161         }
3162
3163         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3164         if (r < 0)
3165                 goto out_free;
3166
3167         r = -EFAULT;
3168         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3169                 goto out_free;
3170
3171         r = n;
3172
3173 out_free:
3174         kfree(entries);
3175 out:
3176         return r;
3177 }
3178
3179 static inline bool kvm_can_mwait_in_guest(void)
3180 {
3181         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3182                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3183                 boot_cpu_has(X86_FEATURE_ARAT);
3184 }
3185
3186 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3187 {
3188         int r = 0;
3189
3190         switch (ext) {
3191         case KVM_CAP_IRQCHIP:
3192         case KVM_CAP_HLT:
3193         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3194         case KVM_CAP_SET_TSS_ADDR:
3195         case KVM_CAP_EXT_CPUID:
3196         case KVM_CAP_EXT_EMUL_CPUID:
3197         case KVM_CAP_CLOCKSOURCE:
3198         case KVM_CAP_PIT:
3199         case KVM_CAP_NOP_IO_DELAY:
3200         case KVM_CAP_MP_STATE:
3201         case KVM_CAP_SYNC_MMU:
3202         case KVM_CAP_USER_NMI:
3203         case KVM_CAP_REINJECT_CONTROL:
3204         case KVM_CAP_IRQ_INJECT_STATUS:
3205         case KVM_CAP_IOEVENTFD:
3206         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3207         case KVM_CAP_PIT2:
3208         case KVM_CAP_PIT_STATE2:
3209         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3210         case KVM_CAP_XEN_HVM:
3211         case KVM_CAP_VCPU_EVENTS:
3212         case KVM_CAP_HYPERV:
3213         case KVM_CAP_HYPERV_VAPIC:
3214         case KVM_CAP_HYPERV_SPIN:
3215         case KVM_CAP_HYPERV_SYNIC:
3216         case KVM_CAP_HYPERV_SYNIC2:
3217         case KVM_CAP_HYPERV_VP_INDEX:
3218         case KVM_CAP_HYPERV_EVENTFD:
3219         case KVM_CAP_HYPERV_TLBFLUSH:
3220         case KVM_CAP_HYPERV_SEND_IPI:
3221         case KVM_CAP_HYPERV_CPUID:
3222         case KVM_CAP_PCI_SEGMENT:
3223         case KVM_CAP_DEBUGREGS:
3224         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3225         case KVM_CAP_XSAVE:
3226         case KVM_CAP_ASYNC_PF:
3227         case KVM_CAP_GET_TSC_KHZ:
3228         case KVM_CAP_KVMCLOCK_CTRL:
3229         case KVM_CAP_READONLY_MEM:
3230         case KVM_CAP_HYPERV_TIME:
3231         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3232         case KVM_CAP_TSC_DEADLINE_TIMER:
3233         case KVM_CAP_DISABLE_QUIRKS:
3234         case KVM_CAP_SET_BOOT_CPU_ID:
3235         case KVM_CAP_SPLIT_IRQCHIP:
3236         case KVM_CAP_IMMEDIATE_EXIT:
3237         case KVM_CAP_PMU_EVENT_FILTER:
3238         case KVM_CAP_GET_MSR_FEATURES:
3239         case KVM_CAP_MSR_PLATFORM_INFO:
3240         case KVM_CAP_EXCEPTION_PAYLOAD:
3241                 r = 1;
3242                 break;
3243         case KVM_CAP_SYNC_REGS:
3244                 r = KVM_SYNC_X86_VALID_FIELDS;
3245                 break;
3246         case KVM_CAP_ADJUST_CLOCK:
3247                 r = KVM_CLOCK_TSC_STABLE;
3248                 break;
3249         case KVM_CAP_X86_DISABLE_EXITS:
3250                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3251                       KVM_X86_DISABLE_EXITS_CSTATE;
3252                 if(kvm_can_mwait_in_guest())
3253                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3254                 break;
3255         case KVM_CAP_X86_SMM:
3256                 /* SMBASE is usually relocated above 1M on modern chipsets,
3257                  * and SMM handlers might indeed rely on 4G segment limits,
3258                  * so do not report SMM to be available if real mode is
3259                  * emulated via vm86 mode.  Still, do not go to great lengths
3260                  * to avoid userspace's usage of the feature, because it is a
3261                  * fringe case that is not enabled except via specific settings
3262                  * of the module parameters.
3263                  */
3264                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3265                 break;
3266         case KVM_CAP_VAPIC:
3267                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3268                 break;
3269         case KVM_CAP_NR_VCPUS:
3270                 r = KVM_SOFT_MAX_VCPUS;
3271                 break;
3272         case KVM_CAP_MAX_VCPUS:
3273                 r = KVM_MAX_VCPUS;
3274                 break;
3275         case KVM_CAP_MAX_VCPU_ID:
3276                 r = KVM_MAX_VCPU_ID;
3277                 break;
3278         case KVM_CAP_PV_MMU:    /* obsolete */
3279                 r = 0;
3280                 break;
3281         case KVM_CAP_MCE:
3282                 r = KVM_MAX_MCE_BANKS;
3283                 break;
3284         case KVM_CAP_XCRS:
3285                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3286                 break;
3287         case KVM_CAP_TSC_CONTROL:
3288                 r = kvm_has_tsc_control;
3289                 break;
3290         case KVM_CAP_X2APIC_API:
3291                 r = KVM_X2APIC_API_VALID_FLAGS;
3292                 break;
3293         case KVM_CAP_NESTED_STATE:
3294                 r = kvm_x86_ops->get_nested_state ?
3295                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3296                 break;
3297         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3298                 r = kvm_x86_ops->enable_direct_tlbflush != NULL;
3299                 break;
3300         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3301                 r = kvm_x86_ops->nested_enable_evmcs != NULL;
3302                 break;
3303         default:
3304                 break;
3305         }
3306         return r;
3307
3308 }
3309
3310 long kvm_arch_dev_ioctl(struct file *filp,
3311                         unsigned int ioctl, unsigned long arg)
3312 {
3313         void __user *argp = (void __user *)arg;
3314         long r;
3315
3316         switch (ioctl) {
3317         case KVM_GET_MSR_INDEX_LIST: {
3318                 struct kvm_msr_list __user *user_msr_list = argp;
3319                 struct kvm_msr_list msr_list;
3320                 unsigned n;
3321
3322                 r = -EFAULT;
3323                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3324                         goto out;
3325                 n = msr_list.nmsrs;
3326                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3327                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3328                         goto out;
3329                 r = -E2BIG;
3330                 if (n < msr_list.nmsrs)
3331                         goto out;
3332                 r = -EFAULT;
3333                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3334                                  num_msrs_to_save * sizeof(u32)))
3335                         goto out;
3336                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3337                                  &emulated_msrs,
3338                                  num_emulated_msrs * sizeof(u32)))
3339                         goto out;
3340                 r = 0;
3341                 break;
3342         }
3343         case KVM_GET_SUPPORTED_CPUID:
3344         case KVM_GET_EMULATED_CPUID: {
3345                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3346                 struct kvm_cpuid2 cpuid;
3347
3348                 r = -EFAULT;
3349                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3350                         goto out;
3351
3352                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3353                                             ioctl);
3354                 if (r)
3355                         goto out;
3356
3357                 r = -EFAULT;
3358                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3359                         goto out;
3360                 r = 0;
3361                 break;
3362         }
3363         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3364                 r = -EFAULT;
3365                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3366                                  sizeof(kvm_mce_cap_supported)))
3367                         goto out;
3368                 r = 0;
3369                 break;
3370         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3371                 struct kvm_msr_list __user *user_msr_list = argp;
3372                 struct kvm_msr_list msr_list;
3373                 unsigned int n;
3374
3375                 r = -EFAULT;
3376                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3377                         goto out;
3378                 n = msr_list.nmsrs;
3379                 msr_list.nmsrs = num_msr_based_features;
3380                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3381                         goto out;
3382                 r = -E2BIG;
3383                 if (n < msr_list.nmsrs)
3384                         goto out;
3385                 r = -EFAULT;
3386                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3387                                  num_msr_based_features * sizeof(u32)))
3388                         goto out;
3389                 r = 0;
3390                 break;
3391         }
3392         case KVM_GET_MSRS:
3393                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3394                 break;
3395         }
3396         default:
3397                 r = -EINVAL;
3398         }
3399 out:
3400         return r;
3401 }
3402
3403 static void wbinvd_ipi(void *garbage)
3404 {
3405         wbinvd();
3406 }
3407
3408 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3409 {
3410         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3411 }
3412
3413 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3414 {
3415         /* Address WBINVD may be executed by guest */
3416         if (need_emulate_wbinvd(vcpu)) {
3417                 if (kvm_x86_ops->has_wbinvd_exit())
3418                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3419                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3420                         smp_call_function_single(vcpu->cpu,
3421                                         wbinvd_ipi, NULL, 1);
3422         }
3423
3424         kvm_x86_ops->vcpu_load(vcpu, cpu);
3425
3426         fpregs_assert_state_consistent();
3427         if (test_thread_flag(TIF_NEED_FPU_LOAD))
3428                 switch_fpu_return();
3429
3430         /* Apply any externally detected TSC adjustments (due to suspend) */
3431         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3432                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3433                 vcpu->arch.tsc_offset_adjustment = 0;
3434                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3435         }
3436
3437         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3438                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3439                                 rdtsc() - vcpu->arch.last_host_tsc;
3440                 if (tsc_delta < 0)
3441                         mark_tsc_unstable("KVM discovered backwards TSC");
3442
3443                 if (kvm_check_tsc_unstable()) {
3444                         u64 offset = kvm_compute_tsc_offset(vcpu,
3445                                                 vcpu->arch.last_guest_tsc);
3446                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3447                         vcpu->arch.tsc_catchup = 1;
3448                 }
3449
3450                 if (kvm_lapic_hv_timer_in_use(vcpu))
3451                         kvm_lapic_restart_hv_timer(vcpu);
3452
3453                 /*
3454                  * On a host with synchronized TSC, there is no need to update
3455                  * kvmclock on vcpu->cpu migration
3456                  */
3457                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3458                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3459                 if (vcpu->cpu != cpu)
3460                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3461                 vcpu->cpu = cpu;
3462         }
3463
3464         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3465 }
3466
3467 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3468 {
3469         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3470                 return;
3471
3472         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3473
3474         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3475                         &vcpu->arch.st.steal.preempted,
3476                         offsetof(struct kvm_steal_time, preempted),
3477                         sizeof(vcpu->arch.st.steal.preempted));
3478 }
3479
3480 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3481 {
3482         int idx;
3483
3484         if (vcpu->preempted)
3485                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3486
3487         /*
3488          * Disable page faults because we're in atomic context here.
3489          * kvm_write_guest_offset_cached() would call might_fault()
3490          * that relies on pagefault_disable() to tell if there's a
3491          * bug. NOTE: the write to guest memory may not go through if
3492          * during postcopy live migration or if there's heavy guest
3493          * paging.
3494          */
3495         pagefault_disable();
3496         /*
3497          * kvm_memslots() will be called by
3498          * kvm_write_guest_offset_cached() so take the srcu lock.
3499          */
3500         idx = srcu_read_lock(&vcpu->kvm->srcu);
3501         kvm_steal_time_set_preempted(vcpu);
3502         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3503         pagefault_enable();
3504         kvm_x86_ops->vcpu_put(vcpu);
3505         vcpu->arch.last_host_tsc = rdtsc();
3506         /*
3507          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3508          * on every vmexit, but if not, we might have a stale dr6 from the
3509          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3510          */
3511         set_debugreg(0, 6);
3512 }
3513
3514 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3515                                     struct kvm_lapic_state *s)
3516 {
3517         if (vcpu->arch.apicv_active)
3518                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3519
3520         return kvm_apic_get_state(vcpu, s);
3521 }
3522
3523 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3524                                     struct kvm_lapic_state *s)
3525 {
3526         int r;
3527
3528         r = kvm_apic_set_state(vcpu, s);
3529         if (r)
3530                 return r;
3531         update_cr8_intercept(vcpu);
3532
3533         return 0;
3534 }
3535
3536 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3537 {
3538         return (!lapic_in_kernel(vcpu) ||
3539                 kvm_apic_accept_pic_intr(vcpu));
3540 }
3541
3542 /*
3543  * if userspace requested an interrupt window, check that the
3544  * interrupt window is open.
3545  *
3546  * No need to exit to userspace if we already have an interrupt queued.
3547  */
3548 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3549 {
3550         return kvm_arch_interrupt_allowed(vcpu) &&
3551                 !kvm_cpu_has_interrupt(vcpu) &&
3552                 !kvm_event_needs_reinjection(vcpu) &&
3553                 kvm_cpu_accept_dm_intr(vcpu);
3554 }
3555
3556 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3557                                     struct kvm_interrupt *irq)
3558 {
3559         if (irq->irq >= KVM_NR_INTERRUPTS)
3560                 return -EINVAL;
3561
3562         if (!irqchip_in_kernel(vcpu->kvm)) {
3563                 kvm_queue_interrupt(vcpu, irq->irq, false);
3564                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3565                 return 0;
3566         }
3567
3568         /*
3569          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3570          * fail for in-kernel 8259.
3571          */
3572         if (pic_in_kernel(vcpu->kvm))
3573                 return -ENXIO;
3574
3575         if (vcpu->arch.pending_external_vector != -1)
3576                 return -EEXIST;
3577
3578         vcpu->arch.pending_external_vector = irq->irq;
3579         kvm_make_request(KVM_REQ_EVENT, vcpu);
3580         return 0;
3581 }
3582
3583 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3584 {
3585         kvm_inject_nmi(vcpu);
3586
3587         return 0;
3588 }
3589
3590 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3591 {
3592         kvm_make_request(KVM_REQ_SMI, vcpu);
3593
3594         return 0;
3595 }
3596
3597 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3598                                            struct kvm_tpr_access_ctl *tac)
3599 {
3600         if (tac->flags)
3601                 return -EINVAL;
3602         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3603         return 0;
3604 }
3605
3606 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3607                                         u64 mcg_cap)
3608 {
3609         int r;
3610         unsigned bank_num = mcg_cap & 0xff, bank;
3611
3612         r = -EINVAL;
3613         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3614                 goto out;
3615         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3616                 goto out;
3617         r = 0;
3618         vcpu->arch.mcg_cap = mcg_cap;
3619         /* Init IA32_MCG_CTL to all 1s */
3620         if (mcg_cap & MCG_CTL_P)
3621                 vcpu->arch.mcg_ctl = ~(u64)0;
3622         /* Init IA32_MCi_CTL to all 1s */
3623         for (bank = 0; bank < bank_num; bank++)
3624                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3625
3626         kvm_x86_ops->setup_mce(vcpu);
3627 out:
3628         return r;
3629 }
3630
3631 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3632                                       struct kvm_x86_mce *mce)
3633 {
3634         u64 mcg_cap = vcpu->arch.mcg_cap;
3635         unsigned bank_num = mcg_cap & 0xff;
3636         u64 *banks = vcpu->arch.mce_banks;
3637
3638         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3639                 return -EINVAL;
3640         /*
3641          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3642          * reporting is disabled
3643          */
3644         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3645             vcpu->arch.mcg_ctl != ~(u64)0)
3646                 return 0;
3647         banks += 4 * mce->bank;
3648         /*
3649          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3650          * reporting is disabled for the bank
3651          */
3652         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3653                 return 0;
3654         if (mce->status & MCI_STATUS_UC) {
3655                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3656                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3657                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3658                         return 0;
3659                 }
3660                 if (banks[1] & MCI_STATUS_VAL)
3661                         mce->status |= MCI_STATUS_OVER;
3662                 banks[2] = mce->addr;
3663                 banks[3] = mce->misc;
3664                 vcpu->arch.mcg_status = mce->mcg_status;
3665                 banks[1] = mce->status;
3666                 kvm_queue_exception(vcpu, MC_VECTOR);
3667         } else if (!(banks[1] & MCI_STATUS_VAL)
3668                    || !(banks[1] & MCI_STATUS_UC)) {
3669                 if (banks[1] & MCI_STATUS_VAL)
3670                         mce->status |= MCI_STATUS_OVER;
3671                 banks[2] = mce->addr;
3672                 banks[3] = mce->misc;
3673                 banks[1] = mce->status;
3674         } else
3675                 banks[1] |= MCI_STATUS_OVER;
3676         return 0;
3677 }
3678
3679 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3680                                                struct kvm_vcpu_events *events)
3681 {
3682         process_nmi(vcpu);
3683
3684         /*
3685          * The API doesn't provide the instruction length for software
3686          * exceptions, so don't report them. As long as the guest RIP
3687          * isn't advanced, we should expect to encounter the exception
3688          * again.
3689          */
3690         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3691                 events->exception.injected = 0;
3692                 events->exception.pending = 0;
3693         } else {
3694                 events->exception.injected = vcpu->arch.exception.injected;
3695                 events->exception.pending = vcpu->arch.exception.pending;
3696                 /*
3697                  * For ABI compatibility, deliberately conflate
3698                  * pending and injected exceptions when
3699                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3700                  */
3701                 if (!vcpu->kvm->arch.exception_payload_enabled)
3702                         events->exception.injected |=
3703                                 vcpu->arch.exception.pending;
3704         }
3705         events->exception.nr = vcpu->arch.exception.nr;
3706         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3707         events->exception.error_code = vcpu->arch.exception.error_code;
3708         events->exception_has_payload = vcpu->arch.exception.has_payload;
3709         events->exception_payload = vcpu->arch.exception.payload;
3710
3711         events->interrupt.injected =
3712                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3713         events->interrupt.nr = vcpu->arch.interrupt.nr;
3714         events->interrupt.soft = 0;
3715         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3716
3717         events->nmi.injected = vcpu->arch.nmi_injected;
3718         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3719         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3720         events->nmi.pad = 0;
3721
3722         events->sipi_vector = 0; /* never valid when reporting to user space */
3723
3724         events->smi.smm = is_smm(vcpu);
3725         events->smi.pending = vcpu->arch.smi_pending;
3726         events->smi.smm_inside_nmi =
3727                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3728         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3729
3730         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3731                          | KVM_VCPUEVENT_VALID_SHADOW
3732                          | KVM_VCPUEVENT_VALID_SMM);
3733         if (vcpu->kvm->arch.exception_payload_enabled)
3734                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3735
3736         memset(&events->reserved, 0, sizeof(events->reserved));
3737 }
3738
3739 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3740
3741 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3742                                               struct kvm_vcpu_events *events)
3743 {
3744         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3745                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3746                               | KVM_VCPUEVENT_VALID_SHADOW
3747                               | KVM_VCPUEVENT_VALID_SMM
3748                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3749                 return -EINVAL;
3750
3751         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3752                 if (!vcpu->kvm->arch.exception_payload_enabled)
3753                         return -EINVAL;
3754                 if (events->exception.pending)
3755                         events->exception.injected = 0;
3756                 else
3757                         events->exception_has_payload = 0;
3758         } else {
3759                 events->exception.pending = 0;
3760                 events->exception_has_payload = 0;
3761         }
3762
3763         if ((events->exception.injected || events->exception.pending) &&
3764             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3765                 return -EINVAL;
3766
3767         /* INITs are latched while in SMM */
3768         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3769             (events->smi.smm || events->smi.pending) &&
3770             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3771                 return -EINVAL;
3772
3773         process_nmi(vcpu);
3774         vcpu->arch.exception.injected = events->exception.injected;
3775         vcpu->arch.exception.pending = events->exception.pending;
3776         vcpu->arch.exception.nr = events->exception.nr;
3777         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3778         vcpu->arch.exception.error_code = events->exception.error_code;
3779         vcpu->arch.exception.has_payload = events->exception_has_payload;
3780         vcpu->arch.exception.payload = events->exception_payload;
3781
3782         vcpu->arch.interrupt.injected = events->interrupt.injected;
3783         vcpu->arch.interrupt.nr = events->interrupt.nr;
3784         vcpu->arch.interrupt.soft = events->interrupt.soft;
3785         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3786                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3787                                                   events->interrupt.shadow);
3788
3789         vcpu->arch.nmi_injected = events->nmi.injected;
3790         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3791                 vcpu->arch.nmi_pending = events->nmi.pending;
3792         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3793
3794         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3795             lapic_in_kernel(vcpu))
3796                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3797
3798         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3799                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3800                         if (events->smi.smm)
3801                                 vcpu->arch.hflags |= HF_SMM_MASK;
3802                         else
3803                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3804                         kvm_smm_changed(vcpu);
3805                 }
3806
3807                 vcpu->arch.smi_pending = events->smi.pending;
3808
3809                 if (events->smi.smm) {
3810                         if (events->smi.smm_inside_nmi)
3811                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3812                         else
3813                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3814                         if (lapic_in_kernel(vcpu)) {
3815                                 if (events->smi.latched_init)
3816                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3817                                 else
3818                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3819                         }
3820                 }
3821         }
3822
3823         kvm_make_request(KVM_REQ_EVENT, vcpu);
3824
3825         return 0;
3826 }
3827
3828 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3829                                              struct kvm_debugregs *dbgregs)
3830 {
3831         unsigned long val;
3832
3833         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3834         kvm_get_dr(vcpu, 6, &val);
3835         dbgregs->dr6 = val;
3836         dbgregs->dr7 = vcpu->arch.dr7;
3837         dbgregs->flags = 0;
3838         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3839 }
3840
3841 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3842                                             struct kvm_debugregs *dbgregs)
3843 {
3844         if (dbgregs->flags)
3845                 return -EINVAL;
3846
3847         if (dbgregs->dr6 & ~0xffffffffull)
3848                 return -EINVAL;
3849         if (dbgregs->dr7 & ~0xffffffffull)
3850                 return -EINVAL;
3851
3852         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3853         kvm_update_dr0123(vcpu);
3854         vcpu->arch.dr6 = dbgregs->dr6;
3855         kvm_update_dr6(vcpu);
3856         vcpu->arch.dr7 = dbgregs->dr7;
3857         kvm_update_dr7(vcpu);
3858
3859         return 0;
3860 }
3861
3862 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3863
3864 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3865 {
3866         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3867         u64 xstate_bv = xsave->header.xfeatures;
3868         u64 valid;
3869
3870         /*
3871          * Copy legacy XSAVE area, to avoid complications with CPUID
3872          * leaves 0 and 1 in the loop below.
3873          */
3874         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3875
3876         /* Set XSTATE_BV */
3877         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3878         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3879
3880         /*
3881          * Copy each region from the possibly compacted offset to the
3882          * non-compacted offset.
3883          */
3884         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3885         while (valid) {
3886                 u64 xfeature_mask = valid & -valid;
3887                 int xfeature_nr = fls64(xfeature_mask) - 1;
3888                 void *src = get_xsave_addr(xsave, xfeature_nr);
3889
3890                 if (src) {
3891                         u32 size, offset, ecx, edx;
3892                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3893                                     &size, &offset, &ecx, &edx);
3894                         if (xfeature_nr == XFEATURE_PKRU)
3895                                 memcpy(dest + offset, &vcpu->arch.pkru,
3896                                        sizeof(vcpu->arch.pkru));
3897                         else
3898                                 memcpy(dest + offset, src, size);
3899
3900                 }
3901
3902                 valid -= xfeature_mask;
3903         }
3904 }
3905
3906 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3907 {
3908         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3909         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3910         u64 valid;
3911
3912         /*
3913          * Copy legacy XSAVE area, to avoid complications with CPUID
3914          * leaves 0 and 1 in the loop below.
3915          */
3916         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3917
3918         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3919         xsave->header.xfeatures = xstate_bv;
3920         if (boot_cpu_has(X86_FEATURE_XSAVES))
3921                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3922
3923         /*
3924          * Copy each region from the non-compacted offset to the
3925          * possibly compacted offset.
3926          */
3927         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3928         while (valid) {
3929                 u64 xfeature_mask = valid & -valid;
3930                 int xfeature_nr = fls64(xfeature_mask) - 1;
3931                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3932
3933                 if (dest) {
3934                         u32 size, offset, ecx, edx;
3935                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3936                                     &size, &offset, &ecx, &edx);
3937                         if (xfeature_nr == XFEATURE_PKRU)
3938                                 memcpy(&vcpu->arch.pkru, src + offset,
3939                                        sizeof(vcpu->arch.pkru));
3940                         else
3941                                 memcpy(dest, src + offset, size);
3942                 }
3943
3944                 valid -= xfeature_mask;
3945         }
3946 }
3947
3948 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3949                                          struct kvm_xsave *guest_xsave)
3950 {
3951         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3952                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3953                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3954         } else {
3955                 memcpy(guest_xsave->region,
3956                         &vcpu->arch.guest_fpu->state.fxsave,
3957                         sizeof(struct fxregs_state));
3958                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3959                         XFEATURE_MASK_FPSSE;
3960         }
3961 }
3962
3963 #define XSAVE_MXCSR_OFFSET 24
3964
3965 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3966                                         struct kvm_xsave *guest_xsave)
3967 {
3968         u64 xstate_bv =
3969                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3970         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3971
3972         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3973                 /*
3974                  * Here we allow setting states that are not present in
3975                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3976                  * with old userspace.
3977                  */
3978                 if (xstate_bv & ~kvm_supported_xcr0() ||
3979                         mxcsr & ~mxcsr_feature_mask)
3980                         return -EINVAL;
3981                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3982         } else {
3983                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3984                         mxcsr & ~mxcsr_feature_mask)
3985                         return -EINVAL;
3986                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3987                         guest_xsave->region, sizeof(struct fxregs_state));
3988         }
3989         return 0;
3990 }
3991
3992 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3993                                         struct kvm_xcrs *guest_xcrs)
3994 {
3995         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3996                 guest_xcrs->nr_xcrs = 0;
3997                 return;
3998         }
3999
4000         guest_xcrs->nr_xcrs = 1;
4001         guest_xcrs->flags = 0;
4002         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4003         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4004 }
4005
4006 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4007                                        struct kvm_xcrs *guest_xcrs)
4008 {
4009         int i, r = 0;
4010
4011         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4012                 return -EINVAL;
4013
4014         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4015                 return -EINVAL;
4016
4017         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4018                 /* Only support XCR0 currently */
4019                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4020                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4021                                 guest_xcrs->xcrs[i].value);
4022                         break;
4023                 }
4024         if (r)
4025                 r = -EINVAL;
4026         return r;
4027 }
4028
4029 /*
4030  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4031  * stopped by the hypervisor.  This function will be called from the host only.
4032  * EINVAL is returned when the host attempts to set the flag for a guest that
4033  * does not support pv clocks.
4034  */
4035 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4036 {
4037         if (!vcpu->arch.pv_time_enabled)
4038                 return -EINVAL;
4039         vcpu->arch.pvclock_set_guest_stopped_request = true;
4040         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4041         return 0;
4042 }
4043
4044 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4045                                      struct kvm_enable_cap *cap)
4046 {
4047         int r;
4048         uint16_t vmcs_version;
4049         void __user *user_ptr;
4050
4051         if (cap->flags)
4052                 return -EINVAL;
4053
4054         switch (cap->cap) {
4055         case KVM_CAP_HYPERV_SYNIC2:
4056                 if (cap->args[0])
4057                         return -EINVAL;
4058                 /* fall through */
4059
4060         case KVM_CAP_HYPERV_SYNIC:
4061                 if (!irqchip_in_kernel(vcpu->kvm))
4062                         return -EINVAL;
4063                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4064                                              KVM_CAP_HYPERV_SYNIC2);
4065         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4066                 if (!kvm_x86_ops->nested_enable_evmcs)
4067                         return -ENOTTY;
4068                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
4069                 if (!r) {
4070                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4071                         if (copy_to_user(user_ptr, &vmcs_version,
4072                                          sizeof(vmcs_version)))
4073                                 r = -EFAULT;
4074                 }
4075                 return r;
4076         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4077                 if (!kvm_x86_ops->enable_direct_tlbflush)
4078                         return -ENOTTY;
4079
4080                 return kvm_x86_ops->enable_direct_tlbflush(vcpu);
4081
4082         default:
4083                 return -EINVAL;
4084         }
4085 }
4086
4087 long kvm_arch_vcpu_ioctl(struct file *filp,
4088                          unsigned int ioctl, unsigned long arg)
4089 {
4090         struct kvm_vcpu *vcpu = filp->private_data;
4091         void __user *argp = (void __user *)arg;
4092         int r;
4093         union {
4094                 struct kvm_lapic_state *lapic;
4095                 struct kvm_xsave *xsave;
4096                 struct kvm_xcrs *xcrs;
4097                 void *buffer;
4098         } u;
4099
4100         vcpu_load(vcpu);
4101
4102         u.buffer = NULL;
4103         switch (ioctl) {
4104         case KVM_GET_LAPIC: {
4105                 r = -EINVAL;
4106                 if (!lapic_in_kernel(vcpu))
4107                         goto out;
4108                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4109                                 GFP_KERNEL_ACCOUNT);
4110
4111                 r = -ENOMEM;
4112                 if (!u.lapic)
4113                         goto out;
4114                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4115                 if (r)
4116                         goto out;
4117                 r = -EFAULT;
4118                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4119                         goto out;
4120                 r = 0;
4121                 break;
4122         }
4123         case KVM_SET_LAPIC: {
4124                 r = -EINVAL;
4125                 if (!lapic_in_kernel(vcpu))
4126                         goto out;
4127                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4128                 if (IS_ERR(u.lapic)) {
4129                         r = PTR_ERR(u.lapic);
4130                         goto out_nofree;
4131                 }
4132
4133                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4134                 break;
4135         }
4136         case KVM_INTERRUPT: {
4137                 struct kvm_interrupt irq;
4138
4139                 r = -EFAULT;
4140                 if (copy_from_user(&irq, argp, sizeof(irq)))
4141                         goto out;
4142                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4143                 break;
4144         }
4145         case KVM_NMI: {
4146                 r = kvm_vcpu_ioctl_nmi(vcpu);
4147                 break;
4148         }
4149         case KVM_SMI: {
4150                 r = kvm_vcpu_ioctl_smi(vcpu);
4151                 break;
4152         }
4153         case KVM_SET_CPUID: {
4154                 struct kvm_cpuid __user *cpuid_arg = argp;
4155                 struct kvm_cpuid cpuid;
4156
4157                 r = -EFAULT;
4158                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4159                         goto out;
4160                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4161                 break;
4162         }
4163         case KVM_SET_CPUID2: {
4164                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4165                 struct kvm_cpuid2 cpuid;
4166
4167                 r = -EFAULT;
4168                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4169                         goto out;
4170                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4171                                               cpuid_arg->entries);
4172                 break;
4173         }
4174         case KVM_GET_CPUID2: {
4175                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4176                 struct kvm_cpuid2 cpuid;
4177
4178                 r = -EFAULT;
4179                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4180                         goto out;
4181                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4182                                               cpuid_arg->entries);
4183                 if (r)
4184                         goto out;
4185                 r = -EFAULT;
4186                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4187                         goto out;
4188                 r = 0;
4189                 break;
4190         }
4191         case KVM_GET_MSRS: {
4192                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4193                 r = msr_io(vcpu, argp, do_get_msr, 1);
4194                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4195                 break;
4196         }
4197         case KVM_SET_MSRS: {
4198                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4199                 r = msr_io(vcpu, argp, do_set_msr, 0);
4200                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4201                 break;
4202         }
4203         case KVM_TPR_ACCESS_REPORTING: {
4204                 struct kvm_tpr_access_ctl tac;
4205
4206                 r = -EFAULT;
4207                 if (copy_from_user(&tac, argp, sizeof(tac)))
4208                         goto out;
4209                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4210                 if (r)
4211                         goto out;
4212                 r = -EFAULT;
4213                 if (copy_to_user(argp, &tac, sizeof(tac)))
4214                         goto out;
4215                 r = 0;
4216                 break;
4217         };
4218         case KVM_SET_VAPIC_ADDR: {
4219                 struct kvm_vapic_addr va;
4220                 int idx;
4221
4222                 r = -EINVAL;
4223                 if (!lapic_in_kernel(vcpu))
4224                         goto out;
4225                 r = -EFAULT;
4226                 if (copy_from_user(&va, argp, sizeof(va)))
4227                         goto out;
4228                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4229                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4230                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4231                 break;
4232         }
4233         case KVM_X86_SETUP_MCE: {
4234                 u64 mcg_cap;
4235
4236                 r = -EFAULT;
4237                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4238                         goto out;
4239                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4240                 break;
4241         }
4242         case KVM_X86_SET_MCE: {
4243                 struct kvm_x86_mce mce;
4244
4245                 r = -EFAULT;
4246                 if (copy_from_user(&mce, argp, sizeof(mce)))
4247                         goto out;
4248                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4249                 break;
4250         }
4251         case KVM_GET_VCPU_EVENTS: {
4252                 struct kvm_vcpu_events events;
4253
4254                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4255
4256                 r = -EFAULT;
4257                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4258                         break;
4259                 r = 0;
4260                 break;
4261         }
4262         case KVM_SET_VCPU_EVENTS: {
4263                 struct kvm_vcpu_events events;
4264
4265                 r = -EFAULT;
4266                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4267                         break;
4268
4269                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4270                 break;
4271         }
4272         case KVM_GET_DEBUGREGS: {
4273                 struct kvm_debugregs dbgregs;
4274
4275                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4276
4277                 r = -EFAULT;
4278                 if (copy_to_user(argp, &dbgregs,
4279                                  sizeof(struct kvm_debugregs)))
4280                         break;
4281                 r = 0;
4282                 break;
4283         }
4284         case KVM_SET_DEBUGREGS: {
4285                 struct kvm_debugregs dbgregs;
4286
4287                 r = -EFAULT;
4288                 if (copy_from_user(&dbgregs, argp,
4289                                    sizeof(struct kvm_debugregs)))
4290                         break;
4291
4292                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4293                 break;
4294         }
4295         case KVM_GET_XSAVE: {
4296                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4297                 r = -ENOMEM;
4298                 if (!u.xsave)
4299                         break;
4300
4301                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4302
4303                 r = -EFAULT;
4304                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4305                         break;
4306                 r = 0;
4307                 break;
4308         }
4309         case KVM_SET_XSAVE: {
4310                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4311                 if (IS_ERR(u.xsave)) {
4312                         r = PTR_ERR(u.xsave);
4313                         goto out_nofree;
4314                 }
4315
4316                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4317                 break;
4318         }
4319         case KVM_GET_XCRS: {
4320                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4321                 r = -ENOMEM;
4322                 if (!u.xcrs)
4323                         break;
4324
4325                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4326
4327                 r = -EFAULT;
4328                 if (copy_to_user(argp, u.xcrs,
4329                                  sizeof(struct kvm_xcrs)))
4330                         break;
4331                 r = 0;
4332                 break;
4333         }
4334         case KVM_SET_XCRS: {
4335                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4336                 if (IS_ERR(u.xcrs)) {
4337                         r = PTR_ERR(u.xcrs);
4338                         goto out_nofree;
4339                 }
4340
4341                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4342                 break;
4343         }
4344         case KVM_SET_TSC_KHZ: {
4345                 u32 user_tsc_khz;
4346
4347                 r = -EINVAL;
4348                 user_tsc_khz = (u32)arg;
4349
4350                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4351                         goto out;
4352
4353                 if (user_tsc_khz == 0)
4354                         user_tsc_khz = tsc_khz;
4355
4356                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4357                         r = 0;
4358
4359                 goto out;
4360         }
4361         case KVM_GET_TSC_KHZ: {
4362                 r = vcpu->arch.virtual_tsc_khz;
4363                 goto out;
4364         }
4365         case KVM_KVMCLOCK_CTRL: {
4366                 r = kvm_set_guest_paused(vcpu);
4367                 goto out;
4368         }
4369         case KVM_ENABLE_CAP: {
4370                 struct kvm_enable_cap cap;
4371
4372                 r = -EFAULT;
4373                 if (copy_from_user(&cap, argp, sizeof(cap)))
4374                         goto out;
4375                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4376                 break;
4377         }
4378         case KVM_GET_NESTED_STATE: {
4379                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4380                 u32 user_data_size;
4381
4382                 r = -EINVAL;
4383                 if (!kvm_x86_ops->get_nested_state)
4384                         break;
4385
4386                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4387                 r = -EFAULT;
4388                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4389                         break;
4390
4391                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4392                                                   user_data_size);
4393                 if (r < 0)
4394                         break;
4395
4396                 if (r > user_data_size) {
4397                         if (put_user(r, &user_kvm_nested_state->size))
4398                                 r = -EFAULT;
4399                         else
4400                                 r = -E2BIG;
4401                         break;
4402                 }
4403
4404                 r = 0;
4405                 break;
4406         }
4407         case KVM_SET_NESTED_STATE: {
4408                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4409                 struct kvm_nested_state kvm_state;
4410
4411                 r = -EINVAL;
4412                 if (!kvm_x86_ops->set_nested_state)
4413                         break;
4414
4415                 r = -EFAULT;
4416                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4417                         break;
4418
4419                 r = -EINVAL;
4420                 if (kvm_state.size < sizeof(kvm_state))
4421                         break;
4422
4423                 if (kvm_state.flags &
4424                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4425                       | KVM_STATE_NESTED_EVMCS))
4426                         break;
4427
4428                 /* nested_run_pending implies guest_mode.  */
4429                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4430                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4431                         break;
4432
4433                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4434                 break;
4435         }
4436         case KVM_GET_SUPPORTED_HV_CPUID: {
4437                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4438                 struct kvm_cpuid2 cpuid;
4439
4440                 r = -EFAULT;
4441                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4442                         goto out;
4443
4444                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4445                                                 cpuid_arg->entries);
4446                 if (r)
4447                         goto out;
4448
4449                 r = -EFAULT;
4450                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4451                         goto out;
4452                 r = 0;
4453                 break;
4454         }
4455         default:
4456                 r = -EINVAL;
4457         }
4458 out:
4459         kfree(u.buffer);
4460 out_nofree:
4461         vcpu_put(vcpu);
4462         return r;
4463 }
4464
4465 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4466 {
4467         return VM_FAULT_SIGBUS;
4468 }
4469
4470 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4471 {
4472         int ret;
4473
4474         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4475                 return -EINVAL;
4476         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4477         return ret;
4478 }
4479
4480 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4481                                               u64 ident_addr)
4482 {
4483         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4484 }
4485
4486 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4487                                          unsigned long kvm_nr_mmu_pages)
4488 {
4489         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4490                 return -EINVAL;
4491
4492         mutex_lock(&kvm->slots_lock);
4493
4494         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4495         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4496
4497         mutex_unlock(&kvm->slots_lock);
4498         return 0;
4499 }
4500
4501 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4502 {
4503         return kvm->arch.n_max_mmu_pages;
4504 }
4505
4506 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4507 {
4508         struct kvm_pic *pic = kvm->arch.vpic;
4509         int r;
4510
4511         r = 0;
4512         switch (chip->chip_id) {
4513         case KVM_IRQCHIP_PIC_MASTER:
4514                 memcpy(&chip->chip.pic, &pic->pics[0],
4515                         sizeof(struct kvm_pic_state));
4516                 break;
4517         case KVM_IRQCHIP_PIC_SLAVE:
4518                 memcpy(&chip->chip.pic, &pic->pics[1],
4519                         sizeof(struct kvm_pic_state));
4520                 break;
4521         case KVM_IRQCHIP_IOAPIC:
4522                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4523                 break;
4524         default:
4525                 r = -EINVAL;
4526                 break;
4527         }
4528         return r;
4529 }
4530
4531 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4532 {
4533         struct kvm_pic *pic = kvm->arch.vpic;
4534         int r;
4535
4536         r = 0;
4537         switch (chip->chip_id) {
4538         case KVM_IRQCHIP_PIC_MASTER:
4539                 spin_lock(&pic->lock);
4540                 memcpy(&pic->pics[0], &chip->chip.pic,
4541                         sizeof(struct kvm_pic_state));
4542                 spin_unlock(&pic->lock);
4543                 break;
4544         case KVM_IRQCHIP_PIC_SLAVE:
4545                 spin_lock(&pic->lock);
4546                 memcpy(&pic->pics[1], &chip->chip.pic,
4547                         sizeof(struct kvm_pic_state));
4548                 spin_unlock(&pic->lock);
4549                 break;
4550         case KVM_IRQCHIP_IOAPIC:
4551                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4552                 break;
4553         default:
4554                 r = -EINVAL;
4555                 break;
4556         }
4557         kvm_pic_update_irq(pic);
4558         return r;
4559 }
4560
4561 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4562 {
4563         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4564
4565         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4566
4567         mutex_lock(&kps->lock);
4568         memcpy(ps, &kps->channels, sizeof(*ps));
4569         mutex_unlock(&kps->lock);
4570         return 0;
4571 }
4572
4573 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4574 {
4575         int i;
4576         struct kvm_pit *pit = kvm->arch.vpit;
4577
4578         mutex_lock(&pit->pit_state.lock);
4579         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4580         for (i = 0; i < 3; i++)
4581                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4582         mutex_unlock(&pit->pit_state.lock);
4583         return 0;
4584 }
4585
4586 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4587 {
4588         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4589         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4590                 sizeof(ps->channels));
4591         ps->flags = kvm->arch.vpit->pit_state.flags;
4592         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4593         memset(&ps->reserved, 0, sizeof(ps->reserved));
4594         return 0;
4595 }
4596
4597 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4598 {
4599         int start = 0;
4600         int i;
4601         u32 prev_legacy, cur_legacy;
4602         struct kvm_pit *pit = kvm->arch.vpit;
4603
4604         mutex_lock(&pit->pit_state.lock);
4605         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4606         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4607         if (!prev_legacy && cur_legacy)
4608                 start = 1;
4609         memcpy(&pit->pit_state.channels, &ps->channels,
4610                sizeof(pit->pit_state.channels));
4611         pit->pit_state.flags = ps->flags;
4612         for (i = 0; i < 3; i++)
4613                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4614                                    start && i == 0);
4615         mutex_unlock(&pit->pit_state.lock);
4616         return 0;
4617 }
4618
4619 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4620                                  struct kvm_reinject_control *control)
4621 {
4622         struct kvm_pit *pit = kvm->arch.vpit;
4623
4624         if (!pit)
4625                 return -ENXIO;
4626
4627         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4628          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4629          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4630          */
4631         mutex_lock(&pit->pit_state.lock);
4632         kvm_pit_set_reinject(pit, control->pit_reinject);
4633         mutex_unlock(&pit->pit_state.lock);
4634
4635         return 0;
4636 }
4637
4638 /**
4639  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4640  * @kvm: kvm instance
4641  * @log: slot id and address to which we copy the log
4642  *
4643  * Steps 1-4 below provide general overview of dirty page logging. See
4644  * kvm_get_dirty_log_protect() function description for additional details.
4645  *
4646  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4647  * always flush the TLB (step 4) even if previous step failed  and the dirty
4648  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4649  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4650  * writes will be marked dirty for next log read.
4651  *
4652  *   1. Take a snapshot of the bit and clear it if needed.
4653  *   2. Write protect the corresponding page.
4654  *   3. Copy the snapshot to the userspace.
4655  *   4. Flush TLB's if needed.
4656  */
4657 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4658 {
4659         bool flush = false;
4660         int r;
4661
4662         mutex_lock(&kvm->slots_lock);
4663
4664         /*
4665          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4666          */
4667         if (kvm_x86_ops->flush_log_dirty)
4668                 kvm_x86_ops->flush_log_dirty(kvm);
4669
4670         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4671
4672         /*
4673          * All the TLBs can be flushed out of mmu lock, see the comments in
4674          * kvm_mmu_slot_remove_write_access().
4675          */
4676         lockdep_assert_held(&kvm->slots_lock);
4677         if (flush)
4678                 kvm_flush_remote_tlbs(kvm);
4679
4680         mutex_unlock(&kvm->slots_lock);
4681         return r;
4682 }
4683
4684 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4685 {
4686         bool flush = false;
4687         int r;
4688
4689         mutex_lock(&kvm->slots_lock);
4690
4691         /*
4692          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4693          */
4694         if (kvm_x86_ops->flush_log_dirty)
4695                 kvm_x86_ops->flush_log_dirty(kvm);
4696
4697         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4698
4699         /*
4700          * All the TLBs can be flushed out of mmu lock, see the comments in
4701          * kvm_mmu_slot_remove_write_access().
4702          */
4703         lockdep_assert_held(&kvm->slots_lock);
4704         if (flush)
4705                 kvm_flush_remote_tlbs(kvm);
4706
4707         mutex_unlock(&kvm->slots_lock);
4708         return r;
4709 }
4710
4711 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4712                         bool line_status)
4713 {
4714         if (!irqchip_in_kernel(kvm))
4715                 return -ENXIO;
4716
4717         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4718                                         irq_event->irq, irq_event->level,
4719                                         line_status);
4720         return 0;
4721 }
4722
4723 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4724                             struct kvm_enable_cap *cap)
4725 {
4726         int r;
4727
4728         if (cap->flags)
4729                 return -EINVAL;
4730
4731         switch (cap->cap) {
4732         case KVM_CAP_DISABLE_QUIRKS:
4733                 kvm->arch.disabled_quirks = cap->args[0];
4734                 r = 0;
4735                 break;
4736         case KVM_CAP_SPLIT_IRQCHIP: {
4737                 mutex_lock(&kvm->lock);
4738                 r = -EINVAL;
4739                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4740                         goto split_irqchip_unlock;
4741                 r = -EEXIST;
4742                 if (irqchip_in_kernel(kvm))
4743                         goto split_irqchip_unlock;
4744                 if (kvm->created_vcpus)
4745                         goto split_irqchip_unlock;
4746                 r = kvm_setup_empty_irq_routing(kvm);
4747                 if (r)
4748                         goto split_irqchip_unlock;
4749                 /* Pairs with irqchip_in_kernel. */
4750                 smp_wmb();
4751                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4752                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4753                 r = 0;
4754 split_irqchip_unlock:
4755                 mutex_unlock(&kvm->lock);
4756                 break;
4757         }
4758         case KVM_CAP_X2APIC_API:
4759                 r = -EINVAL;
4760                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4761                         break;
4762
4763                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4764                         kvm->arch.x2apic_format = true;
4765                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4766                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4767
4768                 r = 0;
4769                 break;
4770         case KVM_CAP_X86_DISABLE_EXITS:
4771                 r = -EINVAL;
4772                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4773                         break;
4774
4775                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4776                         kvm_can_mwait_in_guest())
4777                         kvm->arch.mwait_in_guest = true;
4778                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4779                         kvm->arch.hlt_in_guest = true;
4780                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4781                         kvm->arch.pause_in_guest = true;
4782                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4783                         kvm->arch.cstate_in_guest = true;
4784                 r = 0;
4785                 break;
4786         case KVM_CAP_MSR_PLATFORM_INFO:
4787                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4788                 r = 0;
4789                 break;
4790         case KVM_CAP_EXCEPTION_PAYLOAD:
4791                 kvm->arch.exception_payload_enabled = cap->args[0];
4792                 r = 0;
4793                 break;
4794         default:
4795                 r = -EINVAL;
4796                 break;
4797         }
4798         return r;
4799 }
4800
4801 long kvm_arch_vm_ioctl(struct file *filp,
4802                        unsigned int ioctl, unsigned long arg)
4803 {
4804         struct kvm *kvm = filp->private_data;
4805         void __user *argp = (void __user *)arg;
4806         int r = -ENOTTY;
4807         /*
4808          * This union makes it completely explicit to gcc-3.x
4809          * that these two variables' stack usage should be
4810          * combined, not added together.
4811          */
4812         union {
4813                 struct kvm_pit_state ps;
4814                 struct kvm_pit_state2 ps2;
4815                 struct kvm_pit_config pit_config;
4816         } u;
4817
4818         switch (ioctl) {
4819         case KVM_SET_TSS_ADDR:
4820                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4821                 break;
4822         case KVM_SET_IDENTITY_MAP_ADDR: {
4823                 u64 ident_addr;
4824
4825                 mutex_lock(&kvm->lock);
4826                 r = -EINVAL;
4827                 if (kvm->created_vcpus)
4828                         goto set_identity_unlock;
4829                 r = -EFAULT;
4830                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4831                         goto set_identity_unlock;
4832                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4833 set_identity_unlock:
4834                 mutex_unlock(&kvm->lock);
4835                 break;
4836         }
4837         case KVM_SET_NR_MMU_PAGES:
4838                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4839                 break;
4840         case KVM_GET_NR_MMU_PAGES:
4841                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4842                 break;
4843         case KVM_CREATE_IRQCHIP: {
4844                 mutex_lock(&kvm->lock);
4845
4846                 r = -EEXIST;
4847                 if (irqchip_in_kernel(kvm))
4848                         goto create_irqchip_unlock;
4849
4850                 r = -EINVAL;
4851                 if (kvm->created_vcpus)
4852                         goto create_irqchip_unlock;
4853
4854                 r = kvm_pic_init(kvm);
4855                 if (r)
4856                         goto create_irqchip_unlock;
4857
4858                 r = kvm_ioapic_init(kvm);
4859                 if (r) {
4860                         kvm_pic_destroy(kvm);
4861                         goto create_irqchip_unlock;
4862                 }
4863
4864                 r = kvm_setup_default_irq_routing(kvm);
4865                 if (r) {
4866                         kvm_ioapic_destroy(kvm);
4867                         kvm_pic_destroy(kvm);
4868                         goto create_irqchip_unlock;
4869                 }
4870                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4871                 smp_wmb();
4872                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4873         create_irqchip_unlock:
4874                 mutex_unlock(&kvm->lock);
4875                 break;
4876         }
4877         case KVM_CREATE_PIT:
4878                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4879                 goto create_pit;
4880         case KVM_CREATE_PIT2:
4881                 r = -EFAULT;
4882                 if (copy_from_user(&u.pit_config, argp,
4883                                    sizeof(struct kvm_pit_config)))
4884                         goto out;
4885         create_pit:
4886                 mutex_lock(&kvm->lock);
4887                 r = -EEXIST;
4888                 if (kvm->arch.vpit)
4889                         goto create_pit_unlock;
4890                 r = -ENOMEM;
4891                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4892                 if (kvm->arch.vpit)
4893                         r = 0;
4894         create_pit_unlock:
4895                 mutex_unlock(&kvm->lock);
4896                 break;
4897         case KVM_GET_IRQCHIP: {
4898                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4899                 struct kvm_irqchip *chip;
4900
4901                 chip = memdup_user(argp, sizeof(*chip));
4902                 if (IS_ERR(chip)) {
4903                         r = PTR_ERR(chip);
4904                         goto out;
4905                 }
4906
4907                 r = -ENXIO;
4908                 if (!irqchip_kernel(kvm))
4909                         goto get_irqchip_out;
4910                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4911                 if (r)
4912                         goto get_irqchip_out;
4913                 r = -EFAULT;
4914                 if (copy_to_user(argp, chip, sizeof(*chip)))
4915                         goto get_irqchip_out;
4916                 r = 0;
4917         get_irqchip_out:
4918                 kfree(chip);
4919                 break;
4920         }
4921         case KVM_SET_IRQCHIP: {
4922                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4923                 struct kvm_irqchip *chip;
4924
4925                 chip = memdup_user(argp, sizeof(*chip));
4926                 if (IS_ERR(chip)) {
4927                         r = PTR_ERR(chip);
4928                         goto out;
4929                 }
4930
4931                 r = -ENXIO;
4932                 if (!irqchip_kernel(kvm))
4933                         goto set_irqchip_out;
4934                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4935                 if (r)
4936                         goto set_irqchip_out;
4937                 r = 0;
4938         set_irqchip_out:
4939                 kfree(chip);
4940                 break;
4941         }
4942         case KVM_GET_PIT: {
4943                 r = -EFAULT;
4944                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4945                         goto out;
4946                 r = -ENXIO;
4947                 if (!kvm->arch.vpit)
4948                         goto out;
4949                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4950                 if (r)
4951                         goto out;
4952                 r = -EFAULT;
4953                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4954                         goto out;
4955                 r = 0;
4956                 break;
4957         }
4958         case KVM_SET_PIT: {
4959                 r = -EFAULT;
4960                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4961                         goto out;
4962                 r = -ENXIO;
4963                 if (!kvm->arch.vpit)
4964                         goto out;
4965                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4966                 break;
4967         }
4968         case KVM_GET_PIT2: {
4969                 r = -ENXIO;
4970                 if (!kvm->arch.vpit)
4971                         goto out;
4972                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4973                 if (r)
4974                         goto out;
4975                 r = -EFAULT;
4976                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4977                         goto out;
4978                 r = 0;
4979                 break;
4980         }
4981         case KVM_SET_PIT2: {
4982                 r = -EFAULT;
4983                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4984                         goto out;
4985                 r = -ENXIO;
4986                 if (!kvm->arch.vpit)
4987                         goto out;
4988                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4989                 break;
4990         }
4991         case KVM_REINJECT_CONTROL: {
4992                 struct kvm_reinject_control control;
4993                 r =  -EFAULT;
4994                 if (copy_from_user(&control, argp, sizeof(control)))
4995                         goto out;
4996                 r = kvm_vm_ioctl_reinject(kvm, &control);
4997                 break;
4998         }
4999         case KVM_SET_BOOT_CPU_ID:
5000                 r = 0;
5001                 mutex_lock(&kvm->lock);
5002                 if (kvm->created_vcpus)
5003                         r = -EBUSY;
5004                 else
5005                         kvm->arch.bsp_vcpu_id = arg;
5006                 mutex_unlock(&kvm->lock);
5007                 break;
5008         case KVM_XEN_HVM_CONFIG: {
5009                 struct kvm_xen_hvm_config xhc;
5010                 r = -EFAULT;
5011                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5012                         goto out;
5013                 r = -EINVAL;
5014                 if (xhc.flags)
5015                         goto out;
5016                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5017                 r = 0;
5018                 break;
5019         }
5020         case KVM_SET_CLOCK: {
5021                 struct kvm_clock_data user_ns;
5022                 u64 now_ns;
5023
5024                 r = -EFAULT;
5025                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5026                         goto out;
5027
5028                 r = -EINVAL;
5029                 if (user_ns.flags)
5030                         goto out;
5031
5032                 r = 0;
5033                 /*
5034                  * TODO: userspace has to take care of races with VCPU_RUN, so
5035                  * kvm_gen_update_masterclock() can be cut down to locked
5036                  * pvclock_update_vm_gtod_copy().
5037                  */
5038                 kvm_gen_update_masterclock(kvm);
5039                 now_ns = get_kvmclock_ns(kvm);
5040                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5041                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5042                 break;
5043         }
5044         case KVM_GET_CLOCK: {
5045                 struct kvm_clock_data user_ns;
5046                 u64 now_ns;
5047
5048                 now_ns = get_kvmclock_ns(kvm);
5049                 user_ns.clock = now_ns;
5050                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5051                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5052
5053                 r = -EFAULT;
5054                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5055                         goto out;
5056                 r = 0;
5057                 break;
5058         }
5059         case KVM_MEMORY_ENCRYPT_OP: {
5060                 r = -ENOTTY;
5061                 if (kvm_x86_ops->mem_enc_op)
5062                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
5063                 break;
5064         }
5065         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5066                 struct kvm_enc_region region;
5067
5068                 r = -EFAULT;
5069                 if (copy_from_user(&region, argp, sizeof(region)))
5070                         goto out;
5071
5072                 r = -ENOTTY;
5073                 if (kvm_x86_ops->mem_enc_reg_region)
5074                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
5075                 break;
5076         }
5077         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5078                 struct kvm_enc_region region;
5079
5080                 r = -EFAULT;
5081                 if (copy_from_user(&region, argp, sizeof(region)))
5082                         goto out;
5083
5084                 r = -ENOTTY;
5085                 if (kvm_x86_ops->mem_enc_unreg_region)
5086                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
5087                 break;
5088         }
5089         case KVM_HYPERV_EVENTFD: {
5090                 struct kvm_hyperv_eventfd hvevfd;
5091
5092                 r = -EFAULT;
5093                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5094                         goto out;
5095                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5096                 break;
5097         }
5098         case KVM_SET_PMU_EVENT_FILTER:
5099                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5100                 break;
5101         default:
5102                 r = -ENOTTY;
5103         }
5104 out:
5105         return r;
5106 }
5107
5108 static void kvm_init_msr_list(void)
5109 {
5110         struct x86_pmu_capability x86_pmu;
5111         u32 dummy[2];
5112         unsigned i, j;
5113
5114         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5115                          "Please update the fixed PMCs in msrs_to_save[]");
5116
5117         perf_get_x86_pmu_capability(&x86_pmu);
5118
5119         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
5120                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
5121                         continue;
5122
5123                 /*
5124                  * Even MSRs that are valid in the host may not be exposed
5125                  * to the guests in some cases.
5126                  */
5127                 switch (msrs_to_save[i]) {
5128                 case MSR_IA32_BNDCFGS:
5129                         if (!kvm_mpx_supported())
5130                                 continue;
5131                         break;
5132                 case MSR_TSC_AUX:
5133                         if (!kvm_x86_ops->rdtscp_supported())
5134                                 continue;
5135                         break;
5136                 case MSR_IA32_RTIT_CTL:
5137                 case MSR_IA32_RTIT_STATUS:
5138                         if (!kvm_x86_ops->pt_supported())
5139                                 continue;
5140                         break;
5141                 case MSR_IA32_RTIT_CR3_MATCH:
5142                         if (!kvm_x86_ops->pt_supported() ||
5143                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5144                                 continue;
5145                         break;
5146                 case MSR_IA32_RTIT_OUTPUT_BASE:
5147                 case MSR_IA32_RTIT_OUTPUT_MASK:
5148                         if (!kvm_x86_ops->pt_supported() ||
5149                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5150                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5151                                 continue;
5152                         break;
5153                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5154                         if (!kvm_x86_ops->pt_supported() ||
5155                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5156                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5157                                 continue;
5158                         break;
5159                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5160                         if (msrs_to_save[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5161                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5162                                 continue;
5163                         break;
5164                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5165                         if (msrs_to_save[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5166                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5167                                 continue;
5168                 }
5169                 default:
5170                         break;
5171                 }
5172
5173                 if (j < i)
5174                         msrs_to_save[j] = msrs_to_save[i];
5175                 j++;
5176         }
5177         num_msrs_to_save = j;
5178
5179         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5180                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5181                         continue;
5182
5183                 if (j < i)
5184                         emulated_msrs[j] = emulated_msrs[i];
5185                 j++;
5186         }
5187         num_emulated_msrs = j;
5188
5189         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5190                 struct kvm_msr_entry msr;
5191
5192                 msr.index = msr_based_features[i];
5193                 if (kvm_get_msr_feature(&msr))
5194                         continue;
5195
5196                 if (j < i)
5197                         msr_based_features[j] = msr_based_features[i];
5198                 j++;
5199         }
5200         num_msr_based_features = j;
5201 }
5202
5203 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5204                            const void *v)
5205 {
5206         int handled = 0;
5207         int n;
5208
5209         do {
5210                 n = min(len, 8);
5211                 if (!(lapic_in_kernel(vcpu) &&
5212                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5213                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5214                         break;
5215                 handled += n;
5216                 addr += n;
5217                 len -= n;
5218                 v += n;
5219         } while (len);
5220
5221         return handled;
5222 }
5223
5224 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5225 {
5226         int handled = 0;
5227         int n;
5228
5229         do {
5230                 n = min(len, 8);
5231                 if (!(lapic_in_kernel(vcpu) &&
5232                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5233                                          addr, n, v))
5234                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5235                         break;
5236                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5237                 handled += n;
5238                 addr += n;
5239                 len -= n;
5240                 v += n;
5241         } while (len);
5242
5243         return handled;
5244 }
5245
5246 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5247                         struct kvm_segment *var, int seg)
5248 {
5249         kvm_x86_ops->set_segment(vcpu, var, seg);
5250 }
5251
5252 void kvm_get_segment(struct kvm_vcpu *vcpu,
5253                      struct kvm_segment *var, int seg)
5254 {
5255         kvm_x86_ops->get_segment(vcpu, var, seg);
5256 }
5257
5258 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5259                            struct x86_exception *exception)
5260 {
5261         gpa_t t_gpa;
5262
5263         BUG_ON(!mmu_is_nested(vcpu));
5264
5265         /* NPT walks are always user-walks */
5266         access |= PFERR_USER_MASK;
5267         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5268
5269         return t_gpa;
5270 }
5271
5272 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5273                               struct x86_exception *exception)
5274 {
5275         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5276         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5277 }
5278
5279  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5280                                 struct x86_exception *exception)
5281 {
5282         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5283         access |= PFERR_FETCH_MASK;
5284         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5285 }
5286
5287 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5288                                struct x86_exception *exception)
5289 {
5290         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5291         access |= PFERR_WRITE_MASK;
5292         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5293 }
5294
5295 /* uses this to access any guest's mapped memory without checking CPL */
5296 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5297                                 struct x86_exception *exception)
5298 {
5299         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5300 }
5301
5302 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5303                                       struct kvm_vcpu *vcpu, u32 access,
5304                                       struct x86_exception *exception)
5305 {
5306         void *data = val;
5307         int r = X86EMUL_CONTINUE;
5308
5309         while (bytes) {
5310                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5311                                                             exception);
5312                 unsigned offset = addr & (PAGE_SIZE-1);
5313                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5314                 int ret;
5315
5316                 if (gpa == UNMAPPED_GVA)
5317                         return X86EMUL_PROPAGATE_FAULT;
5318                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5319                                                offset, toread);
5320                 if (ret < 0) {
5321                         r = X86EMUL_IO_NEEDED;
5322                         goto out;
5323                 }
5324
5325                 bytes -= toread;
5326                 data += toread;
5327                 addr += toread;
5328         }
5329 out:
5330         return r;
5331 }
5332
5333 /* used for instruction fetching */
5334 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5335                                 gva_t addr, void *val, unsigned int bytes,
5336                                 struct x86_exception *exception)
5337 {
5338         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5339         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5340         unsigned offset;
5341         int ret;
5342
5343         /* Inline kvm_read_guest_virt_helper for speed.  */
5344         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5345                                                     exception);
5346         if (unlikely(gpa == UNMAPPED_GVA))
5347                 return X86EMUL_PROPAGATE_FAULT;
5348
5349         offset = addr & (PAGE_SIZE-1);
5350         if (WARN_ON(offset + bytes > PAGE_SIZE))
5351                 bytes = (unsigned)PAGE_SIZE - offset;
5352         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5353                                        offset, bytes);
5354         if (unlikely(ret < 0))
5355                 return X86EMUL_IO_NEEDED;
5356
5357         return X86EMUL_CONTINUE;
5358 }
5359
5360 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5361                                gva_t addr, void *val, unsigned int bytes,
5362                                struct x86_exception *exception)
5363 {
5364         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5365
5366         /*
5367          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5368          * is returned, but our callers are not ready for that and they blindly
5369          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5370          * uninitialized kernel stack memory into cr2 and error code.
5371          */
5372         memset(exception, 0, sizeof(*exception));
5373         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5374                                           exception);
5375 }
5376 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5377
5378 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5379                              gva_t addr, void *val, unsigned int bytes,
5380                              struct x86_exception *exception, bool system)
5381 {
5382         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5383         u32 access = 0;
5384
5385         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5386                 access |= PFERR_USER_MASK;
5387
5388         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5389 }
5390
5391 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5392                 unsigned long addr, void *val, unsigned int bytes)
5393 {
5394         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5395         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5396
5397         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5398 }
5399
5400 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5401                                       struct kvm_vcpu *vcpu, u32 access,
5402                                       struct x86_exception *exception)
5403 {
5404         void *data = val;
5405         int r = X86EMUL_CONTINUE;
5406
5407         while (bytes) {
5408                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5409                                                              access,
5410                                                              exception);
5411                 unsigned offset = addr & (PAGE_SIZE-1);
5412                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5413                 int ret;
5414
5415                 if (gpa == UNMAPPED_GVA)
5416                         return X86EMUL_PROPAGATE_FAULT;
5417                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5418                 if (ret < 0) {
5419                         r = X86EMUL_IO_NEEDED;
5420                         goto out;
5421                 }
5422
5423                 bytes -= towrite;
5424                 data += towrite;
5425                 addr += towrite;
5426         }
5427 out:
5428         return r;
5429 }
5430
5431 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5432                               unsigned int bytes, struct x86_exception *exception,
5433                               bool system)
5434 {
5435         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5436         u32 access = PFERR_WRITE_MASK;
5437
5438         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5439                 access |= PFERR_USER_MASK;
5440
5441         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5442                                            access, exception);
5443 }
5444
5445 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5446                                 unsigned int bytes, struct x86_exception *exception)
5447 {
5448         /* kvm_write_guest_virt_system can pull in tons of pages. */
5449         vcpu->arch.l1tf_flush_l1d = true;
5450
5451         /*
5452          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5453          * is returned, but our callers are not ready for that and they blindly
5454          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5455          * uninitialized kernel stack memory into cr2 and error code.
5456          */
5457         memset(exception, 0, sizeof(*exception));
5458         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5459                                            PFERR_WRITE_MASK, exception);
5460 }
5461 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5462
5463 int handle_ud(struct kvm_vcpu *vcpu)
5464 {
5465         int emul_type = EMULTYPE_TRAP_UD;
5466         char sig[5]; /* ud2; .ascii "kvm" */
5467         struct x86_exception e;
5468
5469         if (force_emulation_prefix &&
5470             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5471                                 sig, sizeof(sig), &e) == 0 &&
5472             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5473                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5474                 emul_type = EMULTYPE_TRAP_UD_FORCED;
5475         }
5476
5477         return kvm_emulate_instruction(vcpu, emul_type);
5478 }
5479 EXPORT_SYMBOL_GPL(handle_ud);
5480
5481 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5482                             gpa_t gpa, bool write)
5483 {
5484         /* For APIC access vmexit */
5485         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5486                 return 1;
5487
5488         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5489                 trace_vcpu_match_mmio(gva, gpa, write, true);
5490                 return 1;
5491         }
5492
5493         return 0;
5494 }
5495
5496 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5497                                 gpa_t *gpa, struct x86_exception *exception,
5498                                 bool write)
5499 {
5500         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5501                 | (write ? PFERR_WRITE_MASK : 0);
5502
5503         /*
5504          * currently PKRU is only applied to ept enabled guest so
5505          * there is no pkey in EPT page table for L1 guest or EPT
5506          * shadow page table for L2 guest.
5507          */
5508         if (vcpu_match_mmio_gva(vcpu, gva)
5509             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5510                                  vcpu->arch.mmio_access, 0, access)) {
5511                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5512                                         (gva & (PAGE_SIZE - 1));
5513                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5514                 return 1;
5515         }
5516
5517         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5518
5519         if (*gpa == UNMAPPED_GVA)
5520                 return -1;
5521
5522         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5523 }
5524
5525 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5526                         const void *val, int bytes)
5527 {
5528         int ret;
5529
5530         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5531         if (ret < 0)
5532                 return 0;
5533         kvm_page_track_write(vcpu, gpa, val, bytes);
5534         return 1;
5535 }
5536
5537 struct read_write_emulator_ops {
5538         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5539                                   int bytes);
5540         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5541                                   void *val, int bytes);
5542         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5543                                int bytes, void *val);
5544         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5545                                     void *val, int bytes);
5546         bool write;
5547 };
5548
5549 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5550 {
5551         if (vcpu->mmio_read_completed) {
5552                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5553                                vcpu->mmio_fragments[0].gpa, val);
5554                 vcpu->mmio_read_completed = 0;
5555                 return 1;
5556         }
5557
5558         return 0;
5559 }
5560
5561 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5562                         void *val, int bytes)
5563 {
5564         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5565 }
5566
5567 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5568                          void *val, int bytes)
5569 {
5570         return emulator_write_phys(vcpu, gpa, val, bytes);
5571 }
5572
5573 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5574 {
5575         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5576         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5577 }
5578
5579 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5580                           void *val, int bytes)
5581 {
5582         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5583         return X86EMUL_IO_NEEDED;
5584 }
5585
5586 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5587                            void *val, int bytes)
5588 {
5589         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5590
5591         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5592         return X86EMUL_CONTINUE;
5593 }
5594
5595 static const struct read_write_emulator_ops read_emultor = {
5596         .read_write_prepare = read_prepare,
5597         .read_write_emulate = read_emulate,
5598         .read_write_mmio = vcpu_mmio_read,
5599         .read_write_exit_mmio = read_exit_mmio,
5600 };
5601
5602 static const struct read_write_emulator_ops write_emultor = {
5603         .read_write_emulate = write_emulate,
5604         .read_write_mmio = write_mmio,
5605         .read_write_exit_mmio = write_exit_mmio,
5606         .write = true,
5607 };
5608
5609 static int emulator_read_write_onepage(unsigned long addr, void *val,
5610                                        unsigned int bytes,
5611                                        struct x86_exception *exception,
5612                                        struct kvm_vcpu *vcpu,
5613                                        const struct read_write_emulator_ops *ops)
5614 {
5615         gpa_t gpa;
5616         int handled, ret;
5617         bool write = ops->write;
5618         struct kvm_mmio_fragment *frag;
5619         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5620
5621         /*
5622          * If the exit was due to a NPF we may already have a GPA.
5623          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5624          * Note, this cannot be used on string operations since string
5625          * operation using rep will only have the initial GPA from the NPF
5626          * occurred.
5627          */
5628         if (vcpu->arch.gpa_available &&
5629             emulator_can_use_gpa(ctxt) &&
5630             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5631                 gpa = vcpu->arch.gpa_val;
5632                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5633         } else {
5634                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5635                 if (ret < 0)
5636                         return X86EMUL_PROPAGATE_FAULT;
5637         }
5638
5639         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5640                 return X86EMUL_CONTINUE;
5641
5642         /*
5643          * Is this MMIO handled locally?
5644          */
5645         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5646         if (handled == bytes)
5647                 return X86EMUL_CONTINUE;
5648
5649         gpa += handled;
5650         bytes -= handled;
5651         val += handled;
5652
5653         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5654         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5655         frag->gpa = gpa;
5656         frag->data = val;
5657         frag->len = bytes;
5658         return X86EMUL_CONTINUE;
5659 }
5660
5661 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5662                         unsigned long addr,
5663                         void *val, unsigned int bytes,
5664                         struct x86_exception *exception,
5665                         const struct read_write_emulator_ops *ops)
5666 {
5667         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5668         gpa_t gpa;
5669         int rc;
5670
5671         if (ops->read_write_prepare &&
5672                   ops->read_write_prepare(vcpu, val, bytes))
5673                 return X86EMUL_CONTINUE;
5674
5675         vcpu->mmio_nr_fragments = 0;
5676
5677         /* Crossing a page boundary? */
5678         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5679                 int now;
5680
5681                 now = -addr & ~PAGE_MASK;
5682                 rc = emulator_read_write_onepage(addr, val, now, exception,
5683                                                  vcpu, ops);
5684
5685                 if (rc != X86EMUL_CONTINUE)
5686                         return rc;
5687                 addr += now;
5688                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5689                         addr = (u32)addr;
5690                 val += now;
5691                 bytes -= now;
5692         }
5693
5694         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5695                                          vcpu, ops);
5696         if (rc != X86EMUL_CONTINUE)
5697                 return rc;
5698
5699         if (!vcpu->mmio_nr_fragments)
5700                 return rc;
5701
5702         gpa = vcpu->mmio_fragments[0].gpa;
5703
5704         vcpu->mmio_needed = 1;
5705         vcpu->mmio_cur_fragment = 0;
5706
5707         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5708         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5709         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5710         vcpu->run->mmio.phys_addr = gpa;
5711
5712         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5713 }
5714
5715 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5716                                   unsigned long addr,
5717                                   void *val,
5718                                   unsigned int bytes,
5719                                   struct x86_exception *exception)
5720 {
5721         return emulator_read_write(ctxt, addr, val, bytes,
5722                                    exception, &read_emultor);
5723 }
5724
5725 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5726                             unsigned long addr,
5727                             const void *val,
5728                             unsigned int bytes,
5729                             struct x86_exception *exception)
5730 {
5731         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5732                                    exception, &write_emultor);
5733 }
5734
5735 #define CMPXCHG_TYPE(t, ptr, old, new) \
5736         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5737
5738 #ifdef CONFIG_X86_64
5739 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5740 #else
5741 #  define CMPXCHG64(ptr, old, new) \
5742         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5743 #endif
5744
5745 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5746                                      unsigned long addr,
5747                                      const void *old,
5748                                      const void *new,
5749                                      unsigned int bytes,
5750                                      struct x86_exception *exception)
5751 {
5752         struct kvm_host_map map;
5753         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5754         gpa_t gpa;
5755         char *kaddr;
5756         bool exchanged;
5757
5758         /* guests cmpxchg8b have to be emulated atomically */
5759         if (bytes > 8 || (bytes & (bytes - 1)))
5760                 goto emul_write;
5761
5762         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5763
5764         if (gpa == UNMAPPED_GVA ||
5765             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5766                 goto emul_write;
5767
5768         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5769                 goto emul_write;
5770
5771         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5772                 goto emul_write;
5773
5774         kaddr = map.hva + offset_in_page(gpa);
5775
5776         switch (bytes) {
5777         case 1:
5778                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5779                 break;
5780         case 2:
5781                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5782                 break;
5783         case 4:
5784                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5785                 break;
5786         case 8:
5787                 exchanged = CMPXCHG64(kaddr, old, new);
5788                 break;
5789         default:
5790                 BUG();
5791         }
5792
5793         kvm_vcpu_unmap(vcpu, &map, true);
5794
5795         if (!exchanged)
5796                 return X86EMUL_CMPXCHG_FAILED;
5797
5798         kvm_page_track_write(vcpu, gpa, new, bytes);
5799
5800         return X86EMUL_CONTINUE;
5801
5802 emul_write:
5803         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5804
5805         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5806 }
5807
5808 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5809 {
5810         int r = 0, i;
5811
5812         for (i = 0; i < vcpu->arch.pio.count; i++) {
5813                 if (vcpu->arch.pio.in)
5814                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5815                                             vcpu->arch.pio.size, pd);
5816                 else
5817                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5818                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5819                                              pd);
5820                 if (r)
5821                         break;
5822                 pd += vcpu->arch.pio.size;
5823         }
5824         return r;
5825 }
5826
5827 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5828                                unsigned short port, void *val,
5829                                unsigned int count, bool in)
5830 {
5831         vcpu->arch.pio.port = port;
5832         vcpu->arch.pio.in = in;
5833         vcpu->arch.pio.count  = count;
5834         vcpu->arch.pio.size = size;
5835
5836         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5837                 vcpu->arch.pio.count = 0;
5838                 return 1;
5839         }
5840
5841         vcpu->run->exit_reason = KVM_EXIT_IO;
5842         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5843         vcpu->run->io.size = size;
5844         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5845         vcpu->run->io.count = count;
5846         vcpu->run->io.port = port;
5847
5848         return 0;
5849 }
5850
5851 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5852                                     int size, unsigned short port, void *val,
5853                                     unsigned int count)
5854 {
5855         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5856         int ret;
5857
5858         if (vcpu->arch.pio.count)
5859                 goto data_avail;
5860
5861         memset(vcpu->arch.pio_data, 0, size * count);
5862
5863         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5864         if (ret) {
5865 data_avail:
5866                 memcpy(val, vcpu->arch.pio_data, size * count);
5867                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5868                 vcpu->arch.pio.count = 0;
5869                 return 1;
5870         }
5871
5872         return 0;
5873 }
5874
5875 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5876                                      int size, unsigned short port,
5877                                      const void *val, unsigned int count)
5878 {
5879         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5880
5881         memcpy(vcpu->arch.pio_data, val, size * count);
5882         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5883         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5884 }
5885
5886 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5887 {
5888         return kvm_x86_ops->get_segment_base(vcpu, seg);
5889 }
5890
5891 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5892 {
5893         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5894 }
5895
5896 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5897 {
5898         if (!need_emulate_wbinvd(vcpu))
5899                 return X86EMUL_CONTINUE;
5900
5901         if (kvm_x86_ops->has_wbinvd_exit()) {
5902                 int cpu = get_cpu();
5903
5904                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5905                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5906                                 wbinvd_ipi, NULL, 1);
5907                 put_cpu();
5908                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5909         } else
5910                 wbinvd();
5911         return X86EMUL_CONTINUE;
5912 }
5913
5914 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5915 {
5916         kvm_emulate_wbinvd_noskip(vcpu);
5917         return kvm_skip_emulated_instruction(vcpu);
5918 }
5919 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5920
5921
5922
5923 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5924 {
5925         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5926 }
5927
5928 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5929                            unsigned long *dest)
5930 {
5931         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5932 }
5933
5934 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5935                            unsigned long value)
5936 {
5937
5938         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5939 }
5940
5941 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5942 {
5943         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5944 }
5945
5946 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5947 {
5948         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5949         unsigned long value;
5950
5951         switch (cr) {
5952         case 0:
5953                 value = kvm_read_cr0(vcpu);
5954                 break;
5955         case 2:
5956                 value = vcpu->arch.cr2;
5957                 break;
5958         case 3:
5959                 value = kvm_read_cr3(vcpu);
5960                 break;
5961         case 4:
5962                 value = kvm_read_cr4(vcpu);
5963                 break;
5964         case 8:
5965                 value = kvm_get_cr8(vcpu);
5966                 break;
5967         default:
5968                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5969                 return 0;
5970         }
5971
5972         return value;
5973 }
5974
5975 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5976 {
5977         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5978         int res = 0;
5979
5980         switch (cr) {
5981         case 0:
5982                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5983                 break;
5984         case 2:
5985                 vcpu->arch.cr2 = val;
5986                 break;
5987         case 3:
5988                 res = kvm_set_cr3(vcpu, val);
5989                 break;
5990         case 4:
5991                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5992                 break;
5993         case 8:
5994                 res = kvm_set_cr8(vcpu, val);
5995                 break;
5996         default:
5997                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5998                 res = -1;
5999         }
6000
6001         return res;
6002 }
6003
6004 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6005 {
6006         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
6007 }
6008
6009 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6010 {
6011         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
6012 }
6013
6014 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6015 {
6016         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
6017 }
6018
6019 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6020 {
6021         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
6022 }
6023
6024 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6025 {
6026         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
6027 }
6028
6029 static unsigned long emulator_get_cached_segment_base(
6030         struct x86_emulate_ctxt *ctxt, int seg)
6031 {
6032         return get_segment_base(emul_to_vcpu(ctxt), seg);
6033 }
6034
6035 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6036                                  struct desc_struct *desc, u32 *base3,
6037                                  int seg)
6038 {
6039         struct kvm_segment var;
6040
6041         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6042         *selector = var.selector;
6043
6044         if (var.unusable) {
6045                 memset(desc, 0, sizeof(*desc));
6046                 if (base3)
6047                         *base3 = 0;
6048                 return false;
6049         }
6050
6051         if (var.g)
6052                 var.limit >>= 12;
6053         set_desc_limit(desc, var.limit);
6054         set_desc_base(desc, (unsigned long)var.base);
6055 #ifdef CONFIG_X86_64
6056         if (base3)
6057                 *base3 = var.base >> 32;
6058 #endif
6059         desc->type = var.type;
6060         desc->s = var.s;
6061         desc->dpl = var.dpl;
6062         desc->p = var.present;
6063         desc->avl = var.avl;
6064         desc->l = var.l;
6065         desc->d = var.db;
6066         desc->g = var.g;
6067
6068         return true;
6069 }
6070
6071 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6072                                  struct desc_struct *desc, u32 base3,
6073                                  int seg)
6074 {
6075         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6076         struct kvm_segment var;
6077
6078         var.selector = selector;
6079         var.base = get_desc_base(desc);
6080 #ifdef CONFIG_X86_64
6081         var.base |= ((u64)base3) << 32;
6082 #endif
6083         var.limit = get_desc_limit(desc);
6084         if (desc->g)
6085                 var.limit = (var.limit << 12) | 0xfff;
6086         var.type = desc->type;
6087         var.dpl = desc->dpl;
6088         var.db = desc->d;
6089         var.s = desc->s;
6090         var.l = desc->l;
6091         var.g = desc->g;
6092         var.avl = desc->avl;
6093         var.present = desc->p;
6094         var.unusable = !var.present;
6095         var.padding = 0;
6096
6097         kvm_set_segment(vcpu, &var, seg);
6098         return;
6099 }
6100
6101 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6102                             u32 msr_index, u64 *pdata)
6103 {
6104         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
6105 }
6106
6107 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6108                             u32 msr_index, u64 data)
6109 {
6110         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
6111 }
6112
6113 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6114 {
6115         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6116
6117         return vcpu->arch.smbase;
6118 }
6119
6120 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6121 {
6122         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6123
6124         vcpu->arch.smbase = smbase;
6125 }
6126
6127 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6128                               u32 pmc)
6129 {
6130         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6131 }
6132
6133 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6134                              u32 pmc, u64 *pdata)
6135 {
6136         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6137 }
6138
6139 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6140 {
6141         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6142 }
6143
6144 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6145                               struct x86_instruction_info *info,
6146                               enum x86_intercept_stage stage)
6147 {
6148         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6149 }
6150
6151 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6152                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6153 {
6154         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6155 }
6156
6157 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6158 {
6159         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6160 }
6161
6162 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6163 {
6164         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6165 }
6166
6167 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6168 {
6169         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6170 }
6171
6172 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6173 {
6174         return emul_to_vcpu(ctxt)->arch.hflags;
6175 }
6176
6177 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6178 {
6179         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6180 }
6181
6182 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6183                                   const char *smstate)
6184 {
6185         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6186 }
6187
6188 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6189 {
6190         kvm_smm_changed(emul_to_vcpu(ctxt));
6191 }
6192
6193 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6194 {
6195         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6196 }
6197
6198 static const struct x86_emulate_ops emulate_ops = {
6199         .read_gpr            = emulator_read_gpr,
6200         .write_gpr           = emulator_write_gpr,
6201         .read_std            = emulator_read_std,
6202         .write_std           = emulator_write_std,
6203         .read_phys           = kvm_read_guest_phys_system,
6204         .fetch               = kvm_fetch_guest_virt,
6205         .read_emulated       = emulator_read_emulated,
6206         .write_emulated      = emulator_write_emulated,
6207         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6208         .invlpg              = emulator_invlpg,
6209         .pio_in_emulated     = emulator_pio_in_emulated,
6210         .pio_out_emulated    = emulator_pio_out_emulated,
6211         .get_segment         = emulator_get_segment,
6212         .set_segment         = emulator_set_segment,
6213         .get_cached_segment_base = emulator_get_cached_segment_base,
6214         .get_gdt             = emulator_get_gdt,
6215         .get_idt             = emulator_get_idt,
6216         .set_gdt             = emulator_set_gdt,
6217         .set_idt             = emulator_set_idt,
6218         .get_cr              = emulator_get_cr,
6219         .set_cr              = emulator_set_cr,
6220         .cpl                 = emulator_get_cpl,
6221         .get_dr              = emulator_get_dr,
6222         .set_dr              = emulator_set_dr,
6223         .get_smbase          = emulator_get_smbase,
6224         .set_smbase          = emulator_set_smbase,
6225         .set_msr             = emulator_set_msr,
6226         .get_msr             = emulator_get_msr,
6227         .check_pmc           = emulator_check_pmc,
6228         .read_pmc            = emulator_read_pmc,
6229         .halt                = emulator_halt,
6230         .wbinvd              = emulator_wbinvd,
6231         .fix_hypercall       = emulator_fix_hypercall,
6232         .intercept           = emulator_intercept,
6233         .get_cpuid           = emulator_get_cpuid,
6234         .set_nmi_mask        = emulator_set_nmi_mask,
6235         .get_hflags          = emulator_get_hflags,
6236         .set_hflags          = emulator_set_hflags,
6237         .pre_leave_smm       = emulator_pre_leave_smm,
6238         .post_leave_smm      = emulator_post_leave_smm,
6239         .set_xcr             = emulator_set_xcr,
6240 };
6241
6242 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6243 {
6244         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6245         /*
6246          * an sti; sti; sequence only disable interrupts for the first
6247          * instruction. So, if the last instruction, be it emulated or
6248          * not, left the system with the INT_STI flag enabled, it
6249          * means that the last instruction is an sti. We should not
6250          * leave the flag on in this case. The same goes for mov ss
6251          */
6252         if (int_shadow & mask)
6253                 mask = 0;
6254         if (unlikely(int_shadow || mask)) {
6255                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6256                 if (!mask)
6257                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6258         }
6259 }
6260
6261 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6262 {
6263         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6264         if (ctxt->exception.vector == PF_VECTOR)
6265                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6266
6267         if (ctxt->exception.error_code_valid)
6268                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6269                                       ctxt->exception.error_code);
6270         else
6271                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6272         return false;
6273 }
6274
6275 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6276 {
6277         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6278         int cs_db, cs_l;
6279
6280         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6281
6282         ctxt->eflags = kvm_get_rflags(vcpu);
6283         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6284
6285         ctxt->eip = kvm_rip_read(vcpu);
6286         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6287                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6288                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6289                      cs_db                              ? X86EMUL_MODE_PROT32 :
6290                                                           X86EMUL_MODE_PROT16;
6291         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6292         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6293         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6294
6295         init_decode_cache(ctxt);
6296         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6297 }
6298
6299 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6300 {
6301         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6302         int ret;
6303
6304         init_emulate_ctxt(vcpu);
6305
6306         ctxt->op_bytes = 2;
6307         ctxt->ad_bytes = 2;
6308         ctxt->_eip = ctxt->eip + inc_eip;
6309         ret = emulate_int_real(ctxt, irq);
6310
6311         if (ret != X86EMUL_CONTINUE) {
6312                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6313         } else {
6314                 ctxt->eip = ctxt->_eip;
6315                 kvm_rip_write(vcpu, ctxt->eip);
6316                 kvm_set_rflags(vcpu, ctxt->eflags);
6317         }
6318 }
6319 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6320
6321 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6322 {
6323         ++vcpu->stat.insn_emulation_fail;
6324         trace_kvm_emulate_insn_failed(vcpu);
6325
6326         if (emulation_type & EMULTYPE_VMWARE_GP) {
6327                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6328                 return 1;
6329         }
6330
6331         if (emulation_type & EMULTYPE_SKIP) {
6332                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6333                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6334                 vcpu->run->internal.ndata = 0;
6335                 return 0;
6336         }
6337
6338         kvm_queue_exception(vcpu, UD_VECTOR);
6339
6340         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6341                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6342                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6343                 vcpu->run->internal.ndata = 0;
6344                 return 0;
6345         }
6346
6347         return 1;
6348 }
6349
6350 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6351                                   bool write_fault_to_shadow_pgtable,
6352                                   int emulation_type)
6353 {
6354         gpa_t gpa = cr2;
6355         kvm_pfn_t pfn;
6356
6357         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6358                 return false;
6359
6360         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6361                 return false;
6362
6363         if (!vcpu->arch.mmu->direct_map) {
6364                 /*
6365                  * Write permission should be allowed since only
6366                  * write access need to be emulated.
6367                  */
6368                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6369
6370                 /*
6371                  * If the mapping is invalid in guest, let cpu retry
6372                  * it to generate fault.
6373                  */
6374                 if (gpa == UNMAPPED_GVA)
6375                         return true;
6376         }
6377
6378         /*
6379          * Do not retry the unhandleable instruction if it faults on the
6380          * readonly host memory, otherwise it will goto a infinite loop:
6381          * retry instruction -> write #PF -> emulation fail -> retry
6382          * instruction -> ...
6383          */
6384         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6385
6386         /*
6387          * If the instruction failed on the error pfn, it can not be fixed,
6388          * report the error to userspace.
6389          */
6390         if (is_error_noslot_pfn(pfn))
6391                 return false;
6392
6393         kvm_release_pfn_clean(pfn);
6394
6395         /* The instructions are well-emulated on direct mmu. */
6396         if (vcpu->arch.mmu->direct_map) {
6397                 unsigned int indirect_shadow_pages;
6398
6399                 spin_lock(&vcpu->kvm->mmu_lock);
6400                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6401                 spin_unlock(&vcpu->kvm->mmu_lock);
6402
6403                 if (indirect_shadow_pages)
6404                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6405
6406                 return true;
6407         }
6408
6409         /*
6410          * if emulation was due to access to shadowed page table
6411          * and it failed try to unshadow page and re-enter the
6412          * guest to let CPU execute the instruction.
6413          */
6414         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6415
6416         /*
6417          * If the access faults on its page table, it can not
6418          * be fixed by unprotecting shadow page and it should
6419          * be reported to userspace.
6420          */
6421         return !write_fault_to_shadow_pgtable;
6422 }
6423
6424 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6425                               unsigned long cr2,  int emulation_type)
6426 {
6427         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6428         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6429
6430         last_retry_eip = vcpu->arch.last_retry_eip;
6431         last_retry_addr = vcpu->arch.last_retry_addr;
6432
6433         /*
6434          * If the emulation is caused by #PF and it is non-page_table
6435          * writing instruction, it means the VM-EXIT is caused by shadow
6436          * page protected, we can zap the shadow page and retry this
6437          * instruction directly.
6438          *
6439          * Note: if the guest uses a non-page-table modifying instruction
6440          * on the PDE that points to the instruction, then we will unmap
6441          * the instruction and go to an infinite loop. So, we cache the
6442          * last retried eip and the last fault address, if we meet the eip
6443          * and the address again, we can break out of the potential infinite
6444          * loop.
6445          */
6446         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6447
6448         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6449                 return false;
6450
6451         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6452                 return false;
6453
6454         if (x86_page_table_writing_insn(ctxt))
6455                 return false;
6456
6457         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6458                 return false;
6459
6460         vcpu->arch.last_retry_eip = ctxt->eip;
6461         vcpu->arch.last_retry_addr = cr2;
6462
6463         if (!vcpu->arch.mmu->direct_map)
6464                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6465
6466         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6467
6468         return true;
6469 }
6470
6471 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6472 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6473
6474 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6475 {
6476         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6477                 /* This is a good place to trace that we are exiting SMM.  */
6478                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6479
6480                 /* Process a latched INIT or SMI, if any.  */
6481                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6482         }
6483
6484         kvm_mmu_reset_context(vcpu);
6485 }
6486
6487 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6488                                 unsigned long *db)
6489 {
6490         u32 dr6 = 0;
6491         int i;
6492         u32 enable, rwlen;
6493
6494         enable = dr7;
6495         rwlen = dr7 >> 16;
6496         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6497                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6498                         dr6 |= (1 << i);
6499         return dr6;
6500 }
6501
6502 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
6503 {
6504         struct kvm_run *kvm_run = vcpu->run;
6505
6506         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6507                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6508                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6509                 kvm_run->debug.arch.exception = DB_VECTOR;
6510                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6511                 return 0;
6512         }
6513         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6514         return 1;
6515 }
6516
6517 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6518 {
6519         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6520         int r;
6521
6522         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6523         if (unlikely(!r))
6524                 return 0;
6525
6526         /*
6527          * rflags is the old, "raw" value of the flags.  The new value has
6528          * not been saved yet.
6529          *
6530          * This is correct even for TF set by the guest, because "the
6531          * processor will not generate this exception after the instruction
6532          * that sets the TF flag".
6533          */
6534         if (unlikely(rflags & X86_EFLAGS_TF))
6535                 r = kvm_vcpu_do_singlestep(vcpu);
6536         return r;
6537 }
6538 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6539
6540 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6541 {
6542         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6543             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6544                 struct kvm_run *kvm_run = vcpu->run;
6545                 unsigned long eip = kvm_get_linear_rip(vcpu);
6546                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6547                                            vcpu->arch.guest_debug_dr7,
6548                                            vcpu->arch.eff_db);
6549
6550                 if (dr6 != 0) {
6551                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6552                         kvm_run->debug.arch.pc = eip;
6553                         kvm_run->debug.arch.exception = DB_VECTOR;
6554                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6555                         *r = 0;
6556                         return true;
6557                 }
6558         }
6559
6560         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6561             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6562                 unsigned long eip = kvm_get_linear_rip(vcpu);
6563                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6564                                            vcpu->arch.dr7,
6565                                            vcpu->arch.db);
6566
6567                 if (dr6 != 0) {
6568                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6569                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6570                         kvm_queue_exception(vcpu, DB_VECTOR);
6571                         *r = 1;
6572                         return true;
6573                 }
6574         }
6575
6576         return false;
6577 }
6578
6579 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6580 {
6581         switch (ctxt->opcode_len) {
6582         case 1:
6583                 switch (ctxt->b) {
6584                 case 0xe4:      /* IN */
6585                 case 0xe5:
6586                 case 0xec:
6587                 case 0xed:
6588                 case 0xe6:      /* OUT */
6589                 case 0xe7:
6590                 case 0xee:
6591                 case 0xef:
6592                 case 0x6c:      /* INS */
6593                 case 0x6d:
6594                 case 0x6e:      /* OUTS */
6595                 case 0x6f:
6596                         return true;
6597                 }
6598                 break;
6599         case 2:
6600                 switch (ctxt->b) {
6601                 case 0x33:      /* RDPMC */
6602                         return true;
6603                 }
6604                 break;
6605         }
6606
6607         return false;
6608 }
6609
6610 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6611                             unsigned long cr2,
6612                             int emulation_type,
6613                             void *insn,
6614                             int insn_len)
6615 {
6616         int r;
6617         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6618         bool writeback = true;
6619         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6620
6621         vcpu->arch.l1tf_flush_l1d = true;
6622
6623         /*
6624          * Clear write_fault_to_shadow_pgtable here to ensure it is
6625          * never reused.
6626          */
6627         vcpu->arch.write_fault_to_shadow_pgtable = false;
6628         kvm_clear_exception_queue(vcpu);
6629
6630         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6631                 init_emulate_ctxt(vcpu);
6632
6633                 /*
6634                  * We will reenter on the same instruction since
6635                  * we do not set complete_userspace_io.  This does not
6636                  * handle watchpoints yet, those would be handled in
6637                  * the emulate_ops.
6638                  */
6639                 if (!(emulation_type & EMULTYPE_SKIP) &&
6640                     kvm_vcpu_check_breakpoint(vcpu, &r))
6641                         return r;
6642
6643                 ctxt->interruptibility = 0;
6644                 ctxt->have_exception = false;
6645                 ctxt->exception.vector = -1;
6646                 ctxt->perm_ok = false;
6647
6648                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6649
6650                 r = x86_decode_insn(ctxt, insn, insn_len);
6651
6652                 trace_kvm_emulate_insn_start(vcpu);
6653                 ++vcpu->stat.insn_emulation;
6654                 if (r != EMULATION_OK)  {
6655                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
6656                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
6657                                 kvm_queue_exception(vcpu, UD_VECTOR);
6658                                 return 1;
6659                         }
6660                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6661                                                 emulation_type))
6662                                 return 1;
6663                         if (ctxt->have_exception) {
6664                                 /*
6665                                  * #UD should result in just EMULATION_FAILED, and trap-like
6666                                  * exception should not be encountered during decode.
6667                                  */
6668                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
6669                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
6670                                 inject_emulated_exception(vcpu);
6671                                 return 1;
6672                         }
6673                         return handle_emulation_failure(vcpu, emulation_type);
6674                 }
6675         }
6676
6677         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
6678             !is_vmware_backdoor_opcode(ctxt)) {
6679                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6680                 return 1;
6681         }
6682
6683         /*
6684          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
6685          * for kvm_skip_emulated_instruction().  The caller is responsible for
6686          * updating interruptibility state and injecting single-step #DBs.
6687          */
6688         if (emulation_type & EMULTYPE_SKIP) {
6689                 kvm_rip_write(vcpu, ctxt->_eip);
6690                 if (ctxt->eflags & X86_EFLAGS_RF)
6691                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6692                 return 1;
6693         }
6694
6695         if (retry_instruction(ctxt, cr2, emulation_type))
6696                 return 1;
6697
6698         /* this is needed for vmware backdoor interface to work since it
6699            changes registers values  during IO operation */
6700         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6701                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6702                 emulator_invalidate_register_cache(ctxt);
6703         }
6704
6705 restart:
6706         /* Save the faulting GPA (cr2) in the address field */
6707         ctxt->exception.address = cr2;
6708
6709         r = x86_emulate_insn(ctxt);
6710
6711         if (r == EMULATION_INTERCEPTED)
6712                 return 1;
6713
6714         if (r == EMULATION_FAILED) {
6715                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6716                                         emulation_type))
6717                         return 1;
6718
6719                 return handle_emulation_failure(vcpu, emulation_type);
6720         }
6721
6722         if (ctxt->have_exception) {
6723                 r = 1;
6724                 if (inject_emulated_exception(vcpu))
6725                         return r;
6726         } else if (vcpu->arch.pio.count) {
6727                 if (!vcpu->arch.pio.in) {
6728                         /* FIXME: return into emulator if single-stepping.  */
6729                         vcpu->arch.pio.count = 0;
6730                 } else {
6731                         writeback = false;
6732                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6733                 }
6734                 r = 0;
6735         } else if (vcpu->mmio_needed) {
6736                 ++vcpu->stat.mmio_exits;
6737
6738                 if (!vcpu->mmio_is_write)
6739                         writeback = false;
6740                 r = 0;
6741                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6742         } else if (r == EMULATION_RESTART)
6743                 goto restart;
6744         else
6745                 r = 1;
6746
6747         if (writeback) {
6748                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6749                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6750                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6751                 if (!ctxt->have_exception ||
6752                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
6753                         kvm_rip_write(vcpu, ctxt->eip);
6754                         if (r && ctxt->tf)
6755                                 r = kvm_vcpu_do_singlestep(vcpu);
6756                         __kvm_set_rflags(vcpu, ctxt->eflags);
6757                 }
6758
6759                 /*
6760                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6761                  * do nothing, and it will be requested again as soon as
6762                  * the shadow expires.  But we still need to check here,
6763                  * because POPF has no interrupt shadow.
6764                  */
6765                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6766                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6767         } else
6768                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6769
6770         return r;
6771 }
6772
6773 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6774 {
6775         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6776 }
6777 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6778
6779 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6780                                         void *insn, int insn_len)
6781 {
6782         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6783 }
6784 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6785
6786 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6787 {
6788         vcpu->arch.pio.count = 0;
6789         return 1;
6790 }
6791
6792 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6793 {
6794         vcpu->arch.pio.count = 0;
6795
6796         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6797                 return 1;
6798
6799         return kvm_skip_emulated_instruction(vcpu);
6800 }
6801
6802 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6803                             unsigned short port)
6804 {
6805         unsigned long val = kvm_rax_read(vcpu);
6806         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6807                                             size, port, &val, 1);
6808         if (ret)
6809                 return ret;
6810
6811         /*
6812          * Workaround userspace that relies on old KVM behavior of %rip being
6813          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6814          */
6815         if (port == 0x7e &&
6816             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6817                 vcpu->arch.complete_userspace_io =
6818                         complete_fast_pio_out_port_0x7e;
6819                 kvm_skip_emulated_instruction(vcpu);
6820         } else {
6821                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6822                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6823         }
6824         return 0;
6825 }
6826
6827 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6828 {
6829         unsigned long val;
6830
6831         /* We should only ever be called with arch.pio.count equal to 1 */
6832         BUG_ON(vcpu->arch.pio.count != 1);
6833
6834         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6835                 vcpu->arch.pio.count = 0;
6836                 return 1;
6837         }
6838
6839         /* For size less than 4 we merge, else we zero extend */
6840         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6841
6842         /*
6843          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6844          * the copy and tracing
6845          */
6846         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6847                                  vcpu->arch.pio.port, &val, 1);
6848         kvm_rax_write(vcpu, val);
6849
6850         return kvm_skip_emulated_instruction(vcpu);
6851 }
6852
6853 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6854                            unsigned short port)
6855 {
6856         unsigned long val;
6857         int ret;
6858
6859         /* For size less than 4 we merge, else we zero extend */
6860         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6861
6862         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6863                                        &val, 1);
6864         if (ret) {
6865                 kvm_rax_write(vcpu, val);
6866                 return ret;
6867         }
6868
6869         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6870         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6871
6872         return 0;
6873 }
6874
6875 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6876 {
6877         int ret;
6878
6879         if (in)
6880                 ret = kvm_fast_pio_in(vcpu, size, port);
6881         else
6882                 ret = kvm_fast_pio_out(vcpu, size, port);
6883         return ret && kvm_skip_emulated_instruction(vcpu);
6884 }
6885 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6886
6887 static int kvmclock_cpu_down_prep(unsigned int cpu)
6888 {
6889         __this_cpu_write(cpu_tsc_khz, 0);
6890         return 0;
6891 }
6892
6893 static void tsc_khz_changed(void *data)
6894 {
6895         struct cpufreq_freqs *freq = data;
6896         unsigned long khz = 0;
6897
6898         if (data)
6899                 khz = freq->new;
6900         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6901                 khz = cpufreq_quick_get(raw_smp_processor_id());
6902         if (!khz)
6903                 khz = tsc_khz;
6904         __this_cpu_write(cpu_tsc_khz, khz);
6905 }
6906
6907 #ifdef CONFIG_X86_64
6908 static void kvm_hyperv_tsc_notifier(void)
6909 {
6910         struct kvm *kvm;
6911         struct kvm_vcpu *vcpu;
6912         int cpu;
6913
6914         mutex_lock(&kvm_lock);
6915         list_for_each_entry(kvm, &vm_list, vm_list)
6916                 kvm_make_mclock_inprogress_request(kvm);
6917
6918         hyperv_stop_tsc_emulation();
6919
6920         /* TSC frequency always matches when on Hyper-V */
6921         for_each_present_cpu(cpu)
6922                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6923         kvm_max_guest_tsc_khz = tsc_khz;
6924
6925         list_for_each_entry(kvm, &vm_list, vm_list) {
6926                 struct kvm_arch *ka = &kvm->arch;
6927
6928                 spin_lock(&ka->pvclock_gtod_sync_lock);
6929
6930                 pvclock_update_vm_gtod_copy(kvm);
6931
6932                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6933                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6934
6935                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6936                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6937
6938                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6939         }
6940         mutex_unlock(&kvm_lock);
6941 }
6942 #endif
6943
6944 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6945 {
6946         struct kvm *kvm;
6947         struct kvm_vcpu *vcpu;
6948         int i, send_ipi = 0;
6949
6950         /*
6951          * We allow guests to temporarily run on slowing clocks,
6952          * provided we notify them after, or to run on accelerating
6953          * clocks, provided we notify them before.  Thus time never
6954          * goes backwards.
6955          *
6956          * However, we have a problem.  We can't atomically update
6957          * the frequency of a given CPU from this function; it is
6958          * merely a notifier, which can be called from any CPU.
6959          * Changing the TSC frequency at arbitrary points in time
6960          * requires a recomputation of local variables related to
6961          * the TSC for each VCPU.  We must flag these local variables
6962          * to be updated and be sure the update takes place with the
6963          * new frequency before any guests proceed.
6964          *
6965          * Unfortunately, the combination of hotplug CPU and frequency
6966          * change creates an intractable locking scenario; the order
6967          * of when these callouts happen is undefined with respect to
6968          * CPU hotplug, and they can race with each other.  As such,
6969          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6970          * undefined; you can actually have a CPU frequency change take
6971          * place in between the computation of X and the setting of the
6972          * variable.  To protect against this problem, all updates of
6973          * the per_cpu tsc_khz variable are done in an interrupt
6974          * protected IPI, and all callers wishing to update the value
6975          * must wait for a synchronous IPI to complete (which is trivial
6976          * if the caller is on the CPU already).  This establishes the
6977          * necessary total order on variable updates.
6978          *
6979          * Note that because a guest time update may take place
6980          * anytime after the setting of the VCPU's request bit, the
6981          * correct TSC value must be set before the request.  However,
6982          * to ensure the update actually makes it to any guest which
6983          * starts running in hardware virtualization between the set
6984          * and the acquisition of the spinlock, we must also ping the
6985          * CPU after setting the request bit.
6986          *
6987          */
6988
6989         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6990
6991         mutex_lock(&kvm_lock);
6992         list_for_each_entry(kvm, &vm_list, vm_list) {
6993                 kvm_for_each_vcpu(i, vcpu, kvm) {
6994                         if (vcpu->cpu != cpu)
6995                                 continue;
6996                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6997                         if (vcpu->cpu != raw_smp_processor_id())
6998                                 send_ipi = 1;
6999                 }
7000         }
7001         mutex_unlock(&kvm_lock);
7002
7003         if (freq->old < freq->new && send_ipi) {
7004                 /*
7005                  * We upscale the frequency.  Must make the guest
7006                  * doesn't see old kvmclock values while running with
7007                  * the new frequency, otherwise we risk the guest sees
7008                  * time go backwards.
7009                  *
7010                  * In case we update the frequency for another cpu
7011                  * (which might be in guest context) send an interrupt
7012                  * to kick the cpu out of guest context.  Next time
7013                  * guest context is entered kvmclock will be updated,
7014                  * so the guest will not see stale values.
7015                  */
7016                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7017         }
7018 }
7019
7020 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7021                                      void *data)
7022 {
7023         struct cpufreq_freqs *freq = data;
7024         int cpu;
7025
7026         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7027                 return 0;
7028         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7029                 return 0;
7030
7031         for_each_cpu(cpu, freq->policy->cpus)
7032                 __kvmclock_cpufreq_notifier(freq, cpu);
7033
7034         return 0;
7035 }
7036
7037 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7038         .notifier_call  = kvmclock_cpufreq_notifier
7039 };
7040
7041 static int kvmclock_cpu_online(unsigned int cpu)
7042 {
7043         tsc_khz_changed(NULL);
7044         return 0;
7045 }
7046
7047 static void kvm_timer_init(void)
7048 {
7049         max_tsc_khz = tsc_khz;
7050
7051         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7052 #ifdef CONFIG_CPU_FREQ
7053                 struct cpufreq_policy policy;
7054                 int cpu;
7055
7056                 memset(&policy, 0, sizeof(policy));
7057                 cpu = get_cpu();
7058                 cpufreq_get_policy(&policy, cpu);
7059                 if (policy.cpuinfo.max_freq)
7060                         max_tsc_khz = policy.cpuinfo.max_freq;
7061                 put_cpu();
7062 #endif
7063                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7064                                           CPUFREQ_TRANSITION_NOTIFIER);
7065         }
7066
7067         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7068                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7069 }
7070
7071 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7072 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7073
7074 int kvm_is_in_guest(void)
7075 {
7076         return __this_cpu_read(current_vcpu) != NULL;
7077 }
7078
7079 static int kvm_is_user_mode(void)
7080 {
7081         int user_mode = 3;
7082
7083         if (__this_cpu_read(current_vcpu))
7084                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
7085
7086         return user_mode != 0;
7087 }
7088
7089 static unsigned long kvm_get_guest_ip(void)
7090 {
7091         unsigned long ip = 0;
7092
7093         if (__this_cpu_read(current_vcpu))
7094                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7095
7096         return ip;
7097 }
7098
7099 static void kvm_handle_intel_pt_intr(void)
7100 {
7101         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7102
7103         kvm_make_request(KVM_REQ_PMI, vcpu);
7104         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7105                         (unsigned long *)&vcpu->arch.pmu.global_status);
7106 }
7107
7108 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7109         .is_in_guest            = kvm_is_in_guest,
7110         .is_user_mode           = kvm_is_user_mode,
7111         .get_guest_ip           = kvm_get_guest_ip,
7112         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7113 };
7114
7115 #ifdef CONFIG_X86_64
7116 static void pvclock_gtod_update_fn(struct work_struct *work)
7117 {
7118         struct kvm *kvm;
7119
7120         struct kvm_vcpu *vcpu;
7121         int i;
7122
7123         mutex_lock(&kvm_lock);
7124         list_for_each_entry(kvm, &vm_list, vm_list)
7125                 kvm_for_each_vcpu(i, vcpu, kvm)
7126                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7127         atomic_set(&kvm_guest_has_master_clock, 0);
7128         mutex_unlock(&kvm_lock);
7129 }
7130
7131 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7132
7133 /*
7134  * Notification about pvclock gtod data update.
7135  */
7136 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7137                                void *priv)
7138 {
7139         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7140         struct timekeeper *tk = priv;
7141
7142         update_pvclock_gtod(tk);
7143
7144         /* disable master clock if host does not trust, or does not
7145          * use, TSC based clocksource.
7146          */
7147         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7148             atomic_read(&kvm_guest_has_master_clock) != 0)
7149                 queue_work(system_long_wq, &pvclock_gtod_work);
7150
7151         return 0;
7152 }
7153
7154 static struct notifier_block pvclock_gtod_notifier = {
7155         .notifier_call = pvclock_gtod_notify,
7156 };
7157 #endif
7158
7159 int kvm_arch_init(void *opaque)
7160 {
7161         int r;
7162         struct kvm_x86_ops *ops = opaque;
7163
7164         if (kvm_x86_ops) {
7165                 printk(KERN_ERR "kvm: already loaded the other module\n");
7166                 r = -EEXIST;
7167                 goto out;
7168         }
7169
7170         if (!ops->cpu_has_kvm_support()) {
7171                 printk(KERN_ERR "kvm: no hardware support\n");
7172                 r = -EOPNOTSUPP;
7173                 goto out;
7174         }
7175         if (ops->disabled_by_bios()) {
7176                 printk(KERN_ERR "kvm: disabled by bios\n");
7177                 r = -EOPNOTSUPP;
7178                 goto out;
7179         }
7180
7181         /*
7182          * KVM explicitly assumes that the guest has an FPU and
7183          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7184          * vCPU's FPU state as a fxregs_state struct.
7185          */
7186         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7187                 printk(KERN_ERR "kvm: inadequate fpu\n");
7188                 r = -EOPNOTSUPP;
7189                 goto out;
7190         }
7191
7192         r = -ENOMEM;
7193         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7194                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7195                                           NULL);
7196         if (!x86_fpu_cache) {
7197                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7198                 goto out;
7199         }
7200
7201         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7202         if (!shared_msrs) {
7203                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7204                 goto out_free_x86_fpu_cache;
7205         }
7206
7207         r = kvm_mmu_module_init();
7208         if (r)
7209                 goto out_free_percpu;
7210
7211         kvm_x86_ops = ops;
7212
7213         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7214                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7215                         PT_PRESENT_MASK, 0, sme_me_mask);
7216         kvm_timer_init();
7217
7218         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7219
7220         if (boot_cpu_has(X86_FEATURE_XSAVE))
7221                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7222
7223         kvm_lapic_init();
7224         if (pi_inject_timer == -1)
7225                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7226 #ifdef CONFIG_X86_64
7227         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7228
7229         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7230                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7231 #endif
7232
7233         return 0;
7234
7235 out_free_percpu:
7236         free_percpu(shared_msrs);
7237 out_free_x86_fpu_cache:
7238         kmem_cache_destroy(x86_fpu_cache);
7239 out:
7240         return r;
7241 }
7242
7243 void kvm_arch_exit(void)
7244 {
7245 #ifdef CONFIG_X86_64
7246         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7247                 clear_hv_tscchange_cb();
7248 #endif
7249         kvm_lapic_exit();
7250         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7251
7252         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7253                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7254                                             CPUFREQ_TRANSITION_NOTIFIER);
7255         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7256 #ifdef CONFIG_X86_64
7257         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7258 #endif
7259         kvm_x86_ops = NULL;
7260         kvm_mmu_module_exit();
7261         free_percpu(shared_msrs);
7262         kmem_cache_destroy(x86_fpu_cache);
7263 }
7264
7265 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7266 {
7267         ++vcpu->stat.halt_exits;
7268         if (lapic_in_kernel(vcpu)) {
7269                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7270                 return 1;
7271         } else {
7272                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7273                 return 0;
7274         }
7275 }
7276 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7277
7278 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7279 {
7280         int ret = kvm_skip_emulated_instruction(vcpu);
7281         /*
7282          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7283          * KVM_EXIT_DEBUG here.
7284          */
7285         return kvm_vcpu_halt(vcpu) && ret;
7286 }
7287 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7288
7289 #ifdef CONFIG_X86_64
7290 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7291                                 unsigned long clock_type)
7292 {
7293         struct kvm_clock_pairing clock_pairing;
7294         struct timespec64 ts;
7295         u64 cycle;
7296         int ret;
7297
7298         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7299                 return -KVM_EOPNOTSUPP;
7300
7301         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7302                 return -KVM_EOPNOTSUPP;
7303
7304         clock_pairing.sec = ts.tv_sec;
7305         clock_pairing.nsec = ts.tv_nsec;
7306         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7307         clock_pairing.flags = 0;
7308         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7309
7310         ret = 0;
7311         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7312                             sizeof(struct kvm_clock_pairing)))
7313                 ret = -KVM_EFAULT;
7314
7315         return ret;
7316 }
7317 #endif
7318
7319 /*
7320  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7321  *
7322  * @apicid - apicid of vcpu to be kicked.
7323  */
7324 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7325 {
7326         struct kvm_lapic_irq lapic_irq;
7327
7328         lapic_irq.shorthand = 0;
7329         lapic_irq.dest_mode = 0;
7330         lapic_irq.level = 0;
7331         lapic_irq.dest_id = apicid;
7332         lapic_irq.msi_redir_hint = false;
7333
7334         lapic_irq.delivery_mode = APIC_DM_REMRD;
7335         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7336 }
7337
7338 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7339 {
7340         if (!lapic_in_kernel(vcpu)) {
7341                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7342                 return;
7343         }
7344         if (!vcpu->arch.apicv_active)
7345                 return;
7346
7347         vcpu->arch.apicv_active = false;
7348         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7349 }
7350
7351 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7352 {
7353         struct kvm_vcpu *target = NULL;
7354         struct kvm_apic_map *map;
7355
7356         rcu_read_lock();
7357         map = rcu_dereference(kvm->arch.apic_map);
7358
7359         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7360                 target = map->phys_map[dest_id]->vcpu;
7361
7362         rcu_read_unlock();
7363
7364         if (target && READ_ONCE(target->ready))
7365                 kvm_vcpu_yield_to(target);
7366 }
7367
7368 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7369 {
7370         unsigned long nr, a0, a1, a2, a3, ret;
7371         int op_64_bit;
7372
7373         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7374                 return kvm_hv_hypercall(vcpu);
7375
7376         nr = kvm_rax_read(vcpu);
7377         a0 = kvm_rbx_read(vcpu);
7378         a1 = kvm_rcx_read(vcpu);
7379         a2 = kvm_rdx_read(vcpu);
7380         a3 = kvm_rsi_read(vcpu);
7381
7382         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7383
7384         op_64_bit = is_64_bit_mode(vcpu);
7385         if (!op_64_bit) {
7386                 nr &= 0xFFFFFFFF;
7387                 a0 &= 0xFFFFFFFF;
7388                 a1 &= 0xFFFFFFFF;
7389                 a2 &= 0xFFFFFFFF;
7390                 a3 &= 0xFFFFFFFF;
7391         }
7392
7393         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7394                 ret = -KVM_EPERM;
7395                 goto out;
7396         }
7397
7398         switch (nr) {
7399         case KVM_HC_VAPIC_POLL_IRQ:
7400                 ret = 0;
7401                 break;
7402         case KVM_HC_KICK_CPU:
7403                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7404                 kvm_sched_yield(vcpu->kvm, a1);
7405                 ret = 0;
7406                 break;
7407 #ifdef CONFIG_X86_64
7408         case KVM_HC_CLOCK_PAIRING:
7409                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7410                 break;
7411 #endif
7412         case KVM_HC_SEND_IPI:
7413                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7414                 break;
7415         case KVM_HC_SCHED_YIELD:
7416                 kvm_sched_yield(vcpu->kvm, a0);
7417                 ret = 0;
7418                 break;
7419         default:
7420                 ret = -KVM_ENOSYS;
7421                 break;
7422         }
7423 out:
7424         if (!op_64_bit)
7425                 ret = (u32)ret;
7426         kvm_rax_write(vcpu, ret);
7427
7428         ++vcpu->stat.hypercalls;
7429         return kvm_skip_emulated_instruction(vcpu);
7430 }
7431 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7432
7433 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7434 {
7435         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7436         char instruction[3];
7437         unsigned long rip = kvm_rip_read(vcpu);
7438
7439         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7440
7441         return emulator_write_emulated(ctxt, rip, instruction, 3,
7442                 &ctxt->exception);
7443 }
7444
7445 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7446 {
7447         return vcpu->run->request_interrupt_window &&
7448                 likely(!pic_in_kernel(vcpu->kvm));
7449 }
7450
7451 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7452 {
7453         struct kvm_run *kvm_run = vcpu->run;
7454
7455         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7456         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7457         kvm_run->cr8 = kvm_get_cr8(vcpu);
7458         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7459         kvm_run->ready_for_interrupt_injection =
7460                 pic_in_kernel(vcpu->kvm) ||
7461                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7462 }
7463
7464 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7465 {
7466         int max_irr, tpr;
7467
7468         if (!kvm_x86_ops->update_cr8_intercept)
7469                 return;
7470
7471         if (!lapic_in_kernel(vcpu))
7472                 return;
7473
7474         if (vcpu->arch.apicv_active)
7475                 return;
7476
7477         if (!vcpu->arch.apic->vapic_addr)
7478                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7479         else
7480                 max_irr = -1;
7481
7482         if (max_irr != -1)
7483                 max_irr >>= 4;
7484
7485         tpr = kvm_lapic_get_cr8(vcpu);
7486
7487         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7488 }
7489
7490 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7491 {
7492         int r;
7493
7494         /* try to reinject previous events if any */
7495
7496         if (vcpu->arch.exception.injected)
7497                 kvm_x86_ops->queue_exception(vcpu);
7498         /*
7499          * Do not inject an NMI or interrupt if there is a pending
7500          * exception.  Exceptions and interrupts are recognized at
7501          * instruction boundaries, i.e. the start of an instruction.
7502          * Trap-like exceptions, e.g. #DB, have higher priority than
7503          * NMIs and interrupts, i.e. traps are recognized before an
7504          * NMI/interrupt that's pending on the same instruction.
7505          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7506          * priority, but are only generated (pended) during instruction
7507          * execution, i.e. a pending fault-like exception means the
7508          * fault occurred on the *previous* instruction and must be
7509          * serviced prior to recognizing any new events in order to
7510          * fully complete the previous instruction.
7511          */
7512         else if (!vcpu->arch.exception.pending) {
7513                 if (vcpu->arch.nmi_injected)
7514                         kvm_x86_ops->set_nmi(vcpu);
7515                 else if (vcpu->arch.interrupt.injected)
7516                         kvm_x86_ops->set_irq(vcpu);
7517         }
7518
7519         /*
7520          * Call check_nested_events() even if we reinjected a previous event
7521          * in order for caller to determine if it should require immediate-exit
7522          * from L2 to L1 due to pending L1 events which require exit
7523          * from L2 to L1.
7524          */
7525         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7526                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7527                 if (r != 0)
7528                         return r;
7529         }
7530
7531         /* try to inject new event if pending */
7532         if (vcpu->arch.exception.pending) {
7533                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7534                                         vcpu->arch.exception.has_error_code,
7535                                         vcpu->arch.exception.error_code);
7536
7537                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7538                 vcpu->arch.exception.pending = false;
7539                 vcpu->arch.exception.injected = true;
7540
7541                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7542                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7543                                              X86_EFLAGS_RF);
7544
7545                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7546                         /*
7547                          * This code assumes that nSVM doesn't use
7548                          * check_nested_events(). If it does, the
7549                          * DR6/DR7 changes should happen before L1
7550                          * gets a #VMEXIT for an intercepted #DB in
7551                          * L2.  (Under VMX, on the other hand, the
7552                          * DR6/DR7 changes should not happen in the
7553                          * event of a VM-exit to L1 for an intercepted
7554                          * #DB in L2.)
7555                          */
7556                         kvm_deliver_exception_payload(vcpu);
7557                         if (vcpu->arch.dr7 & DR7_GD) {
7558                                 vcpu->arch.dr7 &= ~DR7_GD;
7559                                 kvm_update_dr7(vcpu);
7560                         }
7561                 }
7562
7563                 kvm_x86_ops->queue_exception(vcpu);
7564         }
7565
7566         /* Don't consider new event if we re-injected an event */
7567         if (kvm_event_needs_reinjection(vcpu))
7568                 return 0;
7569
7570         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7571             kvm_x86_ops->smi_allowed(vcpu)) {
7572                 vcpu->arch.smi_pending = false;
7573                 ++vcpu->arch.smi_count;
7574                 enter_smm(vcpu);
7575         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7576                 --vcpu->arch.nmi_pending;
7577                 vcpu->arch.nmi_injected = true;
7578                 kvm_x86_ops->set_nmi(vcpu);
7579         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7580                 /*
7581                  * Because interrupts can be injected asynchronously, we are
7582                  * calling check_nested_events again here to avoid a race condition.
7583                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7584                  * proposal and current concerns.  Perhaps we should be setting
7585                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7586                  */
7587                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7588                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7589                         if (r != 0)
7590                                 return r;
7591                 }
7592                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7593                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7594                                             false);
7595                         kvm_x86_ops->set_irq(vcpu);
7596                 }
7597         }
7598
7599         return 0;
7600 }
7601
7602 static void process_nmi(struct kvm_vcpu *vcpu)
7603 {
7604         unsigned limit = 2;
7605
7606         /*
7607          * x86 is limited to one NMI running, and one NMI pending after it.
7608          * If an NMI is already in progress, limit further NMIs to just one.
7609          * Otherwise, allow two (and we'll inject the first one immediately).
7610          */
7611         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7612                 limit = 1;
7613
7614         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7615         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7616         kvm_make_request(KVM_REQ_EVENT, vcpu);
7617 }
7618
7619 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7620 {
7621         u32 flags = 0;
7622         flags |= seg->g       << 23;
7623         flags |= seg->db      << 22;
7624         flags |= seg->l       << 21;
7625         flags |= seg->avl     << 20;
7626         flags |= seg->present << 15;
7627         flags |= seg->dpl     << 13;
7628         flags |= seg->s       << 12;
7629         flags |= seg->type    << 8;
7630         return flags;
7631 }
7632
7633 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7634 {
7635         struct kvm_segment seg;
7636         int offset;
7637
7638         kvm_get_segment(vcpu, &seg, n);
7639         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7640
7641         if (n < 3)
7642                 offset = 0x7f84 + n * 12;
7643         else
7644                 offset = 0x7f2c + (n - 3) * 12;
7645
7646         put_smstate(u32, buf, offset + 8, seg.base);
7647         put_smstate(u32, buf, offset + 4, seg.limit);
7648         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7649 }
7650
7651 #ifdef CONFIG_X86_64
7652 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7653 {
7654         struct kvm_segment seg;
7655         int offset;
7656         u16 flags;
7657
7658         kvm_get_segment(vcpu, &seg, n);
7659         offset = 0x7e00 + n * 16;
7660
7661         flags = enter_smm_get_segment_flags(&seg) >> 8;
7662         put_smstate(u16, buf, offset, seg.selector);
7663         put_smstate(u16, buf, offset + 2, flags);
7664         put_smstate(u32, buf, offset + 4, seg.limit);
7665         put_smstate(u64, buf, offset + 8, seg.base);
7666 }
7667 #endif
7668
7669 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7670 {
7671         struct desc_ptr dt;
7672         struct kvm_segment seg;
7673         unsigned long val;
7674         int i;
7675
7676         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7677         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7678         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7679         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7680
7681         for (i = 0; i < 8; i++)
7682                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7683
7684         kvm_get_dr(vcpu, 6, &val);
7685         put_smstate(u32, buf, 0x7fcc, (u32)val);
7686         kvm_get_dr(vcpu, 7, &val);
7687         put_smstate(u32, buf, 0x7fc8, (u32)val);
7688
7689         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7690         put_smstate(u32, buf, 0x7fc4, seg.selector);
7691         put_smstate(u32, buf, 0x7f64, seg.base);
7692         put_smstate(u32, buf, 0x7f60, seg.limit);
7693         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7694
7695         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7696         put_smstate(u32, buf, 0x7fc0, seg.selector);
7697         put_smstate(u32, buf, 0x7f80, seg.base);
7698         put_smstate(u32, buf, 0x7f7c, seg.limit);
7699         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7700
7701         kvm_x86_ops->get_gdt(vcpu, &dt);
7702         put_smstate(u32, buf, 0x7f74, dt.address);
7703         put_smstate(u32, buf, 0x7f70, dt.size);
7704
7705         kvm_x86_ops->get_idt(vcpu, &dt);
7706         put_smstate(u32, buf, 0x7f58, dt.address);
7707         put_smstate(u32, buf, 0x7f54, dt.size);
7708
7709         for (i = 0; i < 6; i++)
7710                 enter_smm_save_seg_32(vcpu, buf, i);
7711
7712         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7713
7714         /* revision id */
7715         put_smstate(u32, buf, 0x7efc, 0x00020000);
7716         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7717 }
7718
7719 #ifdef CONFIG_X86_64
7720 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7721 {
7722         struct desc_ptr dt;
7723         struct kvm_segment seg;
7724         unsigned long val;
7725         int i;
7726
7727         for (i = 0; i < 16; i++)
7728                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7729
7730         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7731         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7732
7733         kvm_get_dr(vcpu, 6, &val);
7734         put_smstate(u64, buf, 0x7f68, val);
7735         kvm_get_dr(vcpu, 7, &val);
7736         put_smstate(u64, buf, 0x7f60, val);
7737
7738         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7739         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7740         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7741
7742         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7743
7744         /* revision id */
7745         put_smstate(u32, buf, 0x7efc, 0x00020064);
7746
7747         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7748
7749         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7750         put_smstate(u16, buf, 0x7e90, seg.selector);
7751         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7752         put_smstate(u32, buf, 0x7e94, seg.limit);
7753         put_smstate(u64, buf, 0x7e98, seg.base);
7754
7755         kvm_x86_ops->get_idt(vcpu, &dt);
7756         put_smstate(u32, buf, 0x7e84, dt.size);
7757         put_smstate(u64, buf, 0x7e88, dt.address);
7758
7759         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7760         put_smstate(u16, buf, 0x7e70, seg.selector);
7761         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7762         put_smstate(u32, buf, 0x7e74, seg.limit);
7763         put_smstate(u64, buf, 0x7e78, seg.base);
7764
7765         kvm_x86_ops->get_gdt(vcpu, &dt);
7766         put_smstate(u32, buf, 0x7e64, dt.size);
7767         put_smstate(u64, buf, 0x7e68, dt.address);
7768
7769         for (i = 0; i < 6; i++)
7770                 enter_smm_save_seg_64(vcpu, buf, i);
7771 }
7772 #endif
7773
7774 static void enter_smm(struct kvm_vcpu *vcpu)
7775 {
7776         struct kvm_segment cs, ds;
7777         struct desc_ptr dt;
7778         char buf[512];
7779         u32 cr0;
7780
7781         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7782         memset(buf, 0, 512);
7783 #ifdef CONFIG_X86_64
7784         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7785                 enter_smm_save_state_64(vcpu, buf);
7786         else
7787 #endif
7788                 enter_smm_save_state_32(vcpu, buf);
7789
7790         /*
7791          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7792          * vCPU state (e.g. leave guest mode) after we've saved the state into
7793          * the SMM state-save area.
7794          */
7795         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7796
7797         vcpu->arch.hflags |= HF_SMM_MASK;
7798         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7799
7800         if (kvm_x86_ops->get_nmi_mask(vcpu))
7801                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7802         else
7803                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7804
7805         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7806         kvm_rip_write(vcpu, 0x8000);
7807
7808         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7809         kvm_x86_ops->set_cr0(vcpu, cr0);
7810         vcpu->arch.cr0 = cr0;
7811
7812         kvm_x86_ops->set_cr4(vcpu, 0);
7813
7814         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7815         dt.address = dt.size = 0;
7816         kvm_x86_ops->set_idt(vcpu, &dt);
7817
7818         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7819
7820         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7821         cs.base = vcpu->arch.smbase;
7822
7823         ds.selector = 0;
7824         ds.base = 0;
7825
7826         cs.limit    = ds.limit = 0xffffffff;
7827         cs.type     = ds.type = 0x3;
7828         cs.dpl      = ds.dpl = 0;
7829         cs.db       = ds.db = 0;
7830         cs.s        = ds.s = 1;
7831         cs.l        = ds.l = 0;
7832         cs.g        = ds.g = 1;
7833         cs.avl      = ds.avl = 0;
7834         cs.present  = ds.present = 1;
7835         cs.unusable = ds.unusable = 0;
7836         cs.padding  = ds.padding = 0;
7837
7838         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7839         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7840         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7841         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7842         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7843         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7844
7845 #ifdef CONFIG_X86_64
7846         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7847                 kvm_x86_ops->set_efer(vcpu, 0);
7848 #endif
7849
7850         kvm_update_cpuid(vcpu);
7851         kvm_mmu_reset_context(vcpu);
7852 }
7853
7854 static void process_smi(struct kvm_vcpu *vcpu)
7855 {
7856         vcpu->arch.smi_pending = true;
7857         kvm_make_request(KVM_REQ_EVENT, vcpu);
7858 }
7859
7860 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7861 {
7862         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7863 }
7864
7865 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7866 {
7867         if (!kvm_apic_present(vcpu))
7868                 return;
7869
7870         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7871
7872         if (irqchip_split(vcpu->kvm))
7873                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7874         else {
7875                 if (vcpu->arch.apicv_active)
7876                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7877                 if (ioapic_in_kernel(vcpu->kvm))
7878                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7879         }
7880
7881         if (is_guest_mode(vcpu))
7882                 vcpu->arch.load_eoi_exitmap_pending = true;
7883         else
7884                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7885 }
7886
7887 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7888 {
7889         u64 eoi_exit_bitmap[4];
7890
7891         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7892                 return;
7893
7894         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7895                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7896         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7897 }
7898
7899 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7900                 unsigned long start, unsigned long end,
7901                 bool blockable)
7902 {
7903         unsigned long apic_address;
7904
7905         /*
7906          * The physical address of apic access page is stored in the VMCS.
7907          * Update it when it becomes invalid.
7908          */
7909         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7910         if (start <= apic_address && apic_address < end)
7911                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7912
7913         return 0;
7914 }
7915
7916 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7917 {
7918         struct page *page = NULL;
7919
7920         if (!lapic_in_kernel(vcpu))
7921                 return;
7922
7923         if (!kvm_x86_ops->set_apic_access_page_addr)
7924                 return;
7925
7926         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7927         if (is_error_page(page))
7928                 return;
7929         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7930
7931         /*
7932          * Do not pin apic access page in memory, the MMU notifier
7933          * will call us again if it is migrated or swapped out.
7934          */
7935         put_page(page);
7936 }
7937 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7938
7939 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7940 {
7941         smp_send_reschedule(vcpu->cpu);
7942 }
7943 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7944
7945 /*
7946  * Returns 1 to let vcpu_run() continue the guest execution loop without
7947  * exiting to the userspace.  Otherwise, the value will be returned to the
7948  * userspace.
7949  */
7950 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7951 {
7952         int r;
7953         bool req_int_win =
7954                 dm_request_for_irq_injection(vcpu) &&
7955                 kvm_cpu_accept_dm_intr(vcpu);
7956
7957         bool req_immediate_exit = false;
7958
7959         if (kvm_request_pending(vcpu)) {
7960                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu)) {
7961                         if (unlikely(!kvm_x86_ops->get_vmcs12_pages(vcpu))) {
7962                                 r = 0;
7963                                 goto out;
7964                         }
7965                 }
7966                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7967                         kvm_mmu_unload(vcpu);
7968                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7969                         __kvm_migrate_timers(vcpu);
7970                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7971                         kvm_gen_update_masterclock(vcpu->kvm);
7972                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7973                         kvm_gen_kvmclock_update(vcpu);
7974                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7975                         r = kvm_guest_time_update(vcpu);
7976                         if (unlikely(r))
7977                                 goto out;
7978                 }
7979                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7980                         kvm_mmu_sync_roots(vcpu);
7981                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7982                         kvm_mmu_load_cr3(vcpu);
7983                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7984                         kvm_vcpu_flush_tlb(vcpu, true);
7985                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7986                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7987                         r = 0;
7988                         goto out;
7989                 }
7990                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7991                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7992                         vcpu->mmio_needed = 0;
7993                         r = 0;
7994                         goto out;
7995                 }
7996                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7997                         /* Page is swapped out. Do synthetic halt */
7998                         vcpu->arch.apf.halted = true;
7999                         r = 1;
8000                         goto out;
8001                 }
8002                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8003                         record_steal_time(vcpu);
8004                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8005                         process_smi(vcpu);
8006                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8007                         process_nmi(vcpu);
8008                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8009                         kvm_pmu_handle_event(vcpu);
8010                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8011                         kvm_pmu_deliver_pmi(vcpu);
8012                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8013                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8014                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8015                                      vcpu->arch.ioapic_handled_vectors)) {
8016                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8017                                 vcpu->run->eoi.vector =
8018                                                 vcpu->arch.pending_ioapic_eoi;
8019                                 r = 0;
8020                                 goto out;
8021                         }
8022                 }
8023                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8024                         vcpu_scan_ioapic(vcpu);
8025                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8026                         vcpu_load_eoi_exitmap(vcpu);
8027                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8028                         kvm_vcpu_reload_apic_access_page(vcpu);
8029                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8030                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8031                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8032                         r = 0;
8033                         goto out;
8034                 }
8035                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8036                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8037                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8038                         r = 0;
8039                         goto out;
8040                 }
8041                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8042                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8043                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8044                         r = 0;
8045                         goto out;
8046                 }
8047
8048                 /*
8049                  * KVM_REQ_HV_STIMER has to be processed after
8050                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8051                  * depend on the guest clock being up-to-date
8052                  */
8053                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8054                         kvm_hv_process_stimers(vcpu);
8055         }
8056
8057         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8058                 ++vcpu->stat.req_event;
8059                 kvm_apic_accept_events(vcpu);
8060                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8061                         r = 1;
8062                         goto out;
8063                 }
8064
8065                 if (inject_pending_event(vcpu, req_int_win) != 0)
8066                         req_immediate_exit = true;
8067                 else {
8068                         /* Enable SMI/NMI/IRQ window open exits if needed.
8069                          *
8070                          * SMIs have three cases:
8071                          * 1) They can be nested, and then there is nothing to
8072                          *    do here because RSM will cause a vmexit anyway.
8073                          * 2) There is an ISA-specific reason why SMI cannot be
8074                          *    injected, and the moment when this changes can be
8075                          *    intercepted.
8076                          * 3) Or the SMI can be pending because
8077                          *    inject_pending_event has completed the injection
8078                          *    of an IRQ or NMI from the previous vmexit, and
8079                          *    then we request an immediate exit to inject the
8080                          *    SMI.
8081                          */
8082                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
8083                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
8084                                         req_immediate_exit = true;
8085                         if (vcpu->arch.nmi_pending)
8086                                 kvm_x86_ops->enable_nmi_window(vcpu);
8087                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
8088                                 kvm_x86_ops->enable_irq_window(vcpu);
8089                         WARN_ON(vcpu->arch.exception.pending);
8090                 }
8091
8092                 if (kvm_lapic_enabled(vcpu)) {
8093                         update_cr8_intercept(vcpu);
8094                         kvm_lapic_sync_to_vapic(vcpu);
8095                 }
8096         }
8097
8098         r = kvm_mmu_reload(vcpu);
8099         if (unlikely(r)) {
8100                 goto cancel_injection;
8101         }
8102
8103         preempt_disable();
8104
8105         kvm_x86_ops->prepare_guest_switch(vcpu);
8106
8107         /*
8108          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8109          * IPI are then delayed after guest entry, which ensures that they
8110          * result in virtual interrupt delivery.
8111          */
8112         local_irq_disable();
8113         vcpu->mode = IN_GUEST_MODE;
8114
8115         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8116
8117         /*
8118          * 1) We should set ->mode before checking ->requests.  Please see
8119          * the comment in kvm_vcpu_exiting_guest_mode().
8120          *
8121          * 2) For APICv, we should set ->mode before checking PID.ON. This
8122          * pairs with the memory barrier implicit in pi_test_and_set_on
8123          * (see vmx_deliver_posted_interrupt).
8124          *
8125          * 3) This also orders the write to mode from any reads to the page
8126          * tables done while the VCPU is running.  Please see the comment
8127          * in kvm_flush_remote_tlbs.
8128          */
8129         smp_mb__after_srcu_read_unlock();
8130
8131         /*
8132          * This handles the case where a posted interrupt was
8133          * notified with kvm_vcpu_kick.
8134          */
8135         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8136                 kvm_x86_ops->sync_pir_to_irr(vcpu);
8137
8138         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
8139             || need_resched() || signal_pending(current)) {
8140                 vcpu->mode = OUTSIDE_GUEST_MODE;
8141                 smp_wmb();
8142                 local_irq_enable();
8143                 preempt_enable();
8144                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8145                 r = 1;
8146                 goto cancel_injection;
8147         }
8148
8149         if (req_immediate_exit) {
8150                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8151                 kvm_x86_ops->request_immediate_exit(vcpu);
8152         }
8153
8154         trace_kvm_entry(vcpu->vcpu_id);
8155         guest_enter_irqoff();
8156
8157         /* The preempt notifier should have taken care of the FPU already.  */
8158         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8159
8160         if (unlikely(vcpu->arch.switch_db_regs)) {
8161                 set_debugreg(0, 7);
8162                 set_debugreg(vcpu->arch.eff_db[0], 0);
8163                 set_debugreg(vcpu->arch.eff_db[1], 1);
8164                 set_debugreg(vcpu->arch.eff_db[2], 2);
8165                 set_debugreg(vcpu->arch.eff_db[3], 3);
8166                 set_debugreg(vcpu->arch.dr6, 6);
8167                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8168         }
8169
8170         kvm_x86_ops->run(vcpu);
8171
8172         /*
8173          * Do this here before restoring debug registers on the host.  And
8174          * since we do this before handling the vmexit, a DR access vmexit
8175          * can (a) read the correct value of the debug registers, (b) set
8176          * KVM_DEBUGREG_WONT_EXIT again.
8177          */
8178         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8179                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8180                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8181                 kvm_update_dr0123(vcpu);
8182                 kvm_update_dr6(vcpu);
8183                 kvm_update_dr7(vcpu);
8184                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8185         }
8186
8187         /*
8188          * If the guest has used debug registers, at least dr7
8189          * will be disabled while returning to the host.
8190          * If we don't have active breakpoints in the host, we don't
8191          * care about the messed up debug address registers. But if
8192          * we have some of them active, restore the old state.
8193          */
8194         if (hw_breakpoint_active())
8195                 hw_breakpoint_restore();
8196
8197         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8198
8199         vcpu->mode = OUTSIDE_GUEST_MODE;
8200         smp_wmb();
8201
8202         kvm_x86_ops->handle_exit_irqoff(vcpu);
8203
8204         /*
8205          * Consume any pending interrupts, including the possible source of
8206          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8207          * An instruction is required after local_irq_enable() to fully unblock
8208          * interrupts on processors that implement an interrupt shadow, the
8209          * stat.exits increment will do nicely.
8210          */
8211         kvm_before_interrupt(vcpu);
8212         local_irq_enable();
8213         ++vcpu->stat.exits;
8214         local_irq_disable();
8215         kvm_after_interrupt(vcpu);
8216
8217         guest_exit_irqoff();
8218         if (lapic_in_kernel(vcpu)) {
8219                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8220                 if (delta != S64_MIN) {
8221                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8222                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8223                 }
8224         }
8225
8226         local_irq_enable();
8227         preempt_enable();
8228
8229         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8230
8231         /*
8232          * Profile KVM exit RIPs:
8233          */
8234         if (unlikely(prof_on == KVM_PROFILING)) {
8235                 unsigned long rip = kvm_rip_read(vcpu);
8236                 profile_hit(KVM_PROFILING, (void *)rip);
8237         }
8238
8239         if (unlikely(vcpu->arch.tsc_always_catchup))
8240                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8241
8242         if (vcpu->arch.apic_attention)
8243                 kvm_lapic_sync_from_vapic(vcpu);
8244
8245         vcpu->arch.gpa_available = false;
8246         r = kvm_x86_ops->handle_exit(vcpu);
8247         return r;
8248
8249 cancel_injection:
8250         kvm_x86_ops->cancel_injection(vcpu);
8251         if (unlikely(vcpu->arch.apic_attention))
8252                 kvm_lapic_sync_from_vapic(vcpu);
8253 out:
8254         return r;
8255 }
8256
8257 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8258 {
8259         if (!kvm_arch_vcpu_runnable(vcpu) &&
8260             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8261                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8262                 kvm_vcpu_block(vcpu);
8263                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8264
8265                 if (kvm_x86_ops->post_block)
8266                         kvm_x86_ops->post_block(vcpu);
8267
8268                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8269                         return 1;
8270         }
8271
8272         kvm_apic_accept_events(vcpu);
8273         switch(vcpu->arch.mp_state) {
8274         case KVM_MP_STATE_HALTED:
8275                 vcpu->arch.pv.pv_unhalted = false;
8276                 vcpu->arch.mp_state =
8277                         KVM_MP_STATE_RUNNABLE;
8278                 /* fall through */
8279         case KVM_MP_STATE_RUNNABLE:
8280                 vcpu->arch.apf.halted = false;
8281                 break;
8282         case KVM_MP_STATE_INIT_RECEIVED:
8283                 break;
8284         default:
8285                 return -EINTR;
8286                 break;
8287         }
8288         return 1;
8289 }
8290
8291 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8292 {
8293         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8294                 kvm_x86_ops->check_nested_events(vcpu, false);
8295
8296         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8297                 !vcpu->arch.apf.halted);
8298 }
8299
8300 static int vcpu_run(struct kvm_vcpu *vcpu)
8301 {
8302         int r;
8303         struct kvm *kvm = vcpu->kvm;
8304
8305         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8306         vcpu->arch.l1tf_flush_l1d = true;
8307
8308         for (;;) {
8309                 if (kvm_vcpu_running(vcpu)) {
8310                         r = vcpu_enter_guest(vcpu);
8311                 } else {
8312                         r = vcpu_block(kvm, vcpu);
8313                 }
8314
8315                 if (r <= 0)
8316                         break;
8317
8318                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8319                 if (kvm_cpu_has_pending_timer(vcpu))
8320                         kvm_inject_pending_timer_irqs(vcpu);
8321
8322                 if (dm_request_for_irq_injection(vcpu) &&
8323                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8324                         r = 0;
8325                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8326                         ++vcpu->stat.request_irq_exits;
8327                         break;
8328                 }
8329
8330                 kvm_check_async_pf_completion(vcpu);
8331
8332                 if (signal_pending(current)) {
8333                         r = -EINTR;
8334                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8335                         ++vcpu->stat.signal_exits;
8336                         break;
8337                 }
8338                 if (need_resched()) {
8339                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8340                         cond_resched();
8341                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8342                 }
8343         }
8344
8345         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8346
8347         return r;
8348 }
8349
8350 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8351 {
8352         int r;
8353
8354         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8355         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8356         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8357         return r;
8358 }
8359
8360 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8361 {
8362         BUG_ON(!vcpu->arch.pio.count);
8363
8364         return complete_emulated_io(vcpu);
8365 }
8366
8367 /*
8368  * Implements the following, as a state machine:
8369  *
8370  * read:
8371  *   for each fragment
8372  *     for each mmio piece in the fragment
8373  *       write gpa, len
8374  *       exit
8375  *       copy data
8376  *   execute insn
8377  *
8378  * write:
8379  *   for each fragment
8380  *     for each mmio piece in the fragment
8381  *       write gpa, len
8382  *       copy data
8383  *       exit
8384  */
8385 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8386 {
8387         struct kvm_run *run = vcpu->run;
8388         struct kvm_mmio_fragment *frag;
8389         unsigned len;
8390
8391         BUG_ON(!vcpu->mmio_needed);
8392
8393         /* Complete previous fragment */
8394         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8395         len = min(8u, frag->len);
8396         if (!vcpu->mmio_is_write)
8397                 memcpy(frag->data, run->mmio.data, len);
8398
8399         if (frag->len <= 8) {
8400                 /* Switch to the next fragment. */
8401                 frag++;
8402                 vcpu->mmio_cur_fragment++;
8403         } else {
8404                 /* Go forward to the next mmio piece. */
8405                 frag->data += len;
8406                 frag->gpa += len;
8407                 frag->len -= len;
8408         }
8409
8410         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8411                 vcpu->mmio_needed = 0;
8412
8413                 /* FIXME: return into emulator if single-stepping.  */
8414                 if (vcpu->mmio_is_write)
8415                         return 1;
8416                 vcpu->mmio_read_completed = 1;
8417                 return complete_emulated_io(vcpu);
8418         }
8419
8420         run->exit_reason = KVM_EXIT_MMIO;
8421         run->mmio.phys_addr = frag->gpa;
8422         if (vcpu->mmio_is_write)
8423                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8424         run->mmio.len = min(8u, frag->len);
8425         run->mmio.is_write = vcpu->mmio_is_write;
8426         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8427         return 0;
8428 }
8429
8430 /* Swap (qemu) user FPU context for the guest FPU context. */
8431 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8432 {
8433         fpregs_lock();
8434
8435         copy_fpregs_to_fpstate(vcpu->arch.user_fpu);
8436         /* PKRU is separately restored in kvm_x86_ops->run.  */
8437         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8438                                 ~XFEATURE_MASK_PKRU);
8439
8440         fpregs_mark_activate();
8441         fpregs_unlock();
8442
8443         trace_kvm_fpu(1);
8444 }
8445
8446 /* When vcpu_run ends, restore user space FPU context. */
8447 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8448 {
8449         fpregs_lock();
8450
8451         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8452         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8453
8454         fpregs_mark_activate();
8455         fpregs_unlock();
8456
8457         ++vcpu->stat.fpu_reload;
8458         trace_kvm_fpu(0);
8459 }
8460
8461 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8462 {
8463         int r;
8464
8465         vcpu_load(vcpu);
8466         kvm_sigset_activate(vcpu);
8467         kvm_load_guest_fpu(vcpu);
8468
8469         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8470                 if (kvm_run->immediate_exit) {
8471                         r = -EINTR;
8472                         goto out;
8473                 }
8474                 kvm_vcpu_block(vcpu);
8475                 kvm_apic_accept_events(vcpu);
8476                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8477                 r = -EAGAIN;
8478                 if (signal_pending(current)) {
8479                         r = -EINTR;
8480                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8481                         ++vcpu->stat.signal_exits;
8482                 }
8483                 goto out;
8484         }
8485
8486         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8487                 r = -EINVAL;
8488                 goto out;
8489         }
8490
8491         if (vcpu->run->kvm_dirty_regs) {
8492                 r = sync_regs(vcpu);
8493                 if (r != 0)
8494                         goto out;
8495         }
8496
8497         /* re-sync apic's tpr */
8498         if (!lapic_in_kernel(vcpu)) {
8499                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8500                         r = -EINVAL;
8501                         goto out;
8502                 }
8503         }
8504
8505         if (unlikely(vcpu->arch.complete_userspace_io)) {
8506                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8507                 vcpu->arch.complete_userspace_io = NULL;
8508                 r = cui(vcpu);
8509                 if (r <= 0)
8510                         goto out;
8511         } else
8512                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8513
8514         if (kvm_run->immediate_exit)
8515                 r = -EINTR;
8516         else
8517                 r = vcpu_run(vcpu);
8518
8519 out:
8520         kvm_put_guest_fpu(vcpu);
8521         if (vcpu->run->kvm_valid_regs)
8522                 store_regs(vcpu);
8523         post_kvm_run_save(vcpu);
8524         kvm_sigset_deactivate(vcpu);
8525
8526         vcpu_put(vcpu);
8527         return r;
8528 }
8529
8530 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8531 {
8532         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8533                 /*
8534                  * We are here if userspace calls get_regs() in the middle of
8535                  * instruction emulation. Registers state needs to be copied
8536                  * back from emulation context to vcpu. Userspace shouldn't do
8537                  * that usually, but some bad designed PV devices (vmware
8538                  * backdoor interface) need this to work
8539                  */
8540                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8541                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8542         }
8543         regs->rax = kvm_rax_read(vcpu);
8544         regs->rbx = kvm_rbx_read(vcpu);
8545         regs->rcx = kvm_rcx_read(vcpu);
8546         regs->rdx = kvm_rdx_read(vcpu);
8547         regs->rsi = kvm_rsi_read(vcpu);
8548         regs->rdi = kvm_rdi_read(vcpu);
8549         regs->rsp = kvm_rsp_read(vcpu);
8550         regs->rbp = kvm_rbp_read(vcpu);
8551 #ifdef CONFIG_X86_64
8552         regs->r8 = kvm_r8_read(vcpu);
8553         regs->r9 = kvm_r9_read(vcpu);
8554         regs->r10 = kvm_r10_read(vcpu);
8555         regs->r11 = kvm_r11_read(vcpu);
8556         regs->r12 = kvm_r12_read(vcpu);
8557         regs->r13 = kvm_r13_read(vcpu);
8558         regs->r14 = kvm_r14_read(vcpu);
8559         regs->r15 = kvm_r15_read(vcpu);
8560 #endif
8561
8562         regs->rip = kvm_rip_read(vcpu);
8563         regs->rflags = kvm_get_rflags(vcpu);
8564 }
8565
8566 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8567 {
8568         vcpu_load(vcpu);
8569         __get_regs(vcpu, regs);
8570         vcpu_put(vcpu);
8571         return 0;
8572 }
8573
8574 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8575 {
8576         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8577         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8578
8579         kvm_rax_write(vcpu, regs->rax);
8580         kvm_rbx_write(vcpu, regs->rbx);
8581         kvm_rcx_write(vcpu, regs->rcx);
8582         kvm_rdx_write(vcpu, regs->rdx);
8583         kvm_rsi_write(vcpu, regs->rsi);
8584         kvm_rdi_write(vcpu, regs->rdi);
8585         kvm_rsp_write(vcpu, regs->rsp);
8586         kvm_rbp_write(vcpu, regs->rbp);
8587 #ifdef CONFIG_X86_64
8588         kvm_r8_write(vcpu, regs->r8);
8589         kvm_r9_write(vcpu, regs->r9);
8590         kvm_r10_write(vcpu, regs->r10);
8591         kvm_r11_write(vcpu, regs->r11);
8592         kvm_r12_write(vcpu, regs->r12);
8593         kvm_r13_write(vcpu, regs->r13);
8594         kvm_r14_write(vcpu, regs->r14);
8595         kvm_r15_write(vcpu, regs->r15);
8596 #endif
8597
8598         kvm_rip_write(vcpu, regs->rip);
8599         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8600
8601         vcpu->arch.exception.pending = false;
8602
8603         kvm_make_request(KVM_REQ_EVENT, vcpu);
8604 }
8605
8606 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8607 {
8608         vcpu_load(vcpu);
8609         __set_regs(vcpu, regs);
8610         vcpu_put(vcpu);
8611         return 0;
8612 }
8613
8614 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8615 {
8616         struct kvm_segment cs;
8617
8618         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8619         *db = cs.db;
8620         *l = cs.l;
8621 }
8622 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8623
8624 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8625 {
8626         struct desc_ptr dt;
8627
8628         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8629         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8630         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8631         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8632         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8633         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8634
8635         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8636         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8637
8638         kvm_x86_ops->get_idt(vcpu, &dt);
8639         sregs->idt.limit = dt.size;
8640         sregs->idt.base = dt.address;
8641         kvm_x86_ops->get_gdt(vcpu, &dt);
8642         sregs->gdt.limit = dt.size;
8643         sregs->gdt.base = dt.address;
8644
8645         sregs->cr0 = kvm_read_cr0(vcpu);
8646         sregs->cr2 = vcpu->arch.cr2;
8647         sregs->cr3 = kvm_read_cr3(vcpu);
8648         sregs->cr4 = kvm_read_cr4(vcpu);
8649         sregs->cr8 = kvm_get_cr8(vcpu);
8650         sregs->efer = vcpu->arch.efer;
8651         sregs->apic_base = kvm_get_apic_base(vcpu);
8652
8653         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8654
8655         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8656                 set_bit(vcpu->arch.interrupt.nr,
8657                         (unsigned long *)sregs->interrupt_bitmap);
8658 }
8659
8660 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8661                                   struct kvm_sregs *sregs)
8662 {
8663         vcpu_load(vcpu);
8664         __get_sregs(vcpu, sregs);
8665         vcpu_put(vcpu);
8666         return 0;
8667 }
8668
8669 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8670                                     struct kvm_mp_state *mp_state)
8671 {
8672         vcpu_load(vcpu);
8673
8674         kvm_apic_accept_events(vcpu);
8675         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8676                                         vcpu->arch.pv.pv_unhalted)
8677                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8678         else
8679                 mp_state->mp_state = vcpu->arch.mp_state;
8680
8681         vcpu_put(vcpu);
8682         return 0;
8683 }
8684
8685 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8686                                     struct kvm_mp_state *mp_state)
8687 {
8688         int ret = -EINVAL;
8689
8690         vcpu_load(vcpu);
8691
8692         if (!lapic_in_kernel(vcpu) &&
8693             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8694                 goto out;
8695
8696         /* INITs are latched while in SMM */
8697         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8698             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8699              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8700                 goto out;
8701
8702         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8703                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8704                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8705         } else
8706                 vcpu->arch.mp_state = mp_state->mp_state;
8707         kvm_make_request(KVM_REQ_EVENT, vcpu);
8708
8709         ret = 0;
8710 out:
8711         vcpu_put(vcpu);
8712         return ret;
8713 }
8714
8715 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8716                     int reason, bool has_error_code, u32 error_code)
8717 {
8718         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8719         int ret;
8720
8721         init_emulate_ctxt(vcpu);
8722
8723         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8724                                    has_error_code, error_code);
8725         if (ret) {
8726                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8727                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
8728                 vcpu->run->internal.ndata = 0;
8729                 return 0;
8730         }
8731
8732         kvm_rip_write(vcpu, ctxt->eip);
8733         kvm_set_rflags(vcpu, ctxt->eflags);
8734         kvm_make_request(KVM_REQ_EVENT, vcpu);
8735         return 1;
8736 }
8737 EXPORT_SYMBOL_GPL(kvm_task_switch);
8738
8739 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8740 {
8741         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8742                 /*
8743                  * When EFER.LME and CR0.PG are set, the processor is in
8744                  * 64-bit mode (though maybe in a 32-bit code segment).
8745                  * CR4.PAE and EFER.LMA must be set.
8746                  */
8747                 if (!(sregs->cr4 & X86_CR4_PAE)
8748                     || !(sregs->efer & EFER_LMA))
8749                         return -EINVAL;
8750         } else {
8751                 /*
8752                  * Not in 64-bit mode: EFER.LMA is clear and the code
8753                  * segment cannot be 64-bit.
8754                  */
8755                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8756                         return -EINVAL;
8757         }
8758
8759         return kvm_valid_cr4(vcpu, sregs->cr4);
8760 }
8761
8762 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8763 {
8764         struct msr_data apic_base_msr;
8765         int mmu_reset_needed = 0;
8766         int cpuid_update_needed = 0;
8767         int pending_vec, max_bits, idx;
8768         struct desc_ptr dt;
8769         int ret = -EINVAL;
8770
8771         if (kvm_valid_sregs(vcpu, sregs))
8772                 goto out;
8773
8774         apic_base_msr.data = sregs->apic_base;
8775         apic_base_msr.host_initiated = true;
8776         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8777                 goto out;
8778
8779         dt.size = sregs->idt.limit;
8780         dt.address = sregs->idt.base;
8781         kvm_x86_ops->set_idt(vcpu, &dt);
8782         dt.size = sregs->gdt.limit;
8783         dt.address = sregs->gdt.base;
8784         kvm_x86_ops->set_gdt(vcpu, &dt);
8785
8786         vcpu->arch.cr2 = sregs->cr2;
8787         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8788         vcpu->arch.cr3 = sregs->cr3;
8789         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8790
8791         kvm_set_cr8(vcpu, sregs->cr8);
8792
8793         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8794         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8795
8796         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8797         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8798         vcpu->arch.cr0 = sregs->cr0;
8799
8800         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8801         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8802                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8803         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8804         if (cpuid_update_needed)
8805                 kvm_update_cpuid(vcpu);
8806
8807         idx = srcu_read_lock(&vcpu->kvm->srcu);
8808         if (is_pae_paging(vcpu)) {
8809                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8810                 mmu_reset_needed = 1;
8811         }
8812         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8813
8814         if (mmu_reset_needed)
8815                 kvm_mmu_reset_context(vcpu);
8816
8817         max_bits = KVM_NR_INTERRUPTS;
8818         pending_vec = find_first_bit(
8819                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8820         if (pending_vec < max_bits) {
8821                 kvm_queue_interrupt(vcpu, pending_vec, false);
8822                 pr_debug("Set back pending irq %d\n", pending_vec);
8823         }
8824
8825         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8826         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8827         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8828         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8829         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8830         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8831
8832         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8833         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8834
8835         update_cr8_intercept(vcpu);
8836
8837         /* Older userspace won't unhalt the vcpu on reset. */
8838         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8839             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8840             !is_protmode(vcpu))
8841                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8842
8843         kvm_make_request(KVM_REQ_EVENT, vcpu);
8844
8845         ret = 0;
8846 out:
8847         return ret;
8848 }
8849
8850 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8851                                   struct kvm_sregs *sregs)
8852 {
8853         int ret;
8854
8855         vcpu_load(vcpu);
8856         ret = __set_sregs(vcpu, sregs);
8857         vcpu_put(vcpu);
8858         return ret;
8859 }
8860
8861 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8862                                         struct kvm_guest_debug *dbg)
8863 {
8864         unsigned long rflags;
8865         int i, r;
8866
8867         vcpu_load(vcpu);
8868
8869         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8870                 r = -EBUSY;
8871                 if (vcpu->arch.exception.pending)
8872                         goto out;
8873                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8874                         kvm_queue_exception(vcpu, DB_VECTOR);
8875                 else
8876                         kvm_queue_exception(vcpu, BP_VECTOR);
8877         }
8878
8879         /*
8880          * Read rflags as long as potentially injected trace flags are still
8881          * filtered out.
8882          */
8883         rflags = kvm_get_rflags(vcpu);
8884
8885         vcpu->guest_debug = dbg->control;
8886         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8887                 vcpu->guest_debug = 0;
8888
8889         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8890                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8891                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8892                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8893         } else {
8894                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8895                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8896         }
8897         kvm_update_dr7(vcpu);
8898
8899         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8900                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8901                         get_segment_base(vcpu, VCPU_SREG_CS);
8902
8903         /*
8904          * Trigger an rflags update that will inject or remove the trace
8905          * flags.
8906          */
8907         kvm_set_rflags(vcpu, rflags);
8908
8909         kvm_x86_ops->update_bp_intercept(vcpu);
8910
8911         r = 0;
8912
8913 out:
8914         vcpu_put(vcpu);
8915         return r;
8916 }
8917
8918 /*
8919  * Translate a guest virtual address to a guest physical address.
8920  */
8921 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8922                                     struct kvm_translation *tr)
8923 {
8924         unsigned long vaddr = tr->linear_address;
8925         gpa_t gpa;
8926         int idx;
8927
8928         vcpu_load(vcpu);
8929
8930         idx = srcu_read_lock(&vcpu->kvm->srcu);
8931         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8932         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8933         tr->physical_address = gpa;
8934         tr->valid = gpa != UNMAPPED_GVA;
8935         tr->writeable = 1;
8936         tr->usermode = 0;
8937
8938         vcpu_put(vcpu);
8939         return 0;
8940 }
8941
8942 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8943 {
8944         struct fxregs_state *fxsave;
8945
8946         vcpu_load(vcpu);
8947
8948         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8949         memcpy(fpu->fpr, fxsave->st_space, 128);
8950         fpu->fcw = fxsave->cwd;
8951         fpu->fsw = fxsave->swd;
8952         fpu->ftwx = fxsave->twd;
8953         fpu->last_opcode = fxsave->fop;
8954         fpu->last_ip = fxsave->rip;
8955         fpu->last_dp = fxsave->rdp;
8956         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8957
8958         vcpu_put(vcpu);
8959         return 0;
8960 }
8961
8962 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8963 {
8964         struct fxregs_state *fxsave;
8965
8966         vcpu_load(vcpu);
8967
8968         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8969
8970         memcpy(fxsave->st_space, fpu->fpr, 128);
8971         fxsave->cwd = fpu->fcw;
8972         fxsave->swd = fpu->fsw;
8973         fxsave->twd = fpu->ftwx;
8974         fxsave->fop = fpu->last_opcode;
8975         fxsave->rip = fpu->last_ip;
8976         fxsave->rdp = fpu->last_dp;
8977         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8978
8979         vcpu_put(vcpu);
8980         return 0;
8981 }
8982
8983 static void store_regs(struct kvm_vcpu *vcpu)
8984 {
8985         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8986
8987         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8988                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8989
8990         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8991                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8992
8993         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8994                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8995                                 vcpu, &vcpu->run->s.regs.events);
8996 }
8997
8998 static int sync_regs(struct kvm_vcpu *vcpu)
8999 {
9000         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9001                 return -EINVAL;
9002
9003         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9004                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9005                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9006         }
9007         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9008                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9009                         return -EINVAL;
9010                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9011         }
9012         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9013                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9014                                 vcpu, &vcpu->run->s.regs.events))
9015                         return -EINVAL;
9016                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9017         }
9018
9019         return 0;
9020 }
9021
9022 static void fx_init(struct kvm_vcpu *vcpu)
9023 {
9024         fpstate_init(&vcpu->arch.guest_fpu->state);
9025         if (boot_cpu_has(X86_FEATURE_XSAVES))
9026                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9027                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9028
9029         /*
9030          * Ensure guest xcr0 is valid for loading
9031          */
9032         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9033
9034         vcpu->arch.cr0 |= X86_CR0_ET;
9035 }
9036
9037 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
9038 {
9039         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
9040
9041         kvmclock_reset(vcpu);
9042
9043         kvm_x86_ops->vcpu_free(vcpu);
9044         free_cpumask_var(wbinvd_dirty_mask);
9045 }
9046
9047 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
9048                                                 unsigned int id)
9049 {
9050         struct kvm_vcpu *vcpu;
9051
9052         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9053                 printk_once(KERN_WARNING
9054                 "kvm: SMP vm created on host with unstable TSC; "
9055                 "guest TSC will not be reliable\n");
9056
9057         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
9058
9059         return vcpu;
9060 }
9061
9062 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
9063 {
9064         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9065         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9066         kvm_vcpu_mtrr_init(vcpu);
9067         vcpu_load(vcpu);
9068         kvm_vcpu_reset(vcpu, false);
9069         kvm_init_mmu(vcpu, false);
9070         vcpu_put(vcpu);
9071         return 0;
9072 }
9073
9074 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9075 {
9076         struct msr_data msr;
9077         struct kvm *kvm = vcpu->kvm;
9078
9079         kvm_hv_vcpu_postcreate(vcpu);
9080
9081         if (mutex_lock_killable(&vcpu->mutex))
9082                 return;
9083         vcpu_load(vcpu);
9084         msr.data = 0x0;
9085         msr.index = MSR_IA32_TSC;
9086         msr.host_initiated = true;
9087         kvm_write_tsc(vcpu, &msr);
9088         vcpu_put(vcpu);
9089
9090         /* poll control enabled by default */
9091         vcpu->arch.msr_kvm_poll_control = 1;
9092
9093         mutex_unlock(&vcpu->mutex);
9094
9095         if (!kvmclock_periodic_sync)
9096                 return;
9097
9098         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9099                                         KVMCLOCK_SYNC_PERIOD);
9100 }
9101
9102 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9103 {
9104         vcpu->arch.apf.msr_val = 0;
9105
9106         vcpu_load(vcpu);
9107         kvm_mmu_unload(vcpu);
9108         vcpu_put(vcpu);
9109
9110         kvm_x86_ops->vcpu_free(vcpu);
9111 }
9112
9113 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9114 {
9115         kvm_lapic_reset(vcpu, init_event);
9116
9117         vcpu->arch.hflags = 0;
9118
9119         vcpu->arch.smi_pending = 0;
9120         vcpu->arch.smi_count = 0;
9121         atomic_set(&vcpu->arch.nmi_queued, 0);
9122         vcpu->arch.nmi_pending = 0;
9123         vcpu->arch.nmi_injected = false;
9124         kvm_clear_interrupt_queue(vcpu);
9125         kvm_clear_exception_queue(vcpu);
9126         vcpu->arch.exception.pending = false;
9127
9128         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9129         kvm_update_dr0123(vcpu);
9130         vcpu->arch.dr6 = DR6_INIT;
9131         kvm_update_dr6(vcpu);
9132         vcpu->arch.dr7 = DR7_FIXED_1;
9133         kvm_update_dr7(vcpu);
9134
9135         vcpu->arch.cr2 = 0;
9136
9137         kvm_make_request(KVM_REQ_EVENT, vcpu);
9138         vcpu->arch.apf.msr_val = 0;
9139         vcpu->arch.st.msr_val = 0;
9140
9141         kvmclock_reset(vcpu);
9142
9143         kvm_clear_async_pf_completion_queue(vcpu);
9144         kvm_async_pf_hash_reset(vcpu);
9145         vcpu->arch.apf.halted = false;
9146
9147         if (kvm_mpx_supported()) {
9148                 void *mpx_state_buffer;
9149
9150                 /*
9151                  * To avoid have the INIT path from kvm_apic_has_events() that be
9152                  * called with loaded FPU and does not let userspace fix the state.
9153                  */
9154                 if (init_event)
9155                         kvm_put_guest_fpu(vcpu);
9156                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9157                                         XFEATURE_BNDREGS);
9158                 if (mpx_state_buffer)
9159                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9160                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9161                                         XFEATURE_BNDCSR);
9162                 if (mpx_state_buffer)
9163                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9164                 if (init_event)
9165                         kvm_load_guest_fpu(vcpu);
9166         }
9167
9168         if (!init_event) {
9169                 kvm_pmu_reset(vcpu);
9170                 vcpu->arch.smbase = 0x30000;
9171
9172                 vcpu->arch.msr_misc_features_enables = 0;
9173
9174                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9175         }
9176
9177         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9178         vcpu->arch.regs_avail = ~0;
9179         vcpu->arch.regs_dirty = ~0;
9180
9181         vcpu->arch.ia32_xss = 0;
9182
9183         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9184 }
9185
9186 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9187 {
9188         struct kvm_segment cs;
9189
9190         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9191         cs.selector = vector << 8;
9192         cs.base = vector << 12;
9193         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9194         kvm_rip_write(vcpu, 0);
9195 }
9196
9197 int kvm_arch_hardware_enable(void)
9198 {
9199         struct kvm *kvm;
9200         struct kvm_vcpu *vcpu;
9201         int i;
9202         int ret;
9203         u64 local_tsc;
9204         u64 max_tsc = 0;
9205         bool stable, backwards_tsc = false;
9206
9207         kvm_shared_msr_cpu_online();
9208         ret = kvm_x86_ops->hardware_enable();
9209         if (ret != 0)
9210                 return ret;
9211
9212         local_tsc = rdtsc();
9213         stable = !kvm_check_tsc_unstable();
9214         list_for_each_entry(kvm, &vm_list, vm_list) {
9215                 kvm_for_each_vcpu(i, vcpu, kvm) {
9216                         if (!stable && vcpu->cpu == smp_processor_id())
9217                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9218                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9219                                 backwards_tsc = true;
9220                                 if (vcpu->arch.last_host_tsc > max_tsc)
9221                                         max_tsc = vcpu->arch.last_host_tsc;
9222                         }
9223                 }
9224         }
9225
9226         /*
9227          * Sometimes, even reliable TSCs go backwards.  This happens on
9228          * platforms that reset TSC during suspend or hibernate actions, but
9229          * maintain synchronization.  We must compensate.  Fortunately, we can
9230          * detect that condition here, which happens early in CPU bringup,
9231          * before any KVM threads can be running.  Unfortunately, we can't
9232          * bring the TSCs fully up to date with real time, as we aren't yet far
9233          * enough into CPU bringup that we know how much real time has actually
9234          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9235          * variables that haven't been updated yet.
9236          *
9237          * So we simply find the maximum observed TSC above, then record the
9238          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9239          * the adjustment will be applied.  Note that we accumulate
9240          * adjustments, in case multiple suspend cycles happen before some VCPU
9241          * gets a chance to run again.  In the event that no KVM threads get a
9242          * chance to run, we will miss the entire elapsed period, as we'll have
9243          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9244          * loose cycle time.  This isn't too big a deal, since the loss will be
9245          * uniform across all VCPUs (not to mention the scenario is extremely
9246          * unlikely). It is possible that a second hibernate recovery happens
9247          * much faster than a first, causing the observed TSC here to be
9248          * smaller; this would require additional padding adjustment, which is
9249          * why we set last_host_tsc to the local tsc observed here.
9250          *
9251          * N.B. - this code below runs only on platforms with reliable TSC,
9252          * as that is the only way backwards_tsc is set above.  Also note
9253          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9254          * have the same delta_cyc adjustment applied if backwards_tsc
9255          * is detected.  Note further, this adjustment is only done once,
9256          * as we reset last_host_tsc on all VCPUs to stop this from being
9257          * called multiple times (one for each physical CPU bringup).
9258          *
9259          * Platforms with unreliable TSCs don't have to deal with this, they
9260          * will be compensated by the logic in vcpu_load, which sets the TSC to
9261          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9262          * guarantee that they stay in perfect synchronization.
9263          */
9264         if (backwards_tsc) {
9265                 u64 delta_cyc = max_tsc - local_tsc;
9266                 list_for_each_entry(kvm, &vm_list, vm_list) {
9267                         kvm->arch.backwards_tsc_observed = true;
9268                         kvm_for_each_vcpu(i, vcpu, kvm) {
9269                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9270                                 vcpu->arch.last_host_tsc = local_tsc;
9271                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9272                         }
9273
9274                         /*
9275                          * We have to disable TSC offset matching.. if you were
9276                          * booting a VM while issuing an S4 host suspend....
9277                          * you may have some problem.  Solving this issue is
9278                          * left as an exercise to the reader.
9279                          */
9280                         kvm->arch.last_tsc_nsec = 0;
9281                         kvm->arch.last_tsc_write = 0;
9282                 }
9283
9284         }
9285         return 0;
9286 }
9287
9288 void kvm_arch_hardware_disable(void)
9289 {
9290         kvm_x86_ops->hardware_disable();
9291         drop_user_return_notifiers();
9292 }
9293
9294 int kvm_arch_hardware_setup(void)
9295 {
9296         int r;
9297
9298         r = kvm_x86_ops->hardware_setup();
9299         if (r != 0)
9300                 return r;
9301
9302         if (kvm_has_tsc_control) {
9303                 /*
9304                  * Make sure the user can only configure tsc_khz values that
9305                  * fit into a signed integer.
9306                  * A min value is not calculated because it will always
9307                  * be 1 on all machines.
9308                  */
9309                 u64 max = min(0x7fffffffULL,
9310                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9311                 kvm_max_guest_tsc_khz = max;
9312
9313                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9314         }
9315
9316         kvm_init_msr_list();
9317         return 0;
9318 }
9319
9320 void kvm_arch_hardware_unsetup(void)
9321 {
9322         kvm_x86_ops->hardware_unsetup();
9323 }
9324
9325 int kvm_arch_check_processor_compat(void)
9326 {
9327         return kvm_x86_ops->check_processor_compatibility();
9328 }
9329
9330 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9331 {
9332         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9333 }
9334 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9335
9336 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9337 {
9338         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9339 }
9340
9341 struct static_key kvm_no_apic_vcpu __read_mostly;
9342 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9343
9344 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9345 {
9346         struct page *page;
9347         int r;
9348
9349         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9350         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9351                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9352         else
9353                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9354
9355         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9356         if (!page) {
9357                 r = -ENOMEM;
9358                 goto fail;
9359         }
9360         vcpu->arch.pio_data = page_address(page);
9361
9362         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9363
9364         r = kvm_mmu_create(vcpu);
9365         if (r < 0)
9366                 goto fail_free_pio_data;
9367
9368         if (irqchip_in_kernel(vcpu->kvm)) {
9369                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9370                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9371                 if (r < 0)
9372                         goto fail_mmu_destroy;
9373         } else
9374                 static_key_slow_inc(&kvm_no_apic_vcpu);
9375
9376         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9377                                        GFP_KERNEL_ACCOUNT);
9378         if (!vcpu->arch.mce_banks) {
9379                 r = -ENOMEM;
9380                 goto fail_free_lapic;
9381         }
9382         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9383
9384         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9385                                 GFP_KERNEL_ACCOUNT)) {
9386                 r = -ENOMEM;
9387                 goto fail_free_mce_banks;
9388         }
9389
9390         fx_init(vcpu);
9391
9392         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9393
9394         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9395
9396         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9397
9398         kvm_async_pf_hash_reset(vcpu);
9399         kvm_pmu_init(vcpu);
9400
9401         vcpu->arch.pending_external_vector = -1;
9402         vcpu->arch.preempted_in_kernel = false;
9403
9404         kvm_hv_vcpu_init(vcpu);
9405
9406         return 0;
9407
9408 fail_free_mce_banks:
9409         kfree(vcpu->arch.mce_banks);
9410 fail_free_lapic:
9411         kvm_free_lapic(vcpu);
9412 fail_mmu_destroy:
9413         kvm_mmu_destroy(vcpu);
9414 fail_free_pio_data:
9415         free_page((unsigned long)vcpu->arch.pio_data);
9416 fail:
9417         return r;
9418 }
9419
9420 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9421 {
9422         int idx;
9423
9424         kvm_hv_vcpu_uninit(vcpu);
9425         kvm_pmu_destroy(vcpu);
9426         kfree(vcpu->arch.mce_banks);
9427         kvm_free_lapic(vcpu);
9428         idx = srcu_read_lock(&vcpu->kvm->srcu);
9429         kvm_mmu_destroy(vcpu);
9430         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9431         free_page((unsigned long)vcpu->arch.pio_data);
9432         if (!lapic_in_kernel(vcpu))
9433                 static_key_slow_dec(&kvm_no_apic_vcpu);
9434 }
9435
9436 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9437 {
9438         vcpu->arch.l1tf_flush_l1d = true;
9439         kvm_x86_ops->sched_in(vcpu, cpu);
9440 }
9441
9442 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9443 {
9444         if (type)
9445                 return -EINVAL;
9446
9447         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9448         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9449         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
9450         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9451         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9452
9453         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9454         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9455         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9456         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9457                 &kvm->arch.irq_sources_bitmap);
9458
9459         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9460         mutex_init(&kvm->arch.apic_map_lock);
9461         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9462
9463         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9464         pvclock_update_vm_gtod_copy(kvm);
9465
9466         kvm->arch.guest_can_read_msr_platform_info = true;
9467
9468         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9469         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9470
9471         kvm_hv_init_vm(kvm);
9472         kvm_page_track_init(kvm);
9473         kvm_mmu_init_vm(kvm);
9474
9475         return kvm_x86_ops->vm_init(kvm);
9476 }
9477
9478 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9479 {
9480         vcpu_load(vcpu);
9481         kvm_mmu_unload(vcpu);
9482         vcpu_put(vcpu);
9483 }
9484
9485 static void kvm_free_vcpus(struct kvm *kvm)
9486 {
9487         unsigned int i;
9488         struct kvm_vcpu *vcpu;
9489
9490         /*
9491          * Unpin any mmu pages first.
9492          */
9493         kvm_for_each_vcpu(i, vcpu, kvm) {
9494                 kvm_clear_async_pf_completion_queue(vcpu);
9495                 kvm_unload_vcpu_mmu(vcpu);
9496         }
9497         kvm_for_each_vcpu(i, vcpu, kvm)
9498                 kvm_arch_vcpu_free(vcpu);
9499
9500         mutex_lock(&kvm->lock);
9501         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9502                 kvm->vcpus[i] = NULL;
9503
9504         atomic_set(&kvm->online_vcpus, 0);
9505         mutex_unlock(&kvm->lock);
9506 }
9507
9508 void kvm_arch_sync_events(struct kvm *kvm)
9509 {
9510         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9511         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9512         kvm_free_pit(kvm);
9513 }
9514
9515 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9516 {
9517         int i, r;
9518         unsigned long hva;
9519         struct kvm_memslots *slots = kvm_memslots(kvm);
9520         struct kvm_memory_slot *slot, old;
9521
9522         /* Called with kvm->slots_lock held.  */
9523         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9524                 return -EINVAL;
9525
9526         slot = id_to_memslot(slots, id);
9527         if (size) {
9528                 if (slot->npages)
9529                         return -EEXIST;
9530
9531                 /*
9532                  * MAP_SHARED to prevent internal slot pages from being moved
9533                  * by fork()/COW.
9534                  */
9535                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9536                               MAP_SHARED | MAP_ANONYMOUS, 0);
9537                 if (IS_ERR((void *)hva))
9538                         return PTR_ERR((void *)hva);
9539         } else {
9540                 if (!slot->npages)
9541                         return 0;
9542
9543                 hva = 0;
9544         }
9545
9546         old = *slot;
9547         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9548                 struct kvm_userspace_memory_region m;
9549
9550                 m.slot = id | (i << 16);
9551                 m.flags = 0;
9552                 m.guest_phys_addr = gpa;
9553                 m.userspace_addr = hva;
9554                 m.memory_size = size;
9555                 r = __kvm_set_memory_region(kvm, &m);
9556                 if (r < 0)
9557                         return r;
9558         }
9559
9560         if (!size)
9561                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9562
9563         return 0;
9564 }
9565 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9566
9567 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9568 {
9569         int r;
9570
9571         mutex_lock(&kvm->slots_lock);
9572         r = __x86_set_memory_region(kvm, id, gpa, size);
9573         mutex_unlock(&kvm->slots_lock);
9574
9575         return r;
9576 }
9577 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9578
9579 void kvm_arch_destroy_vm(struct kvm *kvm)
9580 {
9581         if (current->mm == kvm->mm) {
9582                 /*
9583                  * Free memory regions allocated on behalf of userspace,
9584                  * unless the the memory map has changed due to process exit
9585                  * or fd copying.
9586                  */
9587                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9588                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9589                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9590         }
9591         if (kvm_x86_ops->vm_destroy)
9592                 kvm_x86_ops->vm_destroy(kvm);
9593         kvm_pic_destroy(kvm);
9594         kvm_ioapic_destroy(kvm);
9595         kvm_free_vcpus(kvm);
9596         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9597         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9598         kvm_mmu_uninit_vm(kvm);
9599         kvm_page_track_cleanup(kvm);
9600         kvm_hv_destroy_vm(kvm);
9601 }
9602
9603 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9604                            struct kvm_memory_slot *dont)
9605 {
9606         int i;
9607
9608         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9609                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9610                         kvfree(free->arch.rmap[i]);
9611                         free->arch.rmap[i] = NULL;
9612                 }
9613                 if (i == 0)
9614                         continue;
9615
9616                 if (!dont || free->arch.lpage_info[i - 1] !=
9617                              dont->arch.lpage_info[i - 1]) {
9618                         kvfree(free->arch.lpage_info[i - 1]);
9619                         free->arch.lpage_info[i - 1] = NULL;
9620                 }
9621         }
9622
9623         kvm_page_track_free_memslot(free, dont);
9624 }
9625
9626 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9627                             unsigned long npages)
9628 {
9629         int i;
9630
9631         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9632                 struct kvm_lpage_info *linfo;
9633                 unsigned long ugfn;
9634                 int lpages;
9635                 int level = i + 1;
9636
9637                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9638                                       slot->base_gfn, level) + 1;
9639
9640                 slot->arch.rmap[i] =
9641                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9642                                  GFP_KERNEL_ACCOUNT);
9643                 if (!slot->arch.rmap[i])
9644                         goto out_free;
9645                 if (i == 0)
9646                         continue;
9647
9648                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9649                 if (!linfo)
9650                         goto out_free;
9651
9652                 slot->arch.lpage_info[i - 1] = linfo;
9653
9654                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9655                         linfo[0].disallow_lpage = 1;
9656                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9657                         linfo[lpages - 1].disallow_lpage = 1;
9658                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9659                 /*
9660                  * If the gfn and userspace address are not aligned wrt each
9661                  * other, or if explicitly asked to, disable large page
9662                  * support for this slot
9663                  */
9664                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9665                     !kvm_largepages_enabled()) {
9666                         unsigned long j;
9667
9668                         for (j = 0; j < lpages; ++j)
9669                                 linfo[j].disallow_lpage = 1;
9670                 }
9671         }
9672
9673         if (kvm_page_track_create_memslot(slot, npages))
9674                 goto out_free;
9675
9676         return 0;
9677
9678 out_free:
9679         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9680                 kvfree(slot->arch.rmap[i]);
9681                 slot->arch.rmap[i] = NULL;
9682                 if (i == 0)
9683                         continue;
9684
9685                 kvfree(slot->arch.lpage_info[i - 1]);
9686                 slot->arch.lpage_info[i - 1] = NULL;
9687         }
9688         return -ENOMEM;
9689 }
9690
9691 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9692 {
9693         /*
9694          * memslots->generation has been incremented.
9695          * mmio generation may have reached its maximum value.
9696          */
9697         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9698 }
9699
9700 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9701                                 struct kvm_memory_slot *memslot,
9702                                 const struct kvm_userspace_memory_region *mem,
9703                                 enum kvm_mr_change change)
9704 {
9705         return 0;
9706 }
9707
9708 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9709                                      struct kvm_memory_slot *new)
9710 {
9711         /* Still write protect RO slot */
9712         if (new->flags & KVM_MEM_READONLY) {
9713                 kvm_mmu_slot_remove_write_access(kvm, new);
9714                 return;
9715         }
9716
9717         /*
9718          * Call kvm_x86_ops dirty logging hooks when they are valid.
9719          *
9720          * kvm_x86_ops->slot_disable_log_dirty is called when:
9721          *
9722          *  - KVM_MR_CREATE with dirty logging is disabled
9723          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9724          *
9725          * The reason is, in case of PML, we need to set D-bit for any slots
9726          * with dirty logging disabled in order to eliminate unnecessary GPA
9727          * logging in PML buffer (and potential PML buffer full VMEXT). This
9728          * guarantees leaving PML enabled during guest's lifetime won't have
9729          * any additional overhead from PML when guest is running with dirty
9730          * logging disabled for memory slots.
9731          *
9732          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9733          * to dirty logging mode.
9734          *
9735          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9736          *
9737          * In case of write protect:
9738          *
9739          * Write protect all pages for dirty logging.
9740          *
9741          * All the sptes including the large sptes which point to this
9742          * slot are set to readonly. We can not create any new large
9743          * spte on this slot until the end of the logging.
9744          *
9745          * See the comments in fast_page_fault().
9746          */
9747         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9748                 if (kvm_x86_ops->slot_enable_log_dirty)
9749                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9750                 else
9751                         kvm_mmu_slot_remove_write_access(kvm, new);
9752         } else {
9753                 if (kvm_x86_ops->slot_disable_log_dirty)
9754                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9755         }
9756 }
9757
9758 void kvm_arch_commit_memory_region(struct kvm *kvm,
9759                                 const struct kvm_userspace_memory_region *mem,
9760                                 const struct kvm_memory_slot *old,
9761                                 const struct kvm_memory_slot *new,
9762                                 enum kvm_mr_change change)
9763 {
9764         if (!kvm->arch.n_requested_mmu_pages)
9765                 kvm_mmu_change_mmu_pages(kvm,
9766                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9767
9768         /*
9769          * Dirty logging tracks sptes in 4k granularity, meaning that large
9770          * sptes have to be split.  If live migration is successful, the guest
9771          * in the source machine will be destroyed and large sptes will be
9772          * created in the destination. However, if the guest continues to run
9773          * in the source machine (for example if live migration fails), small
9774          * sptes will remain around and cause bad performance.
9775          *
9776          * Scan sptes if dirty logging has been stopped, dropping those
9777          * which can be collapsed into a single large-page spte.  Later
9778          * page faults will create the large-page sptes.
9779          *
9780          * There is no need to do this in any of the following cases:
9781          * CREATE:      No dirty mappings will already exist.
9782          * MOVE/DELETE: The old mappings will already have been cleaned up by
9783          *              kvm_arch_flush_shadow_memslot()
9784          */
9785         if (change == KVM_MR_FLAGS_ONLY &&
9786                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9787                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9788                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9789
9790         /*
9791          * Set up write protection and/or dirty logging for the new slot.
9792          *
9793          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9794          * been zapped so no dirty logging staff is needed for old slot. For
9795          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9796          * new and it's also covered when dealing with the new slot.
9797          *
9798          * FIXME: const-ify all uses of struct kvm_memory_slot.
9799          */
9800         if (change != KVM_MR_DELETE)
9801                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9802 }
9803
9804 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9805 {
9806         kvm_mmu_zap_all(kvm);
9807 }
9808
9809 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9810                                    struct kvm_memory_slot *slot)
9811 {
9812         kvm_page_track_flush_slot(kvm, slot);
9813 }
9814
9815 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9816 {
9817         return (is_guest_mode(vcpu) &&
9818                         kvm_x86_ops->guest_apic_has_interrupt &&
9819                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9820 }
9821
9822 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9823 {
9824         if (!list_empty_careful(&vcpu->async_pf.done))
9825                 return true;
9826
9827         if (kvm_apic_has_events(vcpu))
9828                 return true;
9829
9830         if (vcpu->arch.pv.pv_unhalted)
9831                 return true;
9832
9833         if (vcpu->arch.exception.pending)
9834                 return true;
9835
9836         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9837             (vcpu->arch.nmi_pending &&
9838              kvm_x86_ops->nmi_allowed(vcpu)))
9839                 return true;
9840
9841         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9842             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9843                 return true;
9844
9845         if (kvm_arch_interrupt_allowed(vcpu) &&
9846             (kvm_cpu_has_interrupt(vcpu) ||
9847             kvm_guest_apic_has_interrupt(vcpu)))
9848                 return true;
9849
9850         if (kvm_hv_has_stimer_pending(vcpu))
9851                 return true;
9852
9853         return false;
9854 }
9855
9856 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9857 {
9858         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9859 }
9860
9861 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
9862 {
9863         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
9864                 return true;
9865
9866         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9867                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
9868                  kvm_test_request(KVM_REQ_EVENT, vcpu))
9869                 return true;
9870
9871         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
9872                 return true;
9873
9874         return false;
9875 }
9876
9877 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9878 {
9879         return vcpu->arch.preempted_in_kernel;
9880 }
9881
9882 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9883 {
9884         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9885 }
9886
9887 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9888 {
9889         return kvm_x86_ops->interrupt_allowed(vcpu);
9890 }
9891
9892 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9893 {
9894         if (is_64_bit_mode(vcpu))
9895                 return kvm_rip_read(vcpu);
9896         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9897                      kvm_rip_read(vcpu));
9898 }
9899 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9900
9901 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9902 {
9903         return kvm_get_linear_rip(vcpu) == linear_rip;
9904 }
9905 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9906
9907 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9908 {
9909         unsigned long rflags;
9910
9911         rflags = kvm_x86_ops->get_rflags(vcpu);
9912         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9913                 rflags &= ~X86_EFLAGS_TF;
9914         return rflags;
9915 }
9916 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9917
9918 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9919 {
9920         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9921             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9922                 rflags |= X86_EFLAGS_TF;
9923         kvm_x86_ops->set_rflags(vcpu, rflags);
9924 }
9925
9926 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9927 {
9928         __kvm_set_rflags(vcpu, rflags);
9929         kvm_make_request(KVM_REQ_EVENT, vcpu);
9930 }
9931 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9932
9933 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9934 {
9935         int r;
9936
9937         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9938               work->wakeup_all)
9939                 return;
9940
9941         r = kvm_mmu_reload(vcpu);
9942         if (unlikely(r))
9943                 return;
9944
9945         if (!vcpu->arch.mmu->direct_map &&
9946               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9947                 return;
9948
9949         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9950 }
9951
9952 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9953 {
9954         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9955 }
9956
9957 static inline u32 kvm_async_pf_next_probe(u32 key)
9958 {
9959         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9960 }
9961
9962 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9963 {
9964         u32 key = kvm_async_pf_hash_fn(gfn);
9965
9966         while (vcpu->arch.apf.gfns[key] != ~0)
9967                 key = kvm_async_pf_next_probe(key);
9968
9969         vcpu->arch.apf.gfns[key] = gfn;
9970 }
9971
9972 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9973 {
9974         int i;
9975         u32 key = kvm_async_pf_hash_fn(gfn);
9976
9977         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9978                      (vcpu->arch.apf.gfns[key] != gfn &&
9979                       vcpu->arch.apf.gfns[key] != ~0); i++)
9980                 key = kvm_async_pf_next_probe(key);
9981
9982         return key;
9983 }
9984
9985 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9986 {
9987         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9988 }
9989
9990 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9991 {
9992         u32 i, j, k;
9993
9994         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9995         while (true) {
9996                 vcpu->arch.apf.gfns[i] = ~0;
9997                 do {
9998                         j = kvm_async_pf_next_probe(j);
9999                         if (vcpu->arch.apf.gfns[j] == ~0)
10000                                 return;
10001                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10002                         /*
10003                          * k lies cyclically in ]i,j]
10004                          * |    i.k.j |
10005                          * |....j i.k.| or  |.k..j i...|
10006                          */
10007                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10008                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10009                 i = j;
10010         }
10011 }
10012
10013 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
10014 {
10015
10016         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
10017                                       sizeof(val));
10018 }
10019
10020 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
10021 {
10022
10023         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
10024                                       sizeof(u32));
10025 }
10026
10027 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10028 {
10029         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10030                 return false;
10031
10032         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
10033             (vcpu->arch.apf.send_user_only &&
10034              kvm_x86_ops->get_cpl(vcpu) == 0))
10035                 return false;
10036
10037         return true;
10038 }
10039
10040 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10041 {
10042         if (unlikely(!lapic_in_kernel(vcpu) ||
10043                      kvm_event_needs_reinjection(vcpu) ||
10044                      vcpu->arch.exception.pending))
10045                 return false;
10046
10047         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10048                 return false;
10049
10050         /*
10051          * If interrupts are off we cannot even use an artificial
10052          * halt state.
10053          */
10054         return kvm_x86_ops->interrupt_allowed(vcpu);
10055 }
10056
10057 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10058                                      struct kvm_async_pf *work)
10059 {
10060         struct x86_exception fault;
10061
10062         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
10063         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10064
10065         if (kvm_can_deliver_async_pf(vcpu) &&
10066             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
10067                 fault.vector = PF_VECTOR;
10068                 fault.error_code_valid = true;
10069                 fault.error_code = 0;
10070                 fault.nested_page_fault = false;
10071                 fault.address = work->arch.token;
10072                 fault.async_page_fault = true;
10073                 kvm_inject_page_fault(vcpu, &fault);
10074         } else {
10075                 /*
10076                  * It is not possible to deliver a paravirtualized asynchronous
10077                  * page fault, but putting the guest in an artificial halt state
10078                  * can be beneficial nevertheless: if an interrupt arrives, we
10079                  * can deliver it timely and perhaps the guest will schedule
10080                  * another process.  When the instruction that triggered a page
10081                  * fault is retried, hopefully the page will be ready in the host.
10082                  */
10083                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10084         }
10085 }
10086
10087 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10088                                  struct kvm_async_pf *work)
10089 {
10090         struct x86_exception fault;
10091         u32 val;
10092
10093         if (work->wakeup_all)
10094                 work->arch.token = ~0; /* broadcast wakeup */
10095         else
10096                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10097         trace_kvm_async_pf_ready(work->arch.token, work->gva);
10098
10099         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
10100             !apf_get_user(vcpu, &val)) {
10101                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
10102                     vcpu->arch.exception.pending &&
10103                     vcpu->arch.exception.nr == PF_VECTOR &&
10104                     !apf_put_user(vcpu, 0)) {
10105                         vcpu->arch.exception.injected = false;
10106                         vcpu->arch.exception.pending = false;
10107                         vcpu->arch.exception.nr = 0;
10108                         vcpu->arch.exception.has_error_code = false;
10109                         vcpu->arch.exception.error_code = 0;
10110                         vcpu->arch.exception.has_payload = false;
10111                         vcpu->arch.exception.payload = 0;
10112                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
10113                         fault.vector = PF_VECTOR;
10114                         fault.error_code_valid = true;
10115                         fault.error_code = 0;
10116                         fault.nested_page_fault = false;
10117                         fault.address = work->arch.token;
10118                         fault.async_page_fault = true;
10119                         kvm_inject_page_fault(vcpu, &fault);
10120                 }
10121         }
10122         vcpu->arch.apf.halted = false;
10123         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10124 }
10125
10126 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
10127 {
10128         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
10129                 return true;
10130         else
10131                 return kvm_can_do_async_pf(vcpu);
10132 }
10133
10134 void kvm_arch_start_assignment(struct kvm *kvm)
10135 {
10136         atomic_inc(&kvm->arch.assigned_device_count);
10137 }
10138 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10139
10140 void kvm_arch_end_assignment(struct kvm *kvm)
10141 {
10142         atomic_dec(&kvm->arch.assigned_device_count);
10143 }
10144 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10145
10146 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10147 {
10148         return atomic_read(&kvm->arch.assigned_device_count);
10149 }
10150 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10151
10152 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10153 {
10154         atomic_inc(&kvm->arch.noncoherent_dma_count);
10155 }
10156 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10157
10158 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10159 {
10160         atomic_dec(&kvm->arch.noncoherent_dma_count);
10161 }
10162 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10163
10164 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10165 {
10166         return atomic_read(&kvm->arch.noncoherent_dma_count);
10167 }
10168 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10169
10170 bool kvm_arch_has_irq_bypass(void)
10171 {
10172         return true;
10173 }
10174
10175 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10176                                       struct irq_bypass_producer *prod)
10177 {
10178         struct kvm_kernel_irqfd *irqfd =
10179                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10180
10181         irqfd->producer = prod;
10182
10183         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10184                                            prod->irq, irqfd->gsi, 1);
10185 }
10186
10187 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10188                                       struct irq_bypass_producer *prod)
10189 {
10190         int ret;
10191         struct kvm_kernel_irqfd *irqfd =
10192                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10193
10194         WARN_ON(irqfd->producer != prod);
10195         irqfd->producer = NULL;
10196
10197         /*
10198          * When producer of consumer is unregistered, we change back to
10199          * remapped mode, so we can re-use the current implementation
10200          * when the irq is masked/disabled or the consumer side (KVM
10201          * int this case doesn't want to receive the interrupts.
10202         */
10203         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10204         if (ret)
10205                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10206                        " fails: %d\n", irqfd->consumer.token, ret);
10207 }
10208
10209 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10210                                    uint32_t guest_irq, bool set)
10211 {
10212         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10213 }
10214
10215 bool kvm_vector_hashing_enabled(void)
10216 {
10217         return vector_hashing;
10218 }
10219 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10220
10221 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10222 {
10223         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10224 }
10225 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10226
10227
10228 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10229 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10230 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10231 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10232 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10233 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10234 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10235 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10236 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10237 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10238 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
10239 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10240 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10241 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10242 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10243 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
10244 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10245 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10246 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10247 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);