arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly backwards_tsc_observed = false;
 127
 128 #define KVM_NR_SHARED_MSRS 16
 129
 130 struct kvm_shared_msrs_global {
 131         int nr;
 132         u32 msrs[KVM_NR_SHARED_MSRS];
 133 };
 134
 135 struct kvm_shared_msrs {
 136         struct user_return_notifier urn;
 137         bool registered;
 138         struct kvm_shared_msr_values {
 139                 u64 host;
 140                 u64 curr;
 141         } values[KVM_NR_SHARED_MSRS];
 142 };
 143
 144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 145 static struct kvm_shared_msrs __percpu *shared_msrs;
 146
 147 struct kvm_stats_debugfs_item debugfs_entries[] = {
 148         { "pf_fixed", VCPU_STAT(pf_fixed) },
 149         { "pf_guest", VCPU_STAT(pf_guest) },
 150         { "tlb_flush", VCPU_STAT(tlb_flush) },
 151         { "invlpg", VCPU_STAT(invlpg) },
 152         { "exits", VCPU_STAT(exits) },
 153         { "io_exits", VCPU_STAT(io_exits) },
 154         { "mmio_exits", VCPU_STAT(mmio_exits) },
 155         { "signal_exits", VCPU_STAT(signal_exits) },
 156         { "irq_window", VCPU_STAT(irq_window_exits) },
 157         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 158         { "halt_exits", VCPU_STAT(halt_exits) },
 159         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 160         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 161         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 162         { "hypercalls", VCPU_STAT(hypercalls) },
 163         { "request_irq", VCPU_STAT(request_irq_exits) },
 164         { "irq_exits", VCPU_STAT(irq_exits) },
 165         { "host_state_reload", VCPU_STAT(host_state_reload) },
 166         { "efer_reload", VCPU_STAT(efer_reload) },
 167         { "fpu_reload", VCPU_STAT(fpu_reload) },
 168         { "insn_emulation", VCPU_STAT(insn_emulation) },
 169         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 170         { "irq_injections", VCPU_STAT(irq_injections) },
 171         { "nmi_injections", VCPU_STAT(nmi_injections) },
 172         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 173         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 174         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 175         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 176         { "mmu_flooded", VM_STAT(mmu_flooded) },
 177         { "mmu_recycled", VM_STAT(mmu_recycled) },
 178         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 179         { "mmu_unsync", VM_STAT(mmu_unsync) },
 180         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 181         { "largepages", VM_STAT(lpages) },
 182         { NULL }
 183 };
 184
 185 u64 __read_mostly host_xcr0;
 186
 187 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 188
 189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 190 {
 191         int i;
 192         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 193                 vcpu->arch.apf.gfns[i] = ~0;
 194 }
 195
 196 static void kvm_on_user_return(struct user_return_notifier *urn)
 197 {
 198         unsigned slot;
 199         struct kvm_shared_msrs *locals
 200                 = container_of(urn, struct kvm_shared_msrs, urn);
 201         struct kvm_shared_msr_values *values;
 202
 203         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 204                 values = &locals->values[slot];
 205                 if (values->host != values->curr) {
 206                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 207                         values->curr = values->host;
 208                 }
 209         }
 210         locals->registered = false;
 211         user_return_notifier_unregister(urn);
 212 }
 213
 214 static void shared_msr_update(unsigned slot, u32 msr)
 215 {
 216         u64 value;
 217         unsigned int cpu = smp_processor_id();
 218         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 219
 220         /* only read, and nobody should modify it at this time,
 221          * so don't need lock */
 222         if (slot >= shared_msrs_global.nr) {
 223                 printk(KERN_ERR "kvm: invalid MSR slot!");
 224                 return;
 225         }
 226         rdmsrl_safe(msr, &value);
 227         smsr->values[slot].host = value;
 228         smsr->values[slot].curr = value;
 229 }
 230
 231 void kvm_define_shared_msr(unsigned slot, u32 msr)
 232 {
 233         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 234         shared_msrs_global.msrs[slot] = msr;
 235         if (slot >= shared_msrs_global.nr)
 236                 shared_msrs_global.nr = slot + 1;
 237 }
 238 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 239
 240 static void kvm_shared_msr_cpu_online(void)
 241 {
 242         unsigned i;
 243
 244         for (i = 0; i < shared_msrs_global.nr; ++i)
 245                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 246 }
 247
 248 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 249 {
 250         unsigned int cpu = smp_processor_id();
 251         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 252         int err;
 253
 254         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 255                 return 0;
 256         smsr->values[slot].curr = value;
 257         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 258         if (err)
 259                 return 1;
 260
 261         if (!smsr->registered) {
 262                 smsr->urn.on_user_return = kvm_on_user_return;
 263                 user_return_notifier_register(&smsr->urn);
 264                 smsr->registered = true;
 265         }
 266         return 0;
 267 }
 268 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 269
 270 static void drop_user_return_notifiers(void)
 271 {
 272         unsigned int cpu = smp_processor_id();
 273         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 274
 275         if (smsr->registered)
 276                 kvm_on_user_return(&smsr->urn);
 277 }
 278
 279 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 280 {
 281         return vcpu->arch.apic_base;
 282 }
 283 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 284
 285 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 286 {
 287         u64 old_state = vcpu->arch.apic_base &
 288                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 289         u64 new_state = msr_info->data &
 290                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 291         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 292                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 293
 294         if (!msr_info->host_initiated &&
 295             ((msr_info->data & reserved_bits) != 0 ||
 296              new_state == X2APIC_ENABLE ||
 297              (new_state == MSR_IA32_APICBASE_ENABLE &&
 298               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 299              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 300               old_state == 0)))
 301                 return 1;
 302
 303         kvm_lapic_set_base(vcpu, msr_info->data);
 304         return 0;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 307
 308 asmlinkage __visible void kvm_spurious_fault(void)
 309 {
 310         /* Fault while not rebooting.  We want the trace. */
 311         BUG();
 312 }
 313 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 314
 315 #define EXCPT_BENIGN            0
 316 #define EXCPT_CONTRIBUTORY      1
 317 #define EXCPT_PF                2
 318
 319 static int exception_class(int vector)
 320 {
 321         switch (vector) {
 322         case PF_VECTOR:
 323                 return EXCPT_PF;
 324         case DE_VECTOR:
 325         case TS_VECTOR:
 326         case NP_VECTOR:
 327         case SS_VECTOR:
 328         case GP_VECTOR:
 329                 return EXCPT_CONTRIBUTORY;
 330         default:
 331                 break;
 332         }
 333         return EXCPT_BENIGN;
 334 }
 335
 336 #define EXCPT_FAULT             0
 337 #define EXCPT_TRAP              1
 338 #define EXCPT_ABORT             2
 339 #define EXCPT_INTERRUPT         3
 340
 341 static int exception_type(int vector)
 342 {
 343         unsigned int mask;
 344
 345         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 346                 return EXCPT_INTERRUPT;
 347
 348         mask = 1 << vector;
 349
 350         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 351         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 352                 return EXCPT_TRAP;
 353
 354         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 355                 return EXCPT_ABORT;
 356
 357         /* Reserved exceptions will result in fault */
 358         return EXCPT_FAULT;
 359 }
 360
 361 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 362                 unsigned nr, bool has_error, u32 error_code,
 363                 bool reinject)
 364 {
 365         u32 prev_nr;
 366         int class1, class2;
 367
 368         kvm_make_request(KVM_REQ_EVENT, vcpu);
 369
 370         if (!vcpu->arch.exception.pending) {
 371         queue:
 372                 if (has_error && !is_protmode(vcpu))
 373                         has_error = false;
 374                 vcpu->arch.exception.pending = true;
 375                 vcpu->arch.exception.has_error_code = has_error;
 376                 vcpu->arch.exception.nr = nr;
 377                 vcpu->arch.exception.error_code = error_code;
 378                 vcpu->arch.exception.reinject = reinject;
 379                 return;
 380         }
 381
 382         /* to check exception */
 383         prev_nr = vcpu->arch.exception.nr;
 384         if (prev_nr == DF_VECTOR) {
 385                 /* triple fault -> shutdown */
 386                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 387                 return;
 388         }
 389         class1 = exception_class(prev_nr);
 390         class2 = exception_class(nr);
 391         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 392                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 393                 /* generate double fault per SDM Table 5-5 */
 394                 vcpu->arch.exception.pending = true;
 395                 vcpu->arch.exception.has_error_code = true;
 396                 vcpu->arch.exception.nr = DF_VECTOR;
 397                 vcpu->arch.exception.error_code = 0;
 398         } else
 399                 /* replace previous exception with a new one in a hope
 400                    that instruction re-execution will regenerate lost
 401                    exception */
 402                 goto queue;
 403 }
 404
 405 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 406 {
 407         kvm_multiple_exception(vcpu, nr, false, 0, false);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 410
 411 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 412 {
 413         kvm_multiple_exception(vcpu, nr, false, 0, true);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 416
 417 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 418 {
 419         if (err)
 420                 kvm_inject_gp(vcpu, 0);
 421         else
 422                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 425
 426 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 427 {
 428         ++vcpu->stat.pf_guest;
 429         vcpu->arch.cr2 = fault->address;
 430         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 433
 434 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 435 {
 436         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 437                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 438         else
 439                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 440
 441         return fault->nested_page_fault;
 442 }
 443
 444 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 445 {
 446         atomic_inc(&vcpu->arch.nmi_queued);
 447         kvm_make_request(KVM_REQ_NMI, vcpu);
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 450
 451 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 452 {
 453         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 454 }
 455 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 456
 457 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 458 {
 459         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 462
 463 /*
 464  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 465  * a #GP and return false.
 466  */
 467 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 468 {
 469         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 470                 return true;
 471         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 472         return false;
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 475
 476 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 477 {
 478         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 479                 return true;
 480
 481         kvm_queue_exception(vcpu, UD_VECTOR);
 482         return false;
 483 }
 484 EXPORT_SYMBOL_GPL(kvm_require_dr);
 485
 486 /*
 487  * This function will be used to read from the physical memory of the currently
 488  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 489  * can read from guest physical or from the guest's guest physical memory.
 490  */
 491 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 492                             gfn_t ngfn, void *data, int offset, int len,
 493                             u32 access)
 494 {
 495         struct x86_exception exception;
 496         gfn_t real_gfn;
 497         gpa_t ngpa;
 498
 499         ngpa     = gfn_to_gpa(ngfn);
 500         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 501         if (real_gfn == UNMAPPED_GVA)
 502                 return -EFAULT;
 503
 504         real_gfn = gpa_to_gfn(real_gfn);
 505
 506         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 507 }
 508 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 509
 510 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 511                                void *data, int offset, int len, u32 access)
 512 {
 513         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 514                                        data, offset, len, access);
 515 }
 516
 517 /*
 518  * Load the pae pdptrs.  Return true is they are all valid.
 519  */
 520 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 521 {
 522         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 523         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 524         int i;
 525         int ret;
 526         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 527
 528         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 529                                       offset * sizeof(u64), sizeof(pdpte),
 530                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 531         if (ret < 0) {
 532                 ret = 0;
 533                 goto out;
 534         }
 535         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 536                 if (is_present_gpte(pdpte[i]) &&
 537                     (pdpte[i] &
 538                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 539                         ret = 0;
 540                         goto out;
 541                 }
 542         }
 543         ret = 1;
 544
 545         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 546         __set_bit(VCPU_EXREG_PDPTR,
 547                   (unsigned long *)&vcpu->arch.regs_avail);
 548         __set_bit(VCPU_EXREG_PDPTR,
 549                   (unsigned long *)&vcpu->arch.regs_dirty);
 550 out:
 551
 552         return ret;
 553 }
 554 EXPORT_SYMBOL_GPL(load_pdptrs);
 555
 556 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 557 {
 558         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 559         bool changed = true;
 560         int offset;
 561         gfn_t gfn;
 562         int r;
 563
 564         if (is_long_mode(vcpu) || !is_pae(vcpu))
 565                 return false;
 566
 567         if (!test_bit(VCPU_EXREG_PDPTR,
 568                       (unsigned long *)&vcpu->arch.regs_avail))
 569                 return true;
 570
 571         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 572         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 573         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 574                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 575         if (r < 0)
 576                 goto out;
 577         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 578 out:
 579
 580         return changed;
 581 }
 582
 583 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 584 {
 585         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 586         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 587
 588         cr0 |= X86_CR0_ET;
 589
 590 #ifdef CONFIG_X86_64
 591         if (cr0 & 0xffffffff00000000UL)
 592                 return 1;
 593 #endif
 594
 595         cr0 &= ~CR0_RESERVED_BITS;
 596
 597         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 598                 return 1;
 599
 600         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 601                 return 1;
 602
 603         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 604 #ifdef CONFIG_X86_64
 605                 if ((vcpu->arch.efer & EFER_LME)) {
 606                         int cs_db, cs_l;
 607
 608                         if (!is_pae(vcpu))
 609                                 return 1;
 610                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 611                         if (cs_l)
 612                                 return 1;
 613                 } else
 614 #endif
 615                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 616                                                  kvm_read_cr3(vcpu)))
 617                         return 1;
 618         }
 619
 620         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 621                 return 1;
 622
 623         kvm_x86_ops->set_cr0(vcpu, cr0);
 624
 625         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 626                 kvm_clear_async_pf_completion_queue(vcpu);
 627                 kvm_async_pf_hash_reset(vcpu);
 628         }
 629
 630         if ((cr0 ^ old_cr0) & update_bits)
 631                 kvm_mmu_reset_context(vcpu);
 632
 633         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 634             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 635             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 636                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 637
 638         return 0;
 639 }
 640 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 641
 642 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 643 {
 644         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 645 }
 646 EXPORT_SYMBOL_GPL(kvm_lmsw);
 647
 648 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 649 {
 650         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 651                         !vcpu->guest_xcr0_loaded) {
 652                 /* kvm_set_xcr() also depends on this */
 653                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 654                 vcpu->guest_xcr0_loaded = 1;
 655         }
 656 }
 657
 658 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 659 {
 660         if (vcpu->guest_xcr0_loaded) {
 661                 if (vcpu->arch.xcr0 != host_xcr0)
 662                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 663                 vcpu->guest_xcr0_loaded = 0;
 664         }
 665 }
 666
 667 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 668 {
 669         u64 xcr0 = xcr;
 670         u64 old_xcr0 = vcpu->arch.xcr0;
 671         u64 valid_bits;
 672
 673         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 674         if (index != XCR_XFEATURE_ENABLED_MASK)
 675                 return 1;
 676         if (!(xcr0 & XFEATURE_MASK_FP))
 677                 return 1;
 678         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 679                 return 1;
 680
 681         /*
 682          * Do not allow the guest to set bits that we do not support
 683          * saving.  However, xcr0 bit 0 is always set, even if the
 684          * emulated CPU does not support XSAVE (see fx_init).
 685          */
 686         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 687         if (xcr0 & ~valid_bits)
 688                 return 1;
 689
 690         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 691             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 692                 return 1;
 693
 694         if (xcr0 & XFEATURE_MASK_AVX512) {
 695                 if (!(xcr0 & XFEATURE_MASK_YMM))
 696                         return 1;
 697                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 698                         return 1;
 699         }
 700         vcpu->arch.xcr0 = xcr0;
 701
 702         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 703                 kvm_update_cpuid(vcpu);
 704         return 0;
 705 }
 706
 707 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 708 {
 709         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 710             __kvm_set_xcr(vcpu, index, xcr)) {
 711                 kvm_inject_gp(vcpu, 0);
 712                 return 1;
 713         }
 714         return 0;
 715 }
 716 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 717
 718 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 719 {
 720         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 721         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 722                                    X86_CR4_SMEP | X86_CR4_SMAP;
 723
 724         if (cr4 & CR4_RESERVED_BITS)
 725                 return 1;
 726
 727         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 728                 return 1;
 729
 730         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 731                 return 1;
 732
 733         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 734                 return 1;
 735
 736         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 737                 return 1;
 738
 739         if (is_long_mode(vcpu)) {
 740                 if (!(cr4 & X86_CR4_PAE))
 741                         return 1;
 742         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 743                    && ((cr4 ^ old_cr4) & pdptr_bits)
 744                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 745                                    kvm_read_cr3(vcpu)))
 746                 return 1;
 747
 748         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 749                 if (!guest_cpuid_has_pcid(vcpu))
 750                         return 1;
 751
 752                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 753                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 754                         return 1;
 755         }
 756
 757         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 758                 return 1;
 759
 760         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 761             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 762                 kvm_mmu_reset_context(vcpu);
 763
 764         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 765                 kvm_update_cpuid(vcpu);
 766
 767         return 0;
 768 }
 769 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 770
 771 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 772 {
 773 #ifdef CONFIG_X86_64
 774         cr3 &= ~CR3_PCID_INVD;
 775 #endif
 776
 777         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 778                 kvm_mmu_sync_roots(vcpu);
 779                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 780                 return 0;
 781         }
 782
 783         if (is_long_mode(vcpu)) {
 784                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 785                         return 1;
 786         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 787                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 788                 return 1;
 789
 790         vcpu->arch.cr3 = cr3;
 791         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 792         kvm_mmu_new_cr3(vcpu);
 793         return 0;
 794 }
 795 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 796
 797 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 798 {
 799         if (cr8 & CR8_RESERVED_BITS)
 800                 return 1;
 801         if (lapic_in_kernel(vcpu))
 802                 kvm_lapic_set_tpr(vcpu, cr8);
 803         else
 804                 vcpu->arch.cr8 = cr8;
 805         return 0;
 806 }
 807 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 808
 809 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 810 {
 811         if (lapic_in_kernel(vcpu))
 812                 return kvm_lapic_get_cr8(vcpu);
 813         else
 814                 return vcpu->arch.cr8;
 815 }
 816 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 817
 818 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 819 {
 820         int i;
 821
 822         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 823                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 824                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 825                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 826         }
 827 }
 828
 829 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 830 {
 831         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 832                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 833 }
 834
 835 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 836 {
 837         unsigned long dr7;
 838
 839         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 840                 dr7 = vcpu->arch.guest_debug_dr7;
 841         else
 842                 dr7 = vcpu->arch.dr7;
 843         kvm_x86_ops->set_dr7(vcpu, dr7);
 844         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 845         if (dr7 & DR7_BP_EN_MASK)
 846                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 847 }
 848
 849 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 850 {
 851         u64 fixed = DR6_FIXED_1;
 852
 853         if (!guest_cpuid_has_rtm(vcpu))
 854                 fixed |= DR6_RTM;
 855         return fixed;
 856 }
 857
 858 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 859 {
 860         switch (dr) {
 861         case 0 ... 3:
 862                 vcpu->arch.db[dr] = val;
 863                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 864                         vcpu->arch.eff_db[dr] = val;
 865                 break;
 866         case 4:
 867                 /* fall through */
 868         case 6:
 869                 if (val & 0xffffffff00000000ULL)
 870                         return -1; /* #GP */
 871                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 872                 kvm_update_dr6(vcpu);
 873                 break;
 874         case 5:
 875                 /* fall through */
 876         default: /* 7 */
 877                 if (val & 0xffffffff00000000ULL)
 878                         return -1; /* #GP */
 879                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 880                 kvm_update_dr7(vcpu);
 881                 break;
 882         }
 883
 884         return 0;
 885 }
 886
 887 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 888 {
 889         if (__kvm_set_dr(vcpu, dr, val)) {
 890                 kvm_inject_gp(vcpu, 0);
 891                 return 1;
 892         }
 893         return 0;
 894 }
 895 EXPORT_SYMBOL_GPL(kvm_set_dr);
 896
 897 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 898 {
 899         switch (dr) {
 900         case 0 ... 3:
 901                 *val = vcpu->arch.db[dr];
 902                 break;
 903         case 4:
 904                 /* fall through */
 905         case 6:
 906                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 907                         *val = vcpu->arch.dr6;
 908                 else
 909                         *val = kvm_x86_ops->get_dr6(vcpu);
 910                 break;
 911         case 5:
 912                 /* fall through */
 913         default: /* 7 */
 914                 *val = vcpu->arch.dr7;
 915                 break;
 916         }
 917         return 0;
 918 }
 919 EXPORT_SYMBOL_GPL(kvm_get_dr);
 920
 921 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 922 {
 923         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 924         u64 data;
 925         int err;
 926
 927         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 928         if (err)
 929                 return err;
 930         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 931         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 932         return err;
 933 }
 934 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 935
 936 /*
 937  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 938  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 939  *
 940  * This list is modified at module load time to reflect the
 941  * capabilities of the host cpu. This capabilities test skips MSRs that are
 942  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 943  * may depend on host virtualization features rather than host cpu features.
 944  */
 945
 946 static u32 msrs_to_save[] = {
 947         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 948         MSR_STAR,
 949 #ifdef CONFIG_X86_64
 950         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 951 #endif
 952         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 953         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 954 };
 955
 956 static unsigned num_msrs_to_save;
 957
 958 static u32 emulated_msrs[] = {
 959         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 960         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 961         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 962         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 963         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 964         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 965         HV_X64_MSR_RESET,
 966         HV_X64_MSR_VP_INDEX,
 967         HV_X64_MSR_VP_RUNTIME,
 968         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 969         MSR_KVM_PV_EOI_EN,
 970
 971         MSR_IA32_TSC_ADJUST,
 972         MSR_IA32_TSCDEADLINE,
 973         MSR_IA32_MISC_ENABLE,
 974         MSR_IA32_MCG_STATUS,
 975         MSR_IA32_MCG_CTL,
 976         MSR_IA32_SMBASE,
 977 };
 978
 979 static unsigned num_emulated_msrs;
 980
 981 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 982 {
 983         if (efer & efer_reserved_bits)
 984                 return false;
 985
 986         if (efer & EFER_FFXSR) {
 987                 struct kvm_cpuid_entry2 *feat;
 988
 989                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 990                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 991                         return false;
 992         }
 993
 994         if (efer & EFER_SVME) {
 995                 struct kvm_cpuid_entry2 *feat;
 996
 997                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 998                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 999                         return false;
1000         }
1001
1002         return true;
1003 }
1004 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1005
1006 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1007 {
1008         u64 old_efer = vcpu->arch.efer;
1009
1010         if (!kvm_valid_efer(vcpu, efer))
1011                 return 1;
1012
1013         if (is_paging(vcpu)
1014             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1015                 return 1;
1016
1017         efer &= ~EFER_LMA;
1018         efer |= vcpu->arch.efer & EFER_LMA;
1019
1020         kvm_x86_ops->set_efer(vcpu, efer);
1021
1022         /* Update reserved bits */
1023         if ((efer ^ old_efer) & EFER_NX)
1024                 kvm_mmu_reset_context(vcpu);
1025
1026         return 0;
1027 }
1028
1029 void kvm_enable_efer_bits(u64 mask)
1030 {
1031        efer_reserved_bits &= ~mask;
1032 }
1033 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1034
1035 /*
1036  * Writes msr value into into the appropriate "register".
1037  * Returns 0 on success, non-0 otherwise.
1038  * Assumes vcpu_load() was already called.
1039  */
1040 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1041 {
1042         switch (msr->index) {
1043         case MSR_FS_BASE:
1044         case MSR_GS_BASE:
1045         case MSR_KERNEL_GS_BASE:
1046         case MSR_CSTAR:
1047         case MSR_LSTAR:
1048                 if (is_noncanonical_address(msr->data))
1049                         return 1;
1050                 break;
1051         case MSR_IA32_SYSENTER_EIP:
1052         case MSR_IA32_SYSENTER_ESP:
1053                 /*
1054                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1055                  * non-canonical address is written on Intel but not on
1056                  * AMD (which ignores the top 32-bits, because it does
1057                  * not implement 64-bit SYSENTER).
1058                  *
1059                  * 64-bit code should hence be able to write a non-canonical
1060                  * value on AMD.  Making the address canonical ensures that
1061                  * vmentry does not fail on Intel after writing a non-canonical
1062                  * value, and that something deterministic happens if the guest
1063                  * invokes 64-bit SYSENTER.
1064                  */
1065                 msr->data = get_canonical(msr->data);
1066         }
1067         return kvm_x86_ops->set_msr(vcpu, msr);
1068 }
1069 EXPORT_SYMBOL_GPL(kvm_set_msr);
1070
1071 /*
1072  * Adapt set_msr() to msr_io()'s calling convention
1073  */
1074 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1075 {
1076         struct msr_data msr;
1077         int r;
1078
1079         msr.index = index;
1080         msr.host_initiated = true;
1081         r = kvm_get_msr(vcpu, &msr);
1082         if (r)
1083                 return r;
1084
1085         *data = msr.data;
1086         return 0;
1087 }
1088
1089 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1090 {
1091         struct msr_data msr;
1092
1093         msr.data = *data;
1094         msr.index = index;
1095         msr.host_initiated = true;
1096         return kvm_set_msr(vcpu, &msr);
1097 }
1098
1099 #ifdef CONFIG_X86_64
1100 struct pvclock_gtod_data {
1101         seqcount_t      seq;
1102
1103         struct { /* extract of a clocksource struct */
1104                 int vclock_mode;
1105                 cycle_t cycle_last;
1106                 cycle_t mask;
1107                 u32     mult;
1108                 u32     shift;
1109         } clock;
1110
1111         u64             boot_ns;
1112         u64             nsec_base;
1113 };
1114
1115 static struct pvclock_gtod_data pvclock_gtod_data;
1116
1117 static void update_pvclock_gtod(struct timekeeper *tk)
1118 {
1119         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1120         u64 boot_ns;
1121
1122         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1123
1124         write_seqcount_begin(&vdata->seq);
1125
1126         /* copy pvclock gtod data */
1127         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1128         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1129         vdata->clock.mask               = tk->tkr_mono.mask;
1130         vdata->clock.mult               = tk->tkr_mono.mult;
1131         vdata->clock.shift              = tk->tkr_mono.shift;
1132
1133         vdata->boot_ns                  = boot_ns;
1134         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1135
1136         write_seqcount_end(&vdata->seq);
1137 }
1138 #endif
1139
1140 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1141 {
1142         /*
1143          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1144          * vcpu_enter_guest.  This function is only called from
1145          * the physical CPU that is running vcpu.
1146          */
1147         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1148 }
1149
1150 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1151 {
1152         int version;
1153         int r;
1154         struct pvclock_wall_clock wc;
1155         struct timespec boot;
1156
1157         if (!wall_clock)
1158                 return;
1159
1160         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1161         if (r)
1162                 return;
1163
1164         if (version & 1)
1165                 ++version;  /* first time write, random junk */
1166
1167         ++version;
1168
1169         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1170
1171         /*
1172          * The guest calculates current wall clock time by adding
1173          * system time (updated by kvm_guest_time_update below) to the
1174          * wall clock specified here.  guest system time equals host
1175          * system time for us, thus we must fill in host boot time here.
1176          */
1177         getboottime(&boot);
1178
1179         if (kvm->arch.kvmclock_offset) {
1180                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1181                 boot = timespec_sub(boot, ts);
1182         }
1183         wc.sec = boot.tv_sec;
1184         wc.nsec = boot.tv_nsec;
1185         wc.version = version;
1186
1187         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1188
1189         version++;
1190         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1191 }
1192
1193 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1194 {
1195         uint32_t quotient, remainder;
1196
1197         /* Don't try to replace with do_div(), this one calculates
1198          * "(dividend << 32) / divisor" */
1199         __asm__ ( "divl %4"
1200                   : "=a" (quotient), "=d" (remainder)
1201                   : "0" (0), "1" (dividend), "r" (divisor) );
1202         return quotient;
1203 }
1204
1205 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1206                                s8 *pshift, u32 *pmultiplier)
1207 {
1208         uint64_t scaled64;
1209         int32_t  shift = 0;
1210         uint64_t tps64;
1211         uint32_t tps32;
1212
1213         tps64 = base_khz * 1000LL;
1214         scaled64 = scaled_khz * 1000LL;
1215         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1216                 tps64 >>= 1;
1217                 shift--;
1218         }
1219
1220         tps32 = (uint32_t)tps64;
1221         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1222                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1223                         scaled64 >>= 1;
1224                 else
1225                         tps32 <<= 1;
1226                 shift++;
1227         }
1228
1229         *pshift = shift;
1230         *pmultiplier = div_frac(scaled64, tps32);
1231
1232         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1233                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1234 }
1235
1236 #ifdef CONFIG_X86_64
1237 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1238 #endif
1239
1240 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1241 static unsigned long max_tsc_khz;
1242
1243 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1244 {
1245         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1246                                    vcpu->arch.virtual_tsc_shift);
1247 }
1248
1249 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1250 {
1251         u64 v = (u64)khz * (1000000 + ppm);
1252         do_div(v, 1000000);
1253         return v;
1254 }
1255
1256 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1257 {
1258         u64 ratio;
1259
1260         /* Guest TSC same frequency as host TSC? */
1261         if (!scale) {
1262                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1263                 return 0;
1264         }
1265
1266         /* TSC scaling supported? */
1267         if (!kvm_has_tsc_control) {
1268                 if (user_tsc_khz > tsc_khz) {
1269                         vcpu->arch.tsc_catchup = 1;
1270                         vcpu->arch.tsc_always_catchup = 1;
1271                         return 0;
1272                 } else {
1273                         WARN(1, "user requested TSC rate below hardware speed\n");
1274                         return -1;
1275                 }
1276         }
1277
1278         /* TSC scaling required  - calculate ratio */
1279         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1280                                 user_tsc_khz, tsc_khz);
1281
1282         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1283                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1284                           user_tsc_khz);
1285                 return -1;
1286         }
1287
1288         vcpu->arch.tsc_scaling_ratio = ratio;
1289         return 0;
1290 }
1291
1292 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1293 {
1294         u32 thresh_lo, thresh_hi;
1295         int use_scaling = 0;
1296
1297         /* tsc_khz can be zero if TSC calibration fails */
1298         if (this_tsc_khz == 0) {
1299                 /* set tsc_scaling_ratio to a safe value */
1300                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1301                 return -1;
1302         }
1303
1304         /* Compute a scale to convert nanoseconds in TSC cycles */
1305         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1306                            &vcpu->arch.virtual_tsc_shift,
1307                            &vcpu->arch.virtual_tsc_mult);
1308         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1309
1310         /*
1311          * Compute the variation in TSC rate which is acceptable
1312          * within the range of tolerance and decide if the
1313          * rate being applied is within that bounds of the hardware
1314          * rate.  If so, no scaling or compensation need be done.
1315          */
1316         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1317         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1318         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1319                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1320                 use_scaling = 1;
1321         }
1322         return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1323 }
1324
1325 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1326 {
1327         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1328                                       vcpu->arch.virtual_tsc_mult,
1329                                       vcpu->arch.virtual_tsc_shift);
1330         tsc += vcpu->arch.this_tsc_write;
1331         return tsc;
1332 }
1333
1334 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1335 {
1336 #ifdef CONFIG_X86_64
1337         bool vcpus_matched;
1338         struct kvm_arch *ka = &vcpu->kvm->arch;
1339         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1340
1341         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1342                          atomic_read(&vcpu->kvm->online_vcpus));
1343
1344         /*
1345          * Once the masterclock is enabled, always perform request in
1346          * order to update it.
1347          *
1348          * In order to enable masterclock, the host clocksource must be TSC
1349          * and the vcpus need to have matched TSCs.  When that happens,
1350          * perform request to enable masterclock.
1351          */
1352         if (ka->use_master_clock ||
1353             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1354                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1355
1356         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1357                             atomic_read(&vcpu->kvm->online_vcpus),
1358                             ka->use_master_clock, gtod->clock.vclock_mode);
1359 #endif
1360 }
1361
1362 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1363 {
1364         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1365         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1366 }
1367
1368 /*
1369  * Multiply tsc by a fixed point number represented by ratio.
1370  *
1371  * The most significant 64-N bits (mult) of ratio represent the
1372  * integral part of the fixed point number; the remaining N bits
1373  * (frac) represent the fractional part, ie. ratio represents a fixed
1374  * point number (mult + frac * 2^(-N)).
1375  *
1376  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1377  */
1378 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1379 {
1380         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1381 }
1382
1383 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1384 {
1385         u64 _tsc = tsc;
1386         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1387
1388         if (ratio != kvm_default_tsc_scaling_ratio)
1389                 _tsc = __scale_tsc(ratio, tsc);
1390
1391         return _tsc;
1392 }
1393 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1394
1395 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1396 {
1397         u64 tsc;
1398
1399         tsc = kvm_scale_tsc(vcpu, rdtsc());
1400
1401         return target_tsc - tsc;
1402 }
1403
1404 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1405 {
1406         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1407 }
1408 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1409
1410 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1411 {
1412         struct kvm *kvm = vcpu->kvm;
1413         u64 offset, ns, elapsed;
1414         unsigned long flags;
1415         s64 usdiff;
1416         bool matched;
1417         bool already_matched;
1418         u64 data = msr->data;
1419
1420         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1421         offset = kvm_compute_tsc_offset(vcpu, data);
1422         ns = get_kernel_ns();
1423         elapsed = ns - kvm->arch.last_tsc_nsec;
1424
1425         if (vcpu->arch.virtual_tsc_khz) {
1426                 int faulted = 0;
1427
1428                 /* n.b - signed multiplication and division required */
1429                 usdiff = data - kvm->arch.last_tsc_write;
1430 #ifdef CONFIG_X86_64
1431                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1432 #else
1433                 /* do_div() only does unsigned */
1434                 asm("1: idivl %[divisor]\n"
1435                     "2: xor %%edx, %%edx\n"
1436                     "   movl $0, %[faulted]\n"
1437                     "3:\n"
1438                     ".section .fixup,\"ax\"\n"
1439                     "4: movl $1, %[faulted]\n"
1440                     "   jmp  3b\n"
1441                     ".previous\n"
1442
1443                 _ASM_EXTABLE(1b, 4b)
1444
1445                 : "=A"(usdiff), [faulted] "=r" (faulted)
1446                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1447
1448 #endif
1449                 do_div(elapsed, 1000);
1450                 usdiff -= elapsed;
1451                 if (usdiff < 0)
1452                         usdiff = -usdiff;
1453
1454                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1455                 if (faulted)
1456                         usdiff = USEC_PER_SEC;
1457         } else
1458                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1459
1460         /*
1461          * Special case: TSC write with a small delta (1 second) of virtual
1462          * cycle time against real time is interpreted as an attempt to
1463          * synchronize the CPU.
1464          *
1465          * For a reliable TSC, we can match TSC offsets, and for an unstable
1466          * TSC, we add elapsed time in this computation.  We could let the
1467          * compensation code attempt to catch up if we fall behind, but
1468          * it's better to try to match offsets from the beginning.
1469          */
1470         if (usdiff < USEC_PER_SEC &&
1471             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1472                 if (!check_tsc_unstable()) {
1473                         offset = kvm->arch.cur_tsc_offset;
1474                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1475                 } else {
1476                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1477                         data += delta;
1478                         offset = kvm_compute_tsc_offset(vcpu, data);
1479                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1480                 }
1481                 matched = true;
1482                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1483         } else {
1484                 /*
1485                  * We split periods of matched TSC writes into generations.
1486                  * For each generation, we track the original measured
1487                  * nanosecond time, offset, and write, so if TSCs are in
1488                  * sync, we can match exact offset, and if not, we can match
1489                  * exact software computation in compute_guest_tsc()
1490                  *
1491                  * These values are tracked in kvm->arch.cur_xxx variables.
1492                  */
1493                 kvm->arch.cur_tsc_generation++;
1494                 kvm->arch.cur_tsc_nsec = ns;
1495                 kvm->arch.cur_tsc_write = data;
1496                 kvm->arch.cur_tsc_offset = offset;
1497                 matched = false;
1498                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1499                          kvm->arch.cur_tsc_generation, data);
1500         }
1501
1502         /*
1503          * We also track th most recent recorded KHZ, write and time to
1504          * allow the matching interval to be extended at each write.
1505          */
1506         kvm->arch.last_tsc_nsec = ns;
1507         kvm->arch.last_tsc_write = data;
1508         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1509
1510         vcpu->arch.last_guest_tsc = data;
1511
1512         /* Keep track of which generation this VCPU has synchronized to */
1513         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1514         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1515         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1516
1517         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1518                 update_ia32_tsc_adjust_msr(vcpu, offset);
1519         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1520         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1521
1522         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1523         if (!matched) {
1524                 kvm->arch.nr_vcpus_matched_tsc = 0;
1525         } else if (!already_matched) {
1526                 kvm->arch.nr_vcpus_matched_tsc++;
1527         }
1528
1529         kvm_track_tsc_matching(vcpu);
1530         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1531 }
1532
1533 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1534
1535 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1536                                            s64 adjustment)
1537 {
1538         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1539 }
1540
1541 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1542 {
1543         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1544                 WARN_ON(adjustment < 0);
1545         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1546         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1547 }
1548
1549 #ifdef CONFIG_X86_64
1550
1551 static cycle_t read_tsc(void)
1552 {
1553         cycle_t ret = (cycle_t)rdtsc_ordered();
1554         u64 last = pvclock_gtod_data.clock.cycle_last;
1555
1556         if (likely(ret >= last))
1557                 return ret;
1558
1559         /*
1560          * GCC likes to generate cmov here, but this branch is extremely
1561          * predictable (it's just a funciton of time and the likely is
1562          * very likely) and there's a data dependence, so force GCC
1563          * to generate a branch instead.  I don't barrier() because
1564          * we don't actually need a barrier, and if this function
1565          * ever gets inlined it will generate worse code.
1566          */
1567         asm volatile ("");
1568         return last;
1569 }
1570
1571 static inline u64 vgettsc(cycle_t *cycle_now)
1572 {
1573         long v;
1574         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1575
1576         *cycle_now = read_tsc();
1577
1578         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1579         return v * gtod->clock.mult;
1580 }
1581
1582 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1583 {
1584         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1585         unsigned long seq;
1586         int mode;
1587         u64 ns;
1588
1589         do {
1590                 seq = read_seqcount_begin(&gtod->seq);
1591                 mode = gtod->clock.vclock_mode;
1592                 ns = gtod->nsec_base;
1593                 ns += vgettsc(cycle_now);
1594                 ns >>= gtod->clock.shift;
1595                 ns += gtod->boot_ns;
1596         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1597         *t = ns;
1598
1599         return mode;
1600 }
1601
1602 /* returns true if host is using tsc clocksource */
1603 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1604 {
1605         /* checked again under seqlock below */
1606         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1607                 return false;
1608
1609         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1610 }
1611 #endif
1612
1613 /*
1614  *
1615  * Assuming a stable TSC across physical CPUS, and a stable TSC
1616  * across virtual CPUs, the following condition is possible.
1617  * Each numbered line represents an event visible to both
1618  * CPUs at the next numbered event.
1619  *
1620  * "timespecX" represents host monotonic time. "tscX" represents
1621  * RDTSC value.
1622  *
1623  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1624  *
1625  * 1.  read timespec0,tsc0
1626  * 2.                                   | timespec1 = timespec0 + N
1627  *                                      | tsc1 = tsc0 + M
1628  * 3. transition to guest               | transition to guest
1629  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1630  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1631  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1632  *
1633  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1634  *
1635  *      - ret0 < ret1
1636  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1637  *              ...
1638  *      - 0 < N - M => M < N
1639  *
1640  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1641  * always the case (the difference between two distinct xtime instances
1642  * might be smaller then the difference between corresponding TSC reads,
1643  * when updating guest vcpus pvclock areas).
1644  *
1645  * To avoid that problem, do not allow visibility of distinct
1646  * system_timestamp/tsc_timestamp values simultaneously: use a master
1647  * copy of host monotonic time values. Update that master copy
1648  * in lockstep.
1649  *
1650  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1651  *
1652  */
1653
1654 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1655 {
1656 #ifdef CONFIG_X86_64
1657         struct kvm_arch *ka = &kvm->arch;
1658         int vclock_mode;
1659         bool host_tsc_clocksource, vcpus_matched;
1660
1661         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1662                         atomic_read(&kvm->online_vcpus));
1663
1664         /*
1665          * If the host uses TSC clock, then passthrough TSC as stable
1666          * to the guest.
1667          */
1668         host_tsc_clocksource = kvm_get_time_and_clockread(
1669                                         &ka->master_kernel_ns,
1670                                         &ka->master_cycle_now);
1671
1672         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1673                                 && !backwards_tsc_observed
1674                                 && !ka->boot_vcpu_runs_old_kvmclock;
1675
1676         if (ka->use_master_clock)
1677                 atomic_set(&kvm_guest_has_master_clock, 1);
1678
1679         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1680         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1681                                         vcpus_matched);
1682 #endif
1683 }
1684
1685 static void kvm_gen_update_masterclock(struct kvm *kvm)
1686 {
1687 #ifdef CONFIG_X86_64
1688         int i;
1689         struct kvm_vcpu *vcpu;
1690         struct kvm_arch *ka = &kvm->arch;
1691
1692         spin_lock(&ka->pvclock_gtod_sync_lock);
1693         kvm_make_mclock_inprogress_request(kvm);
1694         /* no guest entries from this point */
1695         pvclock_update_vm_gtod_copy(kvm);
1696
1697         kvm_for_each_vcpu(i, vcpu, kvm)
1698                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1699
1700         /* guest entries allowed */
1701         kvm_for_each_vcpu(i, vcpu, kvm)
1702                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1703
1704         spin_unlock(&ka->pvclock_gtod_sync_lock);
1705 #endif
1706 }
1707
1708 static int kvm_guest_time_update(struct kvm_vcpu *v)
1709 {
1710         unsigned long flags, this_tsc_khz, tgt_tsc_khz;
1711         struct kvm_vcpu_arch *vcpu = &v->arch;
1712         struct kvm_arch *ka = &v->kvm->arch;
1713         s64 kernel_ns;
1714         u64 tsc_timestamp, host_tsc;
1715         struct pvclock_vcpu_time_info guest_hv_clock;
1716         u8 pvclock_flags;
1717         bool use_master_clock;
1718
1719         kernel_ns = 0;
1720         host_tsc = 0;
1721
1722         /*
1723          * If the host uses TSC clock, then passthrough TSC as stable
1724          * to the guest.
1725          */
1726         spin_lock(&ka->pvclock_gtod_sync_lock);
1727         use_master_clock = ka->use_master_clock;
1728         if (use_master_clock) {
1729                 host_tsc = ka->master_cycle_now;
1730                 kernel_ns = ka->master_kernel_ns;
1731         }
1732         spin_unlock(&ka->pvclock_gtod_sync_lock);
1733
1734         /* Keep irq disabled to prevent changes to the clock */
1735         local_irq_save(flags);
1736         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1737         if (unlikely(this_tsc_khz == 0)) {
1738                 local_irq_restore(flags);
1739                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1740                 return 1;
1741         }
1742         if (!use_master_clock) {
1743                 host_tsc = rdtsc();
1744                 kernel_ns = get_kernel_ns();
1745         }
1746
1747         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1748
1749         /*
1750          * We may have to catch up the TSC to match elapsed wall clock
1751          * time for two reasons, even if kvmclock is used.
1752          *   1) CPU could have been running below the maximum TSC rate
1753          *   2) Broken TSC compensation resets the base at each VCPU
1754          *      entry to avoid unknown leaps of TSC even when running
1755          *      again on the same CPU.  This may cause apparent elapsed
1756          *      time to disappear, and the guest to stand still or run
1757          *      very slowly.
1758          */
1759         if (vcpu->tsc_catchup) {
1760                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1761                 if (tsc > tsc_timestamp) {
1762                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1763                         tsc_timestamp = tsc;
1764                 }
1765         }
1766
1767         local_irq_restore(flags);
1768
1769         if (!vcpu->pv_time_enabled)
1770                 return 0;
1771
1772         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1773                 tgt_tsc_khz = kvm_has_tsc_control ?
1774                         vcpu->virtual_tsc_khz : this_tsc_khz;
1775                 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1776                                    &vcpu->hv_clock.tsc_shift,
1777                                    &vcpu->hv_clock.tsc_to_system_mul);
1778                 vcpu->hw_tsc_khz = this_tsc_khz;
1779         }
1780
1781         /* With all the info we got, fill in the values */
1782         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1783         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1784         vcpu->last_guest_tsc = tsc_timestamp;
1785
1786         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1787                 &guest_hv_clock, sizeof(guest_hv_clock))))
1788                 return 0;
1789
1790         /* This VCPU is paused, but it's legal for a guest to read another
1791          * VCPU's kvmclock, so we really have to follow the specification where
1792          * it says that version is odd if data is being modified, and even after
1793          * it is consistent.
1794          *
1795          * Version field updates must be kept separate.  This is because
1796          * kvm_write_guest_cached might use a "rep movs" instruction, and
1797          * writes within a string instruction are weakly ordered.  So there
1798          * are three writes overall.
1799          *
1800          * As a small optimization, only write the version field in the first
1801          * and third write.  The vcpu->pv_time cache is still valid, because the
1802          * version field is the first in the struct.
1803          */
1804         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1805
1806         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1807         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1808                                 &vcpu->hv_clock,
1809                                 sizeof(vcpu->hv_clock.version));
1810
1811         smp_wmb();
1812
1813         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1814         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1815
1816         if (vcpu->pvclock_set_guest_stopped_request) {
1817                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1818                 vcpu->pvclock_set_guest_stopped_request = false;
1819         }
1820
1821         /* If the host uses TSC clocksource, then it is stable */
1822         if (use_master_clock)
1823                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1824
1825         vcpu->hv_clock.flags = pvclock_flags;
1826
1827         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1828
1829         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1830                                 &vcpu->hv_clock,
1831                                 sizeof(vcpu->hv_clock));
1832
1833         smp_wmb();
1834
1835         vcpu->hv_clock.version++;
1836         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1837                                 &vcpu->hv_clock,
1838                                 sizeof(vcpu->hv_clock.version));
1839         return 0;
1840 }
1841
1842 /*
1843  * kvmclock updates which are isolated to a given vcpu, such as
1844  * vcpu->cpu migration, should not allow system_timestamp from
1845  * the rest of the vcpus to remain static. Otherwise ntp frequency
1846  * correction applies to one vcpu's system_timestamp but not
1847  * the others.
1848  *
1849  * So in those cases, request a kvmclock update for all vcpus.
1850  * We need to rate-limit these requests though, as they can
1851  * considerably slow guests that have a large number of vcpus.
1852  * The time for a remote vcpu to update its kvmclock is bound
1853  * by the delay we use to rate-limit the updates.
1854  */
1855
1856 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1857
1858 static void kvmclock_update_fn(struct work_struct *work)
1859 {
1860         int i;
1861         struct delayed_work *dwork = to_delayed_work(work);
1862         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1863                                            kvmclock_update_work);
1864         struct kvm *kvm = container_of(ka, struct kvm, arch);
1865         struct kvm_vcpu *vcpu;
1866
1867         kvm_for_each_vcpu(i, vcpu, kvm) {
1868                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1869                 kvm_vcpu_kick(vcpu);
1870         }
1871 }
1872
1873 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1874 {
1875         struct kvm *kvm = v->kvm;
1876
1877         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1878         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1879                                         KVMCLOCK_UPDATE_DELAY);
1880 }
1881
1882 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1883
1884 static void kvmclock_sync_fn(struct work_struct *work)
1885 {
1886         struct delayed_work *dwork = to_delayed_work(work);
1887         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1888                                            kvmclock_sync_work);
1889         struct kvm *kvm = container_of(ka, struct kvm, arch);
1890
1891         if (!kvmclock_periodic_sync)
1892                 return;
1893
1894         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1895         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1896                                         KVMCLOCK_SYNC_PERIOD);
1897 }
1898
1899 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1900 {
1901         u64 mcg_cap = vcpu->arch.mcg_cap;
1902         unsigned bank_num = mcg_cap & 0xff;
1903
1904         switch (msr) {
1905         case MSR_IA32_MCG_STATUS:
1906                 vcpu->arch.mcg_status = data;
1907                 break;
1908         case MSR_IA32_MCG_CTL:
1909                 if (!(mcg_cap & MCG_CTL_P))
1910                         return 1;
1911                 if (data != 0 && data != ~(u64)0)
1912                         return -1;
1913                 vcpu->arch.mcg_ctl = data;
1914                 break;
1915         default:
1916                 if (msr >= MSR_IA32_MC0_CTL &&
1917                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1918                         u32 offset = msr - MSR_IA32_MC0_CTL;
1919                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1920                          * some Linux kernels though clear bit 10 in bank 4 to
1921                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1922                          * this to avoid an uncatched #GP in the guest
1923                          */
1924                         if ((offset & 0x3) == 0 &&
1925                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1926                                 return -1;
1927                         vcpu->arch.mce_banks[offset] = data;
1928                         break;
1929                 }
1930                 return 1;
1931         }
1932         return 0;
1933 }
1934
1935 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1936 {
1937         struct kvm *kvm = vcpu->kvm;
1938         int lm = is_long_mode(vcpu);
1939         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1940                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1941         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1942                 : kvm->arch.xen_hvm_config.blob_size_32;
1943         u32 page_num = data & ~PAGE_MASK;
1944         u64 page_addr = data & PAGE_MASK;
1945         u8 *page;
1946         int r;
1947
1948         r = -E2BIG;
1949         if (page_num >= blob_size)
1950                 goto out;
1951         r = -ENOMEM;
1952         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1953         if (IS_ERR(page)) {
1954                 r = PTR_ERR(page);
1955                 goto out;
1956         }
1957         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1958                 goto out_free;
1959         r = 0;
1960 out_free:
1961         kfree(page);
1962 out:
1963         return r;
1964 }
1965
1966 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1967 {
1968         gpa_t gpa = data & ~0x3f;
1969
1970         /* Bits 2:5 are reserved, Should be zero */
1971         if (data & 0x3c)
1972                 return 1;
1973
1974         vcpu->arch.apf.msr_val = data;
1975
1976         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1977                 kvm_clear_async_pf_completion_queue(vcpu);
1978                 kvm_async_pf_hash_reset(vcpu);
1979                 return 0;
1980         }
1981
1982         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1983                                         sizeof(u32)))
1984                 return 1;
1985
1986         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1987         kvm_async_pf_wakeup_all(vcpu);
1988         return 0;
1989 }
1990
1991 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1992 {
1993         vcpu->arch.pv_time_enabled = false;
1994 }
1995
1996 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1997 {
1998         u64 delta;
1999
2000         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2001                 return;
2002
2003         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2004         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2005         vcpu->arch.st.accum_steal = delta;
2006 }
2007
2008 static void record_steal_time(struct kvm_vcpu *vcpu)
2009 {
2010         accumulate_steal_time(vcpu);
2011
2012         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2013                 return;
2014
2015         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2016                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2017                 return;
2018
2019         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2020         vcpu->arch.st.steal.version += 2;
2021         vcpu->arch.st.accum_steal = 0;
2022
2023         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2024                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2025 }
2026
2027 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2028 {
2029         bool pr = false;
2030         u32 msr = msr_info->index;
2031         u64 data = msr_info->data;
2032
2033         switch (msr) {
2034         case MSR_AMD64_NB_CFG:
2035         case MSR_IA32_UCODE_REV:
2036         case MSR_IA32_UCODE_WRITE:
2037         case MSR_VM_HSAVE_PA:
2038         case MSR_AMD64_PATCH_LOADER:
2039         case MSR_AMD64_BU_CFG2:
2040                 break;
2041
2042         case MSR_EFER:
2043                 return set_efer(vcpu, data);
2044         case MSR_K7_HWCR:
2045                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2046                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2047                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2048                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2049                 if (data != 0) {
2050                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2051                                     data);
2052                         return 1;
2053                 }
2054                 break;
2055         case MSR_FAM10H_MMIO_CONF_BASE:
2056                 if (data != 0) {
2057                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2058                                     "0x%llx\n", data);
2059                         return 1;
2060                 }
2061                 break;
2062         case MSR_IA32_DEBUGCTLMSR:
2063                 if (!data) {
2064                         /* We support the non-activated case already */
2065                         break;
2066                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2067                         /* Values other than LBR and BTF are vendor-specific,
2068                            thus reserved and should throw a #GP */
2069                         return 1;
2070                 }
2071                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2072                             __func__, data);
2073                 break;
2074         case 0x200 ... 0x2ff:
2075                 return kvm_mtrr_set_msr(vcpu, msr, data);
2076         case MSR_IA32_APICBASE:
2077                 return kvm_set_apic_base(vcpu, msr_info);
2078         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2079                 return kvm_x2apic_msr_write(vcpu, msr, data);
2080         case MSR_IA32_TSCDEADLINE:
2081                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2082                 break;
2083         case MSR_IA32_TSC_ADJUST:
2084                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2085                         if (!msr_info->host_initiated) {
2086                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2087                                 adjust_tsc_offset_guest(vcpu, adj);
2088                         }
2089                         vcpu->arch.ia32_tsc_adjust_msr = data;
2090                 }
2091                 break;
2092         case MSR_IA32_MISC_ENABLE:
2093                 vcpu->arch.ia32_misc_enable_msr = data;
2094                 break;
2095         case MSR_IA32_SMBASE:
2096                 if (!msr_info->host_initiated)
2097                         return 1;
2098                 vcpu->arch.smbase = data;
2099                 break;
2100         case MSR_KVM_WALL_CLOCK_NEW:
2101         case MSR_KVM_WALL_CLOCK:
2102                 vcpu->kvm->arch.wall_clock = data;
2103                 kvm_write_wall_clock(vcpu->kvm, data);
2104                 break;
2105         case MSR_KVM_SYSTEM_TIME_NEW:
2106         case MSR_KVM_SYSTEM_TIME: {
2107                 u64 gpa_offset;
2108                 struct kvm_arch *ka = &vcpu->kvm->arch;
2109
2110                 kvmclock_reset(vcpu);
2111
2112                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2113                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2114
2115                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2116                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2117                                         &vcpu->requests);
2118
2119                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2120                 }
2121
2122                 vcpu->arch.time = data;
2123                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2124
2125                 /* we verify if the enable bit is set... */
2126                 if (!(data & 1))
2127                         break;
2128
2129                 gpa_offset = data & ~(PAGE_MASK | 1);
2130
2131                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2132                      &vcpu->arch.pv_time, data & ~1ULL,
2133                      sizeof(struct pvclock_vcpu_time_info)))
2134                         vcpu->arch.pv_time_enabled = false;
2135                 else
2136                         vcpu->arch.pv_time_enabled = true;
2137
2138                 break;
2139         }
2140         case MSR_KVM_ASYNC_PF_EN:
2141                 if (kvm_pv_enable_async_pf(vcpu, data))
2142                         return 1;
2143                 break;
2144         case MSR_KVM_STEAL_TIME:
2145
2146                 if (unlikely(!sched_info_on()))
2147                         return 1;
2148
2149                 if (data & KVM_STEAL_RESERVED_MASK)
2150                         return 1;
2151
2152                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2153                                                 data & KVM_STEAL_VALID_BITS,
2154                                                 sizeof(struct kvm_steal_time)))
2155                         return 1;
2156
2157                 vcpu->arch.st.msr_val = data;
2158
2159                 if (!(data & KVM_MSR_ENABLED))
2160                         break;
2161
2162                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2163
2164                 break;
2165         case MSR_KVM_PV_EOI_EN:
2166                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2167                         return 1;
2168                 break;
2169
2170         case MSR_IA32_MCG_CTL:
2171         case MSR_IA32_MCG_STATUS:
2172         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2173                 return set_msr_mce(vcpu, msr, data);
2174
2175         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2176         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2177                 pr = true; /* fall through */
2178         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2179         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2180                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2181                         return kvm_pmu_set_msr(vcpu, msr_info);
2182
2183                 if (pr || data != 0)
2184                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2185                                     "0x%x data 0x%llx\n", msr, data);
2186                 break;
2187         case MSR_K7_CLK_CTL:
2188                 /*
2189                  * Ignore all writes to this no longer documented MSR.
2190                  * Writes are only relevant for old K7 processors,
2191                  * all pre-dating SVM, but a recommended workaround from
2192                  * AMD for these chips. It is possible to specify the
2193                  * affected processor models on the command line, hence
2194                  * the need to ignore the workaround.
2195                  */
2196                 break;
2197         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2198         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2199         case HV_X64_MSR_CRASH_CTL:
2200                 return kvm_hv_set_msr_common(vcpu, msr, data,
2201                                              msr_info->host_initiated);
2202         case MSR_IA32_BBL_CR_CTL3:
2203                 /* Drop writes to this legacy MSR -- see rdmsr
2204                  * counterpart for further detail.
2205                  */
2206                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2207                 break;
2208         case MSR_AMD64_OSVW_ID_LENGTH:
2209                 if (!guest_cpuid_has_osvw(vcpu))
2210                         return 1;
2211                 vcpu->arch.osvw.length = data;
2212                 break;
2213         case MSR_AMD64_OSVW_STATUS:
2214                 if (!guest_cpuid_has_osvw(vcpu))
2215                         return 1;
2216                 vcpu->arch.osvw.status = data;
2217                 break;
2218         default:
2219                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2220                         return xen_hvm_config(vcpu, data);
2221                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2222                         return kvm_pmu_set_msr(vcpu, msr_info);
2223                 if (!ignore_msrs) {
2224                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2225                                     msr, data);
2226                         return 1;
2227                 } else {
2228                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2229                                     msr, data);
2230                         break;
2231                 }
2232         }
2233         return 0;
2234 }
2235 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2236
2237
2238 /*
2239  * Reads an msr value (of 'msr_index') into 'pdata'.
2240  * Returns 0 on success, non-0 otherwise.
2241  * Assumes vcpu_load() was already called.
2242  */
2243 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2244 {
2245         return kvm_x86_ops->get_msr(vcpu, msr);
2246 }
2247 EXPORT_SYMBOL_GPL(kvm_get_msr);
2248
2249 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2250 {
2251         u64 data;
2252         u64 mcg_cap = vcpu->arch.mcg_cap;
2253         unsigned bank_num = mcg_cap & 0xff;
2254
2255         switch (msr) {
2256         case MSR_IA32_P5_MC_ADDR:
2257         case MSR_IA32_P5_MC_TYPE:
2258                 data = 0;
2259                 break;
2260         case MSR_IA32_MCG_CAP:
2261                 data = vcpu->arch.mcg_cap;
2262                 break;
2263         case MSR_IA32_MCG_CTL:
2264                 if (!(mcg_cap & MCG_CTL_P))
2265                         return 1;
2266                 data = vcpu->arch.mcg_ctl;
2267                 break;
2268         case MSR_IA32_MCG_STATUS:
2269                 data = vcpu->arch.mcg_status;
2270                 break;
2271         default:
2272                 if (msr >= MSR_IA32_MC0_CTL &&
2273                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2274                         u32 offset = msr - MSR_IA32_MC0_CTL;
2275                         data = vcpu->arch.mce_banks[offset];
2276                         break;
2277                 }
2278                 return 1;
2279         }
2280         *pdata = data;
2281         return 0;
2282 }
2283
2284 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2285 {
2286         switch (msr_info->index) {
2287         case MSR_IA32_PLATFORM_ID:
2288         case MSR_IA32_EBL_CR_POWERON:
2289         case MSR_IA32_DEBUGCTLMSR:
2290         case MSR_IA32_LASTBRANCHFROMIP:
2291         case MSR_IA32_LASTBRANCHTOIP:
2292         case MSR_IA32_LASTINTFROMIP:
2293         case MSR_IA32_LASTINTTOIP:
2294         case MSR_K8_SYSCFG:
2295         case MSR_K8_TSEG_ADDR:
2296         case MSR_K8_TSEG_MASK:
2297         case MSR_K7_HWCR:
2298         case MSR_VM_HSAVE_PA:
2299         case MSR_K8_INT_PENDING_MSG:
2300         case MSR_AMD64_NB_CFG:
2301         case MSR_FAM10H_MMIO_CONF_BASE:
2302         case MSR_AMD64_BU_CFG2:
2303                 msr_info->data = 0;
2304                 break;
2305         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2306         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2307         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2308         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2309                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2310                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2311                 msr_info->data = 0;
2312                 break;
2313         case MSR_IA32_UCODE_REV:
2314                 msr_info->data = 0x100000000ULL;
2315                 break;
2316         case MSR_MTRRcap:
2317         case 0x200 ... 0x2ff:
2318                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2319         case 0xcd: /* fsb frequency */
2320                 msr_info->data = 3;
2321                 break;
2322                 /*
2323                  * MSR_EBC_FREQUENCY_ID
2324                  * Conservative value valid for even the basic CPU models.
2325                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2326                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2327                  * and 266MHz for model 3, or 4. Set Core Clock
2328                  * Frequency to System Bus Frequency Ratio to 1 (bits
2329                  * 31:24) even though these are only valid for CPU
2330                  * models > 2, however guests may end up dividing or
2331                  * multiplying by zero otherwise.
2332                  */
2333         case MSR_EBC_FREQUENCY_ID:
2334                 msr_info->data = 1 << 24;
2335                 break;
2336         case MSR_IA32_APICBASE:
2337                 msr_info->data = kvm_get_apic_base(vcpu);
2338                 break;
2339         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2340                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2341                 break;
2342         case MSR_IA32_TSCDEADLINE:
2343                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2344                 break;
2345         case MSR_IA32_TSC_ADJUST:
2346                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2347                 break;
2348         case MSR_IA32_MISC_ENABLE:
2349                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2350                 break;
2351         case MSR_IA32_SMBASE:
2352                 if (!msr_info->host_initiated)
2353                         return 1;
2354                 msr_info->data = vcpu->arch.smbase;
2355                 break;
2356         case MSR_IA32_PERF_STATUS:
2357                 /* TSC increment by tick */
2358                 msr_info->data = 1000ULL;
2359                 /* CPU multiplier */
2360                 msr_info->data |= (((uint64_t)4ULL) << 40);
2361                 break;
2362         case MSR_EFER:
2363                 msr_info->data = vcpu->arch.efer;
2364                 break;
2365         case MSR_KVM_WALL_CLOCK:
2366         case MSR_KVM_WALL_CLOCK_NEW:
2367                 msr_info->data = vcpu->kvm->arch.wall_clock;
2368                 break;
2369         case MSR_KVM_SYSTEM_TIME:
2370         case MSR_KVM_SYSTEM_TIME_NEW:
2371                 msr_info->data = vcpu->arch.time;
2372                 break;
2373         case MSR_KVM_ASYNC_PF_EN:
2374                 msr_info->data = vcpu->arch.apf.msr_val;
2375                 break;
2376         case MSR_KVM_STEAL_TIME:
2377                 msr_info->data = vcpu->arch.st.msr_val;
2378                 break;
2379         case MSR_KVM_PV_EOI_EN:
2380                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2381                 break;
2382         case MSR_IA32_P5_MC_ADDR:
2383         case MSR_IA32_P5_MC_TYPE:
2384         case MSR_IA32_MCG_CAP:
2385         case MSR_IA32_MCG_CTL:
2386         case MSR_IA32_MCG_STATUS:
2387         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2388                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2389         case MSR_K7_CLK_CTL:
2390                 /*
2391                  * Provide expected ramp-up count for K7. All other
2392                  * are set to zero, indicating minimum divisors for
2393                  * every field.
2394                  *
2395                  * This prevents guest kernels on AMD host with CPU
2396                  * type 6, model 8 and higher from exploding due to
2397                  * the rdmsr failing.
2398                  */
2399                 msr_info->data = 0x20000000;
2400                 break;
2401         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2402         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2403         case HV_X64_MSR_CRASH_CTL:
2404                 return kvm_hv_get_msr_common(vcpu,
2405                                              msr_info->index, &msr_info->data);
2406                 break;
2407         case MSR_IA32_BBL_CR_CTL3:
2408                 /* This legacy MSR exists but isn't fully documented in current
2409                  * silicon.  It is however accessed by winxp in very narrow
2410                  * scenarios where it sets bit #19, itself documented as
2411                  * a "reserved" bit.  Best effort attempt to source coherent
2412                  * read data here should the balance of the register be
2413                  * interpreted by the guest:
2414                  *
2415                  * L2 cache control register 3: 64GB range, 256KB size,
2416                  * enabled, latency 0x1, configured
2417                  */
2418                 msr_info->data = 0xbe702111;
2419                 break;
2420         case MSR_AMD64_OSVW_ID_LENGTH:
2421                 if (!guest_cpuid_has_osvw(vcpu))
2422                         return 1;
2423                 msr_info->data = vcpu->arch.osvw.length;
2424                 break;
2425         case MSR_AMD64_OSVW_STATUS:
2426                 if (!guest_cpuid_has_osvw(vcpu))
2427                         return 1;
2428                 msr_info->data = vcpu->arch.osvw.status;
2429                 break;
2430         default:
2431                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2432                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2433                 if (!ignore_msrs) {
2434                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2435                         return 1;
2436                 } else {
2437                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2438                         msr_info->data = 0;
2439                 }
2440                 break;
2441         }
2442         return 0;
2443 }
2444 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2445
2446 /*
2447  * Read or write a bunch of msrs. All parameters are kernel addresses.
2448  *
2449  * @return number of msrs set successfully.
2450  */
2451 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2452                     struct kvm_msr_entry *entries,
2453                     int (*do_msr)(struct kvm_vcpu *vcpu,
2454                                   unsigned index, u64 *data))
2455 {
2456         int i, idx;
2457
2458         idx = srcu_read_lock(&vcpu->kvm->srcu);
2459         for (i = 0; i < msrs->nmsrs; ++i)
2460                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2461                         break;
2462         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2463
2464         return i;
2465 }
2466
2467 /*
2468  * Read or write a bunch of msrs. Parameters are user addresses.
2469  *
2470  * @return number of msrs set successfully.
2471  */
2472 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2473                   int (*do_msr)(struct kvm_vcpu *vcpu,
2474                                 unsigned index, u64 *data),
2475                   int writeback)
2476 {
2477         struct kvm_msrs msrs;
2478         struct kvm_msr_entry *entries;
2479         int r, n;
2480         unsigned size;
2481
2482         r = -EFAULT;
2483         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2484                 goto out;
2485
2486         r = -E2BIG;
2487         if (msrs.nmsrs >= MAX_IO_MSRS)
2488                 goto out;
2489
2490         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2491         entries = memdup_user(user_msrs->entries, size);
2492         if (IS_ERR(entries)) {
2493                 r = PTR_ERR(entries);
2494                 goto out;
2495         }
2496
2497         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2498         if (r < 0)
2499                 goto out_free;
2500
2501         r = -EFAULT;
2502         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2503                 goto out_free;
2504
2505         r = n;
2506
2507 out_free:
2508         kfree(entries);
2509 out:
2510         return r;
2511 }
2512
2513 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2514 {
2515         int r;
2516
2517         switch (ext) {
2518         case KVM_CAP_IRQCHIP:
2519         case KVM_CAP_HLT:
2520         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2521         case KVM_CAP_SET_TSS_ADDR:
2522         case KVM_CAP_EXT_CPUID:
2523         case KVM_CAP_EXT_EMUL_CPUID:
2524         case KVM_CAP_CLOCKSOURCE:
2525         case KVM_CAP_PIT:
2526         case KVM_CAP_NOP_IO_DELAY:
2527         case KVM_CAP_MP_STATE:
2528         case KVM_CAP_SYNC_MMU:
2529         case KVM_CAP_USER_NMI:
2530         case KVM_CAP_REINJECT_CONTROL:
2531         case KVM_CAP_IRQ_INJECT_STATUS:
2532         case KVM_CAP_IOEVENTFD:
2533         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2534         case KVM_CAP_PIT2:
2535         case KVM_CAP_PIT_STATE2:
2536         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2537         case KVM_CAP_XEN_HVM:
2538         case KVM_CAP_ADJUST_CLOCK:
2539         case KVM_CAP_VCPU_EVENTS:
2540         case KVM_CAP_HYPERV:
2541         case KVM_CAP_HYPERV_VAPIC:
2542         case KVM_CAP_HYPERV_SPIN:
2543         case KVM_CAP_PCI_SEGMENT:
2544         case KVM_CAP_DEBUGREGS:
2545         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2546         case KVM_CAP_XSAVE:
2547         case KVM_CAP_ASYNC_PF:
2548         case KVM_CAP_GET_TSC_KHZ:
2549         case KVM_CAP_KVMCLOCK_CTRL:
2550         case KVM_CAP_READONLY_MEM:
2551         case KVM_CAP_HYPERV_TIME:
2552         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2553         case KVM_CAP_TSC_DEADLINE_TIMER:
2554         case KVM_CAP_ENABLE_CAP_VM:
2555         case KVM_CAP_DISABLE_QUIRKS:
2556         case KVM_CAP_SET_BOOT_CPU_ID:
2557         case KVM_CAP_SPLIT_IRQCHIP:
2558 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2559         case KVM_CAP_ASSIGN_DEV_IRQ:
2560         case KVM_CAP_PCI_2_3:
2561 #endif
2562                 r = 1;
2563                 break;
2564         case KVM_CAP_X86_SMM:
2565                 /* SMBASE is usually relocated above 1M on modern chipsets,
2566                  * and SMM handlers might indeed rely on 4G segment limits,
2567                  * so do not report SMM to be available if real mode is
2568                  * emulated via vm86 mode.  Still, do not go to great lengths
2569                  * to avoid userspace's usage of the feature, because it is a
2570                  * fringe case that is not enabled except via specific settings
2571                  * of the module parameters.
2572                  */
2573                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2574                 break;
2575         case KVM_CAP_COALESCED_MMIO:
2576                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2577                 break;
2578         case KVM_CAP_VAPIC:
2579                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2580                 break;
2581         case KVM_CAP_NR_VCPUS:
2582                 r = KVM_SOFT_MAX_VCPUS;
2583                 break;
2584         case KVM_CAP_MAX_VCPUS:
2585                 r = KVM_MAX_VCPUS;
2586                 break;
2587         case KVM_CAP_NR_MEMSLOTS:
2588                 r = KVM_USER_MEM_SLOTS;
2589                 break;
2590         case KVM_CAP_PV_MMU:    /* obsolete */
2591                 r = 0;
2592                 break;
2593 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2594         case KVM_CAP_IOMMU:
2595                 r = iommu_present(&pci_bus_type);
2596                 break;
2597 #endif
2598         case KVM_CAP_MCE:
2599                 r = KVM_MAX_MCE_BANKS;
2600                 break;
2601         case KVM_CAP_XCRS:
2602                 r = cpu_has_xsave;
2603                 break;
2604         case KVM_CAP_TSC_CONTROL:
2605                 r = kvm_has_tsc_control;
2606                 break;
2607         default:
2608                 r = 0;
2609                 break;
2610         }
2611         return r;
2612
2613 }
2614
2615 long kvm_arch_dev_ioctl(struct file *filp,
2616                         unsigned int ioctl, unsigned long arg)
2617 {
2618         void __user *argp = (void __user *)arg;
2619         long r;
2620
2621         switch (ioctl) {
2622         case KVM_GET_MSR_INDEX_LIST: {
2623                 struct kvm_msr_list __user *user_msr_list = argp;
2624                 struct kvm_msr_list msr_list;
2625                 unsigned n;
2626
2627                 r = -EFAULT;
2628                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2629                         goto out;
2630                 n = msr_list.nmsrs;
2631                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2632                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2633                         goto out;
2634                 r = -E2BIG;
2635                 if (n < msr_list.nmsrs)
2636                         goto out;
2637                 r = -EFAULT;
2638                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2639                                  num_msrs_to_save * sizeof(u32)))
2640                         goto out;
2641                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2642                                  &emulated_msrs,
2643                                  num_emulated_msrs * sizeof(u32)))
2644                         goto out;
2645                 r = 0;
2646                 break;
2647         }
2648         case KVM_GET_SUPPORTED_CPUID:
2649         case KVM_GET_EMULATED_CPUID: {
2650                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2651                 struct kvm_cpuid2 cpuid;
2652
2653                 r = -EFAULT;
2654                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2655                         goto out;
2656
2657                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2658                                             ioctl);
2659                 if (r)
2660                         goto out;
2661
2662                 r = -EFAULT;
2663                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2664                         goto out;
2665                 r = 0;
2666                 break;
2667         }
2668         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2669                 u64 mce_cap;
2670
2671                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2672                 r = -EFAULT;
2673                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2674                         goto out;
2675                 r = 0;
2676                 break;
2677         }
2678         default:
2679                 r = -EINVAL;
2680         }
2681 out:
2682         return r;
2683 }
2684
2685 static void wbinvd_ipi(void *garbage)
2686 {
2687         wbinvd();
2688 }
2689
2690 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2691 {
2692         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2693 }
2694
2695 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2696 {
2697         /* Address WBINVD may be executed by guest */
2698         if (need_emulate_wbinvd(vcpu)) {
2699                 if (kvm_x86_ops->has_wbinvd_exit())
2700                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2701                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2702                         smp_call_function_single(vcpu->cpu,
2703                                         wbinvd_ipi, NULL, 1);
2704         }
2705
2706         kvm_x86_ops->vcpu_load(vcpu, cpu);
2707
2708         /* Apply any externally detected TSC adjustments (due to suspend) */
2709         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2710                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2711                 vcpu->arch.tsc_offset_adjustment = 0;
2712                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2713         }
2714
2715         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2716                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2717                                 rdtsc() - vcpu->arch.last_host_tsc;
2718                 if (tsc_delta < 0)
2719                         mark_tsc_unstable("KVM discovered backwards TSC");
2720                 if (check_tsc_unstable()) {
2721                         u64 offset = kvm_compute_tsc_offset(vcpu,
2722                                                 vcpu->arch.last_guest_tsc);
2723                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2724                         vcpu->arch.tsc_catchup = 1;
2725                 }
2726                 /*
2727                  * On a host with synchronized TSC, there is no need to update
2728                  * kvmclock on vcpu->cpu migration
2729                  */
2730                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2731                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2732                 if (vcpu->cpu != cpu)
2733                         kvm_migrate_timers(vcpu);
2734                 vcpu->cpu = cpu;
2735         }
2736
2737         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2738 }
2739
2740 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2741 {
2742         kvm_x86_ops->vcpu_put(vcpu);
2743         kvm_put_guest_fpu(vcpu);
2744         vcpu->arch.last_host_tsc = rdtsc();
2745 }
2746
2747 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2748                                     struct kvm_lapic_state *s)
2749 {
2750         kvm_x86_ops->sync_pir_to_irr(vcpu);
2751         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2752
2753         return 0;
2754 }
2755
2756 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2757                                     struct kvm_lapic_state *s)
2758 {
2759         kvm_apic_post_state_restore(vcpu, s);
2760         update_cr8_intercept(vcpu);
2761
2762         return 0;
2763 }
2764
2765 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2766 {
2767         return (!lapic_in_kernel(vcpu) ||
2768                 kvm_apic_accept_pic_intr(vcpu));
2769 }
2770
2771 /*
2772  * if userspace requested an interrupt window, check that the
2773  * interrupt window is open.
2774  *
2775  * No need to exit to userspace if we already have an interrupt queued.
2776  */
2777 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2778 {
2779         return kvm_arch_interrupt_allowed(vcpu) &&
2780                 !kvm_cpu_has_interrupt(vcpu) &&
2781                 !kvm_event_needs_reinjection(vcpu) &&
2782                 kvm_cpu_accept_dm_intr(vcpu);
2783 }
2784
2785 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2786                                     struct kvm_interrupt *irq)
2787 {
2788         if (irq->irq >= KVM_NR_INTERRUPTS)
2789                 return -EINVAL;
2790
2791         if (!irqchip_in_kernel(vcpu->kvm)) {
2792                 kvm_queue_interrupt(vcpu, irq->irq, false);
2793                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2794                 return 0;
2795         }
2796
2797         /*
2798          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2799          * fail for in-kernel 8259.
2800          */
2801         if (pic_in_kernel(vcpu->kvm))
2802                 return -ENXIO;
2803
2804         if (vcpu->arch.pending_external_vector != -1)
2805                 return -EEXIST;
2806
2807         vcpu->arch.pending_external_vector = irq->irq;
2808         kvm_make_request(KVM_REQ_EVENT, vcpu);
2809         return 0;
2810 }
2811
2812 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2813 {
2814         kvm_inject_nmi(vcpu);
2815
2816         return 0;
2817 }
2818
2819 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2820 {
2821         kvm_make_request(KVM_REQ_SMI, vcpu);
2822
2823         return 0;
2824 }
2825
2826 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2827                                            struct kvm_tpr_access_ctl *tac)
2828 {
2829         if (tac->flags)
2830                 return -EINVAL;
2831         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2832         return 0;
2833 }
2834
2835 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2836                                         u64 mcg_cap)
2837 {
2838         int r;
2839         unsigned bank_num = mcg_cap & 0xff, bank;
2840
2841         r = -EINVAL;
2842         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2843                 goto out;
2844         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2845                 goto out;
2846         r = 0;
2847         vcpu->arch.mcg_cap = mcg_cap;
2848         /* Init IA32_MCG_CTL to all 1s */
2849         if (mcg_cap & MCG_CTL_P)
2850                 vcpu->arch.mcg_ctl = ~(u64)0;
2851         /* Init IA32_MCi_CTL to all 1s */
2852         for (bank = 0; bank < bank_num; bank++)
2853                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2854 out:
2855         return r;
2856 }
2857
2858 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2859                                       struct kvm_x86_mce *mce)
2860 {
2861         u64 mcg_cap = vcpu->arch.mcg_cap;
2862         unsigned bank_num = mcg_cap & 0xff;
2863         u64 *banks = vcpu->arch.mce_banks;
2864
2865         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2866                 return -EINVAL;
2867         /*
2868          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2869          * reporting is disabled
2870          */
2871         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2872             vcpu->arch.mcg_ctl != ~(u64)0)
2873                 return 0;
2874         banks += 4 * mce->bank;
2875         /*
2876          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2877          * reporting is disabled for the bank
2878          */
2879         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2880                 return 0;
2881         if (mce->status & MCI_STATUS_UC) {
2882                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2883                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2884                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2885                         return 0;
2886                 }
2887                 if (banks[1] & MCI_STATUS_VAL)
2888                         mce->status |= MCI_STATUS_OVER;
2889                 banks[2] = mce->addr;
2890                 banks[3] = mce->misc;
2891                 vcpu->arch.mcg_status = mce->mcg_status;
2892                 banks[1] = mce->status;
2893                 kvm_queue_exception(vcpu, MC_VECTOR);
2894         } else if (!(banks[1] & MCI_STATUS_VAL)
2895                    || !(banks[1] & MCI_STATUS_UC)) {
2896                 if (banks[1] & MCI_STATUS_VAL)
2897                         mce->status |= MCI_STATUS_OVER;
2898                 banks[2] = mce->addr;
2899                 banks[3] = mce->misc;
2900                 banks[1] = mce->status;
2901         } else
2902                 banks[1] |= MCI_STATUS_OVER;
2903         return 0;
2904 }
2905
2906 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2907                                                struct kvm_vcpu_events *events)
2908 {
2909         process_nmi(vcpu);
2910         events->exception.injected =
2911                 vcpu->arch.exception.pending &&
2912                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2913         events->exception.nr = vcpu->arch.exception.nr;
2914         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2915         events->exception.pad = 0;
2916         events->exception.error_code = vcpu->arch.exception.error_code;
2917
2918         events->interrupt.injected =
2919                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2920         events->interrupt.nr = vcpu->arch.interrupt.nr;
2921         events->interrupt.soft = 0;
2922         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2923
2924         events->nmi.injected = vcpu->arch.nmi_injected;
2925         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2926         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2927         events->nmi.pad = 0;
2928
2929         events->sipi_vector = 0; /* never valid when reporting to user space */
2930
2931         events->smi.smm = is_smm(vcpu);
2932         events->smi.pending = vcpu->arch.smi_pending;
2933         events->smi.smm_inside_nmi =
2934                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2935         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2936
2937         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2938                          | KVM_VCPUEVENT_VALID_SHADOW
2939                          | KVM_VCPUEVENT_VALID_SMM);
2940         memset(&events->reserved, 0, sizeof(events->reserved));
2941 }
2942
2943 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2944                                               struct kvm_vcpu_events *events)
2945 {
2946         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2947                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2948                               | KVM_VCPUEVENT_VALID_SHADOW
2949                               | KVM_VCPUEVENT_VALID_SMM))
2950                 return -EINVAL;
2951
2952         process_nmi(vcpu);
2953         vcpu->arch.exception.pending = events->exception.injected;
2954         vcpu->arch.exception.nr = events->exception.nr;
2955         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2956         vcpu->arch.exception.error_code = events->exception.error_code;
2957
2958         vcpu->arch.interrupt.pending = events->interrupt.injected;
2959         vcpu->arch.interrupt.nr = events->interrupt.nr;
2960         vcpu->arch.interrupt.soft = events->interrupt.soft;
2961         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2962                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2963                                                   events->interrupt.shadow);
2964
2965         vcpu->arch.nmi_injected = events->nmi.injected;
2966         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2967                 vcpu->arch.nmi_pending = events->nmi.pending;
2968         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2969
2970         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2971             kvm_vcpu_has_lapic(vcpu))
2972                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2973
2974         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2975                 if (events->smi.smm)
2976                         vcpu->arch.hflags |= HF_SMM_MASK;
2977                 else
2978                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2979                 vcpu->arch.smi_pending = events->smi.pending;
2980                 if (events->smi.smm_inside_nmi)
2981                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2982                 else
2983                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2984                 if (kvm_vcpu_has_lapic(vcpu)) {
2985                         if (events->smi.latched_init)
2986                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2987                         else
2988                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2989                 }
2990         }
2991
2992         kvm_make_request(KVM_REQ_EVENT, vcpu);
2993
2994         return 0;
2995 }
2996
2997 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2998                                              struct kvm_debugregs *dbgregs)
2999 {
3000         unsigned long val;
3001
3002         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3003         kvm_get_dr(vcpu, 6, &val);
3004         dbgregs->dr6 = val;
3005         dbgregs->dr7 = vcpu->arch.dr7;
3006         dbgregs->flags = 0;
3007         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3008 }
3009
3010 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3011                                             struct kvm_debugregs *dbgregs)
3012 {
3013         if (dbgregs->flags)
3014                 return -EINVAL;
3015
3016         if (dbgregs->dr6 & ~0xffffffffull)
3017                 return -EINVAL;
3018         if (dbgregs->dr7 & ~0xffffffffull)
3019                 return -EINVAL;
3020
3021         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3022         kvm_update_dr0123(vcpu);
3023         vcpu->arch.dr6 = dbgregs->dr6;
3024         kvm_update_dr6(vcpu);
3025         vcpu->arch.dr7 = dbgregs->dr7;
3026         kvm_update_dr7(vcpu);
3027
3028         return 0;
3029 }
3030
3031 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3032
3033 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3034 {
3035         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3036         u64 xstate_bv = xsave->header.xfeatures;
3037         u64 valid;
3038
3039         /*
3040          * Copy legacy XSAVE area, to avoid complications with CPUID
3041          * leaves 0 and 1 in the loop below.
3042          */
3043         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3044
3045         /* Set XSTATE_BV */
3046         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3047
3048         /*
3049          * Copy each region from the possibly compacted offset to the
3050          * non-compacted offset.
3051          */
3052         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3053         while (valid) {
3054                 u64 feature = valid & -valid;
3055                 int index = fls64(feature) - 1;
3056                 void *src = get_xsave_addr(xsave, feature);
3057
3058                 if (src) {
3059                         u32 size, offset, ecx, edx;
3060                         cpuid_count(XSTATE_CPUID, index,
3061                                     &size, &offset, &ecx, &edx);
3062                         memcpy(dest + offset, src, size);
3063                 }
3064
3065                 valid -= feature;
3066         }
3067 }
3068
3069 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3070 {
3071         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3072         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3073         u64 valid;
3074
3075         /*
3076          * Copy legacy XSAVE area, to avoid complications with CPUID
3077          * leaves 0 and 1 in the loop below.
3078          */
3079         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3080
3081         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3082         xsave->header.xfeatures = xstate_bv;
3083         if (cpu_has_xsaves)
3084                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3085
3086         /*
3087          * Copy each region from the non-compacted offset to the
3088          * possibly compacted offset.
3089          */
3090         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3091         while (valid) {
3092                 u64 feature = valid & -valid;
3093                 int index = fls64(feature) - 1;
3094                 void *dest = get_xsave_addr(xsave, feature);
3095
3096                 if (dest) {
3097                         u32 size, offset, ecx, edx;
3098                         cpuid_count(XSTATE_CPUID, index,
3099                                     &size, &offset, &ecx, &edx);
3100                         memcpy(dest, src + offset, size);
3101                 }
3102
3103                 valid -= feature;
3104         }
3105 }
3106
3107 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3108                                          struct kvm_xsave *guest_xsave)
3109 {
3110         if (cpu_has_xsave) {
3111                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3112                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3113         } else {
3114                 memcpy(guest_xsave->region,
3115                         &vcpu->arch.guest_fpu.state.fxsave,
3116                         sizeof(struct fxregs_state));
3117                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3118                         XFEATURE_MASK_FPSSE;
3119         }
3120 }
3121
3122 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3123                                         struct kvm_xsave *guest_xsave)
3124 {
3125         u64 xstate_bv =
3126                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3127
3128         if (cpu_has_xsave) {
3129                 /*
3130                  * Here we allow setting states that are not present in
3131                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3132                  * with old userspace.
3133                  */
3134                 if (xstate_bv & ~kvm_supported_xcr0())
3135                         return -EINVAL;
3136                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3137         } else {
3138                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3139                         return -EINVAL;
3140                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3141                         guest_xsave->region, sizeof(struct fxregs_state));
3142         }
3143         return 0;
3144 }
3145
3146 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3147                                         struct kvm_xcrs *guest_xcrs)
3148 {
3149         if (!cpu_has_xsave) {
3150                 guest_xcrs->nr_xcrs = 0;
3151                 return;
3152         }
3153
3154         guest_xcrs->nr_xcrs = 1;
3155         guest_xcrs->flags = 0;
3156         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3157         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3158 }
3159
3160 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3161                                        struct kvm_xcrs *guest_xcrs)
3162 {
3163         int i, r = 0;
3164
3165         if (!cpu_has_xsave)
3166                 return -EINVAL;
3167
3168         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3169                 return -EINVAL;
3170
3171         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3172                 /* Only support XCR0 currently */
3173                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3174                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3175                                 guest_xcrs->xcrs[i].value);
3176                         break;
3177                 }
3178         if (r)
3179                 r = -EINVAL;
3180         return r;
3181 }
3182
3183 /*
3184  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3185  * stopped by the hypervisor.  This function will be called from the host only.
3186  * EINVAL is returned when the host attempts to set the flag for a guest that
3187  * does not support pv clocks.
3188  */
3189 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3190 {
3191         if (!vcpu->arch.pv_time_enabled)
3192                 return -EINVAL;
3193         vcpu->arch.pvclock_set_guest_stopped_request = true;
3194         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3195         return 0;
3196 }
3197
3198 long kvm_arch_vcpu_ioctl(struct file *filp,
3199                          unsigned int ioctl, unsigned long arg)
3200 {
3201         struct kvm_vcpu *vcpu = filp->private_data;
3202         void __user *argp = (void __user *)arg;
3203         int r;
3204         union {
3205                 struct kvm_lapic_state *lapic;
3206                 struct kvm_xsave *xsave;
3207                 struct kvm_xcrs *xcrs;
3208                 void *buffer;
3209         } u;
3210
3211         u.buffer = NULL;
3212         switch (ioctl) {
3213         case KVM_GET_LAPIC: {
3214                 r = -EINVAL;
3215                 if (!vcpu->arch.apic)
3216                         goto out;
3217                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3218
3219                 r = -ENOMEM;
3220                 if (!u.lapic)
3221                         goto out;
3222                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3223                 if (r)
3224                         goto out;
3225                 r = -EFAULT;
3226                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3227                         goto out;
3228                 r = 0;
3229                 break;
3230         }
3231         case KVM_SET_LAPIC: {
3232                 r = -EINVAL;
3233                 if (!vcpu->arch.apic)
3234                         goto out;
3235                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3236                 if (IS_ERR(u.lapic))
3237                         return PTR_ERR(u.lapic);
3238
3239                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3240                 break;
3241         }
3242         case KVM_INTERRUPT: {
3243                 struct kvm_interrupt irq;
3244
3245                 r = -EFAULT;
3246                 if (copy_from_user(&irq, argp, sizeof irq))
3247                         goto out;
3248                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3249                 break;
3250         }
3251         case KVM_NMI: {
3252                 r = kvm_vcpu_ioctl_nmi(vcpu);
3253                 break;
3254         }
3255         case KVM_SMI: {
3256                 r = kvm_vcpu_ioctl_smi(vcpu);
3257                 break;
3258         }
3259         case KVM_SET_CPUID: {
3260                 struct kvm_cpuid __user *cpuid_arg = argp;
3261                 struct kvm_cpuid cpuid;
3262
3263                 r = -EFAULT;
3264                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3265                         goto out;
3266                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3267                 break;
3268         }
3269         case KVM_SET_CPUID2: {
3270                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3271                 struct kvm_cpuid2 cpuid;
3272
3273                 r = -EFAULT;
3274                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3275                         goto out;
3276                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3277                                               cpuid_arg->entries);
3278                 break;
3279         }
3280         case KVM_GET_CPUID2: {
3281                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3282                 struct kvm_cpuid2 cpuid;
3283
3284                 r = -EFAULT;
3285                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3286                         goto out;
3287                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3288                                               cpuid_arg->entries);
3289                 if (r)
3290                         goto out;
3291                 r = -EFAULT;
3292                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3293                         goto out;
3294                 r = 0;
3295                 break;
3296         }
3297         case KVM_GET_MSRS:
3298                 r = msr_io(vcpu, argp, do_get_msr, 1);
3299                 break;
3300         case KVM_SET_MSRS:
3301                 r = msr_io(vcpu, argp, do_set_msr, 0);
3302                 break;
3303         case KVM_TPR_ACCESS_REPORTING: {
3304                 struct kvm_tpr_access_ctl tac;
3305
3306                 r = -EFAULT;
3307                 if (copy_from_user(&tac, argp, sizeof tac))
3308                         goto out;
3309                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3310                 if (r)
3311                         goto out;
3312                 r = -EFAULT;
3313                 if (copy_to_user(argp, &tac, sizeof tac))
3314                         goto out;
3315                 r = 0;
3316                 break;
3317         };
3318         case KVM_SET_VAPIC_ADDR: {
3319                 struct kvm_vapic_addr va;
3320
3321                 r = -EINVAL;
3322                 if (!lapic_in_kernel(vcpu))
3323                         goto out;
3324                 r = -EFAULT;
3325                 if (copy_from_user(&va, argp, sizeof va))
3326                         goto out;
3327                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3328                 break;
3329         }
3330         case KVM_X86_SETUP_MCE: {
3331                 u64 mcg_cap;
3332
3333                 r = -EFAULT;
3334                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3335                         goto out;
3336                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3337                 break;
3338         }
3339         case KVM_X86_SET_MCE: {
3340                 struct kvm_x86_mce mce;
3341
3342                 r = -EFAULT;
3343                 if (copy_from_user(&mce, argp, sizeof mce))
3344                         goto out;
3345                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3346                 break;
3347         }
3348         case KVM_GET_VCPU_EVENTS: {
3349                 struct kvm_vcpu_events events;
3350
3351                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3352
3353                 r = -EFAULT;
3354                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3355                         break;
3356                 r = 0;
3357                 break;
3358         }
3359         case KVM_SET_VCPU_EVENTS: {
3360                 struct kvm_vcpu_events events;
3361
3362                 r = -EFAULT;
3363                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3364                         break;
3365
3366                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3367                 break;
3368         }
3369         case KVM_GET_DEBUGREGS: {
3370                 struct kvm_debugregs dbgregs;
3371
3372                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3373
3374                 r = -EFAULT;
3375                 if (copy_to_user(argp, &dbgregs,
3376                                  sizeof(struct kvm_debugregs)))
3377                         break;
3378                 r = 0;
3379                 break;
3380         }
3381         case KVM_SET_DEBUGREGS: {
3382                 struct kvm_debugregs dbgregs;
3383
3384                 r = -EFAULT;
3385                 if (copy_from_user(&dbgregs, argp,
3386                                    sizeof(struct kvm_debugregs)))
3387                         break;
3388
3389                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3390                 break;
3391         }
3392         case KVM_GET_XSAVE: {
3393                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3394                 r = -ENOMEM;
3395                 if (!u.xsave)
3396                         break;
3397
3398                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3399
3400                 r = -EFAULT;
3401                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3402                         break;
3403                 r = 0;
3404                 break;
3405         }
3406         case KVM_SET_XSAVE: {
3407                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3408                 if (IS_ERR(u.xsave))
3409                         return PTR_ERR(u.xsave);
3410
3411                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3412                 break;
3413         }
3414         case KVM_GET_XCRS: {
3415                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3416                 r = -ENOMEM;
3417                 if (!u.xcrs)
3418                         break;
3419
3420                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3421
3422                 r = -EFAULT;
3423                 if (copy_to_user(argp, u.xcrs,
3424                                  sizeof(struct kvm_xcrs)))
3425                         break;
3426                 r = 0;
3427                 break;
3428         }
3429         case KVM_SET_XCRS: {
3430                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3431                 if (IS_ERR(u.xcrs))
3432                         return PTR_ERR(u.xcrs);
3433
3434                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3435                 break;
3436         }
3437         case KVM_SET_TSC_KHZ: {
3438                 u32 user_tsc_khz;
3439
3440                 r = -EINVAL;
3441                 user_tsc_khz = (u32)arg;
3442
3443                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3444                         goto out;
3445
3446                 if (user_tsc_khz == 0)
3447                         user_tsc_khz = tsc_khz;
3448
3449                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3450                         r = 0;
3451
3452                 goto out;
3453         }
3454         case KVM_GET_TSC_KHZ: {
3455                 r = vcpu->arch.virtual_tsc_khz;
3456                 goto out;
3457         }
3458         case KVM_KVMCLOCK_CTRL: {
3459                 r = kvm_set_guest_paused(vcpu);
3460                 goto out;
3461         }
3462         default:
3463                 r = -EINVAL;
3464         }
3465 out:
3466         kfree(u.buffer);
3467         return r;
3468 }
3469
3470 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3471 {
3472         return VM_FAULT_SIGBUS;
3473 }
3474
3475 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3476 {
3477         int ret;
3478
3479         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3480                 return -EINVAL;
3481         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3482         return ret;
3483 }
3484
3485 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3486                                               u64 ident_addr)
3487 {
3488         kvm->arch.ept_identity_map_addr = ident_addr;
3489         return 0;
3490 }
3491
3492 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3493                                           u32 kvm_nr_mmu_pages)
3494 {
3495         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3496                 return -EINVAL;
3497
3498         mutex_lock(&kvm->slots_lock);
3499
3500         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3501         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3502
3503         mutex_unlock(&kvm->slots_lock);
3504         return 0;
3505 }
3506
3507 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3508 {
3509         return kvm->arch.n_max_mmu_pages;
3510 }
3511
3512 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3513 {
3514         int r;
3515
3516         r = 0;
3517         switch (chip->chip_id) {
3518         case KVM_IRQCHIP_PIC_MASTER:
3519                 memcpy(&chip->chip.pic,
3520                         &pic_irqchip(kvm)->pics[0],
3521                         sizeof(struct kvm_pic_state));
3522                 break;
3523         case KVM_IRQCHIP_PIC_SLAVE:
3524                 memcpy(&chip->chip.pic,
3525                         &pic_irqchip(kvm)->pics[1],
3526                         sizeof(struct kvm_pic_state));
3527                 break;
3528         case KVM_IRQCHIP_IOAPIC:
3529                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3530                 break;
3531         default:
3532                 r = -EINVAL;
3533                 break;
3534         }
3535         return r;
3536 }
3537
3538 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3539 {
3540         int r;
3541
3542         r = 0;
3543         switch (chip->chip_id) {
3544         case KVM_IRQCHIP_PIC_MASTER:
3545                 spin_lock(&pic_irqchip(kvm)->lock);
3546                 memcpy(&pic_irqchip(kvm)->pics[0],
3547                         &chip->chip.pic,
3548                         sizeof(struct kvm_pic_state));
3549                 spin_unlock(&pic_irqchip(kvm)->lock);
3550                 break;
3551         case KVM_IRQCHIP_PIC_SLAVE:
3552                 spin_lock(&pic_irqchip(kvm)->lock);
3553                 memcpy(&pic_irqchip(kvm)->pics[1],
3554                         &chip->chip.pic,
3555                         sizeof(struct kvm_pic_state));
3556                 spin_unlock(&pic_irqchip(kvm)->lock);
3557                 break;
3558         case KVM_IRQCHIP_IOAPIC:
3559                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3560                 break;
3561         default:
3562                 r = -EINVAL;
3563                 break;
3564         }
3565         kvm_pic_update_irq(pic_irqchip(kvm));
3566         return r;
3567 }
3568
3569 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3570 {
3571         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3572         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3573         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3574         return 0;
3575 }
3576
3577 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3578 {
3579         int i;
3580         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3581         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3582         for (i = 0; i < 3; i++)
3583                 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3584         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3585         return 0;
3586 }
3587
3588 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3589 {
3590         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3591         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3592                 sizeof(ps->channels));
3593         ps->flags = kvm->arch.vpit->pit_state.flags;
3594         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3595         memset(&ps->reserved, 0, sizeof(ps->reserved));
3596         return 0;
3597 }
3598
3599 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3600 {
3601         int start = 0;
3602         int i;
3603         u32 prev_legacy, cur_legacy;
3604         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3605         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3606         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3607         if (!prev_legacy && cur_legacy)
3608                 start = 1;
3609         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3610                sizeof(kvm->arch.vpit->pit_state.channels));
3611         kvm->arch.vpit->pit_state.flags = ps->flags;
3612         for (i = 0; i < 3; i++)
3613                 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3614                                    start && i == 0);
3615         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3616         return 0;
3617 }
3618
3619 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3620                                  struct kvm_reinject_control *control)
3621 {
3622         if (!kvm->arch.vpit)
3623                 return -ENXIO;
3624         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3625         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3626         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3627         return 0;
3628 }
3629
3630 /**
3631  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3632  * @kvm: kvm instance
3633  * @log: slot id and address to which we copy the log
3634  *
3635  * Steps 1-4 below provide general overview of dirty page logging. See
3636  * kvm_get_dirty_log_protect() function description for additional details.
3637  *
3638  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3639  * always flush the TLB (step 4) even if previous step failed  and the dirty
3640  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3641  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3642  * writes will be marked dirty for next log read.
3643  *
3644  *   1. Take a snapshot of the bit and clear it if needed.
3645  *   2. Write protect the corresponding page.
3646  *   3. Copy the snapshot to the userspace.
3647  *   4. Flush TLB's if needed.
3648  */
3649 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3650 {
3651         bool is_dirty = false;
3652         int r;
3653
3654         mutex_lock(&kvm->slots_lock);
3655
3656         /*
3657          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3658          */
3659         if (kvm_x86_ops->flush_log_dirty)
3660                 kvm_x86_ops->flush_log_dirty(kvm);
3661
3662         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3663
3664         /*
3665          * All the TLBs can be flushed out of mmu lock, see the comments in
3666          * kvm_mmu_slot_remove_write_access().
3667          */
3668         lockdep_assert_held(&kvm->slots_lock);
3669         if (is_dirty)
3670                 kvm_flush_remote_tlbs(kvm);
3671
3672         mutex_unlock(&kvm->slots_lock);
3673         return r;
3674 }
3675
3676 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3677                         bool line_status)
3678 {
3679         if (!irqchip_in_kernel(kvm))
3680                 return -ENXIO;
3681
3682         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3683                                         irq_event->irq, irq_event->level,
3684                                         line_status);
3685         return 0;
3686 }
3687
3688 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3689                                    struct kvm_enable_cap *cap)
3690 {
3691         int r;
3692
3693         if (cap->flags)
3694                 return -EINVAL;
3695
3696         switch (cap->cap) {
3697         case KVM_CAP_DISABLE_QUIRKS:
3698                 kvm->arch.disabled_quirks = cap->args[0];
3699                 r = 0;
3700                 break;
3701         case KVM_CAP_SPLIT_IRQCHIP: {
3702                 mutex_lock(&kvm->lock);
3703                 r = -EINVAL;
3704                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3705                         goto split_irqchip_unlock;
3706                 r = -EEXIST;
3707                 if (irqchip_in_kernel(kvm))
3708                         goto split_irqchip_unlock;
3709                 if (atomic_read(&kvm->online_vcpus))
3710                         goto split_irqchip_unlock;
3711                 r = kvm_setup_empty_irq_routing(kvm);
3712                 if (r)
3713                         goto split_irqchip_unlock;
3714                 /* Pairs with irqchip_in_kernel. */
3715                 smp_wmb();
3716                 kvm->arch.irqchip_split = true;
3717                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3718                 r = 0;
3719 split_irqchip_unlock:
3720                 mutex_unlock(&kvm->lock);
3721                 break;
3722         }
3723         default:
3724                 r = -EINVAL;
3725                 break;
3726         }
3727         return r;
3728 }
3729
3730 long kvm_arch_vm_ioctl(struct file *filp,
3731                        unsigned int ioctl, unsigned long arg)
3732 {
3733         struct kvm *kvm = filp->private_data;
3734         void __user *argp = (void __user *)arg;
3735         int r = -ENOTTY;
3736         /*
3737          * This union makes it completely explicit to gcc-3.x
3738          * that these two variables' stack usage should be
3739          * combined, not added together.
3740          */
3741         union {
3742                 struct kvm_pit_state ps;
3743                 struct kvm_pit_state2 ps2;
3744                 struct kvm_pit_config pit_config;
3745         } u;
3746
3747         switch (ioctl) {
3748         case KVM_SET_TSS_ADDR:
3749                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3750                 break;
3751         case KVM_SET_IDENTITY_MAP_ADDR: {
3752                 u64 ident_addr;
3753
3754                 r = -EFAULT;
3755                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3756                         goto out;
3757                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3758                 break;
3759         }
3760         case KVM_SET_NR_MMU_PAGES:
3761                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3762                 break;
3763         case KVM_GET_NR_MMU_PAGES:
3764                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3765                 break;
3766         case KVM_CREATE_IRQCHIP: {
3767                 struct kvm_pic *vpic;
3768
3769                 mutex_lock(&kvm->lock);
3770                 r = -EEXIST;
3771                 if (kvm->arch.vpic)
3772                         goto create_irqchip_unlock;
3773                 r = -EINVAL;
3774                 if (atomic_read(&kvm->online_vcpus))
3775                         goto create_irqchip_unlock;
3776                 r = -ENOMEM;
3777                 vpic = kvm_create_pic(kvm);
3778                 if (vpic) {
3779                         r = kvm_ioapic_init(kvm);
3780                         if (r) {
3781                                 mutex_lock(&kvm->slots_lock);
3782                                 kvm_destroy_pic(vpic);
3783                                 mutex_unlock(&kvm->slots_lock);
3784                                 goto create_irqchip_unlock;
3785                         }
3786                 } else
3787                         goto create_irqchip_unlock;
3788                 r = kvm_setup_default_irq_routing(kvm);
3789                 if (r) {
3790                         mutex_lock(&kvm->slots_lock);
3791                         mutex_lock(&kvm->irq_lock);
3792                         kvm_ioapic_destroy(kvm);
3793                         kvm_destroy_pic(vpic);
3794                         mutex_unlock(&kvm->irq_lock);
3795                         mutex_unlock(&kvm->slots_lock);
3796                         goto create_irqchip_unlock;
3797                 }
3798                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3799                 smp_wmb();
3800                 kvm->arch.vpic = vpic;
3801         create_irqchip_unlock:
3802                 mutex_unlock(&kvm->lock);
3803                 break;
3804         }
3805         case KVM_CREATE_PIT:
3806                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3807                 goto create_pit;
3808         case KVM_CREATE_PIT2:
3809                 r = -EFAULT;
3810                 if (copy_from_user(&u.pit_config, argp,
3811                                    sizeof(struct kvm_pit_config)))
3812                         goto out;
3813         create_pit:
3814                 mutex_lock(&kvm->slots_lock);
3815                 r = -EEXIST;
3816                 if (kvm->arch.vpit)
3817                         goto create_pit_unlock;
3818                 r = -ENOMEM;
3819                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3820                 if (kvm->arch.vpit)
3821                         r = 0;
3822         create_pit_unlock:
3823                 mutex_unlock(&kvm->slots_lock);
3824                 break;
3825         case KVM_GET_IRQCHIP: {
3826                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3827                 struct kvm_irqchip *chip;
3828
3829                 chip = memdup_user(argp, sizeof(*chip));
3830                 if (IS_ERR(chip)) {
3831                         r = PTR_ERR(chip);
3832                         goto out;
3833                 }
3834
3835                 r = -ENXIO;
3836                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3837                         goto get_irqchip_out;
3838                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3839                 if (r)
3840                         goto get_irqchip_out;
3841                 r = -EFAULT;
3842                 if (copy_to_user(argp, chip, sizeof *chip))
3843                         goto get_irqchip_out;
3844                 r = 0;
3845         get_irqchip_out:
3846                 kfree(chip);
3847                 break;
3848         }
3849         case KVM_SET_IRQCHIP: {
3850                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3851                 struct kvm_irqchip *chip;
3852
3853                 chip = memdup_user(argp, sizeof(*chip));
3854                 if (IS_ERR(chip)) {
3855                         r = PTR_ERR(chip);
3856                         goto out;
3857                 }
3858
3859                 r = -ENXIO;
3860                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3861                         goto set_irqchip_out;
3862                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3863                 if (r)
3864                         goto set_irqchip_out;
3865                 r = 0;
3866         set_irqchip_out:
3867                 kfree(chip);
3868                 break;
3869         }
3870         case KVM_GET_PIT: {
3871                 r = -EFAULT;
3872                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3873                         goto out;
3874                 r = -ENXIO;
3875                 if (!kvm->arch.vpit)
3876                         goto out;
3877                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3878                 if (r)
3879                         goto out;
3880                 r = -EFAULT;
3881                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3882                         goto out;
3883                 r = 0;
3884                 break;
3885         }
3886         case KVM_SET_PIT: {
3887                 r = -EFAULT;
3888                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3889                         goto out;
3890                 r = -ENXIO;
3891                 if (!kvm->arch.vpit)
3892                         goto out;
3893                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3894                 break;
3895         }
3896         case KVM_GET_PIT2: {
3897                 r = -ENXIO;
3898                 if (!kvm->arch.vpit)
3899                         goto out;
3900                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3901                 if (r)
3902                         goto out;
3903                 r = -EFAULT;
3904                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3905                         goto out;
3906                 r = 0;
3907                 break;
3908         }
3909         case KVM_SET_PIT2: {
3910                 r = -EFAULT;
3911                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3912                         goto out;
3913                 r = -ENXIO;
3914                 if (!kvm->arch.vpit)
3915                         goto out;
3916                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3917                 break;
3918         }
3919         case KVM_REINJECT_CONTROL: {
3920                 struct kvm_reinject_control control;
3921                 r =  -EFAULT;
3922                 if (copy_from_user(&control, argp, sizeof(control)))
3923                         goto out;
3924                 r = kvm_vm_ioctl_reinject(kvm, &control);
3925                 break;
3926         }
3927         case KVM_SET_BOOT_CPU_ID:
3928                 r = 0;
3929                 mutex_lock(&kvm->lock);
3930                 if (atomic_read(&kvm->online_vcpus) != 0)
3931                         r = -EBUSY;
3932                 else
3933                         kvm->arch.bsp_vcpu_id = arg;
3934                 mutex_unlock(&kvm->lock);
3935                 break;
3936         case KVM_XEN_HVM_CONFIG: {
3937                 r = -EFAULT;
3938                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3939                                    sizeof(struct kvm_xen_hvm_config)))
3940                         goto out;
3941                 r = -EINVAL;
3942                 if (kvm->arch.xen_hvm_config.flags)
3943                         goto out;
3944                 r = 0;
3945                 break;
3946         }
3947         case KVM_SET_CLOCK: {
3948                 struct kvm_clock_data user_ns;
3949                 u64 now_ns;
3950                 s64 delta;
3951
3952                 r = -EFAULT;
3953                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3954                         goto out;
3955
3956                 r = -EINVAL;
3957                 if (user_ns.flags)
3958                         goto out;
3959
3960                 r = 0;
3961                 local_irq_disable();
3962                 now_ns = get_kernel_ns();
3963                 delta = user_ns.clock - now_ns;
3964                 local_irq_enable();
3965                 kvm->arch.kvmclock_offset = delta;
3966                 kvm_gen_update_masterclock(kvm);
3967                 break;
3968         }
3969         case KVM_GET_CLOCK: {
3970                 struct kvm_clock_data user_ns;
3971                 u64 now_ns;
3972
3973                 local_irq_disable();
3974                 now_ns = get_kernel_ns();
3975                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3976                 local_irq_enable();
3977                 user_ns.flags = 0;
3978                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3979
3980                 r = -EFAULT;
3981                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3982                         goto out;
3983                 r = 0;
3984                 break;
3985         }
3986         case KVM_ENABLE_CAP: {
3987                 struct kvm_enable_cap cap;
3988
3989                 r = -EFAULT;
3990                 if (copy_from_user(&cap, argp, sizeof(cap)))
3991                         goto out;
3992                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3993                 break;
3994         }
3995         default:
3996                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3997         }
3998 out:
3999         return r;
4000 }
4001
4002 static void kvm_init_msr_list(void)
4003 {
4004         u32 dummy[2];
4005         unsigned i, j;
4006
4007         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4008                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4009                         continue;
4010
4011                 /*
4012                  * Even MSRs that are valid in the host may not be exposed
4013                  * to the guests in some cases.
4014                  */
4015                 switch (msrs_to_save[i]) {
4016                 case MSR_IA32_BNDCFGS:
4017                         if (!kvm_x86_ops->mpx_supported())
4018                                 continue;
4019                         break;
4020                 case MSR_TSC_AUX:
4021                         if (!kvm_x86_ops->rdtscp_supported())
4022                                 continue;
4023                         break;
4024                 default:
4025                         break;
4026                 }
4027
4028                 if (j < i)
4029                         msrs_to_save[j] = msrs_to_save[i];
4030                 j++;
4031         }
4032         num_msrs_to_save = j;
4033
4034         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4035                 switch (emulated_msrs[i]) {
4036                 case MSR_IA32_SMBASE:
4037                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4038                                 continue;
4039                         break;
4040                 default:
4041                         break;
4042                 }
4043
4044                 if (j < i)
4045                         emulated_msrs[j] = emulated_msrs[i];
4046                 j++;
4047         }
4048         num_emulated_msrs = j;
4049 }
4050
4051 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4052                            const void *v)
4053 {
4054         int handled = 0;
4055         int n;
4056
4057         do {
4058                 n = min(len, 8);
4059                 if (!(vcpu->arch.apic &&
4060                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4061                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4062                         break;
4063                 handled += n;
4064                 addr += n;
4065                 len -= n;
4066                 v += n;
4067         } while (len);
4068
4069         return handled;
4070 }
4071
4072 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4073 {
4074         int handled = 0;
4075         int n;
4076
4077         do {
4078                 n = min(len, 8);
4079                 if (!(vcpu->arch.apic &&
4080                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4081                                          addr, n, v))
4082                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4083                         break;
4084                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4085                 handled += n;
4086                 addr += n;
4087                 len -= n;
4088                 v += n;
4089         } while (len);
4090
4091         return handled;
4092 }
4093
4094 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4095                         struct kvm_segment *var, int seg)
4096 {
4097         kvm_x86_ops->set_segment(vcpu, var, seg);
4098 }
4099
4100 void kvm_get_segment(struct kvm_vcpu *vcpu,
4101                      struct kvm_segment *var, int seg)
4102 {
4103         kvm_x86_ops->get_segment(vcpu, var, seg);
4104 }
4105
4106 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4107                            struct x86_exception *exception)
4108 {
4109         gpa_t t_gpa;
4110
4111         BUG_ON(!mmu_is_nested(vcpu));
4112
4113         /* NPT walks are always user-walks */
4114         access |= PFERR_USER_MASK;
4115         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4116
4117         return t_gpa;
4118 }
4119
4120 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4121                               struct x86_exception *exception)
4122 {
4123         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4124         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4125 }
4126
4127  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4128                                 struct x86_exception *exception)
4129 {
4130         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4131         access |= PFERR_FETCH_MASK;
4132         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4133 }
4134
4135 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4136                                struct x86_exception *exception)
4137 {
4138         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4139         access |= PFERR_WRITE_MASK;
4140         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4141 }
4142
4143 /* uses this to access any guest's mapped memory without checking CPL */
4144 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4145                                 struct x86_exception *exception)
4146 {
4147         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4148 }
4149
4150 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4151                                       struct kvm_vcpu *vcpu, u32 access,
4152                                       struct x86_exception *exception)
4153 {
4154         void *data = val;
4155         int r = X86EMUL_CONTINUE;
4156
4157         while (bytes) {
4158                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4159                                                             exception);
4160                 unsigned offset = addr & (PAGE_SIZE-1);
4161                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4162                 int ret;
4163
4164                 if (gpa == UNMAPPED_GVA)
4165                         return X86EMUL_PROPAGATE_FAULT;
4166                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4167                                                offset, toread);
4168                 if (ret < 0) {
4169                         r = X86EMUL_IO_NEEDED;
4170                         goto out;
4171                 }
4172
4173                 bytes -= toread;
4174                 data += toread;
4175                 addr += toread;
4176         }
4177 out:
4178         return r;
4179 }
4180
4181 /* used for instruction fetching */
4182 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4183                                 gva_t addr, void *val, unsigned int bytes,
4184                                 struct x86_exception *exception)
4185 {
4186         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4187         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4188         unsigned offset;
4189         int ret;
4190
4191         /* Inline kvm_read_guest_virt_helper for speed.  */
4192         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4193                                                     exception);
4194         if (unlikely(gpa == UNMAPPED_GVA))
4195                 return X86EMUL_PROPAGATE_FAULT;
4196
4197         offset = addr & (PAGE_SIZE-1);
4198         if (WARN_ON(offset + bytes > PAGE_SIZE))
4199                 bytes = (unsigned)PAGE_SIZE - offset;
4200         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4201                                        offset, bytes);
4202         if (unlikely(ret < 0))
4203                 return X86EMUL_IO_NEEDED;
4204
4205         return X86EMUL_CONTINUE;
4206 }
4207
4208 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4209                                gva_t addr, void *val, unsigned int bytes,
4210                                struct x86_exception *exception)
4211 {
4212         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4213         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4214
4215         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4216                                           exception);
4217 }
4218 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4219
4220 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4221                                       gva_t addr, void *val, unsigned int bytes,
4222                                       struct x86_exception *exception)
4223 {
4224         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4225         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4226 }
4227
4228 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4229                 unsigned long addr, void *val, unsigned int bytes)
4230 {
4231         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4232         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4233
4234         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4235 }
4236
4237 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4238                                        gva_t addr, void *val,
4239                                        unsigned int bytes,
4240                                        struct x86_exception *exception)
4241 {
4242         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4243         void *data = val;
4244         int r = X86EMUL_CONTINUE;
4245
4246         while (bytes) {
4247                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4248                                                              PFERR_WRITE_MASK,
4249                                                              exception);
4250                 unsigned offset = addr & (PAGE_SIZE-1);
4251                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4252                 int ret;
4253
4254                 if (gpa == UNMAPPED_GVA)
4255                         return X86EMUL_PROPAGATE_FAULT;
4256                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4257                 if (ret < 0) {
4258                         r = X86EMUL_IO_NEEDED;
4259                         goto out;
4260                 }
4261
4262                 bytes -= towrite;
4263                 data += towrite;
4264                 addr += towrite;
4265         }
4266 out:
4267         return r;
4268 }
4269 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4270
4271 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4272                                 gpa_t *gpa, struct x86_exception *exception,
4273                                 bool write)
4274 {
4275         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4276                 | (write ? PFERR_WRITE_MASK : 0);
4277
4278         if (vcpu_match_mmio_gva(vcpu, gva)
4279             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4280                                  vcpu->arch.access, access)) {
4281                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4282                                         (gva & (PAGE_SIZE - 1));
4283                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4284                 return 1;
4285         }
4286
4287         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4288
4289         if (*gpa == UNMAPPED_GVA)
4290                 return -1;
4291
4292         /* For APIC access vmexit */
4293         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4294                 return 1;
4295
4296         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4297                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4298                 return 1;
4299         }
4300
4301         return 0;
4302 }
4303
4304 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4305                         const void *val, int bytes)
4306 {
4307         int ret;
4308
4309         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4310         if (ret < 0)
4311                 return 0;
4312         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4313         return 1;
4314 }
4315
4316 struct read_write_emulator_ops {
4317         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4318                                   int bytes);
4319         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4320                                   void *val, int bytes);
4321         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4322                                int bytes, void *val);
4323         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4324                                     void *val, int bytes);
4325         bool write;
4326 };
4327
4328 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4329 {
4330         if (vcpu->mmio_read_completed) {
4331                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4332                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4333                 vcpu->mmio_read_completed = 0;
4334                 return 1;
4335         }
4336
4337         return 0;
4338 }
4339
4340 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4341                         void *val, int bytes)
4342 {
4343         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4344 }
4345
4346 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4347                          void *val, int bytes)
4348 {
4349         return emulator_write_phys(vcpu, gpa, val, bytes);
4350 }
4351
4352 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4353 {
4354         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4355         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4356 }
4357
4358 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4359                           void *val, int bytes)
4360 {
4361         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4362         return X86EMUL_IO_NEEDED;
4363 }
4364
4365 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4366                            void *val, int bytes)
4367 {
4368         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4369
4370         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4371         return X86EMUL_CONTINUE;
4372 }
4373
4374 static const struct read_write_emulator_ops read_emultor = {
4375         .read_write_prepare = read_prepare,
4376         .read_write_emulate = read_emulate,
4377         .read_write_mmio = vcpu_mmio_read,
4378         .read_write_exit_mmio = read_exit_mmio,
4379 };
4380
4381 static const struct read_write_emulator_ops write_emultor = {
4382         .read_write_emulate = write_emulate,
4383         .read_write_mmio = write_mmio,
4384         .read_write_exit_mmio = write_exit_mmio,
4385         .write = true,
4386 };
4387
4388 static int emulator_read_write_onepage(unsigned long addr, void *val,
4389                                        unsigned int bytes,
4390                                        struct x86_exception *exception,
4391                                        struct kvm_vcpu *vcpu,
4392                                        const struct read_write_emulator_ops *ops)
4393 {
4394         gpa_t gpa;
4395         int handled, ret;
4396         bool write = ops->write;
4397         struct kvm_mmio_fragment *frag;
4398
4399         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4400
4401         if (ret < 0)
4402                 return X86EMUL_PROPAGATE_FAULT;
4403
4404         /* For APIC access vmexit */
4405         if (ret)
4406                 goto mmio;
4407
4408         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4409                 return X86EMUL_CONTINUE;
4410
4411 mmio:
4412         /*
4413          * Is this MMIO handled locally?
4414          */
4415         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4416         if (handled == bytes)
4417                 return X86EMUL_CONTINUE;
4418
4419         gpa += handled;
4420         bytes -= handled;
4421         val += handled;
4422
4423         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4424         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4425         frag->gpa = gpa;
4426         frag->data = val;
4427         frag->len = bytes;
4428         return X86EMUL_CONTINUE;
4429 }
4430
4431 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4432                         unsigned long addr,
4433                         void *val, unsigned int bytes,
4434                         struct x86_exception *exception,
4435                         const struct read_write_emulator_ops *ops)
4436 {
4437         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4438         gpa_t gpa;
4439         int rc;
4440
4441         if (ops->read_write_prepare &&
4442                   ops->read_write_prepare(vcpu, val, bytes))
4443                 return X86EMUL_CONTINUE;
4444
4445         vcpu->mmio_nr_fragments = 0;
4446
4447         /* Crossing a page boundary? */
4448         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4449                 int now;
4450
4451                 now = -addr & ~PAGE_MASK;
4452                 rc = emulator_read_write_onepage(addr, val, now, exception,
4453                                                  vcpu, ops);
4454
4455                 if (rc != X86EMUL_CONTINUE)
4456                         return rc;
4457                 addr += now;
4458                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4459                         addr = (u32)addr;
4460                 val += now;
4461                 bytes -= now;
4462         }
4463
4464         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4465                                          vcpu, ops);
4466         if (rc != X86EMUL_CONTINUE)
4467                 return rc;
4468
4469         if (!vcpu->mmio_nr_fragments)
4470                 return rc;
4471
4472         gpa = vcpu->mmio_fragments[0].gpa;
4473
4474         vcpu->mmio_needed = 1;
4475         vcpu->mmio_cur_fragment = 0;
4476
4477         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4478         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4479         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4480         vcpu->run->mmio.phys_addr = gpa;
4481
4482         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4483 }
4484
4485 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4486                                   unsigned long addr,
4487                                   void *val,
4488                                   unsigned int bytes,
4489                                   struct x86_exception *exception)
4490 {
4491         return emulator_read_write(ctxt, addr, val, bytes,
4492                                    exception, &read_emultor);
4493 }
4494
4495 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4496                             unsigned long addr,
4497                             const void *val,
4498                             unsigned int bytes,
4499                             struct x86_exception *exception)
4500 {
4501         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4502                                    exception, &write_emultor);
4503 }
4504
4505 #define CMPXCHG_TYPE(t, ptr, old, new) \
4506         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4507
4508 #ifdef CONFIG_X86_64
4509 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4510 #else
4511 #  define CMPXCHG64(ptr, old, new) \
4512         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4513 #endif
4514
4515 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4516                                      unsigned long addr,
4517                                      const void *old,
4518                                      const void *new,
4519                                      unsigned int bytes,
4520                                      struct x86_exception *exception)
4521 {
4522         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4523         gpa_t gpa;
4524         struct page *page;
4525         char *kaddr;
4526         bool exchanged;
4527
4528         /* guests cmpxchg8b have to be emulated atomically */
4529         if (bytes > 8 || (bytes & (bytes - 1)))
4530                 goto emul_write;
4531
4532         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4533
4534         if (gpa == UNMAPPED_GVA ||
4535             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4536                 goto emul_write;
4537
4538         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4539                 goto emul_write;
4540
4541         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4542         if (is_error_page(page))
4543                 goto emul_write;
4544
4545         kaddr = kmap_atomic(page);
4546         kaddr += offset_in_page(gpa);
4547         switch (bytes) {
4548         case 1:
4549                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4550                 break;
4551         case 2:
4552                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4553                 break;
4554         case 4:
4555                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4556                 break;
4557         case 8:
4558                 exchanged = CMPXCHG64(kaddr, old, new);
4559                 break;
4560         default:
4561                 BUG();
4562         }
4563         kunmap_atomic(kaddr);
4564         kvm_release_page_dirty(page);
4565
4566         if (!exchanged)
4567                 return X86EMUL_CMPXCHG_FAILED;
4568
4569         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4570         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4571
4572         return X86EMUL_CONTINUE;
4573
4574 emul_write:
4575         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4576
4577         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4578 }
4579
4580 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4581 {
4582         /* TODO: String I/O for in kernel device */
4583         int r;
4584
4585         if (vcpu->arch.pio.in)
4586                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4587                                     vcpu->arch.pio.size, pd);
4588         else
4589                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4590                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4591                                      pd);
4592         return r;
4593 }
4594
4595 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4596                                unsigned short port, void *val,
4597                                unsigned int count, bool in)
4598 {
4599         vcpu->arch.pio.port = port;
4600         vcpu->arch.pio.in = in;
4601         vcpu->arch.pio.count  = count;
4602         vcpu->arch.pio.size = size;
4603
4604         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4605                 vcpu->arch.pio.count = 0;
4606                 return 1;
4607         }
4608
4609         vcpu->run->exit_reason = KVM_EXIT_IO;
4610         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4611         vcpu->run->io.size = size;
4612         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4613         vcpu->run->io.count = count;
4614         vcpu->run->io.port = port;
4615
4616         return 0;
4617 }
4618
4619 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4620                                     int size, unsigned short port, void *val,
4621                                     unsigned int count)
4622 {
4623         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4624         int ret;
4625
4626         if (vcpu->arch.pio.count)
4627                 goto data_avail;
4628
4629         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4630         if (ret) {
4631 data_avail:
4632                 memcpy(val, vcpu->arch.pio_data, size * count);
4633                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4634                 vcpu->arch.pio.count = 0;
4635                 return 1;
4636         }
4637
4638         return 0;
4639 }
4640
4641 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4642                                      int size, unsigned short port,
4643                                      const void *val, unsigned int count)
4644 {
4645         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4646
4647         memcpy(vcpu->arch.pio_data, val, size * count);
4648         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4649         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4650 }
4651
4652 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4653 {
4654         return kvm_x86_ops->get_segment_base(vcpu, seg);
4655 }
4656
4657 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4658 {
4659         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4660 }
4661
4662 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4663 {
4664         if (!need_emulate_wbinvd(vcpu))
4665                 return X86EMUL_CONTINUE;
4666
4667         if (kvm_x86_ops->has_wbinvd_exit()) {
4668                 int cpu = get_cpu();
4669
4670                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4671                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4672                                 wbinvd_ipi, NULL, 1);
4673                 put_cpu();
4674                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4675         } else
4676                 wbinvd();
4677         return X86EMUL_CONTINUE;
4678 }
4679
4680 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4681 {
4682         kvm_x86_ops->skip_emulated_instruction(vcpu);
4683         return kvm_emulate_wbinvd_noskip(vcpu);
4684 }
4685 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4686
4687
4688
4689 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4690 {
4691         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4692 }
4693
4694 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4695                            unsigned long *dest)
4696 {
4697         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4698 }
4699
4700 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4701                            unsigned long value)
4702 {
4703
4704         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4705 }
4706
4707 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4708 {
4709         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4710 }
4711
4712 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4713 {
4714         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4715         unsigned long value;
4716
4717         switch (cr) {
4718         case 0:
4719                 value = kvm_read_cr0(vcpu);
4720                 break;
4721         case 2:
4722                 value = vcpu->arch.cr2;
4723                 break;
4724         case 3:
4725                 value = kvm_read_cr3(vcpu);
4726                 break;
4727         case 4:
4728                 value = kvm_read_cr4(vcpu);
4729                 break;
4730         case 8:
4731                 value = kvm_get_cr8(vcpu);
4732                 break;
4733         default:
4734                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4735                 return 0;
4736         }
4737
4738         return value;
4739 }
4740
4741 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4742 {
4743         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4744         int res = 0;
4745
4746         switch (cr) {
4747         case 0:
4748                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4749                 break;
4750         case 2:
4751                 vcpu->arch.cr2 = val;
4752                 break;
4753         case 3:
4754                 res = kvm_set_cr3(vcpu, val);
4755                 break;
4756         case 4:
4757                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4758                 break;
4759         case 8:
4760                 res = kvm_set_cr8(vcpu, val);
4761                 break;
4762         default:
4763                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4764                 res = -1;
4765         }
4766
4767         return res;
4768 }
4769
4770 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4771 {
4772         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4773 }
4774
4775 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4776 {
4777         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4778 }
4779
4780 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4781 {
4782         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4783 }
4784
4785 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4786 {
4787         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4788 }
4789
4790 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4791 {
4792         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4793 }
4794
4795 static unsigned long emulator_get_cached_segment_base(
4796         struct x86_emulate_ctxt *ctxt, int seg)
4797 {
4798         return get_segment_base(emul_to_vcpu(ctxt), seg);
4799 }
4800
4801 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4802                                  struct desc_struct *desc, u32 *base3,
4803                                  int seg)
4804 {
4805         struct kvm_segment var;
4806
4807         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4808         *selector = var.selector;
4809
4810         if (var.unusable) {
4811                 memset(desc, 0, sizeof(*desc));
4812                 return false;
4813         }
4814
4815         if (var.g)
4816                 var.limit >>= 12;
4817         set_desc_limit(desc, var.limit);
4818         set_desc_base(desc, (unsigned long)var.base);
4819 #ifdef CONFIG_X86_64
4820         if (base3)
4821                 *base3 = var.base >> 32;
4822 #endif
4823         desc->type = var.type;
4824         desc->s = var.s;
4825         desc->dpl = var.dpl;
4826         desc->p = var.present;
4827         desc->avl = var.avl;
4828         desc->l = var.l;
4829         desc->d = var.db;
4830         desc->g = var.g;
4831
4832         return true;
4833 }
4834
4835 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4836                                  struct desc_struct *desc, u32 base3,
4837                                  int seg)
4838 {
4839         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4840         struct kvm_segment var;
4841
4842         var.selector = selector;
4843         var.base = get_desc_base(desc);
4844 #ifdef CONFIG_X86_64
4845         var.base |= ((u64)base3) << 32;
4846 #endif
4847         var.limit = get_desc_limit(desc);
4848         if (desc->g)
4849                 var.limit = (var.limit << 12) | 0xfff;
4850         var.type = desc->type;
4851         var.dpl = desc->dpl;
4852         var.db = desc->d;
4853         var.s = desc->s;
4854         var.l = desc->l;
4855         var.g = desc->g;
4856         var.avl = desc->avl;
4857         var.present = desc->p;
4858         var.unusable = !var.present;
4859         var.padding = 0;
4860
4861         kvm_set_segment(vcpu, &var, seg);
4862         return;
4863 }
4864
4865 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4866                             u32 msr_index, u64 *pdata)
4867 {
4868         struct msr_data msr;
4869         int r;
4870
4871         msr.index = msr_index;
4872         msr.host_initiated = false;
4873         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4874         if (r)
4875                 return r;
4876
4877         *pdata = msr.data;
4878         return 0;
4879 }
4880
4881 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4882                             u32 msr_index, u64 data)
4883 {
4884         struct msr_data msr;
4885
4886         msr.data = data;
4887         msr.index = msr_index;
4888         msr.host_initiated = false;
4889         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4890 }
4891
4892 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4893 {
4894         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4895
4896         return vcpu->arch.smbase;
4897 }
4898
4899 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4900 {
4901         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4902
4903         vcpu->arch.smbase = smbase;
4904 }
4905
4906 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4907                               u32 pmc)
4908 {
4909         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4910 }
4911
4912 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4913                              u32 pmc, u64 *pdata)
4914 {
4915         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4916 }
4917
4918 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4919 {
4920         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4921 }
4922
4923 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4924 {
4925         preempt_disable();
4926         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4927         /*
4928          * CR0.TS may reference the host fpu state, not the guest fpu state,
4929          * so it may be clear at this point.
4930          */
4931         clts();
4932 }
4933
4934 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4935 {
4936         preempt_enable();
4937 }
4938
4939 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4940                               struct x86_instruction_info *info,
4941                               enum x86_intercept_stage stage)
4942 {
4943         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4944 }
4945
4946 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4947                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4948 {
4949         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4950 }
4951
4952 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4953 {
4954         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4955 }
4956
4957 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4958 {
4959         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4960 }
4961
4962 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4963 {
4964         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4965 }
4966
4967 static const struct x86_emulate_ops emulate_ops = {
4968         .read_gpr            = emulator_read_gpr,
4969         .write_gpr           = emulator_write_gpr,
4970         .read_std            = kvm_read_guest_virt_system,
4971         .write_std           = kvm_write_guest_virt_system,
4972         .read_phys           = kvm_read_guest_phys_system,
4973         .fetch               = kvm_fetch_guest_virt,
4974         .read_emulated       = emulator_read_emulated,
4975         .write_emulated      = emulator_write_emulated,
4976         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4977         .invlpg              = emulator_invlpg,
4978         .pio_in_emulated     = emulator_pio_in_emulated,
4979         .pio_out_emulated    = emulator_pio_out_emulated,
4980         .get_segment         = emulator_get_segment,
4981         .set_segment         = emulator_set_segment,
4982         .get_cached_segment_base = emulator_get_cached_segment_base,
4983         .get_gdt             = emulator_get_gdt,
4984         .get_idt             = emulator_get_idt,
4985         .set_gdt             = emulator_set_gdt,
4986         .set_idt             = emulator_set_idt,
4987         .get_cr              = emulator_get_cr,
4988         .set_cr              = emulator_set_cr,
4989         .cpl                 = emulator_get_cpl,
4990         .get_dr              = emulator_get_dr,
4991         .set_dr              = emulator_set_dr,
4992         .get_smbase          = emulator_get_smbase,
4993         .set_smbase          = emulator_set_smbase,
4994         .set_msr             = emulator_set_msr,
4995         .get_msr             = emulator_get_msr,
4996         .check_pmc           = emulator_check_pmc,
4997         .read_pmc            = emulator_read_pmc,
4998         .halt                = emulator_halt,
4999         .wbinvd              = emulator_wbinvd,
5000         .fix_hypercall       = emulator_fix_hypercall,
5001         .get_fpu             = emulator_get_fpu,
5002         .put_fpu             = emulator_put_fpu,
5003         .intercept           = emulator_intercept,
5004         .get_cpuid           = emulator_get_cpuid,
5005         .set_nmi_mask        = emulator_set_nmi_mask,
5006 };
5007
5008 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5009 {
5010         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5011         /*
5012          * an sti; sti; sequence only disable interrupts for the first
5013          * instruction. So, if the last instruction, be it emulated or
5014          * not, left the system with the INT_STI flag enabled, it
5015          * means that the last instruction is an sti. We should not
5016          * leave the flag on in this case. The same goes for mov ss
5017          */
5018         if (int_shadow & mask)
5019                 mask = 0;
5020         if (unlikely(int_shadow || mask)) {
5021                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5022                 if (!mask)
5023                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5024         }
5025 }
5026
5027 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5028 {
5029         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5030         if (ctxt->exception.vector == PF_VECTOR)
5031                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5032
5033         if (ctxt->exception.error_code_valid)
5034                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5035                                       ctxt->exception.error_code);
5036         else
5037                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5038         return false;
5039 }
5040
5041 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5042 {
5043         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5044         int cs_db, cs_l;
5045
5046         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5047
5048         ctxt->eflags = kvm_get_rflags(vcpu);
5049         ctxt->eip = kvm_rip_read(vcpu);
5050         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5051                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5052                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5053                      cs_db                              ? X86EMUL_MODE_PROT32 :
5054                                                           X86EMUL_MODE_PROT16;
5055         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5056         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5057         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5058         ctxt->emul_flags = vcpu->arch.hflags;
5059
5060         init_decode_cache(ctxt);
5061         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5062 }
5063
5064 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5065 {
5066         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5067         int ret;
5068
5069         init_emulate_ctxt(vcpu);
5070
5071         ctxt->op_bytes = 2;
5072         ctxt->ad_bytes = 2;
5073         ctxt->_eip = ctxt->eip + inc_eip;
5074         ret = emulate_int_real(ctxt, irq);
5075
5076         if (ret != X86EMUL_CONTINUE)
5077                 return EMULATE_FAIL;
5078
5079         ctxt->eip = ctxt->_eip;
5080         kvm_rip_write(vcpu, ctxt->eip);
5081         kvm_set_rflags(vcpu, ctxt->eflags);
5082
5083         if (irq == NMI_VECTOR)
5084                 vcpu->arch.nmi_pending = 0;
5085         else
5086                 vcpu->arch.interrupt.pending = false;
5087
5088         return EMULATE_DONE;
5089 }
5090 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5091
5092 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5093 {
5094         int r = EMULATE_DONE;
5095
5096         ++vcpu->stat.insn_emulation_fail;
5097         trace_kvm_emulate_insn_failed(vcpu);
5098         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5099                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5100                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5101                 vcpu->run->internal.ndata = 0;
5102                 r = EMULATE_FAIL;
5103         }
5104         kvm_queue_exception(vcpu, UD_VECTOR);
5105
5106         return r;
5107 }
5108
5109 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5110                                   bool write_fault_to_shadow_pgtable,
5111                                   int emulation_type)
5112 {
5113         gpa_t gpa = cr2;
5114         pfn_t pfn;
5115
5116         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5117                 return false;
5118
5119         if (!vcpu->arch.mmu.direct_map) {
5120                 /*
5121                  * Write permission should be allowed since only
5122                  * write access need to be emulated.
5123                  */
5124                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5125
5126                 /*
5127                  * If the mapping is invalid in guest, let cpu retry
5128                  * it to generate fault.
5129                  */
5130                 if (gpa == UNMAPPED_GVA)
5131                         return true;
5132         }
5133
5134         /*
5135          * Do not retry the unhandleable instruction if it faults on the
5136          * readonly host memory, otherwise it will goto a infinite loop:
5137          * retry instruction -> write #PF -> emulation fail -> retry
5138          * instruction -> ...
5139          */
5140         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5141
5142         /*
5143          * If the instruction failed on the error pfn, it can not be fixed,
5144          * report the error to userspace.
5145          */
5146         if (is_error_noslot_pfn(pfn))
5147                 return false;
5148
5149         kvm_release_pfn_clean(pfn);
5150
5151         /* The instructions are well-emulated on direct mmu. */
5152         if (vcpu->arch.mmu.direct_map) {
5153                 unsigned int indirect_shadow_pages;
5154
5155                 spin_lock(&vcpu->kvm->mmu_lock);
5156                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5157                 spin_unlock(&vcpu->kvm->mmu_lock);
5158
5159                 if (indirect_shadow_pages)
5160                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5161
5162                 return true;
5163         }
5164
5165         /*
5166          * if emulation was due to access to shadowed page table
5167          * and it failed try to unshadow page and re-enter the
5168          * guest to let CPU execute the instruction.
5169          */
5170         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5171
5172         /*
5173          * If the access faults on its page table, it can not
5174          * be fixed by unprotecting shadow page and it should
5175          * be reported to userspace.
5176          */
5177         return !write_fault_to_shadow_pgtable;
5178 }
5179
5180 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5181                               unsigned long cr2,  int emulation_type)
5182 {
5183         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5184         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5185
5186         last_retry_eip = vcpu->arch.last_retry_eip;
5187         last_retry_addr = vcpu->arch.last_retry_addr;
5188
5189         /*
5190          * If the emulation is caused by #PF and it is non-page_table
5191          * writing instruction, it means the VM-EXIT is caused by shadow
5192          * page protected, we can zap the shadow page and retry this
5193          * instruction directly.
5194          *
5195          * Note: if the guest uses a non-page-table modifying instruction
5196          * on the PDE that points to the instruction, then we will unmap
5197          * the instruction and go to an infinite loop. So, we cache the
5198          * last retried eip and the last fault address, if we meet the eip
5199          * and the address again, we can break out of the potential infinite
5200          * loop.
5201          */
5202         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5203
5204         if (!(emulation_type & EMULTYPE_RETRY))
5205                 return false;
5206
5207         if (x86_page_table_writing_insn(ctxt))
5208                 return false;
5209
5210         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5211                 return false;
5212
5213         vcpu->arch.last_retry_eip = ctxt->eip;
5214         vcpu->arch.last_retry_addr = cr2;
5215
5216         if (!vcpu->arch.mmu.direct_map)
5217                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5218
5219         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5220
5221         return true;
5222 }
5223
5224 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5225 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5226
5227 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5228 {
5229         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5230                 /* This is a good place to trace that we are exiting SMM.  */
5231                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5232
5233                 if (unlikely(vcpu->arch.smi_pending)) {
5234                         kvm_make_request(KVM_REQ_SMI, vcpu);
5235                         vcpu->arch.smi_pending = 0;
5236                 } else {
5237                         /* Process a latched INIT, if any.  */
5238                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5239                 }
5240         }
5241
5242         kvm_mmu_reset_context(vcpu);
5243 }
5244
5245 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5246 {
5247         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5248
5249         vcpu->arch.hflags = emul_flags;
5250
5251         if (changed & HF_SMM_MASK)
5252                 kvm_smm_changed(vcpu);
5253 }
5254
5255 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5256                                 unsigned long *db)
5257 {
5258         u32 dr6 = 0;
5259         int i;
5260         u32 enable, rwlen;
5261
5262         enable = dr7;
5263         rwlen = dr7 >> 16;
5264         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5265                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5266                         dr6 |= (1 << i);
5267         return dr6;
5268 }
5269
5270 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5271 {
5272         struct kvm_run *kvm_run = vcpu->run;
5273
5274         /*
5275          * rflags is the old, "raw" value of the flags.  The new value has
5276          * not been saved yet.
5277          *
5278          * This is correct even for TF set by the guest, because "the
5279          * processor will not generate this exception after the instruction
5280          * that sets the TF flag".
5281          */
5282         if (unlikely(rflags & X86_EFLAGS_TF)) {
5283                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5284                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5285                                                   DR6_RTM;
5286                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5287                         kvm_run->debug.arch.exception = DB_VECTOR;
5288                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5289                         *r = EMULATE_USER_EXIT;
5290                 } else {
5291                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5292                         /*
5293                          * "Certain debug exceptions may clear bit 0-3.  The
5294                          * remaining contents of the DR6 register are never
5295                          * cleared by the processor".
5296                          */
5297                         vcpu->arch.dr6 &= ~15;
5298                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5299                         kvm_queue_exception(vcpu, DB_VECTOR);
5300                 }
5301         }
5302 }
5303
5304 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5305 {
5306         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5307             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5308                 struct kvm_run *kvm_run = vcpu->run;
5309                 unsigned long eip = kvm_get_linear_rip(vcpu);
5310                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5311                                            vcpu->arch.guest_debug_dr7,
5312                                            vcpu->arch.eff_db);
5313
5314                 if (dr6 != 0) {
5315                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5316                         kvm_run->debug.arch.pc = eip;
5317                         kvm_run->debug.arch.exception = DB_VECTOR;
5318                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5319                         *r = EMULATE_USER_EXIT;
5320                         return true;
5321                 }
5322         }
5323
5324         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5325             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5326                 unsigned long eip = kvm_get_linear_rip(vcpu);
5327                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5328                                            vcpu->arch.dr7,
5329                                            vcpu->arch.db);
5330
5331                 if (dr6 != 0) {
5332                         vcpu->arch.dr6 &= ~15;
5333                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5334                         kvm_queue_exception(vcpu, DB_VECTOR);
5335                         *r = EMULATE_DONE;
5336                         return true;
5337                 }
5338         }
5339
5340         return false;
5341 }
5342
5343 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5344                             unsigned long cr2,
5345                             int emulation_type,
5346                             void *insn,
5347                             int insn_len)
5348 {
5349         int r;
5350         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5351         bool writeback = true;
5352         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5353
5354         /*
5355          * Clear write_fault_to_shadow_pgtable here to ensure it is
5356          * never reused.
5357          */
5358         vcpu->arch.write_fault_to_shadow_pgtable = false;
5359         kvm_clear_exception_queue(vcpu);
5360
5361         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5362                 init_emulate_ctxt(vcpu);
5363
5364                 /*
5365                  * We will reenter on the same instruction since
5366                  * we do not set complete_userspace_io.  This does not
5367                  * handle watchpoints yet, those would be handled in
5368                  * the emulate_ops.
5369                  */
5370                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5371                         return r;
5372
5373                 ctxt->interruptibility = 0;
5374                 ctxt->have_exception = false;
5375                 ctxt->exception.vector = -1;
5376                 ctxt->perm_ok = false;
5377
5378                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5379
5380                 r = x86_decode_insn(ctxt, insn, insn_len);
5381
5382                 trace_kvm_emulate_insn_start(vcpu);
5383                 ++vcpu->stat.insn_emulation;
5384                 if (r != EMULATION_OK)  {
5385                         if (emulation_type & EMULTYPE_TRAP_UD)
5386                                 return EMULATE_FAIL;
5387                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5388                                                 emulation_type))
5389                                 return EMULATE_DONE;
5390                         if (emulation_type & EMULTYPE_SKIP)
5391                                 return EMULATE_FAIL;
5392                         return handle_emulation_failure(vcpu);
5393                 }
5394         }
5395
5396         if (emulation_type & EMULTYPE_SKIP) {
5397                 kvm_rip_write(vcpu, ctxt->_eip);
5398                 if (ctxt->eflags & X86_EFLAGS_RF)
5399                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5400                 return EMULATE_DONE;
5401         }
5402
5403         if (retry_instruction(ctxt, cr2, emulation_type))
5404                 return EMULATE_DONE;
5405
5406         /* this is needed for vmware backdoor interface to work since it
5407            changes registers values  during IO operation */
5408         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5409                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5410                 emulator_invalidate_register_cache(ctxt);
5411         }
5412
5413 restart:
5414         r = x86_emulate_insn(ctxt);
5415
5416         if (r == EMULATION_INTERCEPTED)
5417                 return EMULATE_DONE;
5418
5419         if (r == EMULATION_FAILED) {
5420                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5421                                         emulation_type))
5422                         return EMULATE_DONE;
5423
5424                 return handle_emulation_failure(vcpu);
5425         }
5426
5427         if (ctxt->have_exception) {
5428                 r = EMULATE_DONE;
5429                 if (inject_emulated_exception(vcpu))
5430                         return r;
5431         } else if (vcpu->arch.pio.count) {
5432                 if (!vcpu->arch.pio.in) {
5433                         /* FIXME: return into emulator if single-stepping.  */
5434                         vcpu->arch.pio.count = 0;
5435                 } else {
5436                         writeback = false;
5437                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5438                 }
5439                 r = EMULATE_USER_EXIT;
5440         } else if (vcpu->mmio_needed) {
5441                 if (!vcpu->mmio_is_write)
5442                         writeback = false;
5443                 r = EMULATE_USER_EXIT;
5444                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5445         } else if (r == EMULATION_RESTART)
5446                 goto restart;
5447         else
5448                 r = EMULATE_DONE;
5449
5450         if (writeback) {
5451                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5452                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5453                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5454                 if (vcpu->arch.hflags != ctxt->emul_flags)
5455                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5456                 kvm_rip_write(vcpu, ctxt->eip);
5457                 if (r == EMULATE_DONE)
5458                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5459                 if (!ctxt->have_exception ||
5460                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5461                         __kvm_set_rflags(vcpu, ctxt->eflags);
5462
5463                 /*
5464                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5465                  * do nothing, and it will be requested again as soon as
5466                  * the shadow expires.  But we still need to check here,
5467                  * because POPF has no interrupt shadow.
5468                  */
5469                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5470                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5471         } else
5472                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5473
5474         return r;
5475 }
5476 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5477
5478 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5479 {
5480         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5481         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5482                                             size, port, &val, 1);
5483         /* do not return to emulator after return from userspace */
5484         vcpu->arch.pio.count = 0;
5485         return ret;
5486 }
5487 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5488
5489 static void tsc_bad(void *info)
5490 {
5491         __this_cpu_write(cpu_tsc_khz, 0);
5492 }
5493
5494 static void tsc_khz_changed(void *data)
5495 {
5496         struct cpufreq_freqs *freq = data;
5497         unsigned long khz = 0;
5498
5499         if (data)
5500                 khz = freq->new;
5501         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5502                 khz = cpufreq_quick_get(raw_smp_processor_id());
5503         if (!khz)
5504                 khz = tsc_khz;
5505         __this_cpu_write(cpu_tsc_khz, khz);
5506 }
5507
5508 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5509                                      void *data)
5510 {
5511         struct cpufreq_freqs *freq = data;
5512         struct kvm *kvm;
5513         struct kvm_vcpu *vcpu;
5514         int i, send_ipi = 0;
5515
5516         /*
5517          * We allow guests to temporarily run on slowing clocks,
5518          * provided we notify them after, or to run on accelerating
5519          * clocks, provided we notify them before.  Thus time never
5520          * goes backwards.
5521          *
5522          * However, we have a problem.  We can't atomically update
5523          * the frequency of a given CPU from this function; it is
5524          * merely a notifier, which can be called from any CPU.
5525          * Changing the TSC frequency at arbitrary points in time
5526          * requires a recomputation of local variables related to
5527          * the TSC for each VCPU.  We must flag these local variables
5528          * to be updated and be sure the update takes place with the
5529          * new frequency before any guests proceed.
5530          *
5531          * Unfortunately, the combination of hotplug CPU and frequency
5532          * change creates an intractable locking scenario; the order
5533          * of when these callouts happen is undefined with respect to
5534          * CPU hotplug, and they can race with each other.  As such,
5535          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5536          * undefined; you can actually have a CPU frequency change take
5537          * place in between the computation of X and the setting of the
5538          * variable.  To protect against this problem, all updates of
5539          * the per_cpu tsc_khz variable are done in an interrupt
5540          * protected IPI, and all callers wishing to update the value
5541          * must wait for a synchronous IPI to complete (which is trivial
5542          * if the caller is on the CPU already).  This establishes the
5543          * necessary total order on variable updates.
5544          *
5545          * Note that because a guest time update may take place
5546          * anytime after the setting of the VCPU's request bit, the
5547          * correct TSC value must be set before the request.  However,
5548          * to ensure the update actually makes it to any guest which
5549          * starts running in hardware virtualization between the set
5550          * and the acquisition of the spinlock, we must also ping the
5551          * CPU after setting the request bit.
5552          *
5553          */
5554
5555         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5556                 return 0;
5557         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5558                 return 0;
5559
5560         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5561
5562         spin_lock(&kvm_lock);
5563         list_for_each_entry(kvm, &vm_list, vm_list) {
5564                 kvm_for_each_vcpu(i, vcpu, kvm) {
5565                         if (vcpu->cpu != freq->cpu)
5566                                 continue;
5567                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5568                         if (vcpu->cpu != smp_processor_id())
5569                                 send_ipi = 1;
5570                 }
5571         }
5572         spin_unlock(&kvm_lock);
5573
5574         if (freq->old < freq->new && send_ipi) {
5575                 /*
5576                  * We upscale the frequency.  Must make the guest
5577                  * doesn't see old kvmclock values while running with
5578                  * the new frequency, otherwise we risk the guest sees
5579                  * time go backwards.
5580                  *
5581                  * In case we update the frequency for another cpu
5582                  * (which might be in guest context) send an interrupt
5583                  * to kick the cpu out of guest context.  Next time
5584                  * guest context is entered kvmclock will be updated,
5585                  * so the guest will not see stale values.
5586                  */
5587                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5588         }
5589         return 0;
5590 }
5591
5592 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5593         .notifier_call  = kvmclock_cpufreq_notifier
5594 };
5595
5596 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5597                                         unsigned long action, void *hcpu)
5598 {
5599         unsigned int cpu = (unsigned long)hcpu;
5600
5601         switch (action) {
5602                 case CPU_ONLINE:
5603                 case CPU_DOWN_FAILED:
5604                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5605                         break;
5606                 case CPU_DOWN_PREPARE:
5607                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5608                         break;
5609         }
5610         return NOTIFY_OK;
5611 }
5612
5613 static struct notifier_block kvmclock_cpu_notifier_block = {
5614         .notifier_call  = kvmclock_cpu_notifier,
5615         .priority = -INT_MAX
5616 };
5617
5618 static void kvm_timer_init(void)
5619 {
5620         int cpu;
5621
5622         max_tsc_khz = tsc_khz;
5623
5624         cpu_notifier_register_begin();
5625         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5626 #ifdef CONFIG_CPU_FREQ
5627                 struct cpufreq_policy policy;
5628                 memset(&policy, 0, sizeof(policy));
5629                 cpu = get_cpu();
5630                 cpufreq_get_policy(&policy, cpu);
5631                 if (policy.cpuinfo.max_freq)
5632                         max_tsc_khz = policy.cpuinfo.max_freq;
5633                 put_cpu();
5634 #endif
5635                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5636                                           CPUFREQ_TRANSITION_NOTIFIER);
5637         }
5638         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5639         for_each_online_cpu(cpu)
5640                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5641
5642         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5643         cpu_notifier_register_done();
5644
5645 }
5646
5647 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5648
5649 int kvm_is_in_guest(void)
5650 {
5651         return __this_cpu_read(current_vcpu) != NULL;
5652 }
5653
5654 static int kvm_is_user_mode(void)
5655 {
5656         int user_mode = 3;
5657
5658         if (__this_cpu_read(current_vcpu))
5659                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5660
5661         return user_mode != 0;
5662 }
5663
5664 static unsigned long kvm_get_guest_ip(void)
5665 {
5666         unsigned long ip = 0;
5667
5668         if (__this_cpu_read(current_vcpu))
5669                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5670
5671         return ip;
5672 }
5673
5674 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5675         .is_in_guest            = kvm_is_in_guest,
5676         .is_user_mode           = kvm_is_user_mode,
5677         .get_guest_ip           = kvm_get_guest_ip,
5678 };
5679
5680 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5681 {
5682         __this_cpu_write(current_vcpu, vcpu);
5683 }
5684 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5685
5686 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5687 {
5688         __this_cpu_write(current_vcpu, NULL);
5689 }
5690 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5691
5692 static void kvm_set_mmio_spte_mask(void)
5693 {
5694         u64 mask;
5695         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5696
5697         /*
5698          * Set the reserved bits and the present bit of an paging-structure
5699          * entry to generate page fault with PFER.RSV = 1.
5700          */
5701          /* Mask the reserved physical address bits. */
5702         mask = rsvd_bits(maxphyaddr, 51);
5703
5704         /* Bit 62 is always reserved for 32bit host. */
5705         mask |= 0x3ull << 62;
5706
5707         /* Set the present bit. */
5708         mask |= 1ull;
5709
5710 #ifdef CONFIG_X86_64
5711         /*
5712          * If reserved bit is not supported, clear the present bit to disable
5713          * mmio page fault.
5714          */
5715         if (maxphyaddr == 52)
5716                 mask &= ~1ull;
5717 #endif
5718
5719         kvm_mmu_set_mmio_spte_mask(mask);
5720 }
5721
5722 #ifdef CONFIG_X86_64
5723 static void pvclock_gtod_update_fn(struct work_struct *work)
5724 {
5725         struct kvm *kvm;
5726
5727         struct kvm_vcpu *vcpu;
5728         int i;
5729
5730         spin_lock(&kvm_lock);
5731         list_for_each_entry(kvm, &vm_list, vm_list)
5732                 kvm_for_each_vcpu(i, vcpu, kvm)
5733                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5734         atomic_set(&kvm_guest_has_master_clock, 0);
5735         spin_unlock(&kvm_lock);
5736 }
5737
5738 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5739
5740 /*
5741  * Notification about pvclock gtod data update.
5742  */
5743 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5744                                void *priv)
5745 {
5746         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5747         struct timekeeper *tk = priv;
5748
5749         update_pvclock_gtod(tk);
5750
5751         /* disable master clock if host does not trust, or does not
5752          * use, TSC clocksource
5753          */
5754         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5755             atomic_read(&kvm_guest_has_master_clock) != 0)
5756                 queue_work(system_long_wq, &pvclock_gtod_work);
5757
5758         return 0;
5759 }
5760
5761 static struct notifier_block pvclock_gtod_notifier = {
5762         .notifier_call = pvclock_gtod_notify,
5763 };
5764 #endif
5765
5766 int kvm_arch_init(void *opaque)
5767 {
5768         int r;
5769         struct kvm_x86_ops *ops = opaque;
5770
5771         if (kvm_x86_ops) {
5772                 printk(KERN_ERR "kvm: already loaded the other module\n");
5773                 r = -EEXIST;
5774                 goto out;
5775         }
5776
5777         if (!ops->cpu_has_kvm_support()) {
5778                 printk(KERN_ERR "kvm: no hardware support\n");
5779                 r = -EOPNOTSUPP;
5780                 goto out;
5781         }
5782         if (ops->disabled_by_bios()) {
5783                 printk(KERN_ERR "kvm: disabled by bios\n");
5784                 r = -EOPNOTSUPP;
5785                 goto out;
5786         }
5787
5788         r = -ENOMEM;
5789         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5790         if (!shared_msrs) {
5791                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5792                 goto out;
5793         }
5794
5795         r = kvm_mmu_module_init();
5796         if (r)
5797                 goto out_free_percpu;
5798
5799         kvm_set_mmio_spte_mask();
5800
5801         kvm_x86_ops = ops;
5802
5803         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5804                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5805
5806         kvm_timer_init();
5807
5808         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5809
5810         if (cpu_has_xsave)
5811                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5812
5813         kvm_lapic_init();
5814 #ifdef CONFIG_X86_64
5815         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5816 #endif
5817
5818         return 0;
5819
5820 out_free_percpu:
5821         free_percpu(shared_msrs);
5822 out:
5823         return r;
5824 }
5825
5826 void kvm_arch_exit(void)
5827 {
5828         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5829
5830         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5831                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5832                                             CPUFREQ_TRANSITION_NOTIFIER);
5833         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5834 #ifdef CONFIG_X86_64
5835         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5836 #endif
5837         kvm_x86_ops = NULL;
5838         kvm_mmu_module_exit();
5839         free_percpu(shared_msrs);
5840 }
5841
5842 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5843 {
5844         ++vcpu->stat.halt_exits;
5845         if (lapic_in_kernel(vcpu)) {
5846                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5847                 return 1;
5848         } else {
5849                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5850                 return 0;
5851         }
5852 }
5853 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5854
5855 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5856 {
5857         kvm_x86_ops->skip_emulated_instruction(vcpu);
5858         return kvm_vcpu_halt(vcpu);
5859 }
5860 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5861
5862 /*
5863  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5864  *
5865  * @apicid - apicid of vcpu to be kicked.
5866  */
5867 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5868 {
5869         struct kvm_lapic_irq lapic_irq;
5870
5871         lapic_irq.shorthand = 0;
5872         lapic_irq.dest_mode = 0;
5873         lapic_irq.dest_id = apicid;
5874         lapic_irq.msi_redir_hint = false;
5875
5876         lapic_irq.delivery_mode = APIC_DM_REMRD;
5877         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5878 }
5879
5880 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5881 {
5882         unsigned long nr, a0, a1, a2, a3, ret;
5883         int op_64_bit, r = 1;
5884
5885         kvm_x86_ops->skip_emulated_instruction(vcpu);
5886
5887         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5888                 return kvm_hv_hypercall(vcpu);
5889
5890         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5891         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5892         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5893         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5894         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5895
5896         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5897
5898         op_64_bit = is_64_bit_mode(vcpu);
5899         if (!op_64_bit) {
5900                 nr &= 0xFFFFFFFF;
5901                 a0 &= 0xFFFFFFFF;
5902                 a1 &= 0xFFFFFFFF;
5903                 a2 &= 0xFFFFFFFF;
5904                 a3 &= 0xFFFFFFFF;
5905         }
5906
5907         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5908                 ret = -KVM_EPERM;
5909                 goto out;
5910         }
5911
5912         switch (nr) {
5913         case KVM_HC_VAPIC_POLL_IRQ:
5914                 ret = 0;
5915                 break;
5916         case KVM_HC_KICK_CPU:
5917                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5918                 ret = 0;
5919                 break;
5920         default:
5921                 ret = -KVM_ENOSYS;
5922                 break;
5923         }
5924 out:
5925         if (!op_64_bit)
5926                 ret = (u32)ret;
5927         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5928         ++vcpu->stat.hypercalls;
5929         return r;
5930 }
5931 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5932
5933 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5934 {
5935         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5936         char instruction[3];
5937         unsigned long rip = kvm_rip_read(vcpu);
5938
5939         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5940
5941         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5942 }
5943
5944 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5945 {
5946         return vcpu->run->request_interrupt_window &&
5947                 likely(!pic_in_kernel(vcpu->kvm));
5948 }
5949
5950 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5951 {
5952         struct kvm_run *kvm_run = vcpu->run;
5953
5954         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5955         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5956         kvm_run->cr8 = kvm_get_cr8(vcpu);
5957         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5958         kvm_run->ready_for_interrupt_injection =
5959                 pic_in_kernel(vcpu->kvm) ||
5960                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
5961 }
5962
5963 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5964 {
5965         int max_irr, tpr;
5966
5967         if (!kvm_x86_ops->update_cr8_intercept)
5968                 return;
5969
5970         if (!vcpu->arch.apic)
5971                 return;
5972
5973         if (!vcpu->arch.apic->vapic_addr)
5974                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5975         else
5976                 max_irr = -1;
5977
5978         if (max_irr != -1)
5979                 max_irr >>= 4;
5980
5981         tpr = kvm_lapic_get_cr8(vcpu);
5982
5983         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5984 }
5985
5986 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5987 {
5988         int r;
5989
5990         /* try to reinject previous events if any */
5991         if (vcpu->arch.exception.pending) {
5992                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5993                                         vcpu->arch.exception.has_error_code,
5994                                         vcpu->arch.exception.error_code);
5995
5996                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5997                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5998                                              X86_EFLAGS_RF);
5999
6000                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6001                     (vcpu->arch.dr7 & DR7_GD)) {
6002                         vcpu->arch.dr7 &= ~DR7_GD;
6003                         kvm_update_dr7(vcpu);
6004                 }
6005
6006                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6007                                           vcpu->arch.exception.has_error_code,
6008                                           vcpu->arch.exception.error_code,
6009                                           vcpu->arch.exception.reinject);
6010                 return 0;
6011         }
6012
6013         if (vcpu->arch.nmi_injected) {
6014                 kvm_x86_ops->set_nmi(vcpu);
6015                 return 0;
6016         }
6017
6018         if (vcpu->arch.interrupt.pending) {
6019                 kvm_x86_ops->set_irq(vcpu);
6020                 return 0;
6021         }
6022
6023         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6024                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6025                 if (r != 0)
6026                         return r;
6027         }
6028
6029         /* try to inject new event if pending */
6030         if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6031                 --vcpu->arch.nmi_pending;
6032                 vcpu->arch.nmi_injected = true;
6033                 kvm_x86_ops->set_nmi(vcpu);
6034         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6035                 /*
6036                  * Because interrupts can be injected asynchronously, we are
6037                  * calling check_nested_events again here to avoid a race condition.
6038                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6039                  * proposal and current concerns.  Perhaps we should be setting
6040                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6041                  */
6042                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6043                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6044                         if (r != 0)
6045                                 return r;
6046                 }
6047                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6048                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6049                                             false);
6050                         kvm_x86_ops->set_irq(vcpu);
6051                 }
6052         }
6053         return 0;
6054 }
6055
6056 static void process_nmi(struct kvm_vcpu *vcpu)
6057 {
6058         unsigned limit = 2;
6059
6060         /*
6061          * x86 is limited to one NMI running, and one NMI pending after it.
6062          * If an NMI is already in progress, limit further NMIs to just one.
6063          * Otherwise, allow two (and we'll inject the first one immediately).
6064          */
6065         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6066                 limit = 1;
6067
6068         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6069         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6070         kvm_make_request(KVM_REQ_EVENT, vcpu);
6071 }
6072
6073 #define put_smstate(type, buf, offset, val)                       \
6074         *(type *)((buf) + (offset) - 0x7e00) = val
6075
6076 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6077 {
6078         u32 flags = 0;
6079         flags |= seg->g       << 23;
6080         flags |= seg->db      << 22;
6081         flags |= seg->l       << 21;
6082         flags |= seg->avl     << 20;
6083         flags |= seg->present << 15;
6084         flags |= seg->dpl     << 13;
6085         flags |= seg->s       << 12;
6086         flags |= seg->type    << 8;
6087         return flags;
6088 }
6089
6090 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6091 {
6092         struct kvm_segment seg;
6093         int offset;
6094
6095         kvm_get_segment(vcpu, &seg, n);
6096         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6097
6098         if (n < 3)
6099                 offset = 0x7f84 + n * 12;
6100         else
6101                 offset = 0x7f2c + (n - 3) * 12;
6102
6103         put_smstate(u32, buf, offset + 8, seg.base);
6104         put_smstate(u32, buf, offset + 4, seg.limit);
6105         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6106 }
6107
6108 #ifdef CONFIG_X86_64
6109 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6110 {
6111         struct kvm_segment seg;
6112         int offset;
6113         u16 flags;
6114
6115         kvm_get_segment(vcpu, &seg, n);
6116         offset = 0x7e00 + n * 16;
6117
6118         flags = process_smi_get_segment_flags(&seg) >> 8;
6119         put_smstate(u16, buf, offset, seg.selector);
6120         put_smstate(u16, buf, offset + 2, flags);
6121         put_smstate(u32, buf, offset + 4, seg.limit);
6122         put_smstate(u64, buf, offset + 8, seg.base);
6123 }
6124 #endif
6125
6126 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6127 {
6128         struct desc_ptr dt;
6129         struct kvm_segment seg;
6130         unsigned long val;
6131         int i;
6132
6133         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6134         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6135         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6136         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6137
6138         for (i = 0; i < 8; i++)
6139                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6140
6141         kvm_get_dr(vcpu, 6, &val);
6142         put_smstate(u32, buf, 0x7fcc, (u32)val);
6143         kvm_get_dr(vcpu, 7, &val);
6144         put_smstate(u32, buf, 0x7fc8, (u32)val);
6145
6146         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6147         put_smstate(u32, buf, 0x7fc4, seg.selector);
6148         put_smstate(u32, buf, 0x7f64, seg.base);
6149         put_smstate(u32, buf, 0x7f60, seg.limit);
6150         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6151
6152         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6153         put_smstate(u32, buf, 0x7fc0, seg.selector);
6154         put_smstate(u32, buf, 0x7f80, seg.base);
6155         put_smstate(u32, buf, 0x7f7c, seg.limit);
6156         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6157
6158         kvm_x86_ops->get_gdt(vcpu, &dt);
6159         put_smstate(u32, buf, 0x7f74, dt.address);
6160         put_smstate(u32, buf, 0x7f70, dt.size);
6161
6162         kvm_x86_ops->get_idt(vcpu, &dt);
6163         put_smstate(u32, buf, 0x7f58, dt.address);
6164         put_smstate(u32, buf, 0x7f54, dt.size);
6165
6166         for (i = 0; i < 6; i++)
6167                 process_smi_save_seg_32(vcpu, buf, i);
6168
6169         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6170
6171         /* revision id */
6172         put_smstate(u32, buf, 0x7efc, 0x00020000);
6173         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6174 }
6175
6176 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6177 {
6178 #ifdef CONFIG_X86_64
6179         struct desc_ptr dt;
6180         struct kvm_segment seg;
6181         unsigned long val;
6182         int i;
6183
6184         for (i = 0; i < 16; i++)
6185                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6186
6187         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6188         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6189
6190         kvm_get_dr(vcpu, 6, &val);
6191         put_smstate(u64, buf, 0x7f68, val);
6192         kvm_get_dr(vcpu, 7, &val);
6193         put_smstate(u64, buf, 0x7f60, val);
6194
6195         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6196         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6197         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6198
6199         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6200
6201         /* revision id */
6202         put_smstate(u32, buf, 0x7efc, 0x00020064);
6203
6204         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6205
6206         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6207         put_smstate(u16, buf, 0x7e90, seg.selector);
6208         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6209         put_smstate(u32, buf, 0x7e94, seg.limit);
6210         put_smstate(u64, buf, 0x7e98, seg.base);
6211
6212         kvm_x86_ops->get_idt(vcpu, &dt);
6213         put_smstate(u32, buf, 0x7e84, dt.size);
6214         put_smstate(u64, buf, 0x7e88, dt.address);
6215
6216         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6217         put_smstate(u16, buf, 0x7e70, seg.selector);
6218         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6219         put_smstate(u32, buf, 0x7e74, seg.limit);
6220         put_smstate(u64, buf, 0x7e78, seg.base);
6221
6222         kvm_x86_ops->get_gdt(vcpu, &dt);
6223         put_smstate(u32, buf, 0x7e64, dt.size);
6224         put_smstate(u64, buf, 0x7e68, dt.address);
6225
6226         for (i = 0; i < 6; i++)
6227                 process_smi_save_seg_64(vcpu, buf, i);
6228 #else
6229         WARN_ON_ONCE(1);
6230 #endif
6231 }
6232
6233 static void process_smi(struct kvm_vcpu *vcpu)
6234 {
6235         struct kvm_segment cs, ds;
6236         struct desc_ptr dt;
6237         char buf[512];
6238         u32 cr0;
6239
6240         if (is_smm(vcpu)) {
6241                 vcpu->arch.smi_pending = true;
6242                 return;
6243         }
6244
6245         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6246         vcpu->arch.hflags |= HF_SMM_MASK;
6247         memset(buf, 0, 512);
6248         if (guest_cpuid_has_longmode(vcpu))
6249                 process_smi_save_state_64(vcpu, buf);
6250         else
6251                 process_smi_save_state_32(vcpu, buf);
6252
6253         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6254
6255         if (kvm_x86_ops->get_nmi_mask(vcpu))
6256                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6257         else
6258                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6259
6260         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6261         kvm_rip_write(vcpu, 0x8000);
6262
6263         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6264         kvm_x86_ops->set_cr0(vcpu, cr0);
6265         vcpu->arch.cr0 = cr0;
6266
6267         kvm_x86_ops->set_cr4(vcpu, 0);
6268
6269         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6270         dt.address = dt.size = 0;
6271         kvm_x86_ops->set_idt(vcpu, &dt);
6272
6273         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6274
6275         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6276         cs.base = vcpu->arch.smbase;
6277
6278         ds.selector = 0;
6279         ds.base = 0;
6280
6281         cs.limit    = ds.limit = 0xffffffff;
6282         cs.type     = ds.type = 0x3;
6283         cs.dpl      = ds.dpl = 0;
6284         cs.db       = ds.db = 0;
6285         cs.s        = ds.s = 1;
6286         cs.l        = ds.l = 0;
6287         cs.g        = ds.g = 1;
6288         cs.avl      = ds.avl = 0;
6289         cs.present  = ds.present = 1;
6290         cs.unusable = ds.unusable = 0;
6291         cs.padding  = ds.padding = 0;
6292
6293         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6294         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6295         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6296         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6297         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6298         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6299
6300         if (guest_cpuid_has_longmode(vcpu))
6301                 kvm_x86_ops->set_efer(vcpu, 0);
6302
6303         kvm_update_cpuid(vcpu);
6304         kvm_mmu_reset_context(vcpu);
6305 }
6306
6307 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6308 {
6309         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6310                 return;
6311
6312         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6313
6314         if (irqchip_split(vcpu->kvm))
6315                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6316         else {
6317                 kvm_x86_ops->sync_pir_to_irr(vcpu);
6318                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6319         }
6320         kvm_x86_ops->load_eoi_exitmap(vcpu);
6321 }
6322
6323 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6324 {
6325         ++vcpu->stat.tlb_flush;
6326         kvm_x86_ops->tlb_flush(vcpu);
6327 }
6328
6329 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6330 {
6331         struct page *page = NULL;
6332
6333         if (!lapic_in_kernel(vcpu))
6334                 return;
6335
6336         if (!kvm_x86_ops->set_apic_access_page_addr)
6337                 return;
6338
6339         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6340         if (is_error_page(page))
6341                 return;
6342         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6343
6344         /*
6345          * Do not pin apic access page in memory, the MMU notifier
6346          * will call us again if it is migrated or swapped out.
6347          */
6348         put_page(page);
6349 }
6350 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6351
6352 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6353                                            unsigned long address)
6354 {
6355         /*
6356          * The physical address of apic access page is stored in the VMCS.
6357          * Update it when it becomes invalid.
6358          */
6359         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6360                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6361 }
6362
6363 /*
6364  * Returns 1 to let vcpu_run() continue the guest execution loop without
6365  * exiting to the userspace.  Otherwise, the value will be returned to the
6366  * userspace.
6367  */
6368 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6369 {
6370         int r;
6371         bool req_int_win =
6372                 dm_request_for_irq_injection(vcpu) &&
6373                 kvm_cpu_accept_dm_intr(vcpu);
6374
6375         bool req_immediate_exit = false;
6376
6377         if (vcpu->requests) {
6378                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6379                         kvm_mmu_unload(vcpu);
6380                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6381                         __kvm_migrate_timers(vcpu);
6382                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6383                         kvm_gen_update_masterclock(vcpu->kvm);
6384                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6385                         kvm_gen_kvmclock_update(vcpu);
6386                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6387                         r = kvm_guest_time_update(vcpu);
6388                         if (unlikely(r))
6389                                 goto out;
6390                 }
6391                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6392                         kvm_mmu_sync_roots(vcpu);
6393                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6394                         kvm_vcpu_flush_tlb(vcpu);
6395                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6396                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6397                         r = 0;
6398                         goto out;
6399                 }
6400                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6401                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6402                         r = 0;
6403                         goto out;
6404                 }
6405                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6406                         vcpu->fpu_active = 0;
6407                         kvm_x86_ops->fpu_deactivate(vcpu);
6408                 }
6409                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6410                         /* Page is swapped out. Do synthetic halt */
6411                         vcpu->arch.apf.halted = true;
6412                         r = 1;
6413                         goto out;
6414                 }
6415                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6416                         record_steal_time(vcpu);
6417                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6418                         process_smi(vcpu);
6419                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6420                         process_nmi(vcpu);
6421                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6422                         kvm_pmu_handle_event(vcpu);
6423                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6424                         kvm_pmu_deliver_pmi(vcpu);
6425                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6426                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6427                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6428                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6429                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6430                                 vcpu->run->eoi.vector =
6431                                                 vcpu->arch.pending_ioapic_eoi;
6432                                 r = 0;
6433                                 goto out;
6434                         }
6435                 }
6436                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6437                         vcpu_scan_ioapic(vcpu);
6438                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6439                         kvm_vcpu_reload_apic_access_page(vcpu);
6440                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6441                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6442                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6443                         r = 0;
6444                         goto out;
6445                 }
6446                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6447                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6448                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6449                         r = 0;
6450                         goto out;
6451                 }
6452         }
6453
6454         /*
6455          * KVM_REQ_EVENT is not set when posted interrupts are set by
6456          * VT-d hardware, so we have to update RVI unconditionally.
6457          */
6458         if (kvm_lapic_enabled(vcpu)) {
6459                 /*
6460                  * Update architecture specific hints for APIC
6461                  * virtual interrupt delivery.
6462                  */
6463                 if (kvm_x86_ops->hwapic_irr_update)
6464                         kvm_x86_ops->hwapic_irr_update(vcpu,
6465                                 kvm_lapic_find_highest_irr(vcpu));
6466         }
6467
6468         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6469                 kvm_apic_accept_events(vcpu);
6470                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6471                         r = 1;
6472                         goto out;
6473                 }
6474
6475                 if (inject_pending_event(vcpu, req_int_win) != 0)
6476                         req_immediate_exit = true;
6477                 /* enable NMI/IRQ window open exits if needed */
6478                 else {
6479                         if (vcpu->arch.nmi_pending)
6480                                 kvm_x86_ops->enable_nmi_window(vcpu);
6481                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6482                                 kvm_x86_ops->enable_irq_window(vcpu);
6483                 }
6484
6485                 if (kvm_lapic_enabled(vcpu)) {
6486                         update_cr8_intercept(vcpu);
6487                         kvm_lapic_sync_to_vapic(vcpu);
6488                 }
6489         }
6490
6491         r = kvm_mmu_reload(vcpu);
6492         if (unlikely(r)) {
6493                 goto cancel_injection;
6494         }
6495
6496         preempt_disable();
6497
6498         kvm_x86_ops->prepare_guest_switch(vcpu);
6499         if (vcpu->fpu_active)
6500                 kvm_load_guest_fpu(vcpu);
6501         vcpu->mode = IN_GUEST_MODE;
6502
6503         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6504
6505         /* We should set ->mode before check ->requests,
6506          * see the comment in make_all_cpus_request.
6507          */
6508         smp_mb__after_srcu_read_unlock();
6509
6510         local_irq_disable();
6511
6512         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6513             || need_resched() || signal_pending(current)) {
6514                 vcpu->mode = OUTSIDE_GUEST_MODE;
6515                 smp_wmb();
6516                 local_irq_enable();
6517                 preempt_enable();
6518                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6519                 r = 1;
6520                 goto cancel_injection;
6521         }
6522
6523         kvm_load_guest_xcr0(vcpu);
6524
6525         if (req_immediate_exit)
6526                 smp_send_reschedule(vcpu->cpu);
6527
6528         trace_kvm_entry(vcpu->vcpu_id);
6529         wait_lapic_expire(vcpu);
6530         __kvm_guest_enter();
6531
6532         if (unlikely(vcpu->arch.switch_db_regs)) {
6533                 set_debugreg(0, 7);
6534                 set_debugreg(vcpu->arch.eff_db[0], 0);
6535                 set_debugreg(vcpu->arch.eff_db[1], 1);
6536                 set_debugreg(vcpu->arch.eff_db[2], 2);
6537                 set_debugreg(vcpu->arch.eff_db[3], 3);
6538                 set_debugreg(vcpu->arch.dr6, 6);
6539                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6540         }
6541
6542         kvm_x86_ops->run(vcpu);
6543
6544         /*
6545          * Do this here before restoring debug registers on the host.  And
6546          * since we do this before handling the vmexit, a DR access vmexit
6547          * can (a) read the correct value of the debug registers, (b) set
6548          * KVM_DEBUGREG_WONT_EXIT again.
6549          */
6550         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6551                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6552                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6553                 kvm_update_dr0123(vcpu);
6554                 kvm_update_dr6(vcpu);
6555                 kvm_update_dr7(vcpu);
6556                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6557         }
6558
6559         /*
6560          * If the guest has used debug registers, at least dr7
6561          * will be disabled while returning to the host.
6562          * If we don't have active breakpoints in the host, we don't
6563          * care about the messed up debug address registers. But if
6564          * we have some of them active, restore the old state.
6565          */
6566         if (hw_breakpoint_active())
6567                 hw_breakpoint_restore();
6568
6569         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6570
6571         vcpu->mode = OUTSIDE_GUEST_MODE;
6572         smp_wmb();
6573
6574         kvm_put_guest_xcr0(vcpu);
6575
6576         /* Interrupt is enabled by handle_external_intr() */
6577         kvm_x86_ops->handle_external_intr(vcpu);
6578
6579         ++vcpu->stat.exits;
6580
6581         /*
6582          * We must have an instruction between local_irq_enable() and
6583          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6584          * the interrupt shadow.  The stat.exits increment will do nicely.
6585          * But we need to prevent reordering, hence this barrier():
6586          */
6587         barrier();
6588
6589         kvm_guest_exit();
6590
6591         preempt_enable();
6592
6593         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6594
6595         /*
6596          * Profile KVM exit RIPs:
6597          */
6598         if (unlikely(prof_on == KVM_PROFILING)) {
6599                 unsigned long rip = kvm_rip_read(vcpu);
6600                 profile_hit(KVM_PROFILING, (void *)rip);
6601         }
6602
6603         if (unlikely(vcpu->arch.tsc_always_catchup))
6604                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6605
6606         if (vcpu->arch.apic_attention)
6607                 kvm_lapic_sync_from_vapic(vcpu);
6608
6609         r = kvm_x86_ops->handle_exit(vcpu);
6610         return r;
6611
6612 cancel_injection:
6613         kvm_x86_ops->cancel_injection(vcpu);
6614         if (unlikely(vcpu->arch.apic_attention))
6615                 kvm_lapic_sync_from_vapic(vcpu);
6616 out:
6617         return r;
6618 }
6619
6620 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6621 {
6622         if (!kvm_arch_vcpu_runnable(vcpu) &&
6623             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6624                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6625                 kvm_vcpu_block(vcpu);
6626                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6627
6628                 if (kvm_x86_ops->post_block)
6629                         kvm_x86_ops->post_block(vcpu);
6630
6631                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6632                         return 1;
6633         }
6634
6635         kvm_apic_accept_events(vcpu);
6636         switch(vcpu->arch.mp_state) {
6637         case KVM_MP_STATE_HALTED:
6638                 vcpu->arch.pv.pv_unhalted = false;
6639                 vcpu->arch.mp_state =
6640                         KVM_MP_STATE_RUNNABLE;
6641         case KVM_MP_STATE_RUNNABLE:
6642                 vcpu->arch.apf.halted = false;
6643                 break;
6644         case KVM_MP_STATE_INIT_RECEIVED:
6645                 break;
6646         default:
6647                 return -EINTR;
6648                 break;
6649         }
6650         return 1;
6651 }
6652
6653 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6654 {
6655         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6656                 !vcpu->arch.apf.halted);
6657 }
6658
6659 static int vcpu_run(struct kvm_vcpu *vcpu)
6660 {
6661         int r;
6662         struct kvm *kvm = vcpu->kvm;
6663
6664         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6665
6666         for (;;) {
6667                 if (kvm_vcpu_running(vcpu)) {
6668                         r = vcpu_enter_guest(vcpu);
6669                 } else {
6670                         r = vcpu_block(kvm, vcpu);
6671                 }
6672
6673                 if (r <= 0)
6674                         break;
6675
6676                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6677                 if (kvm_cpu_has_pending_timer(vcpu))
6678                         kvm_inject_pending_timer_irqs(vcpu);
6679
6680                 if (dm_request_for_irq_injection(vcpu) &&
6681                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6682                         r = 0;
6683                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6684                         ++vcpu->stat.request_irq_exits;
6685                         break;
6686                 }
6687
6688                 kvm_check_async_pf_completion(vcpu);
6689
6690                 if (signal_pending(current)) {
6691                         r = -EINTR;
6692                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6693                         ++vcpu->stat.signal_exits;
6694                         break;
6695                 }
6696                 if (need_resched()) {
6697                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6698                         cond_resched();
6699                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6700                 }
6701         }
6702
6703         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6704
6705         return r;
6706 }
6707
6708 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6709 {
6710         int r;
6711         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6712         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6713         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6714         if (r != EMULATE_DONE)
6715                 return 0;
6716         return 1;
6717 }
6718
6719 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6720 {
6721         BUG_ON(!vcpu->arch.pio.count);
6722
6723         return complete_emulated_io(vcpu);
6724 }
6725
6726 /*
6727  * Implements the following, as a state machine:
6728  *
6729  * read:
6730  *   for each fragment
6731  *     for each mmio piece in the fragment
6732  *       write gpa, len
6733  *       exit
6734  *       copy data
6735  *   execute insn
6736  *
6737  * write:
6738  *   for each fragment
6739  *     for each mmio piece in the fragment
6740  *       write gpa, len
6741  *       copy data
6742  *       exit
6743  */
6744 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6745 {
6746         struct kvm_run *run = vcpu->run;
6747         struct kvm_mmio_fragment *frag;
6748         unsigned len;
6749
6750         BUG_ON(!vcpu->mmio_needed);
6751
6752         /* Complete previous fragment */
6753         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6754         len = min(8u, frag->len);
6755         if (!vcpu->mmio_is_write)
6756                 memcpy(frag->data, run->mmio.data, len);
6757
6758         if (frag->len <= 8) {
6759                 /* Switch to the next fragment. */
6760                 frag++;
6761                 vcpu->mmio_cur_fragment++;
6762         } else {
6763                 /* Go forward to the next mmio piece. */
6764                 frag->data += len;
6765                 frag->gpa += len;
6766                 frag->len -= len;
6767         }
6768
6769         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6770                 vcpu->mmio_needed = 0;
6771
6772                 /* FIXME: return into emulator if single-stepping.  */
6773                 if (vcpu->mmio_is_write)
6774                         return 1;
6775                 vcpu->mmio_read_completed = 1;
6776                 return complete_emulated_io(vcpu);
6777         }
6778
6779         run->exit_reason = KVM_EXIT_MMIO;
6780         run->mmio.phys_addr = frag->gpa;
6781         if (vcpu->mmio_is_write)
6782                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6783         run->mmio.len = min(8u, frag->len);
6784         run->mmio.is_write = vcpu->mmio_is_write;
6785         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6786         return 0;
6787 }
6788
6789
6790 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6791 {
6792         struct fpu *fpu = &current->thread.fpu;
6793         int r;
6794         sigset_t sigsaved;
6795
6796         fpu__activate_curr(fpu);
6797
6798         if (vcpu->sigset_active)
6799                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6800
6801         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6802                 kvm_vcpu_block(vcpu);
6803                 kvm_apic_accept_events(vcpu);
6804                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6805                 r = -EAGAIN;
6806                 goto out;
6807         }
6808
6809         /* re-sync apic's tpr */
6810         if (!lapic_in_kernel(vcpu)) {
6811                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6812                         r = -EINVAL;
6813                         goto out;
6814                 }
6815         }
6816
6817         if (unlikely(vcpu->arch.complete_userspace_io)) {
6818                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6819                 vcpu->arch.complete_userspace_io = NULL;
6820                 r = cui(vcpu);
6821                 if (r <= 0)
6822                         goto out;
6823         } else
6824                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6825
6826         r = vcpu_run(vcpu);
6827
6828 out:
6829         post_kvm_run_save(vcpu);
6830         if (vcpu->sigset_active)
6831                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6832
6833         return r;
6834 }
6835
6836 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6837 {
6838         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6839                 /*
6840                  * We are here if userspace calls get_regs() in the middle of
6841                  * instruction emulation. Registers state needs to be copied
6842                  * back from emulation context to vcpu. Userspace shouldn't do
6843                  * that usually, but some bad designed PV devices (vmware
6844                  * backdoor interface) need this to work
6845                  */
6846                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6847                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6848         }
6849         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6850         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6851         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6852         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6853         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6854         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6855         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6856         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6857 #ifdef CONFIG_X86_64
6858         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6859         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6860         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6861         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6862         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6863         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6864         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6865         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6866 #endif
6867
6868         regs->rip = kvm_rip_read(vcpu);
6869         regs->rflags = kvm_get_rflags(vcpu);
6870
6871         return 0;
6872 }
6873
6874 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6875 {
6876         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6877         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6878
6879         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6880         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6881         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6882         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6883         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6884         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6885         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6886         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6887 #ifdef CONFIG_X86_64
6888         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6889         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6890         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6891         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6892         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6893         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6894         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6895         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6896 #endif
6897
6898         kvm_rip_write(vcpu, regs->rip);
6899         kvm_set_rflags(vcpu, regs->rflags);
6900
6901         vcpu->arch.exception.pending = false;
6902
6903         kvm_make_request(KVM_REQ_EVENT, vcpu);
6904
6905         return 0;
6906 }
6907
6908 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6909 {
6910         struct kvm_segment cs;
6911
6912         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6913         *db = cs.db;
6914         *l = cs.l;
6915 }
6916 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6917
6918 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6919                                   struct kvm_sregs *sregs)
6920 {
6921         struct desc_ptr dt;
6922
6923         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6924         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6925         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6926         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6927         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6928         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6929
6930         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6931         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6932
6933         kvm_x86_ops->get_idt(vcpu, &dt);
6934         sregs->idt.limit = dt.size;
6935         sregs->idt.base = dt.address;
6936         kvm_x86_ops->get_gdt(vcpu, &dt);
6937         sregs->gdt.limit = dt.size;
6938         sregs->gdt.base = dt.address;
6939
6940         sregs->cr0 = kvm_read_cr0(vcpu);
6941         sregs->cr2 = vcpu->arch.cr2;
6942         sregs->cr3 = kvm_read_cr3(vcpu);
6943         sregs->cr4 = kvm_read_cr4(vcpu);
6944         sregs->cr8 = kvm_get_cr8(vcpu);
6945         sregs->efer = vcpu->arch.efer;
6946         sregs->apic_base = kvm_get_apic_base(vcpu);
6947
6948         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6949
6950         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6951                 set_bit(vcpu->arch.interrupt.nr,
6952                         (unsigned long *)sregs->interrupt_bitmap);
6953
6954         return 0;
6955 }
6956
6957 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6958                                     struct kvm_mp_state *mp_state)
6959 {
6960         kvm_apic_accept_events(vcpu);
6961         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6962                                         vcpu->arch.pv.pv_unhalted)
6963                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6964         else
6965                 mp_state->mp_state = vcpu->arch.mp_state;
6966
6967         return 0;
6968 }
6969
6970 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6971                                     struct kvm_mp_state *mp_state)
6972 {
6973         if (!kvm_vcpu_has_lapic(vcpu) &&
6974             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6975                 return -EINVAL;
6976
6977         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6978                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6979                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6980         } else
6981                 vcpu->arch.mp_state = mp_state->mp_state;
6982         kvm_make_request(KVM_REQ_EVENT, vcpu);
6983         return 0;
6984 }
6985
6986 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6987                     int reason, bool has_error_code, u32 error_code)
6988 {
6989         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6990         int ret;
6991
6992         init_emulate_ctxt(vcpu);
6993
6994         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6995                                    has_error_code, error_code);
6996
6997         if (ret)
6998                 return EMULATE_FAIL;
6999
7000         kvm_rip_write(vcpu, ctxt->eip);
7001         kvm_set_rflags(vcpu, ctxt->eflags);
7002         kvm_make_request(KVM_REQ_EVENT, vcpu);
7003         return EMULATE_DONE;
7004 }
7005 EXPORT_SYMBOL_GPL(kvm_task_switch);
7006
7007 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7008                                   struct kvm_sregs *sregs)
7009 {
7010         struct msr_data apic_base_msr;
7011         int mmu_reset_needed = 0;
7012         int pending_vec, max_bits, idx;
7013         struct desc_ptr dt;
7014
7015         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7016                 return -EINVAL;
7017
7018         dt.size = sregs->idt.limit;
7019         dt.address = sregs->idt.base;
7020         kvm_x86_ops->set_idt(vcpu, &dt);
7021         dt.size = sregs->gdt.limit;
7022         dt.address = sregs->gdt.base;
7023         kvm_x86_ops->set_gdt(vcpu, &dt);
7024
7025         vcpu->arch.cr2 = sregs->cr2;
7026         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7027         vcpu->arch.cr3 = sregs->cr3;
7028         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7029
7030         kvm_set_cr8(vcpu, sregs->cr8);
7031
7032         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7033         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7034         apic_base_msr.data = sregs->apic_base;
7035         apic_base_msr.host_initiated = true;
7036         kvm_set_apic_base(vcpu, &apic_base_msr);
7037
7038         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7039         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7040         vcpu->arch.cr0 = sregs->cr0;
7041
7042         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7043         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7044         if (sregs->cr4 & X86_CR4_OSXSAVE)
7045                 kvm_update_cpuid(vcpu);
7046
7047         idx = srcu_read_lock(&vcpu->kvm->srcu);
7048         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7049                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7050                 mmu_reset_needed = 1;
7051         }
7052         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7053
7054         if (mmu_reset_needed)
7055                 kvm_mmu_reset_context(vcpu);
7056
7057         max_bits = KVM_NR_INTERRUPTS;
7058         pending_vec = find_first_bit(
7059                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7060         if (pending_vec < max_bits) {
7061                 kvm_queue_interrupt(vcpu, pending_vec, false);
7062                 pr_debug("Set back pending irq %d\n", pending_vec);
7063         }
7064
7065         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7066         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7067         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7068         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7069         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7070         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7071
7072         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7073         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7074
7075         update_cr8_intercept(vcpu);
7076
7077         /* Older userspace won't unhalt the vcpu on reset. */
7078         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7079             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7080             !is_protmode(vcpu))
7081                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7082
7083         kvm_make_request(KVM_REQ_EVENT, vcpu);
7084
7085         return 0;
7086 }
7087
7088 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7089                                         struct kvm_guest_debug *dbg)
7090 {
7091         unsigned long rflags;
7092         int i, r;
7093
7094         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7095                 r = -EBUSY;
7096                 if (vcpu->arch.exception.pending)
7097                         goto out;
7098                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7099                         kvm_queue_exception(vcpu, DB_VECTOR);
7100                 else
7101                         kvm_queue_exception(vcpu, BP_VECTOR);
7102         }
7103
7104         /*
7105          * Read rflags as long as potentially injected trace flags are still
7106          * filtered out.
7107          */
7108         rflags = kvm_get_rflags(vcpu);
7109
7110         vcpu->guest_debug = dbg->control;
7111         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7112                 vcpu->guest_debug = 0;
7113
7114         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7115                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7116                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7117                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7118         } else {
7119                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7120                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7121         }
7122         kvm_update_dr7(vcpu);
7123
7124         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7125                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7126                         get_segment_base(vcpu, VCPU_SREG_CS);
7127
7128         /*
7129          * Trigger an rflags update that will inject or remove the trace
7130          * flags.
7131          */
7132         kvm_set_rflags(vcpu, rflags);
7133
7134         kvm_x86_ops->update_bp_intercept(vcpu);
7135
7136         r = 0;
7137
7138 out:
7139
7140         return r;
7141 }
7142
7143 /*
7144  * Translate a guest virtual address to a guest physical address.
7145  */
7146 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7147                                     struct kvm_translation *tr)
7148 {
7149         unsigned long vaddr = tr->linear_address;
7150         gpa_t gpa;
7151         int idx;
7152
7153         idx = srcu_read_lock(&vcpu->kvm->srcu);
7154         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7155         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7156         tr->physical_address = gpa;
7157         tr->valid = gpa != UNMAPPED_GVA;
7158         tr->writeable = 1;
7159         tr->usermode = 0;
7160
7161         return 0;
7162 }
7163
7164 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7165 {
7166         struct fxregs_state *fxsave =
7167                         &vcpu->arch.guest_fpu.state.fxsave;
7168
7169         memcpy(fpu->fpr, fxsave->st_space, 128);
7170         fpu->fcw = fxsave->cwd;
7171         fpu->fsw = fxsave->swd;
7172         fpu->ftwx = fxsave->twd;
7173         fpu->last_opcode = fxsave->fop;
7174         fpu->last_ip = fxsave->rip;
7175         fpu->last_dp = fxsave->rdp;
7176         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7177
7178         return 0;
7179 }
7180
7181 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7182 {
7183         struct fxregs_state *fxsave =
7184                         &vcpu->arch.guest_fpu.state.fxsave;
7185
7186         memcpy(fxsave->st_space, fpu->fpr, 128);
7187         fxsave->cwd = fpu->fcw;
7188         fxsave->swd = fpu->fsw;
7189         fxsave->twd = fpu->ftwx;
7190         fxsave->fop = fpu->last_opcode;
7191         fxsave->rip = fpu->last_ip;
7192         fxsave->rdp = fpu->last_dp;
7193         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7194
7195         return 0;
7196 }
7197
7198 static void fx_init(struct kvm_vcpu *vcpu)
7199 {
7200         fpstate_init(&vcpu->arch.guest_fpu.state);
7201         if (cpu_has_xsaves)
7202                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7203                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7204
7205         /*
7206          * Ensure guest xcr0 is valid for loading
7207          */
7208         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7209
7210         vcpu->arch.cr0 |= X86_CR0_ET;
7211 }
7212
7213 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7214 {
7215         if (vcpu->guest_fpu_loaded)
7216                 return;
7217
7218         /*
7219          * Restore all possible states in the guest,
7220          * and assume host would use all available bits.
7221          * Guest xcr0 would be loaded later.
7222          */
7223         vcpu->guest_fpu_loaded = 1;
7224         __kernel_fpu_begin();
7225         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7226         trace_kvm_fpu(1);
7227 }
7228
7229 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7230 {
7231         if (!vcpu->guest_fpu_loaded) {
7232                 vcpu->fpu_counter = 0;
7233                 return;
7234         }
7235
7236         vcpu->guest_fpu_loaded = 0;
7237         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7238         __kernel_fpu_end();
7239         ++vcpu->stat.fpu_reload;
7240         /*
7241          * If using eager FPU mode, or if the guest is a frequent user
7242          * of the FPU, just leave the FPU active for next time.
7243          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7244          * the FPU in bursts will revert to loading it on demand.
7245          */
7246         if (!vcpu->arch.eager_fpu) {
7247                 if (++vcpu->fpu_counter < 5)
7248                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7249         }
7250         trace_kvm_fpu(0);
7251 }
7252
7253 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7254 {
7255         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7256
7257         kvmclock_reset(vcpu);
7258
7259         kvm_x86_ops->vcpu_free(vcpu);
7260         free_cpumask_var(wbinvd_dirty_mask);
7261 }
7262
7263 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7264                                                 unsigned int id)
7265 {
7266         struct kvm_vcpu *vcpu;
7267
7268         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7269                 printk_once(KERN_WARNING
7270                 "kvm: SMP vm created on host with unstable TSC; "
7271                 "guest TSC will not be reliable\n");
7272
7273         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7274
7275         return vcpu;
7276 }
7277
7278 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7279 {
7280         int r;
7281
7282         kvm_vcpu_mtrr_init(vcpu);
7283         r = vcpu_load(vcpu);
7284         if (r)
7285                 return r;
7286         kvm_vcpu_reset(vcpu, false);
7287         kvm_mmu_setup(vcpu);
7288         vcpu_put(vcpu);
7289         return r;
7290 }
7291
7292 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7293 {
7294         struct msr_data msr;
7295         struct kvm *kvm = vcpu->kvm;
7296
7297         if (vcpu_load(vcpu))
7298                 return;
7299         msr.data = 0x0;
7300         msr.index = MSR_IA32_TSC;
7301         msr.host_initiated = true;
7302         kvm_write_tsc(vcpu, &msr);
7303         vcpu_put(vcpu);
7304
7305         if (!kvmclock_periodic_sync)
7306                 return;
7307
7308         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7309                                         KVMCLOCK_SYNC_PERIOD);
7310 }
7311
7312 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7313 {
7314         int r;
7315         vcpu->arch.apf.msr_val = 0;
7316
7317         r = vcpu_load(vcpu);
7318         BUG_ON(r);
7319         kvm_mmu_unload(vcpu);
7320         vcpu_put(vcpu);
7321
7322         kvm_x86_ops->vcpu_free(vcpu);
7323 }
7324
7325 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7326 {
7327         vcpu->arch.hflags = 0;
7328
7329         atomic_set(&vcpu->arch.nmi_queued, 0);
7330         vcpu->arch.nmi_pending = 0;
7331         vcpu->arch.nmi_injected = false;
7332         kvm_clear_interrupt_queue(vcpu);
7333         kvm_clear_exception_queue(vcpu);
7334
7335         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7336         kvm_update_dr0123(vcpu);
7337         vcpu->arch.dr6 = DR6_INIT;
7338         kvm_update_dr6(vcpu);
7339         vcpu->arch.dr7 = DR7_FIXED_1;
7340         kvm_update_dr7(vcpu);
7341
7342         vcpu->arch.cr2 = 0;
7343
7344         kvm_make_request(KVM_REQ_EVENT, vcpu);
7345         vcpu->arch.apf.msr_val = 0;
7346         vcpu->arch.st.msr_val = 0;
7347
7348         kvmclock_reset(vcpu);
7349
7350         kvm_clear_async_pf_completion_queue(vcpu);
7351         kvm_async_pf_hash_reset(vcpu);
7352         vcpu->arch.apf.halted = false;
7353
7354         if (!init_event) {
7355                 kvm_pmu_reset(vcpu);
7356                 vcpu->arch.smbase = 0x30000;
7357         }
7358
7359         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7360         vcpu->arch.regs_avail = ~0;
7361         vcpu->arch.regs_dirty = ~0;
7362
7363         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7364 }
7365
7366 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7367 {
7368         struct kvm_segment cs;
7369
7370         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7371         cs.selector = vector << 8;
7372         cs.base = vector << 12;
7373         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7374         kvm_rip_write(vcpu, 0);
7375 }
7376
7377 int kvm_arch_hardware_enable(void)
7378 {
7379         struct kvm *kvm;
7380         struct kvm_vcpu *vcpu;
7381         int i;
7382         int ret;
7383         u64 local_tsc;
7384         u64 max_tsc = 0;
7385         bool stable, backwards_tsc = false;
7386
7387         kvm_shared_msr_cpu_online();
7388         ret = kvm_x86_ops->hardware_enable();
7389         if (ret != 0)
7390                 return ret;
7391
7392         local_tsc = rdtsc();
7393         stable = !check_tsc_unstable();
7394         list_for_each_entry(kvm, &vm_list, vm_list) {
7395                 kvm_for_each_vcpu(i, vcpu, kvm) {
7396                         if (!stable && vcpu->cpu == smp_processor_id())
7397                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7398                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7399                                 backwards_tsc = true;
7400                                 if (vcpu->arch.last_host_tsc > max_tsc)
7401                                         max_tsc = vcpu->arch.last_host_tsc;
7402                         }
7403                 }
7404         }
7405
7406         /*
7407          * Sometimes, even reliable TSCs go backwards.  This happens on
7408          * platforms that reset TSC during suspend or hibernate actions, but
7409          * maintain synchronization.  We must compensate.  Fortunately, we can
7410          * detect that condition here, which happens early in CPU bringup,
7411          * before any KVM threads can be running.  Unfortunately, we can't
7412          * bring the TSCs fully up to date with real time, as we aren't yet far
7413          * enough into CPU bringup that we know how much real time has actually
7414          * elapsed; our helper function, get_kernel_ns() will be using boot
7415          * variables that haven't been updated yet.
7416          *
7417          * So we simply find the maximum observed TSC above, then record the
7418          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7419          * the adjustment will be applied.  Note that we accumulate
7420          * adjustments, in case multiple suspend cycles happen before some VCPU
7421          * gets a chance to run again.  In the event that no KVM threads get a
7422          * chance to run, we will miss the entire elapsed period, as we'll have
7423          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7424          * loose cycle time.  This isn't too big a deal, since the loss will be
7425          * uniform across all VCPUs (not to mention the scenario is extremely
7426          * unlikely). It is possible that a second hibernate recovery happens
7427          * much faster than a first, causing the observed TSC here to be
7428          * smaller; this would require additional padding adjustment, which is
7429          * why we set last_host_tsc to the local tsc observed here.
7430          *
7431          * N.B. - this code below runs only on platforms with reliable TSC,
7432          * as that is the only way backwards_tsc is set above.  Also note
7433          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7434          * have the same delta_cyc adjustment applied if backwards_tsc
7435          * is detected.  Note further, this adjustment is only done once,
7436          * as we reset last_host_tsc on all VCPUs to stop this from being
7437          * called multiple times (one for each physical CPU bringup).
7438          *
7439          * Platforms with unreliable TSCs don't have to deal with this, they
7440          * will be compensated by the logic in vcpu_load, which sets the TSC to
7441          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7442          * guarantee that they stay in perfect synchronization.
7443          */
7444         if (backwards_tsc) {
7445                 u64 delta_cyc = max_tsc - local_tsc;
7446                 backwards_tsc_observed = true;
7447                 list_for_each_entry(kvm, &vm_list, vm_list) {
7448                         kvm_for_each_vcpu(i, vcpu, kvm) {
7449                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7450                                 vcpu->arch.last_host_tsc = local_tsc;
7451                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7452                         }
7453
7454                         /*
7455                          * We have to disable TSC offset matching.. if you were
7456                          * booting a VM while issuing an S4 host suspend....
7457                          * you may have some problem.  Solving this issue is
7458                          * left as an exercise to the reader.
7459                          */
7460                         kvm->arch.last_tsc_nsec = 0;
7461                         kvm->arch.last_tsc_write = 0;
7462                 }
7463
7464         }
7465         return 0;
7466 }
7467
7468 void kvm_arch_hardware_disable(void)
7469 {
7470         kvm_x86_ops->hardware_disable();
7471         drop_user_return_notifiers();
7472 }
7473
7474 int kvm_arch_hardware_setup(void)
7475 {
7476         int r;
7477
7478         r = kvm_x86_ops->hardware_setup();
7479         if (r != 0)
7480                 return r;
7481
7482         if (kvm_has_tsc_control) {
7483                 /*
7484                  * Make sure the user can only configure tsc_khz values that
7485                  * fit into a signed integer.
7486                  * A min value is not calculated needed because it will always
7487                  * be 1 on all machines.
7488                  */
7489                 u64 max = min(0x7fffffffULL,
7490                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7491                 kvm_max_guest_tsc_khz = max;
7492
7493                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7494         }
7495
7496         kvm_init_msr_list();
7497         return 0;
7498 }
7499
7500 void kvm_arch_hardware_unsetup(void)
7501 {
7502         kvm_x86_ops->hardware_unsetup();
7503 }
7504
7505 void kvm_arch_check_processor_compat(void *rtn)
7506 {
7507         kvm_x86_ops->check_processor_compatibility(rtn);
7508 }
7509
7510 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7511 {
7512         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7513 }
7514 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7515
7516 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7517 {
7518         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7519 }
7520
7521 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7522 {
7523         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7524 }
7525
7526 struct static_key kvm_no_apic_vcpu __read_mostly;
7527
7528 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7529 {
7530         struct page *page;
7531         struct kvm *kvm;
7532         int r;
7533
7534         BUG_ON(vcpu->kvm == NULL);
7535         kvm = vcpu->kvm;
7536
7537         vcpu->arch.pv.pv_unhalted = false;
7538         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7539         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7540                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7541         else
7542                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7543
7544         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7545         if (!page) {
7546                 r = -ENOMEM;
7547                 goto fail;
7548         }
7549         vcpu->arch.pio_data = page_address(page);
7550
7551         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7552
7553         r = kvm_mmu_create(vcpu);
7554         if (r < 0)
7555                 goto fail_free_pio_data;
7556
7557         if (irqchip_in_kernel(kvm)) {
7558                 r = kvm_create_lapic(vcpu);
7559                 if (r < 0)
7560                         goto fail_mmu_destroy;
7561         } else
7562                 static_key_slow_inc(&kvm_no_apic_vcpu);
7563
7564         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7565                                        GFP_KERNEL);
7566         if (!vcpu->arch.mce_banks) {
7567                 r = -ENOMEM;
7568                 goto fail_free_lapic;
7569         }
7570         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7571
7572         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7573                 r = -ENOMEM;
7574                 goto fail_free_mce_banks;
7575         }
7576
7577         fx_init(vcpu);
7578
7579         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7580         vcpu->arch.pv_time_enabled = false;
7581
7582         vcpu->arch.guest_supported_xcr0 = 0;
7583         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7584
7585         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7586
7587         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7588
7589         kvm_async_pf_hash_reset(vcpu);
7590         kvm_pmu_init(vcpu);
7591
7592         vcpu->arch.pending_external_vector = -1;
7593
7594         return 0;
7595
7596 fail_free_mce_banks:
7597         kfree(vcpu->arch.mce_banks);
7598 fail_free_lapic:
7599         kvm_free_lapic(vcpu);
7600 fail_mmu_destroy:
7601         kvm_mmu_destroy(vcpu);
7602 fail_free_pio_data:
7603         free_page((unsigned long)vcpu->arch.pio_data);
7604 fail:
7605         return r;
7606 }
7607
7608 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7609 {
7610         int idx;
7611
7612         kvm_pmu_destroy(vcpu);
7613         kfree(vcpu->arch.mce_banks);
7614         kvm_free_lapic(vcpu);
7615         idx = srcu_read_lock(&vcpu->kvm->srcu);
7616         kvm_mmu_destroy(vcpu);
7617         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7618         free_page((unsigned long)vcpu->arch.pio_data);
7619         if (!lapic_in_kernel(vcpu))
7620                 static_key_slow_dec(&kvm_no_apic_vcpu);
7621 }
7622
7623 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7624 {
7625         kvm_x86_ops->sched_in(vcpu, cpu);
7626 }
7627
7628 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7629 {
7630         if (type)
7631                 return -EINVAL;
7632
7633         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7634         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7635         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7636         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7637         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7638
7639         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7640         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7641         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7642         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7643                 &kvm->arch.irq_sources_bitmap);
7644
7645         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7646         mutex_init(&kvm->arch.apic_map_lock);
7647         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7648
7649         pvclock_update_vm_gtod_copy(kvm);
7650
7651         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7652         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7653
7654         return 0;
7655 }
7656
7657 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7658 {
7659         int r;
7660         r = vcpu_load(vcpu);
7661         BUG_ON(r);
7662         kvm_mmu_unload(vcpu);
7663         vcpu_put(vcpu);
7664 }
7665
7666 static void kvm_free_vcpus(struct kvm *kvm)
7667 {
7668         unsigned int i;
7669         struct kvm_vcpu *vcpu;
7670
7671         /*
7672          * Unpin any mmu pages first.
7673          */
7674         kvm_for_each_vcpu(i, vcpu, kvm) {
7675                 kvm_clear_async_pf_completion_queue(vcpu);
7676                 kvm_unload_vcpu_mmu(vcpu);
7677         }
7678         kvm_for_each_vcpu(i, vcpu, kvm)
7679                 kvm_arch_vcpu_free(vcpu);
7680
7681         mutex_lock(&kvm->lock);
7682         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7683                 kvm->vcpus[i] = NULL;
7684
7685         atomic_set(&kvm->online_vcpus, 0);
7686         mutex_unlock(&kvm->lock);
7687 }
7688
7689 void kvm_arch_sync_events(struct kvm *kvm)
7690 {
7691         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7692         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7693         kvm_free_all_assigned_devices(kvm);
7694         kvm_free_pit(kvm);
7695 }
7696
7697 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7698 {
7699         int i, r;
7700         unsigned long hva;
7701         struct kvm_memslots *slots = kvm_memslots(kvm);
7702         struct kvm_memory_slot *slot, old;
7703
7704         /* Called with kvm->slots_lock held.  */
7705         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7706                 return -EINVAL;
7707
7708         slot = id_to_memslot(slots, id);
7709         if (size) {
7710                 if (WARN_ON(slot->npages))
7711                         return -EEXIST;
7712
7713                 /*
7714                  * MAP_SHARED to prevent internal slot pages from being moved
7715                  * by fork()/COW.
7716                  */
7717                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7718                               MAP_SHARED | MAP_ANONYMOUS, 0);
7719                 if (IS_ERR((void *)hva))
7720                         return PTR_ERR((void *)hva);
7721         } else {
7722                 if (!slot->npages)
7723                         return 0;
7724
7725                 hva = 0;
7726         }
7727
7728         old = *slot;
7729         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7730                 struct kvm_userspace_memory_region m;
7731
7732                 m.slot = id | (i << 16);
7733                 m.flags = 0;
7734                 m.guest_phys_addr = gpa;
7735                 m.userspace_addr = hva;
7736                 m.memory_size = size;
7737                 r = __kvm_set_memory_region(kvm, &m);
7738                 if (r < 0)
7739                         return r;
7740         }
7741
7742         if (!size) {
7743                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7744                 WARN_ON(r < 0);
7745         }
7746
7747         return 0;
7748 }
7749 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7750
7751 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7752 {
7753         int r;
7754
7755         mutex_lock(&kvm->slots_lock);
7756         r = __x86_set_memory_region(kvm, id, gpa, size);
7757         mutex_unlock(&kvm->slots_lock);
7758
7759         return r;
7760 }
7761 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7762
7763 void kvm_arch_destroy_vm(struct kvm *kvm)
7764 {
7765         if (current->mm == kvm->mm) {
7766                 /*
7767                  * Free memory regions allocated on behalf of userspace,
7768                  * unless the the memory map has changed due to process exit
7769                  * or fd copying.
7770                  */
7771                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7772                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7773                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7774         }
7775         kvm_iommu_unmap_guest(kvm);
7776         kfree(kvm->arch.vpic);
7777         kfree(kvm->arch.vioapic);
7778         kvm_free_vcpus(kvm);
7779         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7780 }
7781
7782 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7783                            struct kvm_memory_slot *dont)
7784 {
7785         int i;
7786
7787         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7788                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7789                         kvfree(free->arch.rmap[i]);
7790                         free->arch.rmap[i] = NULL;
7791                 }
7792                 if (i == 0)
7793                         continue;
7794
7795                 if (!dont || free->arch.lpage_info[i - 1] !=
7796                              dont->arch.lpage_info[i - 1]) {
7797                         kvfree(free->arch.lpage_info[i - 1]);
7798                         free->arch.lpage_info[i - 1] = NULL;
7799                 }
7800         }
7801 }
7802
7803 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7804                             unsigned long npages)
7805 {
7806         int i;
7807
7808         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7809                 unsigned long ugfn;
7810                 int lpages;
7811                 int level = i + 1;
7812
7813                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7814                                       slot->base_gfn, level) + 1;
7815
7816                 slot->arch.rmap[i] =
7817                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7818                 if (!slot->arch.rmap[i])
7819                         goto out_free;
7820                 if (i == 0)
7821                         continue;
7822
7823                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7824                                         sizeof(*slot->arch.lpage_info[i - 1]));
7825                 if (!slot->arch.lpage_info[i - 1])
7826                         goto out_free;
7827
7828                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7829                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7830                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7831                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7832                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7833                 /*
7834                  * If the gfn and userspace address are not aligned wrt each
7835                  * other, or if explicitly asked to, disable large page
7836                  * support for this slot
7837                  */
7838                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7839                     !kvm_largepages_enabled()) {
7840                         unsigned long j;
7841
7842                         for (j = 0; j < lpages; ++j)
7843                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7844                 }
7845         }
7846
7847         return 0;
7848
7849 out_free:
7850         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7851                 kvfree(slot->arch.rmap[i]);
7852                 slot->arch.rmap[i] = NULL;
7853                 if (i == 0)
7854                         continue;
7855
7856                 kvfree(slot->arch.lpage_info[i - 1]);
7857                 slot->arch.lpage_info[i - 1] = NULL;
7858         }
7859         return -ENOMEM;
7860 }
7861
7862 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7863 {
7864         /*
7865          * memslots->generation has been incremented.
7866          * mmio generation may have reached its maximum value.
7867          */
7868         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7869 }
7870
7871 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7872                                 struct kvm_memory_slot *memslot,
7873                                 const struct kvm_userspace_memory_region *mem,
7874                                 enum kvm_mr_change change)
7875 {
7876         return 0;
7877 }
7878
7879 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7880                                      struct kvm_memory_slot *new)
7881 {
7882         /* Still write protect RO slot */
7883         if (new->flags & KVM_MEM_READONLY) {
7884                 kvm_mmu_slot_remove_write_access(kvm, new);
7885                 return;
7886         }
7887
7888         /*
7889          * Call kvm_x86_ops dirty logging hooks when they are valid.
7890          *
7891          * kvm_x86_ops->slot_disable_log_dirty is called when:
7892          *
7893          *  - KVM_MR_CREATE with dirty logging is disabled
7894          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7895          *
7896          * The reason is, in case of PML, we need to set D-bit for any slots
7897          * with dirty logging disabled in order to eliminate unnecessary GPA
7898          * logging in PML buffer (and potential PML buffer full VMEXT). This
7899          * guarantees leaving PML enabled during guest's lifetime won't have
7900          * any additonal overhead from PML when guest is running with dirty
7901          * logging disabled for memory slots.
7902          *
7903          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7904          * to dirty logging mode.
7905          *
7906          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7907          *
7908          * In case of write protect:
7909          *
7910          * Write protect all pages for dirty logging.
7911          *
7912          * All the sptes including the large sptes which point to this
7913          * slot are set to readonly. We can not create any new large
7914          * spte on this slot until the end of the logging.
7915          *
7916          * See the comments in fast_page_fault().
7917          */
7918         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7919                 if (kvm_x86_ops->slot_enable_log_dirty)
7920                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7921                 else
7922                         kvm_mmu_slot_remove_write_access(kvm, new);
7923         } else {
7924                 if (kvm_x86_ops->slot_disable_log_dirty)
7925                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7926         }
7927 }
7928
7929 void kvm_arch_commit_memory_region(struct kvm *kvm,
7930                                 const struct kvm_userspace_memory_region *mem,
7931                                 const struct kvm_memory_slot *old,
7932                                 const struct kvm_memory_slot *new,
7933                                 enum kvm_mr_change change)
7934 {
7935         int nr_mmu_pages = 0;
7936
7937         if (!kvm->arch.n_requested_mmu_pages)
7938                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7939
7940         if (nr_mmu_pages)
7941                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7942
7943         /*
7944          * Dirty logging tracks sptes in 4k granularity, meaning that large
7945          * sptes have to be split.  If live migration is successful, the guest
7946          * in the source machine will be destroyed and large sptes will be
7947          * created in the destination. However, if the guest continues to run
7948          * in the source machine (for example if live migration fails), small
7949          * sptes will remain around and cause bad performance.
7950          *
7951          * Scan sptes if dirty logging has been stopped, dropping those
7952          * which can be collapsed into a single large-page spte.  Later
7953          * page faults will create the large-page sptes.
7954          */
7955         if ((change != KVM_MR_DELETE) &&
7956                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7957                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7958                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7959
7960         /*
7961          * Set up write protection and/or dirty logging for the new slot.
7962          *
7963          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7964          * been zapped so no dirty logging staff is needed for old slot. For
7965          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7966          * new and it's also covered when dealing with the new slot.
7967          *
7968          * FIXME: const-ify all uses of struct kvm_memory_slot.
7969          */
7970         if (change != KVM_MR_DELETE)
7971                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7972 }
7973
7974 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7975 {
7976         kvm_mmu_invalidate_zap_all_pages(kvm);
7977 }
7978
7979 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7980                                    struct kvm_memory_slot *slot)
7981 {
7982         kvm_mmu_invalidate_zap_all_pages(kvm);
7983 }
7984
7985 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
7986 {
7987         if (!list_empty_careful(&vcpu->async_pf.done))
7988                 return true;
7989
7990         if (kvm_apic_has_events(vcpu))
7991                 return true;
7992
7993         if (vcpu->arch.pv.pv_unhalted)
7994                 return true;
7995
7996         if (atomic_read(&vcpu->arch.nmi_queued))
7997                 return true;
7998
7999         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8000                 return true;
8001
8002         if (kvm_arch_interrupt_allowed(vcpu) &&
8003             kvm_cpu_has_interrupt(vcpu))
8004                 return true;
8005
8006         return false;
8007 }
8008
8009 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8010 {
8011         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8012                 kvm_x86_ops->check_nested_events(vcpu, false);
8013
8014         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8015 }
8016
8017 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8018 {
8019         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8020 }
8021
8022 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8023 {
8024         return kvm_x86_ops->interrupt_allowed(vcpu);
8025 }
8026
8027 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8028 {
8029         if (is_64_bit_mode(vcpu))
8030                 return kvm_rip_read(vcpu);
8031         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8032                      kvm_rip_read(vcpu));
8033 }
8034 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8035
8036 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8037 {
8038         return kvm_get_linear_rip(vcpu) == linear_rip;
8039 }
8040 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8041
8042 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8043 {
8044         unsigned long rflags;
8045
8046         rflags = kvm_x86_ops->get_rflags(vcpu);
8047         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8048                 rflags &= ~X86_EFLAGS_TF;
8049         return rflags;
8050 }
8051 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8052
8053 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8054 {
8055         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8056             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8057                 rflags |= X86_EFLAGS_TF;
8058         kvm_x86_ops->set_rflags(vcpu, rflags);
8059 }
8060
8061 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8062 {
8063         __kvm_set_rflags(vcpu, rflags);
8064         kvm_make_request(KVM_REQ_EVENT, vcpu);
8065 }
8066 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8067
8068 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8069 {
8070         int r;
8071
8072         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8073               work->wakeup_all)
8074                 return;
8075
8076         r = kvm_mmu_reload(vcpu);
8077         if (unlikely(r))
8078                 return;
8079
8080         if (!vcpu->arch.mmu.direct_map &&
8081               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8082                 return;
8083
8084         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8085 }
8086
8087 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8088 {
8089         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8090 }
8091
8092 static inline u32 kvm_async_pf_next_probe(u32 key)
8093 {
8094         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8095 }
8096
8097 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8098 {
8099         u32 key = kvm_async_pf_hash_fn(gfn);
8100
8101         while (vcpu->arch.apf.gfns[key] != ~0)
8102                 key = kvm_async_pf_next_probe(key);
8103
8104         vcpu->arch.apf.gfns[key] = gfn;
8105 }
8106
8107 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8108 {
8109         int i;
8110         u32 key = kvm_async_pf_hash_fn(gfn);
8111
8112         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8113                      (vcpu->arch.apf.gfns[key] != gfn &&
8114                       vcpu->arch.apf.gfns[key] != ~0); i++)
8115                 key = kvm_async_pf_next_probe(key);
8116
8117         return key;
8118 }
8119
8120 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8121 {
8122         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8123 }
8124
8125 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8126 {
8127         u32 i, j, k;
8128
8129         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8130         while (true) {
8131                 vcpu->arch.apf.gfns[i] = ~0;
8132                 do {
8133                         j = kvm_async_pf_next_probe(j);
8134                         if (vcpu->arch.apf.gfns[j] == ~0)
8135                                 return;
8136                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8137                         /*
8138                          * k lies cyclically in ]i,j]
8139                          * |    i.k.j |
8140                          * |....j i.k.| or  |.k..j i...|
8141                          */
8142                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8143                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8144                 i = j;
8145         }
8146 }
8147
8148 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8149 {
8150
8151         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8152                                       sizeof(val));
8153 }
8154
8155 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8156                                      struct kvm_async_pf *work)
8157 {
8158         struct x86_exception fault;
8159
8160         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8161         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8162
8163         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8164             (vcpu->arch.apf.send_user_only &&
8165              kvm_x86_ops->get_cpl(vcpu) == 0))
8166                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8167         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8168                 fault.vector = PF_VECTOR;
8169                 fault.error_code_valid = true;
8170                 fault.error_code = 0;
8171                 fault.nested_page_fault = false;
8172                 fault.address = work->arch.token;
8173                 kvm_inject_page_fault(vcpu, &fault);
8174         }
8175 }
8176
8177 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8178                                  struct kvm_async_pf *work)
8179 {
8180         struct x86_exception fault;
8181
8182         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8183         if (work->wakeup_all)
8184                 work->arch.token = ~0; /* broadcast wakeup */
8185         else
8186                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8187
8188         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8189             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8190                 fault.vector = PF_VECTOR;
8191                 fault.error_code_valid = true;
8192                 fault.error_code = 0;
8193                 fault.nested_page_fault = false;
8194                 fault.address = work->arch.token;
8195                 kvm_inject_page_fault(vcpu, &fault);
8196         }
8197         vcpu->arch.apf.halted = false;
8198         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8199 }
8200
8201 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8202 {
8203         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8204                 return true;
8205         else
8206                 return !kvm_event_needs_reinjection(vcpu) &&
8207                         kvm_x86_ops->interrupt_allowed(vcpu);
8208 }
8209
8210 void kvm_arch_start_assignment(struct kvm *kvm)
8211 {
8212         atomic_inc(&kvm->arch.assigned_device_count);
8213 }
8214 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8215
8216 void kvm_arch_end_assignment(struct kvm *kvm)
8217 {
8218         atomic_dec(&kvm->arch.assigned_device_count);
8219 }
8220 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8221
8222 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8223 {
8224         return atomic_read(&kvm->arch.assigned_device_count);
8225 }
8226 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8227
8228 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8229 {
8230         atomic_inc(&kvm->arch.noncoherent_dma_count);
8231 }
8232 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8233
8234 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8235 {
8236         atomic_dec(&kvm->arch.noncoherent_dma_count);
8237 }
8238 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8239
8240 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8241 {
8242         return atomic_read(&kvm->arch.noncoherent_dma_count);
8243 }
8244 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8245
8246 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8247                                       struct irq_bypass_producer *prod)
8248 {
8249         struct kvm_kernel_irqfd *irqfd =
8250                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8251
8252         if (kvm_x86_ops->update_pi_irte) {
8253                 irqfd->producer = prod;
8254                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8255                                 prod->irq, irqfd->gsi, 1);
8256         }
8257
8258         return -EINVAL;
8259 }
8260
8261 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8262                                       struct irq_bypass_producer *prod)
8263 {
8264         int ret;
8265         struct kvm_kernel_irqfd *irqfd =
8266                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8267
8268         if (!kvm_x86_ops->update_pi_irte) {
8269                 WARN_ON(irqfd->producer != NULL);
8270                 return;
8271         }
8272
8273         WARN_ON(irqfd->producer != prod);
8274         irqfd->producer = NULL;
8275
8276         /*
8277          * When producer of consumer is unregistered, we change back to
8278          * remapped mode, so we can re-use the current implementation
8279          * when the irq is masked/disabed or the consumer side (KVM
8280          * int this case doesn't want to receive the interrupts.
8281         */
8282         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8283         if (ret)
8284                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8285                        " fails: %d\n", irqfd->consumer.token, ret);
8286 }
8287
8288 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8289                                    uint32_t guest_irq, bool set)
8290 {
8291         if (!kvm_x86_ops->update_pi_irte)
8292                 return -EINVAL;
8293
8294         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8295 }
8296
8297 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8306 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8307 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8310 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8311 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8312 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8313 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);