2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/module.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <trace/events/kvm.h>
58 #define CREATE_TRACE_POINTS
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define MAX_IO_MSRS 256
72 #define KVM_MAX_MCE_BANKS 32
73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
75 #define emul_to_vcpu(ctxt) \
76 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
93 static void process_nmi(struct kvm_vcpu *vcpu);
94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
99 static bool __read_mostly ignore_msrs = 0;
100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
102 unsigned int min_timer_period_us = 500;
103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
105 static bool __read_mostly kvmclock_periodic_sync = true;
106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
108 bool __read_mostly kvm_has_tsc_control;
109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
110 u32 __read_mostly kvm_max_guest_tsc_khz;
111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
112 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
114 u64 __read_mostly kvm_max_tsc_scaling_ratio;
115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
119 static u32 __read_mostly tsc_tolerance_ppm = 250;
120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
126 static bool __read_mostly backwards_tsc_observed = false;
128 #define KVM_NR_SHARED_MSRS 16
130 struct kvm_shared_msrs_global {
132 u32 msrs[KVM_NR_SHARED_MSRS];
135 struct kvm_shared_msrs {
136 struct user_return_notifier urn;
138 struct kvm_shared_msr_values {
141 } values[KVM_NR_SHARED_MSRS];
144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
145 static struct kvm_shared_msrs __percpu *shared_msrs;
147 struct kvm_stats_debugfs_item debugfs_entries[] = {
148 { "pf_fixed", VCPU_STAT(pf_fixed) },
149 { "pf_guest", VCPU_STAT(pf_guest) },
150 { "tlb_flush", VCPU_STAT(tlb_flush) },
151 { "invlpg", VCPU_STAT(invlpg) },
152 { "exits", VCPU_STAT(exits) },
153 { "io_exits", VCPU_STAT(io_exits) },
154 { "mmio_exits", VCPU_STAT(mmio_exits) },
155 { "signal_exits", VCPU_STAT(signal_exits) },
156 { "irq_window", VCPU_STAT(irq_window_exits) },
157 { "nmi_window", VCPU_STAT(nmi_window_exits) },
158 { "halt_exits", VCPU_STAT(halt_exits) },
159 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
160 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
161 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
162 { "hypercalls", VCPU_STAT(hypercalls) },
163 { "request_irq", VCPU_STAT(request_irq_exits) },
164 { "irq_exits", VCPU_STAT(irq_exits) },
165 { "host_state_reload", VCPU_STAT(host_state_reload) },
166 { "efer_reload", VCPU_STAT(efer_reload) },
167 { "fpu_reload", VCPU_STAT(fpu_reload) },
168 { "insn_emulation", VCPU_STAT(insn_emulation) },
169 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
170 { "irq_injections", VCPU_STAT(irq_injections) },
171 { "nmi_injections", VCPU_STAT(nmi_injections) },
172 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
173 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
174 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
175 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
176 { "mmu_flooded", VM_STAT(mmu_flooded) },
177 { "mmu_recycled", VM_STAT(mmu_recycled) },
178 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
179 { "mmu_unsync", VM_STAT(mmu_unsync) },
180 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
181 { "largepages", VM_STAT(lpages) },
185 u64 __read_mostly host_xcr0;
187 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
192 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
193 vcpu->arch.apf.gfns[i] = ~0;
196 static void kvm_on_user_return(struct user_return_notifier *urn)
199 struct kvm_shared_msrs *locals
200 = container_of(urn, struct kvm_shared_msrs, urn);
201 struct kvm_shared_msr_values *values;
203 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
204 values = &locals->values[slot];
205 if (values->host != values->curr) {
206 wrmsrl(shared_msrs_global.msrs[slot], values->host);
207 values->curr = values->host;
210 locals->registered = false;
211 user_return_notifier_unregister(urn);
214 static void shared_msr_update(unsigned slot, u32 msr)
217 unsigned int cpu = smp_processor_id();
218 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
220 /* only read, and nobody should modify it at this time,
221 * so don't need lock */
222 if (slot >= shared_msrs_global.nr) {
223 printk(KERN_ERR "kvm: invalid MSR slot!");
226 rdmsrl_safe(msr, &value);
227 smsr->values[slot].host = value;
228 smsr->values[slot].curr = value;
231 void kvm_define_shared_msr(unsigned slot, u32 msr)
233 BUG_ON(slot >= KVM_NR_SHARED_MSRS);
234 shared_msrs_global.msrs[slot] = msr;
235 if (slot >= shared_msrs_global.nr)
236 shared_msrs_global.nr = slot + 1;
238 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
240 static void kvm_shared_msr_cpu_online(void)
244 for (i = 0; i < shared_msrs_global.nr; ++i)
245 shared_msr_update(i, shared_msrs_global.msrs[i]);
248 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
250 unsigned int cpu = smp_processor_id();
251 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
254 if (((value ^ smsr->values[slot].curr) & mask) == 0)
256 smsr->values[slot].curr = value;
257 err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
261 if (!smsr->registered) {
262 smsr->urn.on_user_return = kvm_on_user_return;
263 user_return_notifier_register(&smsr->urn);
264 smsr->registered = true;
268 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
270 static void drop_user_return_notifiers(void)
272 unsigned int cpu = smp_processor_id();
273 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
275 if (smsr->registered)
276 kvm_on_user_return(&smsr->urn);
279 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
281 return vcpu->arch.apic_base;
283 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
285 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
287 u64 old_state = vcpu->arch.apic_base &
288 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
289 u64 new_state = msr_info->data &
290 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
291 u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
292 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
294 if (!msr_info->host_initiated &&
295 ((msr_info->data & reserved_bits) != 0 ||
296 new_state == X2APIC_ENABLE ||
297 (new_state == MSR_IA32_APICBASE_ENABLE &&
298 old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
299 (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
303 kvm_lapic_set_base(vcpu, msr_info->data);
306 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
308 asmlinkage __visible void kvm_spurious_fault(void)
310 /* Fault while not rebooting. We want the trace. */
313 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
315 #define EXCPT_BENIGN 0
316 #define EXCPT_CONTRIBUTORY 1
319 static int exception_class(int vector)
329 return EXCPT_CONTRIBUTORY;
336 #define EXCPT_FAULT 0
338 #define EXCPT_ABORT 2
339 #define EXCPT_INTERRUPT 3
341 static int exception_type(int vector)
345 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
346 return EXCPT_INTERRUPT;
350 /* #DB is trap, as instruction watchpoints are handled elsewhere */
351 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
354 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
357 /* Reserved exceptions will result in fault */
361 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
362 unsigned nr, bool has_error, u32 error_code,
368 kvm_make_request(KVM_REQ_EVENT, vcpu);
370 if (!vcpu->arch.exception.pending) {
372 if (has_error && !is_protmode(vcpu))
374 vcpu->arch.exception.pending = true;
375 vcpu->arch.exception.has_error_code = has_error;
376 vcpu->arch.exception.nr = nr;
377 vcpu->arch.exception.error_code = error_code;
378 vcpu->arch.exception.reinject = reinject;
382 /* to check exception */
383 prev_nr = vcpu->arch.exception.nr;
384 if (prev_nr == DF_VECTOR) {
385 /* triple fault -> shutdown */
386 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
389 class1 = exception_class(prev_nr);
390 class2 = exception_class(nr);
391 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
392 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
393 /* generate double fault per SDM Table 5-5 */
394 vcpu->arch.exception.pending = true;
395 vcpu->arch.exception.has_error_code = true;
396 vcpu->arch.exception.nr = DF_VECTOR;
397 vcpu->arch.exception.error_code = 0;
399 /* replace previous exception with a new one in a hope
400 that instruction re-execution will regenerate lost
405 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
407 kvm_multiple_exception(vcpu, nr, false, 0, false);
409 EXPORT_SYMBOL_GPL(kvm_queue_exception);
411 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
413 kvm_multiple_exception(vcpu, nr, false, 0, true);
415 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
417 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
420 kvm_inject_gp(vcpu, 0);
422 kvm_x86_ops->skip_emulated_instruction(vcpu);
424 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
426 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
428 ++vcpu->stat.pf_guest;
429 vcpu->arch.cr2 = fault->address;
430 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
432 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
434 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
436 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
437 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
439 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
441 return fault->nested_page_fault;
444 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
446 atomic_inc(&vcpu->arch.nmi_queued);
447 kvm_make_request(KVM_REQ_NMI, vcpu);
449 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
451 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
453 kvm_multiple_exception(vcpu, nr, true, error_code, false);
455 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
457 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
459 kvm_multiple_exception(vcpu, nr, true, error_code, true);
461 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
464 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
465 * a #GP and return false.
467 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
469 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
471 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
474 EXPORT_SYMBOL_GPL(kvm_require_cpl);
476 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
478 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
481 kvm_queue_exception(vcpu, UD_VECTOR);
484 EXPORT_SYMBOL_GPL(kvm_require_dr);
487 * This function will be used to read from the physical memory of the currently
488 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
489 * can read from guest physical or from the guest's guest physical memory.
491 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
492 gfn_t ngfn, void *data, int offset, int len,
495 struct x86_exception exception;
499 ngpa = gfn_to_gpa(ngfn);
500 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
501 if (real_gfn == UNMAPPED_GVA)
504 real_gfn = gpa_to_gfn(real_gfn);
506 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
508 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
510 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
511 void *data, int offset, int len, u32 access)
513 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
514 data, offset, len, access);
518 * Load the pae pdptrs. Return true is they are all valid.
520 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
522 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
523 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
526 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
528 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
529 offset * sizeof(u64), sizeof(pdpte),
530 PFERR_USER_MASK|PFERR_WRITE_MASK);
535 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
536 if (is_present_gpte(pdpte[i]) &&
538 vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
545 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
546 __set_bit(VCPU_EXREG_PDPTR,
547 (unsigned long *)&vcpu->arch.regs_avail);
548 __set_bit(VCPU_EXREG_PDPTR,
549 (unsigned long *)&vcpu->arch.regs_dirty);
554 EXPORT_SYMBOL_GPL(load_pdptrs);
556 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
558 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
564 if (is_long_mode(vcpu) || !is_pae(vcpu))
567 if (!test_bit(VCPU_EXREG_PDPTR,
568 (unsigned long *)&vcpu->arch.regs_avail))
571 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
572 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
573 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
574 PFERR_USER_MASK | PFERR_WRITE_MASK);
577 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
583 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
585 unsigned long old_cr0 = kvm_read_cr0(vcpu);
586 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
591 if (cr0 & 0xffffffff00000000UL)
595 cr0 &= ~CR0_RESERVED_BITS;
597 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
600 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
603 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
605 if ((vcpu->arch.efer & EFER_LME)) {
610 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
615 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
620 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
623 kvm_x86_ops->set_cr0(vcpu, cr0);
625 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
626 kvm_clear_async_pf_completion_queue(vcpu);
627 kvm_async_pf_hash_reset(vcpu);
630 if ((cr0 ^ old_cr0) & update_bits)
631 kvm_mmu_reset_context(vcpu);
633 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
634 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
635 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
636 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
640 EXPORT_SYMBOL_GPL(kvm_set_cr0);
642 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
644 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
646 EXPORT_SYMBOL_GPL(kvm_lmsw);
648 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
650 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
651 !vcpu->guest_xcr0_loaded) {
652 /* kvm_set_xcr() also depends on this */
653 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
654 vcpu->guest_xcr0_loaded = 1;
658 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
660 if (vcpu->guest_xcr0_loaded) {
661 if (vcpu->arch.xcr0 != host_xcr0)
662 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
663 vcpu->guest_xcr0_loaded = 0;
667 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
670 u64 old_xcr0 = vcpu->arch.xcr0;
673 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
674 if (index != XCR_XFEATURE_ENABLED_MASK)
676 if (!(xcr0 & XFEATURE_MASK_FP))
678 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
682 * Do not allow the guest to set bits that we do not support
683 * saving. However, xcr0 bit 0 is always set, even if the
684 * emulated CPU does not support XSAVE (see fx_init).
686 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
687 if (xcr0 & ~valid_bits)
690 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
691 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
694 if (xcr0 & XFEATURE_MASK_AVX512) {
695 if (!(xcr0 & XFEATURE_MASK_YMM))
697 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
700 vcpu->arch.xcr0 = xcr0;
702 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
703 kvm_update_cpuid(vcpu);
707 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
709 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
710 __kvm_set_xcr(vcpu, index, xcr)) {
711 kvm_inject_gp(vcpu, 0);
716 EXPORT_SYMBOL_GPL(kvm_set_xcr);
718 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
720 unsigned long old_cr4 = kvm_read_cr4(vcpu);
721 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
722 X86_CR4_SMEP | X86_CR4_SMAP;
724 if (cr4 & CR4_RESERVED_BITS)
727 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
730 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
733 if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
736 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
739 if (is_long_mode(vcpu)) {
740 if (!(cr4 & X86_CR4_PAE))
742 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
743 && ((cr4 ^ old_cr4) & pdptr_bits)
744 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
748 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
749 if (!guest_cpuid_has_pcid(vcpu))
752 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
753 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
757 if (kvm_x86_ops->set_cr4(vcpu, cr4))
760 if (((cr4 ^ old_cr4) & pdptr_bits) ||
761 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
762 kvm_mmu_reset_context(vcpu);
764 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
765 kvm_update_cpuid(vcpu);
769 EXPORT_SYMBOL_GPL(kvm_set_cr4);
771 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
774 cr3 &= ~CR3_PCID_INVD;
777 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
778 kvm_mmu_sync_roots(vcpu);
779 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
783 if (is_long_mode(vcpu)) {
784 if (cr3 & CR3_L_MODE_RESERVED_BITS)
786 } else if (is_pae(vcpu) && is_paging(vcpu) &&
787 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
790 vcpu->arch.cr3 = cr3;
791 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
792 kvm_mmu_new_cr3(vcpu);
795 EXPORT_SYMBOL_GPL(kvm_set_cr3);
797 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
799 if (cr8 & CR8_RESERVED_BITS)
801 if (lapic_in_kernel(vcpu))
802 kvm_lapic_set_tpr(vcpu, cr8);
804 vcpu->arch.cr8 = cr8;
807 EXPORT_SYMBOL_GPL(kvm_set_cr8);
809 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
811 if (lapic_in_kernel(vcpu))
812 return kvm_lapic_get_cr8(vcpu);
814 return vcpu->arch.cr8;
816 EXPORT_SYMBOL_GPL(kvm_get_cr8);
818 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
822 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
823 for (i = 0; i < KVM_NR_DB_REGS; i++)
824 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
825 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
829 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
831 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
832 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
835 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
839 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
840 dr7 = vcpu->arch.guest_debug_dr7;
842 dr7 = vcpu->arch.dr7;
843 kvm_x86_ops->set_dr7(vcpu, dr7);
844 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
845 if (dr7 & DR7_BP_EN_MASK)
846 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
849 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
851 u64 fixed = DR6_FIXED_1;
853 if (!guest_cpuid_has_rtm(vcpu))
858 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
862 vcpu->arch.db[dr] = val;
863 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
864 vcpu->arch.eff_db[dr] = val;
869 if (val & 0xffffffff00000000ULL)
871 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
872 kvm_update_dr6(vcpu);
877 if (val & 0xffffffff00000000ULL)
879 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
880 kvm_update_dr7(vcpu);
887 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
889 if (__kvm_set_dr(vcpu, dr, val)) {
890 kvm_inject_gp(vcpu, 0);
895 EXPORT_SYMBOL_GPL(kvm_set_dr);
897 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
901 *val = vcpu->arch.db[dr];
906 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
907 *val = vcpu->arch.dr6;
909 *val = kvm_x86_ops->get_dr6(vcpu);
914 *val = vcpu->arch.dr7;
919 EXPORT_SYMBOL_GPL(kvm_get_dr);
921 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
923 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
927 err = kvm_pmu_rdpmc(vcpu, ecx, &data);
930 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
931 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
934 EXPORT_SYMBOL_GPL(kvm_rdpmc);
937 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
938 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
940 * This list is modified at module load time to reflect the
941 * capabilities of the host cpu. This capabilities test skips MSRs that are
942 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
943 * may depend on host virtualization features rather than host cpu features.
946 static u32 msrs_to_save[] = {
947 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
950 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
952 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
953 MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
956 static unsigned num_msrs_to_save;
958 static u32 emulated_msrs[] = {
959 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
960 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
961 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
962 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
963 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
964 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
967 HV_X64_MSR_VP_RUNTIME,
968 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
972 MSR_IA32_TSCDEADLINE,
973 MSR_IA32_MISC_ENABLE,
979 static unsigned num_emulated_msrs;
981 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
983 if (efer & efer_reserved_bits)
986 if (efer & EFER_FFXSR) {
987 struct kvm_cpuid_entry2 *feat;
989 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
990 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
994 if (efer & EFER_SVME) {
995 struct kvm_cpuid_entry2 *feat;
997 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
998 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1004 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1006 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1008 u64 old_efer = vcpu->arch.efer;
1010 if (!kvm_valid_efer(vcpu, efer))
1014 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1018 efer |= vcpu->arch.efer & EFER_LMA;
1020 kvm_x86_ops->set_efer(vcpu, efer);
1022 /* Update reserved bits */
1023 if ((efer ^ old_efer) & EFER_NX)
1024 kvm_mmu_reset_context(vcpu);
1029 void kvm_enable_efer_bits(u64 mask)
1031 efer_reserved_bits &= ~mask;
1033 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1036 * Writes msr value into into the appropriate "register".
1037 * Returns 0 on success, non-0 otherwise.
1038 * Assumes vcpu_load() was already called.
1040 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1042 switch (msr->index) {
1045 case MSR_KERNEL_GS_BASE:
1048 if (is_noncanonical_address(msr->data))
1051 case MSR_IA32_SYSENTER_EIP:
1052 case MSR_IA32_SYSENTER_ESP:
1054 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1055 * non-canonical address is written on Intel but not on
1056 * AMD (which ignores the top 32-bits, because it does
1057 * not implement 64-bit SYSENTER).
1059 * 64-bit code should hence be able to write a non-canonical
1060 * value on AMD. Making the address canonical ensures that
1061 * vmentry does not fail on Intel after writing a non-canonical
1062 * value, and that something deterministic happens if the guest
1063 * invokes 64-bit SYSENTER.
1065 msr->data = get_canonical(msr->data);
1067 return kvm_x86_ops->set_msr(vcpu, msr);
1069 EXPORT_SYMBOL_GPL(kvm_set_msr);
1072 * Adapt set_msr() to msr_io()'s calling convention
1074 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1076 struct msr_data msr;
1080 msr.host_initiated = true;
1081 r = kvm_get_msr(vcpu, &msr);
1089 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1091 struct msr_data msr;
1095 msr.host_initiated = true;
1096 return kvm_set_msr(vcpu, &msr);
1099 #ifdef CONFIG_X86_64
1100 struct pvclock_gtod_data {
1103 struct { /* extract of a clocksource struct */
1115 static struct pvclock_gtod_data pvclock_gtod_data;
1117 static void update_pvclock_gtod(struct timekeeper *tk)
1119 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1122 boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1124 write_seqcount_begin(&vdata->seq);
1126 /* copy pvclock gtod data */
1127 vdata->clock.vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;
1128 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
1129 vdata->clock.mask = tk->tkr_mono.mask;
1130 vdata->clock.mult = tk->tkr_mono.mult;
1131 vdata->clock.shift = tk->tkr_mono.shift;
1133 vdata->boot_ns = boot_ns;
1134 vdata->nsec_base = tk->tkr_mono.xtime_nsec;
1136 write_seqcount_end(&vdata->seq);
1140 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1143 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1144 * vcpu_enter_guest. This function is only called from
1145 * the physical CPU that is running vcpu.
1147 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1150 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1154 struct pvclock_wall_clock wc;
1155 struct timespec boot;
1160 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1165 ++version; /* first time write, random junk */
1169 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1172 * The guest calculates current wall clock time by adding
1173 * system time (updated by kvm_guest_time_update below) to the
1174 * wall clock specified here. guest system time equals host
1175 * system time for us, thus we must fill in host boot time here.
1179 if (kvm->arch.kvmclock_offset) {
1180 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1181 boot = timespec_sub(boot, ts);
1183 wc.sec = boot.tv_sec;
1184 wc.nsec = boot.tv_nsec;
1185 wc.version = version;
1187 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1190 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1193 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1195 uint32_t quotient, remainder;
1197 /* Don't try to replace with do_div(), this one calculates
1198 * "(dividend << 32) / divisor" */
1200 : "=a" (quotient), "=d" (remainder)
1201 : "0" (0), "1" (dividend), "r" (divisor) );
1205 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1206 s8 *pshift, u32 *pmultiplier)
1213 tps64 = base_khz * 1000LL;
1214 scaled64 = scaled_khz * 1000LL;
1215 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1220 tps32 = (uint32_t)tps64;
1221 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1222 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1230 *pmultiplier = div_frac(scaled64, tps32);
1232 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1233 __func__, base_khz, scaled_khz, shift, *pmultiplier);
1236 #ifdef CONFIG_X86_64
1237 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1240 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1241 static unsigned long max_tsc_khz;
1243 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1245 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1246 vcpu->arch.virtual_tsc_shift);
1249 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1251 u64 v = (u64)khz * (1000000 + ppm);
1256 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1260 /* Guest TSC same frequency as host TSC? */
1262 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1266 /* TSC scaling supported? */
1267 if (!kvm_has_tsc_control) {
1268 if (user_tsc_khz > tsc_khz) {
1269 vcpu->arch.tsc_catchup = 1;
1270 vcpu->arch.tsc_always_catchup = 1;
1273 WARN(1, "user requested TSC rate below hardware speed\n");
1278 /* TSC scaling required - calculate ratio */
1279 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1280 user_tsc_khz, tsc_khz);
1282 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1283 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1288 vcpu->arch.tsc_scaling_ratio = ratio;
1292 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1294 u32 thresh_lo, thresh_hi;
1295 int use_scaling = 0;
1297 /* tsc_khz can be zero if TSC calibration fails */
1298 if (this_tsc_khz == 0) {
1299 /* set tsc_scaling_ratio to a safe value */
1300 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1304 /* Compute a scale to convert nanoseconds in TSC cycles */
1305 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1306 &vcpu->arch.virtual_tsc_shift,
1307 &vcpu->arch.virtual_tsc_mult);
1308 vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1311 * Compute the variation in TSC rate which is acceptable
1312 * within the range of tolerance and decide if the
1313 * rate being applied is within that bounds of the hardware
1314 * rate. If so, no scaling or compensation need be done.
1316 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1317 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1318 if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1319 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1322 return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1325 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1327 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1328 vcpu->arch.virtual_tsc_mult,
1329 vcpu->arch.virtual_tsc_shift);
1330 tsc += vcpu->arch.this_tsc_write;
1334 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1336 #ifdef CONFIG_X86_64
1338 struct kvm_arch *ka = &vcpu->kvm->arch;
1339 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1341 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1342 atomic_read(&vcpu->kvm->online_vcpus));
1345 * Once the masterclock is enabled, always perform request in
1346 * order to update it.
1348 * In order to enable masterclock, the host clocksource must be TSC
1349 * and the vcpus need to have matched TSCs. When that happens,
1350 * perform request to enable masterclock.
1352 if (ka->use_master_clock ||
1353 (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1354 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1356 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1357 atomic_read(&vcpu->kvm->online_vcpus),
1358 ka->use_master_clock, gtod->clock.vclock_mode);
1362 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1364 u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1365 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1369 * Multiply tsc by a fixed point number represented by ratio.
1371 * The most significant 64-N bits (mult) of ratio represent the
1372 * integral part of the fixed point number; the remaining N bits
1373 * (frac) represent the fractional part, ie. ratio represents a fixed
1374 * point number (mult + frac * 2^(-N)).
1376 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1378 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1380 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1383 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1386 u64 ratio = vcpu->arch.tsc_scaling_ratio;
1388 if (ratio != kvm_default_tsc_scaling_ratio)
1389 _tsc = __scale_tsc(ratio, tsc);
1393 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1395 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1399 tsc = kvm_scale_tsc(vcpu, rdtsc());
1401 return target_tsc - tsc;
1404 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1406 return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1408 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1410 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1412 struct kvm *kvm = vcpu->kvm;
1413 u64 offset, ns, elapsed;
1414 unsigned long flags;
1417 bool already_matched;
1418 u64 data = msr->data;
1420 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1421 offset = kvm_compute_tsc_offset(vcpu, data);
1422 ns = get_kernel_ns();
1423 elapsed = ns - kvm->arch.last_tsc_nsec;
1425 if (vcpu->arch.virtual_tsc_khz) {
1428 /* n.b - signed multiplication and division required */
1429 usdiff = data - kvm->arch.last_tsc_write;
1430 #ifdef CONFIG_X86_64
1431 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1433 /* do_div() only does unsigned */
1434 asm("1: idivl %[divisor]\n"
1435 "2: xor %%edx, %%edx\n"
1436 " movl $0, %[faulted]\n"
1438 ".section .fixup,\"ax\"\n"
1439 "4: movl $1, %[faulted]\n"
1443 _ASM_EXTABLE(1b, 4b)
1445 : "=A"(usdiff), [faulted] "=r" (faulted)
1446 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1449 do_div(elapsed, 1000);
1454 /* idivl overflow => difference is larger than USEC_PER_SEC */
1456 usdiff = USEC_PER_SEC;
1458 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1461 * Special case: TSC write with a small delta (1 second) of virtual
1462 * cycle time against real time is interpreted as an attempt to
1463 * synchronize the CPU.
1465 * For a reliable TSC, we can match TSC offsets, and for an unstable
1466 * TSC, we add elapsed time in this computation. We could let the
1467 * compensation code attempt to catch up if we fall behind, but
1468 * it's better to try to match offsets from the beginning.
1470 if (usdiff < USEC_PER_SEC &&
1471 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1472 if (!check_tsc_unstable()) {
1473 offset = kvm->arch.cur_tsc_offset;
1474 pr_debug("kvm: matched tsc offset for %llu\n", data);
1476 u64 delta = nsec_to_cycles(vcpu, elapsed);
1478 offset = kvm_compute_tsc_offset(vcpu, data);
1479 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1482 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1485 * We split periods of matched TSC writes into generations.
1486 * For each generation, we track the original measured
1487 * nanosecond time, offset, and write, so if TSCs are in
1488 * sync, we can match exact offset, and if not, we can match
1489 * exact software computation in compute_guest_tsc()
1491 * These values are tracked in kvm->arch.cur_xxx variables.
1493 kvm->arch.cur_tsc_generation++;
1494 kvm->arch.cur_tsc_nsec = ns;
1495 kvm->arch.cur_tsc_write = data;
1496 kvm->arch.cur_tsc_offset = offset;
1498 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1499 kvm->arch.cur_tsc_generation, data);
1503 * We also track th most recent recorded KHZ, write and time to
1504 * allow the matching interval to be extended at each write.
1506 kvm->arch.last_tsc_nsec = ns;
1507 kvm->arch.last_tsc_write = data;
1508 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1510 vcpu->arch.last_guest_tsc = data;
1512 /* Keep track of which generation this VCPU has synchronized to */
1513 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1514 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1515 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1517 if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1518 update_ia32_tsc_adjust_msr(vcpu, offset);
1519 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1520 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1522 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1524 kvm->arch.nr_vcpus_matched_tsc = 0;
1525 } else if (!already_matched) {
1526 kvm->arch.nr_vcpus_matched_tsc++;
1529 kvm_track_tsc_matching(vcpu);
1530 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1533 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1535 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1538 kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1541 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1543 if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1544 WARN_ON(adjustment < 0);
1545 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1546 kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1549 #ifdef CONFIG_X86_64
1551 static cycle_t read_tsc(void)
1553 cycle_t ret = (cycle_t)rdtsc_ordered();
1554 u64 last = pvclock_gtod_data.clock.cycle_last;
1556 if (likely(ret >= last))
1560 * GCC likes to generate cmov here, but this branch is extremely
1561 * predictable (it's just a funciton of time and the likely is
1562 * very likely) and there's a data dependence, so force GCC
1563 * to generate a branch instead. I don't barrier() because
1564 * we don't actually need a barrier, and if this function
1565 * ever gets inlined it will generate worse code.
1571 static inline u64 vgettsc(cycle_t *cycle_now)
1574 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1576 *cycle_now = read_tsc();
1578 v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1579 return v * gtod->clock.mult;
1582 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1584 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1590 seq = read_seqcount_begin(>od->seq);
1591 mode = gtod->clock.vclock_mode;
1592 ns = gtod->nsec_base;
1593 ns += vgettsc(cycle_now);
1594 ns >>= gtod->clock.shift;
1595 ns += gtod->boot_ns;
1596 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1602 /* returns true if host is using tsc clocksource */
1603 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1605 /* checked again under seqlock below */
1606 if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1609 return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1615 * Assuming a stable TSC across physical CPUS, and a stable TSC
1616 * across virtual CPUs, the following condition is possible.
1617 * Each numbered line represents an event visible to both
1618 * CPUs at the next numbered event.
1620 * "timespecX" represents host monotonic time. "tscX" represents
1623 * VCPU0 on CPU0 | VCPU1 on CPU1
1625 * 1. read timespec0,tsc0
1626 * 2. | timespec1 = timespec0 + N
1628 * 3. transition to guest | transition to guest
1629 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1630 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1631 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1633 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1636 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1638 * - 0 < N - M => M < N
1640 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1641 * always the case (the difference between two distinct xtime instances
1642 * might be smaller then the difference between corresponding TSC reads,
1643 * when updating guest vcpus pvclock areas).
1645 * To avoid that problem, do not allow visibility of distinct
1646 * system_timestamp/tsc_timestamp values simultaneously: use a master
1647 * copy of host monotonic time values. Update that master copy
1650 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1654 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1656 #ifdef CONFIG_X86_64
1657 struct kvm_arch *ka = &kvm->arch;
1659 bool host_tsc_clocksource, vcpus_matched;
1661 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1662 atomic_read(&kvm->online_vcpus));
1665 * If the host uses TSC clock, then passthrough TSC as stable
1668 host_tsc_clocksource = kvm_get_time_and_clockread(
1669 &ka->master_kernel_ns,
1670 &ka->master_cycle_now);
1672 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1673 && !backwards_tsc_observed
1674 && !ka->boot_vcpu_runs_old_kvmclock;
1676 if (ka->use_master_clock)
1677 atomic_set(&kvm_guest_has_master_clock, 1);
1679 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1680 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1685 static void kvm_gen_update_masterclock(struct kvm *kvm)
1687 #ifdef CONFIG_X86_64
1689 struct kvm_vcpu *vcpu;
1690 struct kvm_arch *ka = &kvm->arch;
1692 spin_lock(&ka->pvclock_gtod_sync_lock);
1693 kvm_make_mclock_inprogress_request(kvm);
1694 /* no guest entries from this point */
1695 pvclock_update_vm_gtod_copy(kvm);
1697 kvm_for_each_vcpu(i, vcpu, kvm)
1698 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1700 /* guest entries allowed */
1701 kvm_for_each_vcpu(i, vcpu, kvm)
1702 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1704 spin_unlock(&ka->pvclock_gtod_sync_lock);
1708 static int kvm_guest_time_update(struct kvm_vcpu *v)
1710 unsigned long flags, this_tsc_khz, tgt_tsc_khz;
1711 struct kvm_vcpu_arch *vcpu = &v->arch;
1712 struct kvm_arch *ka = &v->kvm->arch;
1714 u64 tsc_timestamp, host_tsc;
1715 struct pvclock_vcpu_time_info guest_hv_clock;
1717 bool use_master_clock;
1723 * If the host uses TSC clock, then passthrough TSC as stable
1726 spin_lock(&ka->pvclock_gtod_sync_lock);
1727 use_master_clock = ka->use_master_clock;
1728 if (use_master_clock) {
1729 host_tsc = ka->master_cycle_now;
1730 kernel_ns = ka->master_kernel_ns;
1732 spin_unlock(&ka->pvclock_gtod_sync_lock);
1734 /* Keep irq disabled to prevent changes to the clock */
1735 local_irq_save(flags);
1736 this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1737 if (unlikely(this_tsc_khz == 0)) {
1738 local_irq_restore(flags);
1739 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1742 if (!use_master_clock) {
1744 kernel_ns = get_kernel_ns();
1747 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1750 * We may have to catch up the TSC to match elapsed wall clock
1751 * time for two reasons, even if kvmclock is used.
1752 * 1) CPU could have been running below the maximum TSC rate
1753 * 2) Broken TSC compensation resets the base at each VCPU
1754 * entry to avoid unknown leaps of TSC even when running
1755 * again on the same CPU. This may cause apparent elapsed
1756 * time to disappear, and the guest to stand still or run
1759 if (vcpu->tsc_catchup) {
1760 u64 tsc = compute_guest_tsc(v, kernel_ns);
1761 if (tsc > tsc_timestamp) {
1762 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1763 tsc_timestamp = tsc;
1767 local_irq_restore(flags);
1769 if (!vcpu->pv_time_enabled)
1772 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1773 tgt_tsc_khz = kvm_has_tsc_control ?
1774 vcpu->virtual_tsc_khz : this_tsc_khz;
1775 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1776 &vcpu->hv_clock.tsc_shift,
1777 &vcpu->hv_clock.tsc_to_system_mul);
1778 vcpu->hw_tsc_khz = this_tsc_khz;
1781 /* With all the info we got, fill in the values */
1782 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1783 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1784 vcpu->last_guest_tsc = tsc_timestamp;
1786 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1787 &guest_hv_clock, sizeof(guest_hv_clock))))
1790 /* This VCPU is paused, but it's legal for a guest to read another
1791 * VCPU's kvmclock, so we really have to follow the specification where
1792 * it says that version is odd if data is being modified, and even after
1795 * Version field updates must be kept separate. This is because
1796 * kvm_write_guest_cached might use a "rep movs" instruction, and
1797 * writes within a string instruction are weakly ordered. So there
1798 * are three writes overall.
1800 * As a small optimization, only write the version field in the first
1801 * and third write. The vcpu->pv_time cache is still valid, because the
1802 * version field is the first in the struct.
1804 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1806 vcpu->hv_clock.version = guest_hv_clock.version + 1;
1807 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1809 sizeof(vcpu->hv_clock.version));
1813 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1814 pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1816 if (vcpu->pvclock_set_guest_stopped_request) {
1817 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1818 vcpu->pvclock_set_guest_stopped_request = false;
1821 /* If the host uses TSC clocksource, then it is stable */
1822 if (use_master_clock)
1823 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1825 vcpu->hv_clock.flags = pvclock_flags;
1827 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1829 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1831 sizeof(vcpu->hv_clock));
1835 vcpu->hv_clock.version++;
1836 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1838 sizeof(vcpu->hv_clock.version));
1843 * kvmclock updates which are isolated to a given vcpu, such as
1844 * vcpu->cpu migration, should not allow system_timestamp from
1845 * the rest of the vcpus to remain static. Otherwise ntp frequency
1846 * correction applies to one vcpu's system_timestamp but not
1849 * So in those cases, request a kvmclock update for all vcpus.
1850 * We need to rate-limit these requests though, as they can
1851 * considerably slow guests that have a large number of vcpus.
1852 * The time for a remote vcpu to update its kvmclock is bound
1853 * by the delay we use to rate-limit the updates.
1856 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1858 static void kvmclock_update_fn(struct work_struct *work)
1861 struct delayed_work *dwork = to_delayed_work(work);
1862 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1863 kvmclock_update_work);
1864 struct kvm *kvm = container_of(ka, struct kvm, arch);
1865 struct kvm_vcpu *vcpu;
1867 kvm_for_each_vcpu(i, vcpu, kvm) {
1868 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1869 kvm_vcpu_kick(vcpu);
1873 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1875 struct kvm *kvm = v->kvm;
1877 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1878 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1879 KVMCLOCK_UPDATE_DELAY);
1882 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1884 static void kvmclock_sync_fn(struct work_struct *work)
1886 struct delayed_work *dwork = to_delayed_work(work);
1887 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1888 kvmclock_sync_work);
1889 struct kvm *kvm = container_of(ka, struct kvm, arch);
1891 if (!kvmclock_periodic_sync)
1894 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1895 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1896 KVMCLOCK_SYNC_PERIOD);
1899 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1901 u64 mcg_cap = vcpu->arch.mcg_cap;
1902 unsigned bank_num = mcg_cap & 0xff;
1905 case MSR_IA32_MCG_STATUS:
1906 vcpu->arch.mcg_status = data;
1908 case MSR_IA32_MCG_CTL:
1909 if (!(mcg_cap & MCG_CTL_P))
1911 if (data != 0 && data != ~(u64)0)
1913 vcpu->arch.mcg_ctl = data;
1916 if (msr >= MSR_IA32_MC0_CTL &&
1917 msr < MSR_IA32_MCx_CTL(bank_num)) {
1918 u32 offset = msr - MSR_IA32_MC0_CTL;
1919 /* only 0 or all 1s can be written to IA32_MCi_CTL
1920 * some Linux kernels though clear bit 10 in bank 4 to
1921 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1922 * this to avoid an uncatched #GP in the guest
1924 if ((offset & 0x3) == 0 &&
1925 data != 0 && (data | (1 << 10)) != ~(u64)0)
1927 vcpu->arch.mce_banks[offset] = data;
1935 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1937 struct kvm *kvm = vcpu->kvm;
1938 int lm = is_long_mode(vcpu);
1939 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1940 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1941 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1942 : kvm->arch.xen_hvm_config.blob_size_32;
1943 u32 page_num = data & ~PAGE_MASK;
1944 u64 page_addr = data & PAGE_MASK;
1949 if (page_num >= blob_size)
1952 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1957 if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1966 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1968 gpa_t gpa = data & ~0x3f;
1970 /* Bits 2:5 are reserved, Should be zero */
1974 vcpu->arch.apf.msr_val = data;
1976 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1977 kvm_clear_async_pf_completion_queue(vcpu);
1978 kvm_async_pf_hash_reset(vcpu);
1982 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1986 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1987 kvm_async_pf_wakeup_all(vcpu);
1991 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1993 vcpu->arch.pv_time_enabled = false;
1996 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2000 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2003 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2004 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2005 vcpu->arch.st.accum_steal = delta;
2008 static void record_steal_time(struct kvm_vcpu *vcpu)
2010 accumulate_steal_time(vcpu);
2012 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2015 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2016 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2019 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2020 vcpu->arch.st.steal.version += 2;
2021 vcpu->arch.st.accum_steal = 0;
2023 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2024 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2027 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2030 u32 msr = msr_info->index;
2031 u64 data = msr_info->data;
2034 case MSR_AMD64_NB_CFG:
2035 case MSR_IA32_UCODE_REV:
2036 case MSR_IA32_UCODE_WRITE:
2037 case MSR_VM_HSAVE_PA:
2038 case MSR_AMD64_PATCH_LOADER:
2039 case MSR_AMD64_BU_CFG2:
2043 return set_efer(vcpu, data);
2045 data &= ~(u64)0x40; /* ignore flush filter disable */
2046 data &= ~(u64)0x100; /* ignore ignne emulation enable */
2047 data &= ~(u64)0x8; /* ignore TLB cache disable */
2048 data &= ~(u64)0x40000; /* ignore Mc status write enable */
2050 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2055 case MSR_FAM10H_MMIO_CONF_BASE:
2057 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2062 case MSR_IA32_DEBUGCTLMSR:
2064 /* We support the non-activated case already */
2066 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2067 /* Values other than LBR and BTF are vendor-specific,
2068 thus reserved and should throw a #GP */
2071 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2074 case 0x200 ... 0x2ff:
2075 return kvm_mtrr_set_msr(vcpu, msr, data);
2076 case MSR_IA32_APICBASE:
2077 return kvm_set_apic_base(vcpu, msr_info);
2078 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2079 return kvm_x2apic_msr_write(vcpu, msr, data);
2080 case MSR_IA32_TSCDEADLINE:
2081 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2083 case MSR_IA32_TSC_ADJUST:
2084 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2085 if (!msr_info->host_initiated) {
2086 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2087 adjust_tsc_offset_guest(vcpu, adj);
2089 vcpu->arch.ia32_tsc_adjust_msr = data;
2092 case MSR_IA32_MISC_ENABLE:
2093 vcpu->arch.ia32_misc_enable_msr = data;
2095 case MSR_IA32_SMBASE:
2096 if (!msr_info->host_initiated)
2098 vcpu->arch.smbase = data;
2100 case MSR_KVM_WALL_CLOCK_NEW:
2101 case MSR_KVM_WALL_CLOCK:
2102 vcpu->kvm->arch.wall_clock = data;
2103 kvm_write_wall_clock(vcpu->kvm, data);
2105 case MSR_KVM_SYSTEM_TIME_NEW:
2106 case MSR_KVM_SYSTEM_TIME: {
2108 struct kvm_arch *ka = &vcpu->kvm->arch;
2110 kvmclock_reset(vcpu);
2112 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2113 bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2115 if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2116 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2119 ka->boot_vcpu_runs_old_kvmclock = tmp;
2122 vcpu->arch.time = data;
2123 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2125 /* we verify if the enable bit is set... */
2129 gpa_offset = data & ~(PAGE_MASK | 1);
2131 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2132 &vcpu->arch.pv_time, data & ~1ULL,
2133 sizeof(struct pvclock_vcpu_time_info)))
2134 vcpu->arch.pv_time_enabled = false;
2136 vcpu->arch.pv_time_enabled = true;
2140 case MSR_KVM_ASYNC_PF_EN:
2141 if (kvm_pv_enable_async_pf(vcpu, data))
2144 case MSR_KVM_STEAL_TIME:
2146 if (unlikely(!sched_info_on()))
2149 if (data & KVM_STEAL_RESERVED_MASK)
2152 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2153 data & KVM_STEAL_VALID_BITS,
2154 sizeof(struct kvm_steal_time)))
2157 vcpu->arch.st.msr_val = data;
2159 if (!(data & KVM_MSR_ENABLED))
2162 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2165 case MSR_KVM_PV_EOI_EN:
2166 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2170 case MSR_IA32_MCG_CTL:
2171 case MSR_IA32_MCG_STATUS:
2172 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2173 return set_msr_mce(vcpu, msr, data);
2175 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2176 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2177 pr = true; /* fall through */
2178 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2179 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2180 if (kvm_pmu_is_valid_msr(vcpu, msr))
2181 return kvm_pmu_set_msr(vcpu, msr_info);
2183 if (pr || data != 0)
2184 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2185 "0x%x data 0x%llx\n", msr, data);
2187 case MSR_K7_CLK_CTL:
2189 * Ignore all writes to this no longer documented MSR.
2190 * Writes are only relevant for old K7 processors,
2191 * all pre-dating SVM, but a recommended workaround from
2192 * AMD for these chips. It is possible to specify the
2193 * affected processor models on the command line, hence
2194 * the need to ignore the workaround.
2197 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2198 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2199 case HV_X64_MSR_CRASH_CTL:
2200 return kvm_hv_set_msr_common(vcpu, msr, data,
2201 msr_info->host_initiated);
2202 case MSR_IA32_BBL_CR_CTL3:
2203 /* Drop writes to this legacy MSR -- see rdmsr
2204 * counterpart for further detail.
2206 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2208 case MSR_AMD64_OSVW_ID_LENGTH:
2209 if (!guest_cpuid_has_osvw(vcpu))
2211 vcpu->arch.osvw.length = data;
2213 case MSR_AMD64_OSVW_STATUS:
2214 if (!guest_cpuid_has_osvw(vcpu))
2216 vcpu->arch.osvw.status = data;
2219 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2220 return xen_hvm_config(vcpu, data);
2221 if (kvm_pmu_is_valid_msr(vcpu, msr))
2222 return kvm_pmu_set_msr(vcpu, msr_info);
2224 vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2228 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2235 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2239 * Reads an msr value (of 'msr_index') into 'pdata'.
2240 * Returns 0 on success, non-0 otherwise.
2241 * Assumes vcpu_load() was already called.
2243 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2245 return kvm_x86_ops->get_msr(vcpu, msr);
2247 EXPORT_SYMBOL_GPL(kvm_get_msr);
2249 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2252 u64 mcg_cap = vcpu->arch.mcg_cap;
2253 unsigned bank_num = mcg_cap & 0xff;
2256 case MSR_IA32_P5_MC_ADDR:
2257 case MSR_IA32_P5_MC_TYPE:
2260 case MSR_IA32_MCG_CAP:
2261 data = vcpu->arch.mcg_cap;
2263 case MSR_IA32_MCG_CTL:
2264 if (!(mcg_cap & MCG_CTL_P))
2266 data = vcpu->arch.mcg_ctl;
2268 case MSR_IA32_MCG_STATUS:
2269 data = vcpu->arch.mcg_status;
2272 if (msr >= MSR_IA32_MC0_CTL &&
2273 msr < MSR_IA32_MCx_CTL(bank_num)) {
2274 u32 offset = msr - MSR_IA32_MC0_CTL;
2275 data = vcpu->arch.mce_banks[offset];
2284 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2286 switch (msr_info->index) {
2287 case MSR_IA32_PLATFORM_ID:
2288 case MSR_IA32_EBL_CR_POWERON:
2289 case MSR_IA32_DEBUGCTLMSR:
2290 case MSR_IA32_LASTBRANCHFROMIP:
2291 case MSR_IA32_LASTBRANCHTOIP:
2292 case MSR_IA32_LASTINTFROMIP:
2293 case MSR_IA32_LASTINTTOIP:
2295 case MSR_K8_TSEG_ADDR:
2296 case MSR_K8_TSEG_MASK:
2298 case MSR_VM_HSAVE_PA:
2299 case MSR_K8_INT_PENDING_MSG:
2300 case MSR_AMD64_NB_CFG:
2301 case MSR_FAM10H_MMIO_CONF_BASE:
2302 case MSR_AMD64_BU_CFG2:
2305 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2306 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2307 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2308 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2309 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2310 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2313 case MSR_IA32_UCODE_REV:
2314 msr_info->data = 0x100000000ULL;
2317 case 0x200 ... 0x2ff:
2318 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2319 case 0xcd: /* fsb frequency */
2323 * MSR_EBC_FREQUENCY_ID
2324 * Conservative value valid for even the basic CPU models.
2325 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2326 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2327 * and 266MHz for model 3, or 4. Set Core Clock
2328 * Frequency to System Bus Frequency Ratio to 1 (bits
2329 * 31:24) even though these are only valid for CPU
2330 * models > 2, however guests may end up dividing or
2331 * multiplying by zero otherwise.
2333 case MSR_EBC_FREQUENCY_ID:
2334 msr_info->data = 1 << 24;
2336 case MSR_IA32_APICBASE:
2337 msr_info->data = kvm_get_apic_base(vcpu);
2339 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2340 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2342 case MSR_IA32_TSCDEADLINE:
2343 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2345 case MSR_IA32_TSC_ADJUST:
2346 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2348 case MSR_IA32_MISC_ENABLE:
2349 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2351 case MSR_IA32_SMBASE:
2352 if (!msr_info->host_initiated)
2354 msr_info->data = vcpu->arch.smbase;
2356 case MSR_IA32_PERF_STATUS:
2357 /* TSC increment by tick */
2358 msr_info->data = 1000ULL;
2359 /* CPU multiplier */
2360 msr_info->data |= (((uint64_t)4ULL) << 40);
2363 msr_info->data = vcpu->arch.efer;
2365 case MSR_KVM_WALL_CLOCK:
2366 case MSR_KVM_WALL_CLOCK_NEW:
2367 msr_info->data = vcpu->kvm->arch.wall_clock;
2369 case MSR_KVM_SYSTEM_TIME:
2370 case MSR_KVM_SYSTEM_TIME_NEW:
2371 msr_info->data = vcpu->arch.time;
2373 case MSR_KVM_ASYNC_PF_EN:
2374 msr_info->data = vcpu->arch.apf.msr_val;
2376 case MSR_KVM_STEAL_TIME:
2377 msr_info->data = vcpu->arch.st.msr_val;
2379 case MSR_KVM_PV_EOI_EN:
2380 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2382 case MSR_IA32_P5_MC_ADDR:
2383 case MSR_IA32_P5_MC_TYPE:
2384 case MSR_IA32_MCG_CAP:
2385 case MSR_IA32_MCG_CTL:
2386 case MSR_IA32_MCG_STATUS:
2387 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2388 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2389 case MSR_K7_CLK_CTL:
2391 * Provide expected ramp-up count for K7. All other
2392 * are set to zero, indicating minimum divisors for
2395 * This prevents guest kernels on AMD host with CPU
2396 * type 6, model 8 and higher from exploding due to
2397 * the rdmsr failing.
2399 msr_info->data = 0x20000000;
2401 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2402 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2403 case HV_X64_MSR_CRASH_CTL:
2404 return kvm_hv_get_msr_common(vcpu,
2405 msr_info->index, &msr_info->data);
2407 case MSR_IA32_BBL_CR_CTL3:
2408 /* This legacy MSR exists but isn't fully documented in current
2409 * silicon. It is however accessed by winxp in very narrow
2410 * scenarios where it sets bit #19, itself documented as
2411 * a "reserved" bit. Best effort attempt to source coherent
2412 * read data here should the balance of the register be
2413 * interpreted by the guest:
2415 * L2 cache control register 3: 64GB range, 256KB size,
2416 * enabled, latency 0x1, configured
2418 msr_info->data = 0xbe702111;
2420 case MSR_AMD64_OSVW_ID_LENGTH:
2421 if (!guest_cpuid_has_osvw(vcpu))
2423 msr_info->data = vcpu->arch.osvw.length;
2425 case MSR_AMD64_OSVW_STATUS:
2426 if (!guest_cpuid_has_osvw(vcpu))
2428 msr_info->data = vcpu->arch.osvw.status;
2431 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2432 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2434 vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2437 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2444 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2447 * Read or write a bunch of msrs. All parameters are kernel addresses.
2449 * @return number of msrs set successfully.
2451 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2452 struct kvm_msr_entry *entries,
2453 int (*do_msr)(struct kvm_vcpu *vcpu,
2454 unsigned index, u64 *data))
2458 idx = srcu_read_lock(&vcpu->kvm->srcu);
2459 for (i = 0; i < msrs->nmsrs; ++i)
2460 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2462 srcu_read_unlock(&vcpu->kvm->srcu, idx);
2468 * Read or write a bunch of msrs. Parameters are user addresses.
2470 * @return number of msrs set successfully.
2472 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2473 int (*do_msr)(struct kvm_vcpu *vcpu,
2474 unsigned index, u64 *data),
2477 struct kvm_msrs msrs;
2478 struct kvm_msr_entry *entries;
2483 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2487 if (msrs.nmsrs >= MAX_IO_MSRS)
2490 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2491 entries = memdup_user(user_msrs->entries, size);
2492 if (IS_ERR(entries)) {
2493 r = PTR_ERR(entries);
2497 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2502 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2513 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2518 case KVM_CAP_IRQCHIP:
2520 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2521 case KVM_CAP_SET_TSS_ADDR:
2522 case KVM_CAP_EXT_CPUID:
2523 case KVM_CAP_EXT_EMUL_CPUID:
2524 case KVM_CAP_CLOCKSOURCE:
2526 case KVM_CAP_NOP_IO_DELAY:
2527 case KVM_CAP_MP_STATE:
2528 case KVM_CAP_SYNC_MMU:
2529 case KVM_CAP_USER_NMI:
2530 case KVM_CAP_REINJECT_CONTROL:
2531 case KVM_CAP_IRQ_INJECT_STATUS:
2532 case KVM_CAP_IOEVENTFD:
2533 case KVM_CAP_IOEVENTFD_NO_LENGTH:
2535 case KVM_CAP_PIT_STATE2:
2536 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2537 case KVM_CAP_XEN_HVM:
2538 case KVM_CAP_ADJUST_CLOCK:
2539 case KVM_CAP_VCPU_EVENTS:
2540 case KVM_CAP_HYPERV:
2541 case KVM_CAP_HYPERV_VAPIC:
2542 case KVM_CAP_HYPERV_SPIN:
2543 case KVM_CAP_PCI_SEGMENT:
2544 case KVM_CAP_DEBUGREGS:
2545 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2547 case KVM_CAP_ASYNC_PF:
2548 case KVM_CAP_GET_TSC_KHZ:
2549 case KVM_CAP_KVMCLOCK_CTRL:
2550 case KVM_CAP_READONLY_MEM:
2551 case KVM_CAP_HYPERV_TIME:
2552 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2553 case KVM_CAP_TSC_DEADLINE_TIMER:
2554 case KVM_CAP_ENABLE_CAP_VM:
2555 case KVM_CAP_DISABLE_QUIRKS:
2556 case KVM_CAP_SET_BOOT_CPU_ID:
2557 case KVM_CAP_SPLIT_IRQCHIP:
2558 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2559 case KVM_CAP_ASSIGN_DEV_IRQ:
2560 case KVM_CAP_PCI_2_3:
2564 case KVM_CAP_X86_SMM:
2565 /* SMBASE is usually relocated above 1M on modern chipsets,
2566 * and SMM handlers might indeed rely on 4G segment limits,
2567 * so do not report SMM to be available if real mode is
2568 * emulated via vm86 mode. Still, do not go to great lengths
2569 * to avoid userspace's usage of the feature, because it is a
2570 * fringe case that is not enabled except via specific settings
2571 * of the module parameters.
2573 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2575 case KVM_CAP_COALESCED_MMIO:
2576 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2579 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2581 case KVM_CAP_NR_VCPUS:
2582 r = KVM_SOFT_MAX_VCPUS;
2584 case KVM_CAP_MAX_VCPUS:
2587 case KVM_CAP_NR_MEMSLOTS:
2588 r = KVM_USER_MEM_SLOTS;
2590 case KVM_CAP_PV_MMU: /* obsolete */
2593 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2595 r = iommu_present(&pci_bus_type);
2599 r = KVM_MAX_MCE_BANKS;
2604 case KVM_CAP_TSC_CONTROL:
2605 r = kvm_has_tsc_control;
2615 long kvm_arch_dev_ioctl(struct file *filp,
2616 unsigned int ioctl, unsigned long arg)
2618 void __user *argp = (void __user *)arg;
2622 case KVM_GET_MSR_INDEX_LIST: {
2623 struct kvm_msr_list __user *user_msr_list = argp;
2624 struct kvm_msr_list msr_list;
2628 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2631 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2632 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2635 if (n < msr_list.nmsrs)
2638 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2639 num_msrs_to_save * sizeof(u32)))
2641 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2643 num_emulated_msrs * sizeof(u32)))
2648 case KVM_GET_SUPPORTED_CPUID:
2649 case KVM_GET_EMULATED_CPUID: {
2650 struct kvm_cpuid2 __user *cpuid_arg = argp;
2651 struct kvm_cpuid2 cpuid;
2654 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2657 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2663 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2668 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2671 mce_cap = KVM_MCE_CAP_SUPPORTED;
2673 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2685 static void wbinvd_ipi(void *garbage)
2690 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2692 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2695 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2697 /* Address WBINVD may be executed by guest */
2698 if (need_emulate_wbinvd(vcpu)) {
2699 if (kvm_x86_ops->has_wbinvd_exit())
2700 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2701 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2702 smp_call_function_single(vcpu->cpu,
2703 wbinvd_ipi, NULL, 1);
2706 kvm_x86_ops->vcpu_load(vcpu, cpu);
2708 /* Apply any externally detected TSC adjustments (due to suspend) */
2709 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2710 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2711 vcpu->arch.tsc_offset_adjustment = 0;
2712 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2715 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2716 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2717 rdtsc() - vcpu->arch.last_host_tsc;
2719 mark_tsc_unstable("KVM discovered backwards TSC");
2720 if (check_tsc_unstable()) {
2721 u64 offset = kvm_compute_tsc_offset(vcpu,
2722 vcpu->arch.last_guest_tsc);
2723 kvm_x86_ops->write_tsc_offset(vcpu, offset);
2724 vcpu->arch.tsc_catchup = 1;
2727 * On a host with synchronized TSC, there is no need to update
2728 * kvmclock on vcpu->cpu migration
2730 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2731 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2732 if (vcpu->cpu != cpu)
2733 kvm_migrate_timers(vcpu);
2737 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2740 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2742 kvm_x86_ops->vcpu_put(vcpu);
2743 kvm_put_guest_fpu(vcpu);
2744 vcpu->arch.last_host_tsc = rdtsc();
2747 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2748 struct kvm_lapic_state *s)
2750 kvm_x86_ops->sync_pir_to_irr(vcpu);
2751 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2756 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2757 struct kvm_lapic_state *s)
2759 kvm_apic_post_state_restore(vcpu, s);
2760 update_cr8_intercept(vcpu);
2765 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2767 return (!lapic_in_kernel(vcpu) ||
2768 kvm_apic_accept_pic_intr(vcpu));
2772 * if userspace requested an interrupt window, check that the
2773 * interrupt window is open.
2775 * No need to exit to userspace if we already have an interrupt queued.
2777 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2779 return kvm_arch_interrupt_allowed(vcpu) &&
2780 !kvm_cpu_has_interrupt(vcpu) &&
2781 !kvm_event_needs_reinjection(vcpu) &&
2782 kvm_cpu_accept_dm_intr(vcpu);
2785 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2786 struct kvm_interrupt *irq)
2788 if (irq->irq >= KVM_NR_INTERRUPTS)
2791 if (!irqchip_in_kernel(vcpu->kvm)) {
2792 kvm_queue_interrupt(vcpu, irq->irq, false);
2793 kvm_make_request(KVM_REQ_EVENT, vcpu);
2798 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2799 * fail for in-kernel 8259.
2801 if (pic_in_kernel(vcpu->kvm))
2804 if (vcpu->arch.pending_external_vector != -1)
2807 vcpu->arch.pending_external_vector = irq->irq;
2808 kvm_make_request(KVM_REQ_EVENT, vcpu);
2812 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2814 kvm_inject_nmi(vcpu);
2819 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2821 kvm_make_request(KVM_REQ_SMI, vcpu);
2826 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2827 struct kvm_tpr_access_ctl *tac)
2831 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2835 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2839 unsigned bank_num = mcg_cap & 0xff, bank;
2842 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2844 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2847 vcpu->arch.mcg_cap = mcg_cap;
2848 /* Init IA32_MCG_CTL to all 1s */
2849 if (mcg_cap & MCG_CTL_P)
2850 vcpu->arch.mcg_ctl = ~(u64)0;
2851 /* Init IA32_MCi_CTL to all 1s */
2852 for (bank = 0; bank < bank_num; bank++)
2853 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2858 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2859 struct kvm_x86_mce *mce)
2861 u64 mcg_cap = vcpu->arch.mcg_cap;
2862 unsigned bank_num = mcg_cap & 0xff;
2863 u64 *banks = vcpu->arch.mce_banks;
2865 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2868 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2869 * reporting is disabled
2871 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2872 vcpu->arch.mcg_ctl != ~(u64)0)
2874 banks += 4 * mce->bank;
2876 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2877 * reporting is disabled for the bank
2879 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2881 if (mce->status & MCI_STATUS_UC) {
2882 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2883 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2884 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2887 if (banks[1] & MCI_STATUS_VAL)
2888 mce->status |= MCI_STATUS_OVER;
2889 banks[2] = mce->addr;
2890 banks[3] = mce->misc;
2891 vcpu->arch.mcg_status = mce->mcg_status;
2892 banks[1] = mce->status;
2893 kvm_queue_exception(vcpu, MC_VECTOR);
2894 } else if (!(banks[1] & MCI_STATUS_VAL)
2895 || !(banks[1] & MCI_STATUS_UC)) {
2896 if (banks[1] & MCI_STATUS_VAL)
2897 mce->status |= MCI_STATUS_OVER;
2898 banks[2] = mce->addr;
2899 banks[3] = mce->misc;
2900 banks[1] = mce->status;
2902 banks[1] |= MCI_STATUS_OVER;
2906 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2907 struct kvm_vcpu_events *events)
2910 events->exception.injected =
2911 vcpu->arch.exception.pending &&
2912 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2913 events->exception.nr = vcpu->arch.exception.nr;
2914 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2915 events->exception.pad = 0;
2916 events->exception.error_code = vcpu->arch.exception.error_code;
2918 events->interrupt.injected =
2919 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2920 events->interrupt.nr = vcpu->arch.interrupt.nr;
2921 events->interrupt.soft = 0;
2922 events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2924 events->nmi.injected = vcpu->arch.nmi_injected;
2925 events->nmi.pending = vcpu->arch.nmi_pending != 0;
2926 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2927 events->nmi.pad = 0;
2929 events->sipi_vector = 0; /* never valid when reporting to user space */
2931 events->smi.smm = is_smm(vcpu);
2932 events->smi.pending = vcpu->arch.smi_pending;
2933 events->smi.smm_inside_nmi =
2934 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2935 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2937 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2938 | KVM_VCPUEVENT_VALID_SHADOW
2939 | KVM_VCPUEVENT_VALID_SMM);
2940 memset(&events->reserved, 0, sizeof(events->reserved));
2943 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2944 struct kvm_vcpu_events *events)
2946 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2947 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2948 | KVM_VCPUEVENT_VALID_SHADOW
2949 | KVM_VCPUEVENT_VALID_SMM))
2953 vcpu->arch.exception.pending = events->exception.injected;
2954 vcpu->arch.exception.nr = events->exception.nr;
2955 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2956 vcpu->arch.exception.error_code = events->exception.error_code;
2958 vcpu->arch.interrupt.pending = events->interrupt.injected;
2959 vcpu->arch.interrupt.nr = events->interrupt.nr;
2960 vcpu->arch.interrupt.soft = events->interrupt.soft;
2961 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2962 kvm_x86_ops->set_interrupt_shadow(vcpu,
2963 events->interrupt.shadow);
2965 vcpu->arch.nmi_injected = events->nmi.injected;
2966 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2967 vcpu->arch.nmi_pending = events->nmi.pending;
2968 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2970 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2971 kvm_vcpu_has_lapic(vcpu))
2972 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2974 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2975 if (events->smi.smm)
2976 vcpu->arch.hflags |= HF_SMM_MASK;
2978 vcpu->arch.hflags &= ~HF_SMM_MASK;
2979 vcpu->arch.smi_pending = events->smi.pending;
2980 if (events->smi.smm_inside_nmi)
2981 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2983 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2984 if (kvm_vcpu_has_lapic(vcpu)) {
2985 if (events->smi.latched_init)
2986 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2988 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2992 kvm_make_request(KVM_REQ_EVENT, vcpu);
2997 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2998 struct kvm_debugregs *dbgregs)
3002 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3003 kvm_get_dr(vcpu, 6, &val);
3005 dbgregs->dr7 = vcpu->arch.dr7;
3007 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3010 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3011 struct kvm_debugregs *dbgregs)
3016 if (dbgregs->dr6 & ~0xffffffffull)
3018 if (dbgregs->dr7 & ~0xffffffffull)
3021 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3022 kvm_update_dr0123(vcpu);
3023 vcpu->arch.dr6 = dbgregs->dr6;
3024 kvm_update_dr6(vcpu);
3025 vcpu->arch.dr7 = dbgregs->dr7;
3026 kvm_update_dr7(vcpu);
3031 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3033 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3035 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3036 u64 xstate_bv = xsave->header.xfeatures;
3040 * Copy legacy XSAVE area, to avoid complications with CPUID
3041 * leaves 0 and 1 in the loop below.
3043 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3046 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3049 * Copy each region from the possibly compacted offset to the
3050 * non-compacted offset.
3052 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3054 u64 feature = valid & -valid;
3055 int index = fls64(feature) - 1;
3056 void *src = get_xsave_addr(xsave, feature);
3059 u32 size, offset, ecx, edx;
3060 cpuid_count(XSTATE_CPUID, index,
3061 &size, &offset, &ecx, &edx);
3062 memcpy(dest + offset, src, size);
3069 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3071 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3072 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3076 * Copy legacy XSAVE area, to avoid complications with CPUID
3077 * leaves 0 and 1 in the loop below.
3079 memcpy(xsave, src, XSAVE_HDR_OFFSET);
3081 /* Set XSTATE_BV and possibly XCOMP_BV. */
3082 xsave->header.xfeatures = xstate_bv;
3084 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3087 * Copy each region from the non-compacted offset to the
3088 * possibly compacted offset.
3090 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3092 u64 feature = valid & -valid;
3093 int index = fls64(feature) - 1;
3094 void *dest = get_xsave_addr(xsave, feature);
3097 u32 size, offset, ecx, edx;
3098 cpuid_count(XSTATE_CPUID, index,
3099 &size, &offset, &ecx, &edx);
3100 memcpy(dest, src + offset, size);
3107 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3108 struct kvm_xsave *guest_xsave)
3110 if (cpu_has_xsave) {
3111 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3112 fill_xsave((u8 *) guest_xsave->region, vcpu);
3114 memcpy(guest_xsave->region,
3115 &vcpu->arch.guest_fpu.state.fxsave,
3116 sizeof(struct fxregs_state));
3117 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3118 XFEATURE_MASK_FPSSE;
3122 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3123 struct kvm_xsave *guest_xsave)
3126 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3128 if (cpu_has_xsave) {
3130 * Here we allow setting states that are not present in
3131 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3132 * with old userspace.
3134 if (xstate_bv & ~kvm_supported_xcr0())
3136 load_xsave(vcpu, (u8 *)guest_xsave->region);
3138 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3140 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3141 guest_xsave->region, sizeof(struct fxregs_state));
3146 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3147 struct kvm_xcrs *guest_xcrs)
3149 if (!cpu_has_xsave) {
3150 guest_xcrs->nr_xcrs = 0;
3154 guest_xcrs->nr_xcrs = 1;
3155 guest_xcrs->flags = 0;
3156 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3157 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3160 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3161 struct kvm_xcrs *guest_xcrs)
3168 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3171 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3172 /* Only support XCR0 currently */
3173 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3174 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3175 guest_xcrs->xcrs[i].value);
3184 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3185 * stopped by the hypervisor. This function will be called from the host only.
3186 * EINVAL is returned when the host attempts to set the flag for a guest that
3187 * does not support pv clocks.
3189 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3191 if (!vcpu->arch.pv_time_enabled)
3193 vcpu->arch.pvclock_set_guest_stopped_request = true;
3194 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3198 long kvm_arch_vcpu_ioctl(struct file *filp,
3199 unsigned int ioctl, unsigned long arg)
3201 struct kvm_vcpu *vcpu = filp->private_data;
3202 void __user *argp = (void __user *)arg;
3205 struct kvm_lapic_state *lapic;
3206 struct kvm_xsave *xsave;
3207 struct kvm_xcrs *xcrs;
3213 case KVM_GET_LAPIC: {
3215 if (!vcpu->arch.apic)
3217 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3222 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3226 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3231 case KVM_SET_LAPIC: {
3233 if (!vcpu->arch.apic)
3235 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3236 if (IS_ERR(u.lapic))
3237 return PTR_ERR(u.lapic);
3239 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3242 case KVM_INTERRUPT: {
3243 struct kvm_interrupt irq;
3246 if (copy_from_user(&irq, argp, sizeof irq))
3248 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3252 r = kvm_vcpu_ioctl_nmi(vcpu);
3256 r = kvm_vcpu_ioctl_smi(vcpu);
3259 case KVM_SET_CPUID: {
3260 struct kvm_cpuid __user *cpuid_arg = argp;
3261 struct kvm_cpuid cpuid;
3264 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3266 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3269 case KVM_SET_CPUID2: {
3270 struct kvm_cpuid2 __user *cpuid_arg = argp;
3271 struct kvm_cpuid2 cpuid;
3274 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3276 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3277 cpuid_arg->entries);
3280 case KVM_GET_CPUID2: {
3281 struct kvm_cpuid2 __user *cpuid_arg = argp;
3282 struct kvm_cpuid2 cpuid;
3285 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3287 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3288 cpuid_arg->entries);
3292 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3298 r = msr_io(vcpu, argp, do_get_msr, 1);
3301 r = msr_io(vcpu, argp, do_set_msr, 0);
3303 case KVM_TPR_ACCESS_REPORTING: {
3304 struct kvm_tpr_access_ctl tac;
3307 if (copy_from_user(&tac, argp, sizeof tac))
3309 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3313 if (copy_to_user(argp, &tac, sizeof tac))
3318 case KVM_SET_VAPIC_ADDR: {
3319 struct kvm_vapic_addr va;
3322 if (!lapic_in_kernel(vcpu))
3325 if (copy_from_user(&va, argp, sizeof va))
3327 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3330 case KVM_X86_SETUP_MCE: {
3334 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3336 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3339 case KVM_X86_SET_MCE: {
3340 struct kvm_x86_mce mce;
3343 if (copy_from_user(&mce, argp, sizeof mce))
3345 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3348 case KVM_GET_VCPU_EVENTS: {
3349 struct kvm_vcpu_events events;
3351 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3354 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3359 case KVM_SET_VCPU_EVENTS: {
3360 struct kvm_vcpu_events events;
3363 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3366 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3369 case KVM_GET_DEBUGREGS: {
3370 struct kvm_debugregs dbgregs;
3372 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3375 if (copy_to_user(argp, &dbgregs,
3376 sizeof(struct kvm_debugregs)))
3381 case KVM_SET_DEBUGREGS: {
3382 struct kvm_debugregs dbgregs;
3385 if (copy_from_user(&dbgregs, argp,
3386 sizeof(struct kvm_debugregs)))
3389 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3392 case KVM_GET_XSAVE: {
3393 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3398 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3401 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3406 case KVM_SET_XSAVE: {
3407 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3408 if (IS_ERR(u.xsave))
3409 return PTR_ERR(u.xsave);
3411 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3414 case KVM_GET_XCRS: {
3415 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3420 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3423 if (copy_to_user(argp, u.xcrs,
3424 sizeof(struct kvm_xcrs)))
3429 case KVM_SET_XCRS: {
3430 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3432 return PTR_ERR(u.xcrs);
3434 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3437 case KVM_SET_TSC_KHZ: {
3441 user_tsc_khz = (u32)arg;
3443 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3446 if (user_tsc_khz == 0)
3447 user_tsc_khz = tsc_khz;
3449 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3454 case KVM_GET_TSC_KHZ: {
3455 r = vcpu->arch.virtual_tsc_khz;
3458 case KVM_KVMCLOCK_CTRL: {
3459 r = kvm_set_guest_paused(vcpu);
3470 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3472 return VM_FAULT_SIGBUS;
3475 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3479 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3481 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3485 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3488 kvm->arch.ept_identity_map_addr = ident_addr;
3492 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3493 u32 kvm_nr_mmu_pages)
3495 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3498 mutex_lock(&kvm->slots_lock);
3500 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3501 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3503 mutex_unlock(&kvm->slots_lock);
3507 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3509 return kvm->arch.n_max_mmu_pages;
3512 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3517 switch (chip->chip_id) {
3518 case KVM_IRQCHIP_PIC_MASTER:
3519 memcpy(&chip->chip.pic,
3520 &pic_irqchip(kvm)->pics[0],
3521 sizeof(struct kvm_pic_state));
3523 case KVM_IRQCHIP_PIC_SLAVE:
3524 memcpy(&chip->chip.pic,
3525 &pic_irqchip(kvm)->pics[1],
3526 sizeof(struct kvm_pic_state));
3528 case KVM_IRQCHIP_IOAPIC:
3529 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3538 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3543 switch (chip->chip_id) {
3544 case KVM_IRQCHIP_PIC_MASTER:
3545 spin_lock(&pic_irqchip(kvm)->lock);
3546 memcpy(&pic_irqchip(kvm)->pics[0],
3548 sizeof(struct kvm_pic_state));
3549 spin_unlock(&pic_irqchip(kvm)->lock);
3551 case KVM_IRQCHIP_PIC_SLAVE:
3552 spin_lock(&pic_irqchip(kvm)->lock);
3553 memcpy(&pic_irqchip(kvm)->pics[1],
3555 sizeof(struct kvm_pic_state));
3556 spin_unlock(&pic_irqchip(kvm)->lock);
3558 case KVM_IRQCHIP_IOAPIC:
3559 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3565 kvm_pic_update_irq(pic_irqchip(kvm));
3569 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3571 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3572 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3573 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3577 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3580 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3581 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3582 for (i = 0; i < 3; i++)
3583 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3584 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3588 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3590 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3591 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3592 sizeof(ps->channels));
3593 ps->flags = kvm->arch.vpit->pit_state.flags;
3594 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3595 memset(&ps->reserved, 0, sizeof(ps->reserved));
3599 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3603 u32 prev_legacy, cur_legacy;
3604 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3605 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3606 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3607 if (!prev_legacy && cur_legacy)
3609 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3610 sizeof(kvm->arch.vpit->pit_state.channels));
3611 kvm->arch.vpit->pit_state.flags = ps->flags;
3612 for (i = 0; i < 3; i++)
3613 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3615 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3619 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3620 struct kvm_reinject_control *control)
3622 if (!kvm->arch.vpit)
3624 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3625 kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3626 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3631 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3632 * @kvm: kvm instance
3633 * @log: slot id and address to which we copy the log
3635 * Steps 1-4 below provide general overview of dirty page logging. See
3636 * kvm_get_dirty_log_protect() function description for additional details.
3638 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3639 * always flush the TLB (step 4) even if previous step failed and the dirty
3640 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3641 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3642 * writes will be marked dirty for next log read.
3644 * 1. Take a snapshot of the bit and clear it if needed.
3645 * 2. Write protect the corresponding page.
3646 * 3. Copy the snapshot to the userspace.
3647 * 4. Flush TLB's if needed.
3649 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3651 bool is_dirty = false;
3654 mutex_lock(&kvm->slots_lock);
3657 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3659 if (kvm_x86_ops->flush_log_dirty)
3660 kvm_x86_ops->flush_log_dirty(kvm);
3662 r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3665 * All the TLBs can be flushed out of mmu lock, see the comments in
3666 * kvm_mmu_slot_remove_write_access().
3668 lockdep_assert_held(&kvm->slots_lock);
3670 kvm_flush_remote_tlbs(kvm);
3672 mutex_unlock(&kvm->slots_lock);
3676 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3679 if (!irqchip_in_kernel(kvm))
3682 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3683 irq_event->irq, irq_event->level,
3688 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3689 struct kvm_enable_cap *cap)
3697 case KVM_CAP_DISABLE_QUIRKS:
3698 kvm->arch.disabled_quirks = cap->args[0];
3701 case KVM_CAP_SPLIT_IRQCHIP: {
3702 mutex_lock(&kvm->lock);
3704 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3705 goto split_irqchip_unlock;
3707 if (irqchip_in_kernel(kvm))
3708 goto split_irqchip_unlock;
3709 if (atomic_read(&kvm->online_vcpus))
3710 goto split_irqchip_unlock;
3711 r = kvm_setup_empty_irq_routing(kvm);
3713 goto split_irqchip_unlock;
3714 /* Pairs with irqchip_in_kernel. */
3716 kvm->arch.irqchip_split = true;
3717 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3719 split_irqchip_unlock:
3720 mutex_unlock(&kvm->lock);
3730 long kvm_arch_vm_ioctl(struct file *filp,
3731 unsigned int ioctl, unsigned long arg)
3733 struct kvm *kvm = filp->private_data;
3734 void __user *argp = (void __user *)arg;
3737 * This union makes it completely explicit to gcc-3.x
3738 * that these two variables' stack usage should be
3739 * combined, not added together.
3742 struct kvm_pit_state ps;
3743 struct kvm_pit_state2 ps2;
3744 struct kvm_pit_config pit_config;
3748 case KVM_SET_TSS_ADDR:
3749 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3751 case KVM_SET_IDENTITY_MAP_ADDR: {
3755 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3757 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3760 case KVM_SET_NR_MMU_PAGES:
3761 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3763 case KVM_GET_NR_MMU_PAGES:
3764 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3766 case KVM_CREATE_IRQCHIP: {
3767 struct kvm_pic *vpic;
3769 mutex_lock(&kvm->lock);
3772 goto create_irqchip_unlock;
3774 if (atomic_read(&kvm->online_vcpus))
3775 goto create_irqchip_unlock;
3777 vpic = kvm_create_pic(kvm);
3779 r = kvm_ioapic_init(kvm);
3781 mutex_lock(&kvm->slots_lock);
3782 kvm_destroy_pic(vpic);
3783 mutex_unlock(&kvm->slots_lock);
3784 goto create_irqchip_unlock;
3787 goto create_irqchip_unlock;
3788 r = kvm_setup_default_irq_routing(kvm);
3790 mutex_lock(&kvm->slots_lock);
3791 mutex_lock(&kvm->irq_lock);
3792 kvm_ioapic_destroy(kvm);
3793 kvm_destroy_pic(vpic);
3794 mutex_unlock(&kvm->irq_lock);
3795 mutex_unlock(&kvm->slots_lock);
3796 goto create_irqchip_unlock;
3798 /* Write kvm->irq_routing before kvm->arch.vpic. */
3800 kvm->arch.vpic = vpic;
3801 create_irqchip_unlock:
3802 mutex_unlock(&kvm->lock);
3805 case KVM_CREATE_PIT:
3806 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3808 case KVM_CREATE_PIT2:
3810 if (copy_from_user(&u.pit_config, argp,
3811 sizeof(struct kvm_pit_config)))
3814 mutex_lock(&kvm->slots_lock);
3817 goto create_pit_unlock;
3819 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3823 mutex_unlock(&kvm->slots_lock);
3825 case KVM_GET_IRQCHIP: {
3826 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3827 struct kvm_irqchip *chip;
3829 chip = memdup_user(argp, sizeof(*chip));
3836 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3837 goto get_irqchip_out;
3838 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3840 goto get_irqchip_out;
3842 if (copy_to_user(argp, chip, sizeof *chip))
3843 goto get_irqchip_out;
3849 case KVM_SET_IRQCHIP: {
3850 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3851 struct kvm_irqchip *chip;
3853 chip = memdup_user(argp, sizeof(*chip));
3860 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3861 goto set_irqchip_out;
3862 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3864 goto set_irqchip_out;
3872 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3875 if (!kvm->arch.vpit)
3877 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3881 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3888 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3891 if (!kvm->arch.vpit)
3893 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3896 case KVM_GET_PIT2: {
3898 if (!kvm->arch.vpit)
3900 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3904 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3909 case KVM_SET_PIT2: {
3911 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3914 if (!kvm->arch.vpit)
3916 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3919 case KVM_REINJECT_CONTROL: {
3920 struct kvm_reinject_control control;
3922 if (copy_from_user(&control, argp, sizeof(control)))
3924 r = kvm_vm_ioctl_reinject(kvm, &control);
3927 case KVM_SET_BOOT_CPU_ID:
3929 mutex_lock(&kvm->lock);
3930 if (atomic_read(&kvm->online_vcpus) != 0)
3933 kvm->arch.bsp_vcpu_id = arg;
3934 mutex_unlock(&kvm->lock);
3936 case KVM_XEN_HVM_CONFIG: {
3938 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3939 sizeof(struct kvm_xen_hvm_config)))
3942 if (kvm->arch.xen_hvm_config.flags)
3947 case KVM_SET_CLOCK: {
3948 struct kvm_clock_data user_ns;
3953 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3961 local_irq_disable();
3962 now_ns = get_kernel_ns();
3963 delta = user_ns.clock - now_ns;
3965 kvm->arch.kvmclock_offset = delta;
3966 kvm_gen_update_masterclock(kvm);
3969 case KVM_GET_CLOCK: {
3970 struct kvm_clock_data user_ns;
3973 local_irq_disable();
3974 now_ns = get_kernel_ns();
3975 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3978 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3981 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3986 case KVM_ENABLE_CAP: {
3987 struct kvm_enable_cap cap;
3990 if (copy_from_user(&cap, argp, sizeof(cap)))
3992 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3996 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4002 static void kvm_init_msr_list(void)
4007 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4008 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4012 * Even MSRs that are valid in the host may not be exposed
4013 * to the guests in some cases.
4015 switch (msrs_to_save[i]) {
4016 case MSR_IA32_BNDCFGS:
4017 if (!kvm_x86_ops->mpx_supported())
4021 if (!kvm_x86_ops->rdtscp_supported())
4029 msrs_to_save[j] = msrs_to_save[i];
4032 num_msrs_to_save = j;
4034 for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4035 switch (emulated_msrs[i]) {
4036 case MSR_IA32_SMBASE:
4037 if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4045 emulated_msrs[j] = emulated_msrs[i];
4048 num_emulated_msrs = j;
4051 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4059 if (!(vcpu->arch.apic &&
4060 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4061 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4072 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4079 if (!(vcpu->arch.apic &&
4080 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4082 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4084 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4094 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4095 struct kvm_segment *var, int seg)
4097 kvm_x86_ops->set_segment(vcpu, var, seg);
4100 void kvm_get_segment(struct kvm_vcpu *vcpu,
4101 struct kvm_segment *var, int seg)
4103 kvm_x86_ops->get_segment(vcpu, var, seg);
4106 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4107 struct x86_exception *exception)
4111 BUG_ON(!mmu_is_nested(vcpu));
4113 /* NPT walks are always user-walks */
4114 access |= PFERR_USER_MASK;
4115 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4120 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4121 struct x86_exception *exception)
4123 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4124 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4127 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4128 struct x86_exception *exception)
4130 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4131 access |= PFERR_FETCH_MASK;
4132 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4135 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4136 struct x86_exception *exception)
4138 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4139 access |= PFERR_WRITE_MASK;
4140 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4143 /* uses this to access any guest's mapped memory without checking CPL */
4144 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4145 struct x86_exception *exception)
4147 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4150 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4151 struct kvm_vcpu *vcpu, u32 access,
4152 struct x86_exception *exception)
4155 int r = X86EMUL_CONTINUE;
4158 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4160 unsigned offset = addr & (PAGE_SIZE-1);
4161 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4164 if (gpa == UNMAPPED_GVA)
4165 return X86EMUL_PROPAGATE_FAULT;
4166 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4169 r = X86EMUL_IO_NEEDED;
4181 /* used for instruction fetching */
4182 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4183 gva_t addr, void *val, unsigned int bytes,
4184 struct x86_exception *exception)
4186 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4187 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4191 /* Inline kvm_read_guest_virt_helper for speed. */
4192 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4194 if (unlikely(gpa == UNMAPPED_GVA))
4195 return X86EMUL_PROPAGATE_FAULT;
4197 offset = addr & (PAGE_SIZE-1);
4198 if (WARN_ON(offset + bytes > PAGE_SIZE))
4199 bytes = (unsigned)PAGE_SIZE - offset;
4200 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4202 if (unlikely(ret < 0))
4203 return X86EMUL_IO_NEEDED;
4205 return X86EMUL_CONTINUE;
4208 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4209 gva_t addr, void *val, unsigned int bytes,
4210 struct x86_exception *exception)
4212 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4213 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4215 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4218 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4220 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4221 gva_t addr, void *val, unsigned int bytes,
4222 struct x86_exception *exception)
4224 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4225 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4228 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4229 unsigned long addr, void *val, unsigned int bytes)
4231 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4232 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4234 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4237 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4238 gva_t addr, void *val,
4240 struct x86_exception *exception)
4242 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4244 int r = X86EMUL_CONTINUE;
4247 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4250 unsigned offset = addr & (PAGE_SIZE-1);
4251 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4254 if (gpa == UNMAPPED_GVA)
4255 return X86EMUL_PROPAGATE_FAULT;
4256 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4258 r = X86EMUL_IO_NEEDED;
4269 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4271 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4272 gpa_t *gpa, struct x86_exception *exception,
4275 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4276 | (write ? PFERR_WRITE_MASK : 0);
4278 if (vcpu_match_mmio_gva(vcpu, gva)
4279 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4280 vcpu->arch.access, access)) {
4281 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4282 (gva & (PAGE_SIZE - 1));
4283 trace_vcpu_match_mmio(gva, *gpa, write, false);
4287 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4289 if (*gpa == UNMAPPED_GVA)
4292 /* For APIC access vmexit */
4293 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4296 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4297 trace_vcpu_match_mmio(gva, *gpa, write, true);
4304 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4305 const void *val, int bytes)
4309 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4312 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4316 struct read_write_emulator_ops {
4317 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4319 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4320 void *val, int bytes);
4321 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4322 int bytes, void *val);
4323 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4324 void *val, int bytes);
4328 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4330 if (vcpu->mmio_read_completed) {
4331 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4332 vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4333 vcpu->mmio_read_completed = 0;
4340 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4341 void *val, int bytes)
4343 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4346 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4347 void *val, int bytes)
4349 return emulator_write_phys(vcpu, gpa, val, bytes);
4352 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4354 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4355 return vcpu_mmio_write(vcpu, gpa, bytes, val);
4358 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4359 void *val, int bytes)
4361 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4362 return X86EMUL_IO_NEEDED;
4365 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4366 void *val, int bytes)
4368 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4370 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4371 return X86EMUL_CONTINUE;
4374 static const struct read_write_emulator_ops read_emultor = {
4375 .read_write_prepare = read_prepare,
4376 .read_write_emulate = read_emulate,
4377 .read_write_mmio = vcpu_mmio_read,
4378 .read_write_exit_mmio = read_exit_mmio,
4381 static const struct read_write_emulator_ops write_emultor = {
4382 .read_write_emulate = write_emulate,
4383 .read_write_mmio = write_mmio,
4384 .read_write_exit_mmio = write_exit_mmio,
4388 static int emulator_read_write_onepage(unsigned long addr, void *val,
4390 struct x86_exception *exception,
4391 struct kvm_vcpu *vcpu,
4392 const struct read_write_emulator_ops *ops)
4396 bool write = ops->write;
4397 struct kvm_mmio_fragment *frag;
4399 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4402 return X86EMUL_PROPAGATE_FAULT;
4404 /* For APIC access vmexit */
4408 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4409 return X86EMUL_CONTINUE;
4413 * Is this MMIO handled locally?
4415 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4416 if (handled == bytes)
4417 return X86EMUL_CONTINUE;
4423 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4424 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4428 return X86EMUL_CONTINUE;
4431 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4433 void *val, unsigned int bytes,
4434 struct x86_exception *exception,
4435 const struct read_write_emulator_ops *ops)
4437 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4441 if (ops->read_write_prepare &&
4442 ops->read_write_prepare(vcpu, val, bytes))
4443 return X86EMUL_CONTINUE;
4445 vcpu->mmio_nr_fragments = 0;
4447 /* Crossing a page boundary? */
4448 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4451 now = -addr & ~PAGE_MASK;
4452 rc = emulator_read_write_onepage(addr, val, now, exception,
4455 if (rc != X86EMUL_CONTINUE)
4458 if (ctxt->mode != X86EMUL_MODE_PROT64)
4464 rc = emulator_read_write_onepage(addr, val, bytes, exception,
4466 if (rc != X86EMUL_CONTINUE)
4469 if (!vcpu->mmio_nr_fragments)
4472 gpa = vcpu->mmio_fragments[0].gpa;
4474 vcpu->mmio_needed = 1;
4475 vcpu->mmio_cur_fragment = 0;
4477 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4478 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4479 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4480 vcpu->run->mmio.phys_addr = gpa;
4482 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4485 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4489 struct x86_exception *exception)
4491 return emulator_read_write(ctxt, addr, val, bytes,
4492 exception, &read_emultor);
4495 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4499 struct x86_exception *exception)
4501 return emulator_read_write(ctxt, addr, (void *)val, bytes,
4502 exception, &write_emultor);
4505 #define CMPXCHG_TYPE(t, ptr, old, new) \
4506 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4508 #ifdef CONFIG_X86_64
4509 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4511 # define CMPXCHG64(ptr, old, new) \
4512 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4515 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4520 struct x86_exception *exception)
4522 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4528 /* guests cmpxchg8b have to be emulated atomically */
4529 if (bytes > 8 || (bytes & (bytes - 1)))
4532 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4534 if (gpa == UNMAPPED_GVA ||
4535 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4538 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4541 page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4542 if (is_error_page(page))
4545 kaddr = kmap_atomic(page);
4546 kaddr += offset_in_page(gpa);
4549 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4552 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4555 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4558 exchanged = CMPXCHG64(kaddr, old, new);
4563 kunmap_atomic(kaddr);
4564 kvm_release_page_dirty(page);
4567 return X86EMUL_CMPXCHG_FAILED;
4569 kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4570 kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4572 return X86EMUL_CONTINUE;
4575 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4577 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4580 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4582 /* TODO: String I/O for in kernel device */
4585 if (vcpu->arch.pio.in)
4586 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4587 vcpu->arch.pio.size, pd);
4589 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4590 vcpu->arch.pio.port, vcpu->arch.pio.size,
4595 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4596 unsigned short port, void *val,
4597 unsigned int count, bool in)
4599 vcpu->arch.pio.port = port;
4600 vcpu->arch.pio.in = in;
4601 vcpu->arch.pio.count = count;
4602 vcpu->arch.pio.size = size;
4604 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4605 vcpu->arch.pio.count = 0;
4609 vcpu->run->exit_reason = KVM_EXIT_IO;
4610 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4611 vcpu->run->io.size = size;
4612 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4613 vcpu->run->io.count = count;
4614 vcpu->run->io.port = port;
4619 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4620 int size, unsigned short port, void *val,
4623 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4626 if (vcpu->arch.pio.count)
4629 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4632 memcpy(val, vcpu->arch.pio_data, size * count);
4633 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4634 vcpu->arch.pio.count = 0;
4641 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4642 int size, unsigned short port,
4643 const void *val, unsigned int count)
4645 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4647 memcpy(vcpu->arch.pio_data, val, size * count);
4648 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4649 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4652 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4654 return kvm_x86_ops->get_segment_base(vcpu, seg);
4657 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4659 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4662 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4664 if (!need_emulate_wbinvd(vcpu))
4665 return X86EMUL_CONTINUE;
4667 if (kvm_x86_ops->has_wbinvd_exit()) {
4668 int cpu = get_cpu();
4670 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4671 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4672 wbinvd_ipi, NULL, 1);
4674 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4677 return X86EMUL_CONTINUE;
4680 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4682 kvm_x86_ops->skip_emulated_instruction(vcpu);
4683 return kvm_emulate_wbinvd_noskip(vcpu);
4685 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4689 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4691 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4694 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4695 unsigned long *dest)
4697 return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4700 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4701 unsigned long value)
4704 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4707 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4709 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4712 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4714 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4715 unsigned long value;
4719 value = kvm_read_cr0(vcpu);
4722 value = vcpu->arch.cr2;
4725 value = kvm_read_cr3(vcpu);
4728 value = kvm_read_cr4(vcpu);
4731 value = kvm_get_cr8(vcpu);
4734 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4741 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4743 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4748 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4751 vcpu->arch.cr2 = val;
4754 res = kvm_set_cr3(vcpu, val);
4757 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4760 res = kvm_set_cr8(vcpu, val);
4763 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4770 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4772 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4775 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4777 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4780 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4782 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4785 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4787 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4790 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4792 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4795 static unsigned long emulator_get_cached_segment_base(
4796 struct x86_emulate_ctxt *ctxt, int seg)
4798 return get_segment_base(emul_to_vcpu(ctxt), seg);
4801 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4802 struct desc_struct *desc, u32 *base3,
4805 struct kvm_segment var;
4807 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4808 *selector = var.selector;
4811 memset(desc, 0, sizeof(*desc));
4817 set_desc_limit(desc, var.limit);
4818 set_desc_base(desc, (unsigned long)var.base);
4819 #ifdef CONFIG_X86_64
4821 *base3 = var.base >> 32;
4823 desc->type = var.type;
4825 desc->dpl = var.dpl;
4826 desc->p = var.present;
4827 desc->avl = var.avl;
4835 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4836 struct desc_struct *desc, u32 base3,
4839 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4840 struct kvm_segment var;
4842 var.selector = selector;
4843 var.base = get_desc_base(desc);
4844 #ifdef CONFIG_X86_64
4845 var.base |= ((u64)base3) << 32;
4847 var.limit = get_desc_limit(desc);
4849 var.limit = (var.limit << 12) | 0xfff;
4850 var.type = desc->type;
4851 var.dpl = desc->dpl;
4856 var.avl = desc->avl;
4857 var.present = desc->p;
4858 var.unusable = !var.present;
4861 kvm_set_segment(vcpu, &var, seg);
4865 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4866 u32 msr_index, u64 *pdata)
4868 struct msr_data msr;
4871 msr.index = msr_index;
4872 msr.host_initiated = false;
4873 r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4881 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4882 u32 msr_index, u64 data)
4884 struct msr_data msr;
4887 msr.index = msr_index;
4888 msr.host_initiated = false;
4889 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4892 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4894 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4896 return vcpu->arch.smbase;
4899 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4901 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4903 vcpu->arch.smbase = smbase;
4906 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4909 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4912 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4913 u32 pmc, u64 *pdata)
4915 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4918 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4920 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4923 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4926 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4928 * CR0.TS may reference the host fpu state, not the guest fpu state,
4929 * so it may be clear at this point.
4934 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4939 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4940 struct x86_instruction_info *info,
4941 enum x86_intercept_stage stage)
4943 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4946 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4947 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4949 kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4952 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4954 return kvm_register_read(emul_to_vcpu(ctxt), reg);
4957 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4959 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4962 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4964 kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4967 static const struct x86_emulate_ops emulate_ops = {
4968 .read_gpr = emulator_read_gpr,
4969 .write_gpr = emulator_write_gpr,
4970 .read_std = kvm_read_guest_virt_system,
4971 .write_std = kvm_write_guest_virt_system,
4972 .read_phys = kvm_read_guest_phys_system,
4973 .fetch = kvm_fetch_guest_virt,
4974 .read_emulated = emulator_read_emulated,
4975 .write_emulated = emulator_write_emulated,
4976 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4977 .invlpg = emulator_invlpg,
4978 .pio_in_emulated = emulator_pio_in_emulated,
4979 .pio_out_emulated = emulator_pio_out_emulated,
4980 .get_segment = emulator_get_segment,
4981 .set_segment = emulator_set_segment,
4982 .get_cached_segment_base = emulator_get_cached_segment_base,
4983 .get_gdt = emulator_get_gdt,
4984 .get_idt = emulator_get_idt,
4985 .set_gdt = emulator_set_gdt,
4986 .set_idt = emulator_set_idt,
4987 .get_cr = emulator_get_cr,
4988 .set_cr = emulator_set_cr,
4989 .cpl = emulator_get_cpl,
4990 .get_dr = emulator_get_dr,
4991 .set_dr = emulator_set_dr,
4992 .get_smbase = emulator_get_smbase,
4993 .set_smbase = emulator_set_smbase,
4994 .set_msr = emulator_set_msr,
4995 .get_msr = emulator_get_msr,
4996 .check_pmc = emulator_check_pmc,
4997 .read_pmc = emulator_read_pmc,
4998 .halt = emulator_halt,
4999 .wbinvd = emulator_wbinvd,
5000 .fix_hypercall = emulator_fix_hypercall,
5001 .get_fpu = emulator_get_fpu,
5002 .put_fpu = emulator_put_fpu,
5003 .intercept = emulator_intercept,
5004 .get_cpuid = emulator_get_cpuid,
5005 .set_nmi_mask = emulator_set_nmi_mask,
5008 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5010 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5012 * an sti; sti; sequence only disable interrupts for the first
5013 * instruction. So, if the last instruction, be it emulated or
5014 * not, left the system with the INT_STI flag enabled, it
5015 * means that the last instruction is an sti. We should not
5016 * leave the flag on in this case. The same goes for mov ss
5018 if (int_shadow & mask)
5020 if (unlikely(int_shadow || mask)) {
5021 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5023 kvm_make_request(KVM_REQ_EVENT, vcpu);
5027 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5029 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5030 if (ctxt->exception.vector == PF_VECTOR)
5031 return kvm_propagate_fault(vcpu, &ctxt->exception);
5033 if (ctxt->exception.error_code_valid)
5034 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5035 ctxt->exception.error_code);
5037 kvm_queue_exception(vcpu, ctxt->exception.vector);
5041 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5043 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5046 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5048 ctxt->eflags = kvm_get_rflags(vcpu);
5049 ctxt->eip = kvm_rip_read(vcpu);
5050 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5051 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
5052 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
5053 cs_db ? X86EMUL_MODE_PROT32 :
5054 X86EMUL_MODE_PROT16;
5055 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5056 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5057 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5058 ctxt->emul_flags = vcpu->arch.hflags;
5060 init_decode_cache(ctxt);
5061 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5064 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5066 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5069 init_emulate_ctxt(vcpu);
5073 ctxt->_eip = ctxt->eip + inc_eip;
5074 ret = emulate_int_real(ctxt, irq);
5076 if (ret != X86EMUL_CONTINUE)
5077 return EMULATE_FAIL;
5079 ctxt->eip = ctxt->_eip;
5080 kvm_rip_write(vcpu, ctxt->eip);
5081 kvm_set_rflags(vcpu, ctxt->eflags);
5083 if (irq == NMI_VECTOR)
5084 vcpu->arch.nmi_pending = 0;
5086 vcpu->arch.interrupt.pending = false;
5088 return EMULATE_DONE;
5090 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5092 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5094 int r = EMULATE_DONE;
5096 ++vcpu->stat.insn_emulation_fail;
5097 trace_kvm_emulate_insn_failed(vcpu);
5098 if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5099 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5100 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5101 vcpu->run->internal.ndata = 0;
5104 kvm_queue_exception(vcpu, UD_VECTOR);
5109 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5110 bool write_fault_to_shadow_pgtable,
5116 if (emulation_type & EMULTYPE_NO_REEXECUTE)
5119 if (!vcpu->arch.mmu.direct_map) {
5121 * Write permission should be allowed since only
5122 * write access need to be emulated.
5124 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5127 * If the mapping is invalid in guest, let cpu retry
5128 * it to generate fault.
5130 if (gpa == UNMAPPED_GVA)
5135 * Do not retry the unhandleable instruction if it faults on the
5136 * readonly host memory, otherwise it will goto a infinite loop:
5137 * retry instruction -> write #PF -> emulation fail -> retry
5138 * instruction -> ...
5140 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5143 * If the instruction failed on the error pfn, it can not be fixed,
5144 * report the error to userspace.
5146 if (is_error_noslot_pfn(pfn))
5149 kvm_release_pfn_clean(pfn);
5151 /* The instructions are well-emulated on direct mmu. */
5152 if (vcpu->arch.mmu.direct_map) {
5153 unsigned int indirect_shadow_pages;
5155 spin_lock(&vcpu->kvm->mmu_lock);
5156 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5157 spin_unlock(&vcpu->kvm->mmu_lock);
5159 if (indirect_shadow_pages)
5160 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5166 * if emulation was due to access to shadowed page table
5167 * and it failed try to unshadow page and re-enter the
5168 * guest to let CPU execute the instruction.
5170 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5173 * If the access faults on its page table, it can not
5174 * be fixed by unprotecting shadow page and it should
5175 * be reported to userspace.
5177 return !write_fault_to_shadow_pgtable;
5180 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5181 unsigned long cr2, int emulation_type)
5183 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5184 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5186 last_retry_eip = vcpu->arch.last_retry_eip;
5187 last_retry_addr = vcpu->arch.last_retry_addr;
5190 * If the emulation is caused by #PF and it is non-page_table
5191 * writing instruction, it means the VM-EXIT is caused by shadow
5192 * page protected, we can zap the shadow page and retry this
5193 * instruction directly.
5195 * Note: if the guest uses a non-page-table modifying instruction
5196 * on the PDE that points to the instruction, then we will unmap
5197 * the instruction and go to an infinite loop. So, we cache the
5198 * last retried eip and the last fault address, if we meet the eip
5199 * and the address again, we can break out of the potential infinite
5202 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5204 if (!(emulation_type & EMULTYPE_RETRY))
5207 if (x86_page_table_writing_insn(ctxt))
5210 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5213 vcpu->arch.last_retry_eip = ctxt->eip;
5214 vcpu->arch.last_retry_addr = cr2;
5216 if (!vcpu->arch.mmu.direct_map)
5217 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5219 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5224 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5225 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5227 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5229 if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5230 /* This is a good place to trace that we are exiting SMM. */
5231 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5233 if (unlikely(vcpu->arch.smi_pending)) {
5234 kvm_make_request(KVM_REQ_SMI, vcpu);
5235 vcpu->arch.smi_pending = 0;
5237 /* Process a latched INIT, if any. */
5238 kvm_make_request(KVM_REQ_EVENT, vcpu);
5242 kvm_mmu_reset_context(vcpu);
5245 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5247 unsigned changed = vcpu->arch.hflags ^ emul_flags;
5249 vcpu->arch.hflags = emul_flags;
5251 if (changed & HF_SMM_MASK)
5252 kvm_smm_changed(vcpu);
5255 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5264 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5265 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5270 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5272 struct kvm_run *kvm_run = vcpu->run;
5275 * rflags is the old, "raw" value of the flags. The new value has
5276 * not been saved yet.
5278 * This is correct even for TF set by the guest, because "the
5279 * processor will not generate this exception after the instruction
5280 * that sets the TF flag".
5282 if (unlikely(rflags & X86_EFLAGS_TF)) {
5283 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5284 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5286 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5287 kvm_run->debug.arch.exception = DB_VECTOR;
5288 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5289 *r = EMULATE_USER_EXIT;
5291 vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5293 * "Certain debug exceptions may clear bit 0-3. The
5294 * remaining contents of the DR6 register are never
5295 * cleared by the processor".
5297 vcpu->arch.dr6 &= ~15;
5298 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5299 kvm_queue_exception(vcpu, DB_VECTOR);
5304 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5306 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5307 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5308 struct kvm_run *kvm_run = vcpu->run;
5309 unsigned long eip = kvm_get_linear_rip(vcpu);
5310 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5311 vcpu->arch.guest_debug_dr7,
5315 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5316 kvm_run->debug.arch.pc = eip;
5317 kvm_run->debug.arch.exception = DB_VECTOR;
5318 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5319 *r = EMULATE_USER_EXIT;
5324 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5325 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5326 unsigned long eip = kvm_get_linear_rip(vcpu);
5327 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5332 vcpu->arch.dr6 &= ~15;
5333 vcpu->arch.dr6 |= dr6 | DR6_RTM;
5334 kvm_queue_exception(vcpu, DB_VECTOR);
5343 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5350 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5351 bool writeback = true;
5352 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5355 * Clear write_fault_to_shadow_pgtable here to ensure it is
5358 vcpu->arch.write_fault_to_shadow_pgtable = false;
5359 kvm_clear_exception_queue(vcpu);
5361 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5362 init_emulate_ctxt(vcpu);
5365 * We will reenter on the same instruction since
5366 * we do not set complete_userspace_io. This does not
5367 * handle watchpoints yet, those would be handled in
5370 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5373 ctxt->interruptibility = 0;
5374 ctxt->have_exception = false;
5375 ctxt->exception.vector = -1;
5376 ctxt->perm_ok = false;
5378 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5380 r = x86_decode_insn(ctxt, insn, insn_len);
5382 trace_kvm_emulate_insn_start(vcpu);
5383 ++vcpu->stat.insn_emulation;
5384 if (r != EMULATION_OK) {
5385 if (emulation_type & EMULTYPE_TRAP_UD)
5386 return EMULATE_FAIL;
5387 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5389 return EMULATE_DONE;
5390 if (emulation_type & EMULTYPE_SKIP)
5391 return EMULATE_FAIL;
5392 return handle_emulation_failure(vcpu);
5396 if (emulation_type & EMULTYPE_SKIP) {
5397 kvm_rip_write(vcpu, ctxt->_eip);
5398 if (ctxt->eflags & X86_EFLAGS_RF)
5399 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5400 return EMULATE_DONE;
5403 if (retry_instruction(ctxt, cr2, emulation_type))
5404 return EMULATE_DONE;
5406 /* this is needed for vmware backdoor interface to work since it
5407 changes registers values during IO operation */
5408 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5409 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5410 emulator_invalidate_register_cache(ctxt);
5414 r = x86_emulate_insn(ctxt);
5416 if (r == EMULATION_INTERCEPTED)
5417 return EMULATE_DONE;
5419 if (r == EMULATION_FAILED) {
5420 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5422 return EMULATE_DONE;
5424 return handle_emulation_failure(vcpu);
5427 if (ctxt->have_exception) {
5429 if (inject_emulated_exception(vcpu))
5431 } else if (vcpu->arch.pio.count) {
5432 if (!vcpu->arch.pio.in) {
5433 /* FIXME: return into emulator if single-stepping. */
5434 vcpu->arch.pio.count = 0;
5437 vcpu->arch.complete_userspace_io = complete_emulated_pio;
5439 r = EMULATE_USER_EXIT;
5440 } else if (vcpu->mmio_needed) {
5441 if (!vcpu->mmio_is_write)
5443 r = EMULATE_USER_EXIT;
5444 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5445 } else if (r == EMULATION_RESTART)
5451 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5452 toggle_interruptibility(vcpu, ctxt->interruptibility);
5453 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5454 if (vcpu->arch.hflags != ctxt->emul_flags)
5455 kvm_set_hflags(vcpu, ctxt->emul_flags);
5456 kvm_rip_write(vcpu, ctxt->eip);
5457 if (r == EMULATE_DONE)
5458 kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5459 if (!ctxt->have_exception ||
5460 exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5461 __kvm_set_rflags(vcpu, ctxt->eflags);
5464 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5465 * do nothing, and it will be requested again as soon as
5466 * the shadow expires. But we still need to check here,
5467 * because POPF has no interrupt shadow.
5469 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5470 kvm_make_request(KVM_REQ_EVENT, vcpu);
5472 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5476 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5478 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5480 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5481 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5482 size, port, &val, 1);
5483 /* do not return to emulator after return from userspace */
5484 vcpu->arch.pio.count = 0;
5487 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5489 static void tsc_bad(void *info)
5491 __this_cpu_write(cpu_tsc_khz, 0);
5494 static void tsc_khz_changed(void *data)
5496 struct cpufreq_freqs *freq = data;
5497 unsigned long khz = 0;
5501 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5502 khz = cpufreq_quick_get(raw_smp_processor_id());
5505 __this_cpu_write(cpu_tsc_khz, khz);
5508 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5511 struct cpufreq_freqs *freq = data;
5513 struct kvm_vcpu *vcpu;
5514 int i, send_ipi = 0;
5517 * We allow guests to temporarily run on slowing clocks,
5518 * provided we notify them after, or to run on accelerating
5519 * clocks, provided we notify them before. Thus time never
5522 * However, we have a problem. We can't atomically update
5523 * the frequency of a given CPU from this function; it is
5524 * merely a notifier, which can be called from any CPU.
5525 * Changing the TSC frequency at arbitrary points in time
5526 * requires a recomputation of local variables related to
5527 * the TSC for each VCPU. We must flag these local variables
5528 * to be updated and be sure the update takes place with the
5529 * new frequency before any guests proceed.
5531 * Unfortunately, the combination of hotplug CPU and frequency
5532 * change creates an intractable locking scenario; the order
5533 * of when these callouts happen is undefined with respect to
5534 * CPU hotplug, and they can race with each other. As such,
5535 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5536 * undefined; you can actually have a CPU frequency change take
5537 * place in between the computation of X and the setting of the
5538 * variable. To protect against this problem, all updates of
5539 * the per_cpu tsc_khz variable are done in an interrupt
5540 * protected IPI, and all callers wishing to update the value
5541 * must wait for a synchronous IPI to complete (which is trivial
5542 * if the caller is on the CPU already). This establishes the
5543 * necessary total order on variable updates.
5545 * Note that because a guest time update may take place
5546 * anytime after the setting of the VCPU's request bit, the
5547 * correct TSC value must be set before the request. However,
5548 * to ensure the update actually makes it to any guest which
5549 * starts running in hardware virtualization between the set
5550 * and the acquisition of the spinlock, we must also ping the
5551 * CPU after setting the request bit.
5555 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5557 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5560 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5562 spin_lock(&kvm_lock);
5563 list_for_each_entry(kvm, &vm_list, vm_list) {
5564 kvm_for_each_vcpu(i, vcpu, kvm) {
5565 if (vcpu->cpu != freq->cpu)
5567 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5568 if (vcpu->cpu != smp_processor_id())
5572 spin_unlock(&kvm_lock);
5574 if (freq->old < freq->new && send_ipi) {
5576 * We upscale the frequency. Must make the guest
5577 * doesn't see old kvmclock values while running with
5578 * the new frequency, otherwise we risk the guest sees
5579 * time go backwards.
5581 * In case we update the frequency for another cpu
5582 * (which might be in guest context) send an interrupt
5583 * to kick the cpu out of guest context. Next time
5584 * guest context is entered kvmclock will be updated,
5585 * so the guest will not see stale values.
5587 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5592 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5593 .notifier_call = kvmclock_cpufreq_notifier
5596 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5597 unsigned long action, void *hcpu)
5599 unsigned int cpu = (unsigned long)hcpu;
5603 case CPU_DOWN_FAILED:
5604 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5606 case CPU_DOWN_PREPARE:
5607 smp_call_function_single(cpu, tsc_bad, NULL, 1);
5613 static struct notifier_block kvmclock_cpu_notifier_block = {
5614 .notifier_call = kvmclock_cpu_notifier,
5615 .priority = -INT_MAX
5618 static void kvm_timer_init(void)
5622 max_tsc_khz = tsc_khz;
5624 cpu_notifier_register_begin();
5625 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5626 #ifdef CONFIG_CPU_FREQ
5627 struct cpufreq_policy policy;
5628 memset(&policy, 0, sizeof(policy));
5630 cpufreq_get_policy(&policy, cpu);
5631 if (policy.cpuinfo.max_freq)
5632 max_tsc_khz = policy.cpuinfo.max_freq;
5635 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5636 CPUFREQ_TRANSITION_NOTIFIER);
5638 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5639 for_each_online_cpu(cpu)
5640 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5642 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5643 cpu_notifier_register_done();
5647 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5649 int kvm_is_in_guest(void)
5651 return __this_cpu_read(current_vcpu) != NULL;
5654 static int kvm_is_user_mode(void)
5658 if (__this_cpu_read(current_vcpu))
5659 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5661 return user_mode != 0;
5664 static unsigned long kvm_get_guest_ip(void)
5666 unsigned long ip = 0;
5668 if (__this_cpu_read(current_vcpu))
5669 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5674 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5675 .is_in_guest = kvm_is_in_guest,
5676 .is_user_mode = kvm_is_user_mode,
5677 .get_guest_ip = kvm_get_guest_ip,
5680 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5682 __this_cpu_write(current_vcpu, vcpu);
5684 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5686 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5688 __this_cpu_write(current_vcpu, NULL);
5690 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5692 static void kvm_set_mmio_spte_mask(void)
5695 int maxphyaddr = boot_cpu_data.x86_phys_bits;
5698 * Set the reserved bits and the present bit of an paging-structure
5699 * entry to generate page fault with PFER.RSV = 1.
5701 /* Mask the reserved physical address bits. */
5702 mask = rsvd_bits(maxphyaddr, 51);
5704 /* Bit 62 is always reserved for 32bit host. */
5705 mask |= 0x3ull << 62;
5707 /* Set the present bit. */
5710 #ifdef CONFIG_X86_64
5712 * If reserved bit is not supported, clear the present bit to disable
5715 if (maxphyaddr == 52)
5719 kvm_mmu_set_mmio_spte_mask(mask);
5722 #ifdef CONFIG_X86_64
5723 static void pvclock_gtod_update_fn(struct work_struct *work)
5727 struct kvm_vcpu *vcpu;
5730 spin_lock(&kvm_lock);
5731 list_for_each_entry(kvm, &vm_list, vm_list)
5732 kvm_for_each_vcpu(i, vcpu, kvm)
5733 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5734 atomic_set(&kvm_guest_has_master_clock, 0);
5735 spin_unlock(&kvm_lock);
5738 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5741 * Notification about pvclock gtod data update.
5743 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5746 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5747 struct timekeeper *tk = priv;
5749 update_pvclock_gtod(tk);
5751 /* disable master clock if host does not trust, or does not
5752 * use, TSC clocksource
5754 if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5755 atomic_read(&kvm_guest_has_master_clock) != 0)
5756 queue_work(system_long_wq, &pvclock_gtod_work);
5761 static struct notifier_block pvclock_gtod_notifier = {
5762 .notifier_call = pvclock_gtod_notify,
5766 int kvm_arch_init(void *opaque)
5769 struct kvm_x86_ops *ops = opaque;
5772 printk(KERN_ERR "kvm: already loaded the other module\n");
5777 if (!ops->cpu_has_kvm_support()) {
5778 printk(KERN_ERR "kvm: no hardware support\n");
5782 if (ops->disabled_by_bios()) {
5783 printk(KERN_ERR "kvm: disabled by bios\n");
5789 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5791 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5795 r = kvm_mmu_module_init();
5797 goto out_free_percpu;
5799 kvm_set_mmio_spte_mask();
5803 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5804 PT_DIRTY_MASK, PT64_NX_MASK, 0);
5808 perf_register_guest_info_callbacks(&kvm_guest_cbs);
5811 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5814 #ifdef CONFIG_X86_64
5815 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5821 free_percpu(shared_msrs);
5826 void kvm_arch_exit(void)
5828 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5830 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5831 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5832 CPUFREQ_TRANSITION_NOTIFIER);
5833 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5834 #ifdef CONFIG_X86_64
5835 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5838 kvm_mmu_module_exit();
5839 free_percpu(shared_msrs);
5842 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5844 ++vcpu->stat.halt_exits;
5845 if (lapic_in_kernel(vcpu)) {
5846 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5849 vcpu->run->exit_reason = KVM_EXIT_HLT;
5853 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5855 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5857 kvm_x86_ops->skip_emulated_instruction(vcpu);
5858 return kvm_vcpu_halt(vcpu);
5860 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5863 * kvm_pv_kick_cpu_op: Kick a vcpu.
5865 * @apicid - apicid of vcpu to be kicked.
5867 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5869 struct kvm_lapic_irq lapic_irq;
5871 lapic_irq.shorthand = 0;
5872 lapic_irq.dest_mode = 0;
5873 lapic_irq.dest_id = apicid;
5874 lapic_irq.msi_redir_hint = false;
5876 lapic_irq.delivery_mode = APIC_DM_REMRD;
5877 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5880 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5882 unsigned long nr, a0, a1, a2, a3, ret;
5883 int op_64_bit, r = 1;
5885 kvm_x86_ops->skip_emulated_instruction(vcpu);
5887 if (kvm_hv_hypercall_enabled(vcpu->kvm))
5888 return kvm_hv_hypercall(vcpu);
5890 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5891 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5892 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5893 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5894 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5896 trace_kvm_hypercall(nr, a0, a1, a2, a3);
5898 op_64_bit = is_64_bit_mode(vcpu);
5907 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5913 case KVM_HC_VAPIC_POLL_IRQ:
5916 case KVM_HC_KICK_CPU:
5917 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5927 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5928 ++vcpu->stat.hypercalls;
5931 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5933 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5935 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5936 char instruction[3];
5937 unsigned long rip = kvm_rip_read(vcpu);
5939 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5941 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5944 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5946 return vcpu->run->request_interrupt_window &&
5947 likely(!pic_in_kernel(vcpu->kvm));
5950 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5952 struct kvm_run *kvm_run = vcpu->run;
5954 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5955 kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5956 kvm_run->cr8 = kvm_get_cr8(vcpu);
5957 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5958 kvm_run->ready_for_interrupt_injection =
5959 pic_in_kernel(vcpu->kvm) ||
5960 kvm_vcpu_ready_for_interrupt_injection(vcpu);
5963 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5967 if (!kvm_x86_ops->update_cr8_intercept)
5970 if (!vcpu->arch.apic)
5973 if (!vcpu->arch.apic->vapic_addr)
5974 max_irr = kvm_lapic_find_highest_irr(vcpu);
5981 tpr = kvm_lapic_get_cr8(vcpu);
5983 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5986 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5990 /* try to reinject previous events if any */
5991 if (vcpu->arch.exception.pending) {
5992 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5993 vcpu->arch.exception.has_error_code,
5994 vcpu->arch.exception.error_code);
5996 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5997 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6000 if (vcpu->arch.exception.nr == DB_VECTOR &&
6001 (vcpu->arch.dr7 & DR7_GD)) {
6002 vcpu->arch.dr7 &= ~DR7_GD;
6003 kvm_update_dr7(vcpu);
6006 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6007 vcpu->arch.exception.has_error_code,
6008 vcpu->arch.exception.error_code,
6009 vcpu->arch.exception.reinject);
6013 if (vcpu->arch.nmi_injected) {
6014 kvm_x86_ops->set_nmi(vcpu);
6018 if (vcpu->arch.interrupt.pending) {
6019 kvm_x86_ops->set_irq(vcpu);
6023 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6024 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6029 /* try to inject new event if pending */
6030 if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6031 --vcpu->arch.nmi_pending;
6032 vcpu->arch.nmi_injected = true;
6033 kvm_x86_ops->set_nmi(vcpu);
6034 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6036 * Because interrupts can be injected asynchronously, we are
6037 * calling check_nested_events again here to avoid a race condition.
6038 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6039 * proposal and current concerns. Perhaps we should be setting
6040 * KVM_REQ_EVENT only on certain events and not unconditionally?
6042 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6043 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6047 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6048 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6050 kvm_x86_ops->set_irq(vcpu);
6056 static void process_nmi(struct kvm_vcpu *vcpu)
6061 * x86 is limited to one NMI running, and one NMI pending after it.
6062 * If an NMI is already in progress, limit further NMIs to just one.
6063 * Otherwise, allow two (and we'll inject the first one immediately).
6065 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6068 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6069 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6070 kvm_make_request(KVM_REQ_EVENT, vcpu);
6073 #define put_smstate(type, buf, offset, val) \
6074 *(type *)((buf) + (offset) - 0x7e00) = val
6076 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6079 flags |= seg->g << 23;
6080 flags |= seg->db << 22;
6081 flags |= seg->l << 21;
6082 flags |= seg->avl << 20;
6083 flags |= seg->present << 15;
6084 flags |= seg->dpl << 13;
6085 flags |= seg->s << 12;
6086 flags |= seg->type << 8;
6090 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6092 struct kvm_segment seg;
6095 kvm_get_segment(vcpu, &seg, n);
6096 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6099 offset = 0x7f84 + n * 12;
6101 offset = 0x7f2c + (n - 3) * 12;
6103 put_smstate(u32, buf, offset + 8, seg.base);
6104 put_smstate(u32, buf, offset + 4, seg.limit);
6105 put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6108 #ifdef CONFIG_X86_64
6109 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6111 struct kvm_segment seg;
6115 kvm_get_segment(vcpu, &seg, n);
6116 offset = 0x7e00 + n * 16;
6118 flags = process_smi_get_segment_flags(&seg) >> 8;
6119 put_smstate(u16, buf, offset, seg.selector);
6120 put_smstate(u16, buf, offset + 2, flags);
6121 put_smstate(u32, buf, offset + 4, seg.limit);
6122 put_smstate(u64, buf, offset + 8, seg.base);
6126 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6129 struct kvm_segment seg;
6133 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6134 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6135 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6136 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6138 for (i = 0; i < 8; i++)
6139 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6141 kvm_get_dr(vcpu, 6, &val);
6142 put_smstate(u32, buf, 0x7fcc, (u32)val);
6143 kvm_get_dr(vcpu, 7, &val);
6144 put_smstate(u32, buf, 0x7fc8, (u32)val);
6146 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6147 put_smstate(u32, buf, 0x7fc4, seg.selector);
6148 put_smstate(u32, buf, 0x7f64, seg.base);
6149 put_smstate(u32, buf, 0x7f60, seg.limit);
6150 put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6152 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6153 put_smstate(u32, buf, 0x7fc0, seg.selector);
6154 put_smstate(u32, buf, 0x7f80, seg.base);
6155 put_smstate(u32, buf, 0x7f7c, seg.limit);
6156 put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6158 kvm_x86_ops->get_gdt(vcpu, &dt);
6159 put_smstate(u32, buf, 0x7f74, dt.address);
6160 put_smstate(u32, buf, 0x7f70, dt.size);
6162 kvm_x86_ops->get_idt(vcpu, &dt);
6163 put_smstate(u32, buf, 0x7f58, dt.address);
6164 put_smstate(u32, buf, 0x7f54, dt.size);
6166 for (i = 0; i < 6; i++)
6167 process_smi_save_seg_32(vcpu, buf, i);
6169 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6172 put_smstate(u32, buf, 0x7efc, 0x00020000);
6173 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6176 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6178 #ifdef CONFIG_X86_64
6180 struct kvm_segment seg;
6184 for (i = 0; i < 16; i++)
6185 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6187 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6188 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6190 kvm_get_dr(vcpu, 6, &val);
6191 put_smstate(u64, buf, 0x7f68, val);
6192 kvm_get_dr(vcpu, 7, &val);
6193 put_smstate(u64, buf, 0x7f60, val);
6195 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6196 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6197 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6199 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6202 put_smstate(u32, buf, 0x7efc, 0x00020064);
6204 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6206 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6207 put_smstate(u16, buf, 0x7e90, seg.selector);
6208 put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6209 put_smstate(u32, buf, 0x7e94, seg.limit);
6210 put_smstate(u64, buf, 0x7e98, seg.base);
6212 kvm_x86_ops->get_idt(vcpu, &dt);
6213 put_smstate(u32, buf, 0x7e84, dt.size);
6214 put_smstate(u64, buf, 0x7e88, dt.address);
6216 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6217 put_smstate(u16, buf, 0x7e70, seg.selector);
6218 put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6219 put_smstate(u32, buf, 0x7e74, seg.limit);
6220 put_smstate(u64, buf, 0x7e78, seg.base);
6222 kvm_x86_ops->get_gdt(vcpu, &dt);
6223 put_smstate(u32, buf, 0x7e64, dt.size);
6224 put_smstate(u64, buf, 0x7e68, dt.address);
6226 for (i = 0; i < 6; i++)
6227 process_smi_save_seg_64(vcpu, buf, i);
6233 static void process_smi(struct kvm_vcpu *vcpu)
6235 struct kvm_segment cs, ds;
6241 vcpu->arch.smi_pending = true;
6245 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6246 vcpu->arch.hflags |= HF_SMM_MASK;
6247 memset(buf, 0, 512);
6248 if (guest_cpuid_has_longmode(vcpu))
6249 process_smi_save_state_64(vcpu, buf);
6251 process_smi_save_state_32(vcpu, buf);
6253 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6255 if (kvm_x86_ops->get_nmi_mask(vcpu))
6256 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6258 kvm_x86_ops->set_nmi_mask(vcpu, true);
6260 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6261 kvm_rip_write(vcpu, 0x8000);
6263 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6264 kvm_x86_ops->set_cr0(vcpu, cr0);
6265 vcpu->arch.cr0 = cr0;
6267 kvm_x86_ops->set_cr4(vcpu, 0);
6269 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6270 dt.address = dt.size = 0;
6271 kvm_x86_ops->set_idt(vcpu, &dt);
6273 __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6275 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6276 cs.base = vcpu->arch.smbase;
6281 cs.limit = ds.limit = 0xffffffff;
6282 cs.type = ds.type = 0x3;
6283 cs.dpl = ds.dpl = 0;
6288 cs.avl = ds.avl = 0;
6289 cs.present = ds.present = 1;
6290 cs.unusable = ds.unusable = 0;
6291 cs.padding = ds.padding = 0;
6293 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6294 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6295 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6296 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6297 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6298 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6300 if (guest_cpuid_has_longmode(vcpu))
6301 kvm_x86_ops->set_efer(vcpu, 0);
6303 kvm_update_cpuid(vcpu);
6304 kvm_mmu_reset_context(vcpu);
6307 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6309 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6312 memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6314 if (irqchip_split(vcpu->kvm))
6315 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6317 kvm_x86_ops->sync_pir_to_irr(vcpu);
6318 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6320 kvm_x86_ops->load_eoi_exitmap(vcpu);
6323 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6325 ++vcpu->stat.tlb_flush;
6326 kvm_x86_ops->tlb_flush(vcpu);
6329 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6331 struct page *page = NULL;
6333 if (!lapic_in_kernel(vcpu))
6336 if (!kvm_x86_ops->set_apic_access_page_addr)
6339 page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6340 if (is_error_page(page))
6342 kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6345 * Do not pin apic access page in memory, the MMU notifier
6346 * will call us again if it is migrated or swapped out.
6350 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6352 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6353 unsigned long address)
6356 * The physical address of apic access page is stored in the VMCS.
6357 * Update it when it becomes invalid.
6359 if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6360 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6364 * Returns 1 to let vcpu_run() continue the guest execution loop without
6365 * exiting to the userspace. Otherwise, the value will be returned to the
6368 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6372 dm_request_for_irq_injection(vcpu) &&
6373 kvm_cpu_accept_dm_intr(vcpu);
6375 bool req_immediate_exit = false;
6377 if (vcpu->requests) {
6378 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6379 kvm_mmu_unload(vcpu);
6380 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6381 __kvm_migrate_timers(vcpu);
6382 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6383 kvm_gen_update_masterclock(vcpu->kvm);
6384 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6385 kvm_gen_kvmclock_update(vcpu);
6386 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6387 r = kvm_guest_time_update(vcpu);
6391 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6392 kvm_mmu_sync_roots(vcpu);
6393 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6394 kvm_vcpu_flush_tlb(vcpu);
6395 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6396 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6400 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6401 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6405 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6406 vcpu->fpu_active = 0;
6407 kvm_x86_ops->fpu_deactivate(vcpu);
6409 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6410 /* Page is swapped out. Do synthetic halt */
6411 vcpu->arch.apf.halted = true;
6415 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6416 record_steal_time(vcpu);
6417 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6419 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6421 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6422 kvm_pmu_handle_event(vcpu);
6423 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6424 kvm_pmu_deliver_pmi(vcpu);
6425 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6426 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6427 if (test_bit(vcpu->arch.pending_ioapic_eoi,
6428 (void *) vcpu->arch.eoi_exit_bitmap)) {
6429 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6430 vcpu->run->eoi.vector =
6431 vcpu->arch.pending_ioapic_eoi;
6436 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6437 vcpu_scan_ioapic(vcpu);
6438 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6439 kvm_vcpu_reload_apic_access_page(vcpu);
6440 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6441 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6442 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6446 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6447 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6448 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6455 * KVM_REQ_EVENT is not set when posted interrupts are set by
6456 * VT-d hardware, so we have to update RVI unconditionally.
6458 if (kvm_lapic_enabled(vcpu)) {
6460 * Update architecture specific hints for APIC
6461 * virtual interrupt delivery.
6463 if (kvm_x86_ops->hwapic_irr_update)
6464 kvm_x86_ops->hwapic_irr_update(vcpu,
6465 kvm_lapic_find_highest_irr(vcpu));
6468 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6469 kvm_apic_accept_events(vcpu);
6470 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6475 if (inject_pending_event(vcpu, req_int_win) != 0)
6476 req_immediate_exit = true;
6477 /* enable NMI/IRQ window open exits if needed */
6479 if (vcpu->arch.nmi_pending)
6480 kvm_x86_ops->enable_nmi_window(vcpu);
6481 if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6482 kvm_x86_ops->enable_irq_window(vcpu);
6485 if (kvm_lapic_enabled(vcpu)) {
6486 update_cr8_intercept(vcpu);
6487 kvm_lapic_sync_to_vapic(vcpu);
6491 r = kvm_mmu_reload(vcpu);
6493 goto cancel_injection;
6498 kvm_x86_ops->prepare_guest_switch(vcpu);
6499 if (vcpu->fpu_active)
6500 kvm_load_guest_fpu(vcpu);
6501 vcpu->mode = IN_GUEST_MODE;
6503 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6505 /* We should set ->mode before check ->requests,
6506 * see the comment in make_all_cpus_request.
6508 smp_mb__after_srcu_read_unlock();
6510 local_irq_disable();
6512 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6513 || need_resched() || signal_pending(current)) {
6514 vcpu->mode = OUTSIDE_GUEST_MODE;
6518 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6520 goto cancel_injection;
6523 kvm_load_guest_xcr0(vcpu);
6525 if (req_immediate_exit)
6526 smp_send_reschedule(vcpu->cpu);
6528 trace_kvm_entry(vcpu->vcpu_id);
6529 wait_lapic_expire(vcpu);
6530 __kvm_guest_enter();
6532 if (unlikely(vcpu->arch.switch_db_regs)) {
6534 set_debugreg(vcpu->arch.eff_db[0], 0);
6535 set_debugreg(vcpu->arch.eff_db[1], 1);
6536 set_debugreg(vcpu->arch.eff_db[2], 2);
6537 set_debugreg(vcpu->arch.eff_db[3], 3);
6538 set_debugreg(vcpu->arch.dr6, 6);
6539 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6542 kvm_x86_ops->run(vcpu);
6545 * Do this here before restoring debug registers on the host. And
6546 * since we do this before handling the vmexit, a DR access vmexit
6547 * can (a) read the correct value of the debug registers, (b) set
6548 * KVM_DEBUGREG_WONT_EXIT again.
6550 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6551 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6552 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6553 kvm_update_dr0123(vcpu);
6554 kvm_update_dr6(vcpu);
6555 kvm_update_dr7(vcpu);
6556 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6560 * If the guest has used debug registers, at least dr7
6561 * will be disabled while returning to the host.
6562 * If we don't have active breakpoints in the host, we don't
6563 * care about the messed up debug address registers. But if
6564 * we have some of them active, restore the old state.
6566 if (hw_breakpoint_active())
6567 hw_breakpoint_restore();
6569 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6571 vcpu->mode = OUTSIDE_GUEST_MODE;
6574 kvm_put_guest_xcr0(vcpu);
6576 /* Interrupt is enabled by handle_external_intr() */
6577 kvm_x86_ops->handle_external_intr(vcpu);
6582 * We must have an instruction between local_irq_enable() and
6583 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6584 * the interrupt shadow. The stat.exits increment will do nicely.
6585 * But we need to prevent reordering, hence this barrier():
6593 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6596 * Profile KVM exit RIPs:
6598 if (unlikely(prof_on == KVM_PROFILING)) {
6599 unsigned long rip = kvm_rip_read(vcpu);
6600 profile_hit(KVM_PROFILING, (void *)rip);
6603 if (unlikely(vcpu->arch.tsc_always_catchup))
6604 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6606 if (vcpu->arch.apic_attention)
6607 kvm_lapic_sync_from_vapic(vcpu);
6609 r = kvm_x86_ops->handle_exit(vcpu);
6613 kvm_x86_ops->cancel_injection(vcpu);
6614 if (unlikely(vcpu->arch.apic_attention))
6615 kvm_lapic_sync_from_vapic(vcpu);
6620 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6622 if (!kvm_arch_vcpu_runnable(vcpu) &&
6623 (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6624 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6625 kvm_vcpu_block(vcpu);
6626 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6628 if (kvm_x86_ops->post_block)
6629 kvm_x86_ops->post_block(vcpu);
6631 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6635 kvm_apic_accept_events(vcpu);
6636 switch(vcpu->arch.mp_state) {
6637 case KVM_MP_STATE_HALTED:
6638 vcpu->arch.pv.pv_unhalted = false;
6639 vcpu->arch.mp_state =
6640 KVM_MP_STATE_RUNNABLE;
6641 case KVM_MP_STATE_RUNNABLE:
6642 vcpu->arch.apf.halted = false;
6644 case KVM_MP_STATE_INIT_RECEIVED:
6653 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6655 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6656 !vcpu->arch.apf.halted);
6659 static int vcpu_run(struct kvm_vcpu *vcpu)
6662 struct kvm *kvm = vcpu->kvm;
6664 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6667 if (kvm_vcpu_running(vcpu)) {
6668 r = vcpu_enter_guest(vcpu);
6670 r = vcpu_block(kvm, vcpu);
6676 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6677 if (kvm_cpu_has_pending_timer(vcpu))
6678 kvm_inject_pending_timer_irqs(vcpu);
6680 if (dm_request_for_irq_injection(vcpu) &&
6681 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6683 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6684 ++vcpu->stat.request_irq_exits;
6688 kvm_check_async_pf_completion(vcpu);
6690 if (signal_pending(current)) {
6692 vcpu->run->exit_reason = KVM_EXIT_INTR;
6693 ++vcpu->stat.signal_exits;
6696 if (need_resched()) {
6697 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6699 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6703 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6708 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6711 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6712 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6713 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6714 if (r != EMULATE_DONE)
6719 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6721 BUG_ON(!vcpu->arch.pio.count);
6723 return complete_emulated_io(vcpu);
6727 * Implements the following, as a state machine:
6731 * for each mmio piece in the fragment
6739 * for each mmio piece in the fragment
6744 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6746 struct kvm_run *run = vcpu->run;
6747 struct kvm_mmio_fragment *frag;
6750 BUG_ON(!vcpu->mmio_needed);
6752 /* Complete previous fragment */
6753 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6754 len = min(8u, frag->len);
6755 if (!vcpu->mmio_is_write)
6756 memcpy(frag->data, run->mmio.data, len);
6758 if (frag->len <= 8) {
6759 /* Switch to the next fragment. */
6761 vcpu->mmio_cur_fragment++;
6763 /* Go forward to the next mmio piece. */
6769 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6770 vcpu->mmio_needed = 0;
6772 /* FIXME: return into emulator if single-stepping. */
6773 if (vcpu->mmio_is_write)
6775 vcpu->mmio_read_completed = 1;
6776 return complete_emulated_io(vcpu);
6779 run->exit_reason = KVM_EXIT_MMIO;
6780 run->mmio.phys_addr = frag->gpa;
6781 if (vcpu->mmio_is_write)
6782 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6783 run->mmio.len = min(8u, frag->len);
6784 run->mmio.is_write = vcpu->mmio_is_write;
6785 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6790 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6792 struct fpu *fpu = ¤t->thread.fpu;
6796 fpu__activate_curr(fpu);
6798 if (vcpu->sigset_active)
6799 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6801 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6802 kvm_vcpu_block(vcpu);
6803 kvm_apic_accept_events(vcpu);
6804 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6809 /* re-sync apic's tpr */
6810 if (!lapic_in_kernel(vcpu)) {
6811 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6817 if (unlikely(vcpu->arch.complete_userspace_io)) {
6818 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6819 vcpu->arch.complete_userspace_io = NULL;
6824 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6829 post_kvm_run_save(vcpu);
6830 if (vcpu->sigset_active)
6831 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6836 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6838 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6840 * We are here if userspace calls get_regs() in the middle of
6841 * instruction emulation. Registers state needs to be copied
6842 * back from emulation context to vcpu. Userspace shouldn't do
6843 * that usually, but some bad designed PV devices (vmware
6844 * backdoor interface) need this to work
6846 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6847 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6849 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6850 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6851 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6852 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6853 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6854 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6855 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6856 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6857 #ifdef CONFIG_X86_64
6858 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6859 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6860 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6861 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6862 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6863 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6864 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6865 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6868 regs->rip = kvm_rip_read(vcpu);
6869 regs->rflags = kvm_get_rflags(vcpu);
6874 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6876 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6877 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6879 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6880 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6881 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6882 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6883 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6884 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6885 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6886 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6887 #ifdef CONFIG_X86_64
6888 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6889 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6890 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6891 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6892 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6893 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6894 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6895 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6898 kvm_rip_write(vcpu, regs->rip);
6899 kvm_set_rflags(vcpu, regs->rflags);
6901 vcpu->arch.exception.pending = false;
6903 kvm_make_request(KVM_REQ_EVENT, vcpu);
6908 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6910 struct kvm_segment cs;
6912 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6916 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6918 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6919 struct kvm_sregs *sregs)
6923 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6924 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6925 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6926 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6927 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6928 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6930 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6931 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6933 kvm_x86_ops->get_idt(vcpu, &dt);
6934 sregs->idt.limit = dt.size;
6935 sregs->idt.base = dt.address;
6936 kvm_x86_ops->get_gdt(vcpu, &dt);
6937 sregs->gdt.limit = dt.size;
6938 sregs->gdt.base = dt.address;
6940 sregs->cr0 = kvm_read_cr0(vcpu);
6941 sregs->cr2 = vcpu->arch.cr2;
6942 sregs->cr3 = kvm_read_cr3(vcpu);
6943 sregs->cr4 = kvm_read_cr4(vcpu);
6944 sregs->cr8 = kvm_get_cr8(vcpu);
6945 sregs->efer = vcpu->arch.efer;
6946 sregs->apic_base = kvm_get_apic_base(vcpu);
6948 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6950 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6951 set_bit(vcpu->arch.interrupt.nr,
6952 (unsigned long *)sregs->interrupt_bitmap);
6957 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6958 struct kvm_mp_state *mp_state)
6960 kvm_apic_accept_events(vcpu);
6961 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6962 vcpu->arch.pv.pv_unhalted)
6963 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6965 mp_state->mp_state = vcpu->arch.mp_state;
6970 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6971 struct kvm_mp_state *mp_state)
6973 if (!kvm_vcpu_has_lapic(vcpu) &&
6974 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6977 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6978 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6979 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6981 vcpu->arch.mp_state = mp_state->mp_state;
6982 kvm_make_request(KVM_REQ_EVENT, vcpu);
6986 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6987 int reason, bool has_error_code, u32 error_code)
6989 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6992 init_emulate_ctxt(vcpu);
6994 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6995 has_error_code, error_code);
6998 return EMULATE_FAIL;
7000 kvm_rip_write(vcpu, ctxt->eip);
7001 kvm_set_rflags(vcpu, ctxt->eflags);
7002 kvm_make_request(KVM_REQ_EVENT, vcpu);
7003 return EMULATE_DONE;
7005 EXPORT_SYMBOL_GPL(kvm_task_switch);
7007 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7008 struct kvm_sregs *sregs)
7010 struct msr_data apic_base_msr;
7011 int mmu_reset_needed = 0;
7012 int pending_vec, max_bits, idx;
7015 if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7018 dt.size = sregs->idt.limit;
7019 dt.address = sregs->idt.base;
7020 kvm_x86_ops->set_idt(vcpu, &dt);
7021 dt.size = sregs->gdt.limit;
7022 dt.address = sregs->gdt.base;
7023 kvm_x86_ops->set_gdt(vcpu, &dt);
7025 vcpu->arch.cr2 = sregs->cr2;
7026 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7027 vcpu->arch.cr3 = sregs->cr3;
7028 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7030 kvm_set_cr8(vcpu, sregs->cr8);
7032 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7033 kvm_x86_ops->set_efer(vcpu, sregs->efer);
7034 apic_base_msr.data = sregs->apic_base;
7035 apic_base_msr.host_initiated = true;
7036 kvm_set_apic_base(vcpu, &apic_base_msr);
7038 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7039 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7040 vcpu->arch.cr0 = sregs->cr0;
7042 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7043 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7044 if (sregs->cr4 & X86_CR4_OSXSAVE)
7045 kvm_update_cpuid(vcpu);
7047 idx = srcu_read_lock(&vcpu->kvm->srcu);
7048 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7049 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7050 mmu_reset_needed = 1;
7052 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7054 if (mmu_reset_needed)
7055 kvm_mmu_reset_context(vcpu);
7057 max_bits = KVM_NR_INTERRUPTS;
7058 pending_vec = find_first_bit(
7059 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7060 if (pending_vec < max_bits) {
7061 kvm_queue_interrupt(vcpu, pending_vec, false);
7062 pr_debug("Set back pending irq %d\n", pending_vec);
7065 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7066 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7067 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7068 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7069 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7070 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7072 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7073 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7075 update_cr8_intercept(vcpu);
7077 /* Older userspace won't unhalt the vcpu on reset. */
7078 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7079 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7081 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7083 kvm_make_request(KVM_REQ_EVENT, vcpu);
7088 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7089 struct kvm_guest_debug *dbg)
7091 unsigned long rflags;
7094 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7096 if (vcpu->arch.exception.pending)
7098 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7099 kvm_queue_exception(vcpu, DB_VECTOR);
7101 kvm_queue_exception(vcpu, BP_VECTOR);
7105 * Read rflags as long as potentially injected trace flags are still
7108 rflags = kvm_get_rflags(vcpu);
7110 vcpu->guest_debug = dbg->control;
7111 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7112 vcpu->guest_debug = 0;
7114 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7115 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7116 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7117 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7119 for (i = 0; i < KVM_NR_DB_REGS; i++)
7120 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7122 kvm_update_dr7(vcpu);
7124 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7125 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7126 get_segment_base(vcpu, VCPU_SREG_CS);
7129 * Trigger an rflags update that will inject or remove the trace
7132 kvm_set_rflags(vcpu, rflags);
7134 kvm_x86_ops->update_bp_intercept(vcpu);
7144 * Translate a guest virtual address to a guest physical address.
7146 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7147 struct kvm_translation *tr)
7149 unsigned long vaddr = tr->linear_address;
7153 idx = srcu_read_lock(&vcpu->kvm->srcu);
7154 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7155 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7156 tr->physical_address = gpa;
7157 tr->valid = gpa != UNMAPPED_GVA;
7164 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7166 struct fxregs_state *fxsave =
7167 &vcpu->arch.guest_fpu.state.fxsave;
7169 memcpy(fpu->fpr, fxsave->st_space, 128);
7170 fpu->fcw = fxsave->cwd;
7171 fpu->fsw = fxsave->swd;
7172 fpu->ftwx = fxsave->twd;
7173 fpu->last_opcode = fxsave->fop;
7174 fpu->last_ip = fxsave->rip;
7175 fpu->last_dp = fxsave->rdp;
7176 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7181 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7183 struct fxregs_state *fxsave =
7184 &vcpu->arch.guest_fpu.state.fxsave;
7186 memcpy(fxsave->st_space, fpu->fpr, 128);
7187 fxsave->cwd = fpu->fcw;
7188 fxsave->swd = fpu->fsw;
7189 fxsave->twd = fpu->ftwx;
7190 fxsave->fop = fpu->last_opcode;
7191 fxsave->rip = fpu->last_ip;
7192 fxsave->rdp = fpu->last_dp;
7193 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7198 static void fx_init(struct kvm_vcpu *vcpu)
7200 fpstate_init(&vcpu->arch.guest_fpu.state);
7202 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7203 host_xcr0 | XSTATE_COMPACTION_ENABLED;
7206 * Ensure guest xcr0 is valid for loading
7208 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7210 vcpu->arch.cr0 |= X86_CR0_ET;
7213 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7215 if (vcpu->guest_fpu_loaded)
7219 * Restore all possible states in the guest,
7220 * and assume host would use all available bits.
7221 * Guest xcr0 would be loaded later.
7223 vcpu->guest_fpu_loaded = 1;
7224 __kernel_fpu_begin();
7225 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7229 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7231 if (!vcpu->guest_fpu_loaded) {
7232 vcpu->fpu_counter = 0;
7236 vcpu->guest_fpu_loaded = 0;
7237 copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7239 ++vcpu->stat.fpu_reload;
7241 * If using eager FPU mode, or if the guest is a frequent user
7242 * of the FPU, just leave the FPU active for next time.
7243 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7244 * the FPU in bursts will revert to loading it on demand.
7246 if (!vcpu->arch.eager_fpu) {
7247 if (++vcpu->fpu_counter < 5)
7248 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7253 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7255 void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7257 kvmclock_reset(vcpu);
7259 kvm_x86_ops->vcpu_free(vcpu);
7260 free_cpumask_var(wbinvd_dirty_mask);
7263 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7266 struct kvm_vcpu *vcpu;
7268 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7269 printk_once(KERN_WARNING
7270 "kvm: SMP vm created on host with unstable TSC; "
7271 "guest TSC will not be reliable\n");
7273 vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7278 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7282 kvm_vcpu_mtrr_init(vcpu);
7283 r = vcpu_load(vcpu);
7286 kvm_vcpu_reset(vcpu, false);
7287 kvm_mmu_setup(vcpu);
7292 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7294 struct msr_data msr;
7295 struct kvm *kvm = vcpu->kvm;
7297 if (vcpu_load(vcpu))
7300 msr.index = MSR_IA32_TSC;
7301 msr.host_initiated = true;
7302 kvm_write_tsc(vcpu, &msr);
7305 if (!kvmclock_periodic_sync)
7308 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7309 KVMCLOCK_SYNC_PERIOD);
7312 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7315 vcpu->arch.apf.msr_val = 0;
7317 r = vcpu_load(vcpu);
7319 kvm_mmu_unload(vcpu);
7322 kvm_x86_ops->vcpu_free(vcpu);
7325 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7327 vcpu->arch.hflags = 0;
7329 atomic_set(&vcpu->arch.nmi_queued, 0);
7330 vcpu->arch.nmi_pending = 0;
7331 vcpu->arch.nmi_injected = false;
7332 kvm_clear_interrupt_queue(vcpu);
7333 kvm_clear_exception_queue(vcpu);
7335 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7336 kvm_update_dr0123(vcpu);
7337 vcpu->arch.dr6 = DR6_INIT;
7338 kvm_update_dr6(vcpu);
7339 vcpu->arch.dr7 = DR7_FIXED_1;
7340 kvm_update_dr7(vcpu);
7344 kvm_make_request(KVM_REQ_EVENT, vcpu);
7345 vcpu->arch.apf.msr_val = 0;
7346 vcpu->arch.st.msr_val = 0;
7348 kvmclock_reset(vcpu);
7350 kvm_clear_async_pf_completion_queue(vcpu);
7351 kvm_async_pf_hash_reset(vcpu);
7352 vcpu->arch.apf.halted = false;
7355 kvm_pmu_reset(vcpu);
7356 vcpu->arch.smbase = 0x30000;
7359 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7360 vcpu->arch.regs_avail = ~0;
7361 vcpu->arch.regs_dirty = ~0;
7363 kvm_x86_ops->vcpu_reset(vcpu, init_event);
7366 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7368 struct kvm_segment cs;
7370 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7371 cs.selector = vector << 8;
7372 cs.base = vector << 12;
7373 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7374 kvm_rip_write(vcpu, 0);
7377 int kvm_arch_hardware_enable(void)
7380 struct kvm_vcpu *vcpu;
7385 bool stable, backwards_tsc = false;
7387 kvm_shared_msr_cpu_online();
7388 ret = kvm_x86_ops->hardware_enable();
7392 local_tsc = rdtsc();
7393 stable = !check_tsc_unstable();
7394 list_for_each_entry(kvm, &vm_list, vm_list) {
7395 kvm_for_each_vcpu(i, vcpu, kvm) {
7396 if (!stable && vcpu->cpu == smp_processor_id())
7397 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7398 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7399 backwards_tsc = true;
7400 if (vcpu->arch.last_host_tsc > max_tsc)
7401 max_tsc = vcpu->arch.last_host_tsc;
7407 * Sometimes, even reliable TSCs go backwards. This happens on
7408 * platforms that reset TSC during suspend or hibernate actions, but
7409 * maintain synchronization. We must compensate. Fortunately, we can
7410 * detect that condition here, which happens early in CPU bringup,
7411 * before any KVM threads can be running. Unfortunately, we can't
7412 * bring the TSCs fully up to date with real time, as we aren't yet far
7413 * enough into CPU bringup that we know how much real time has actually
7414 * elapsed; our helper function, get_kernel_ns() will be using boot
7415 * variables that haven't been updated yet.
7417 * So we simply find the maximum observed TSC above, then record the
7418 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7419 * the adjustment will be applied. Note that we accumulate
7420 * adjustments, in case multiple suspend cycles happen before some VCPU
7421 * gets a chance to run again. In the event that no KVM threads get a
7422 * chance to run, we will miss the entire elapsed period, as we'll have
7423 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7424 * loose cycle time. This isn't too big a deal, since the loss will be
7425 * uniform across all VCPUs (not to mention the scenario is extremely
7426 * unlikely). It is possible that a second hibernate recovery happens
7427 * much faster than a first, causing the observed TSC here to be
7428 * smaller; this would require additional padding adjustment, which is
7429 * why we set last_host_tsc to the local tsc observed here.
7431 * N.B. - this code below runs only on platforms with reliable TSC,
7432 * as that is the only way backwards_tsc is set above. Also note
7433 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7434 * have the same delta_cyc adjustment applied if backwards_tsc
7435 * is detected. Note further, this adjustment is only done once,
7436 * as we reset last_host_tsc on all VCPUs to stop this from being
7437 * called multiple times (one for each physical CPU bringup).
7439 * Platforms with unreliable TSCs don't have to deal with this, they
7440 * will be compensated by the logic in vcpu_load, which sets the TSC to
7441 * catchup mode. This will catchup all VCPUs to real time, but cannot
7442 * guarantee that they stay in perfect synchronization.
7444 if (backwards_tsc) {
7445 u64 delta_cyc = max_tsc - local_tsc;
7446 backwards_tsc_observed = true;
7447 list_for_each_entry(kvm, &vm_list, vm_list) {
7448 kvm_for_each_vcpu(i, vcpu, kvm) {
7449 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7450 vcpu->arch.last_host_tsc = local_tsc;
7451 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7455 * We have to disable TSC offset matching.. if you were
7456 * booting a VM while issuing an S4 host suspend....
7457 * you may have some problem. Solving this issue is
7458 * left as an exercise to the reader.
7460 kvm->arch.last_tsc_nsec = 0;
7461 kvm->arch.last_tsc_write = 0;
7468 void kvm_arch_hardware_disable(void)
7470 kvm_x86_ops->hardware_disable();
7471 drop_user_return_notifiers();
7474 int kvm_arch_hardware_setup(void)
7478 r = kvm_x86_ops->hardware_setup();
7482 if (kvm_has_tsc_control) {
7484 * Make sure the user can only configure tsc_khz values that
7485 * fit into a signed integer.
7486 * A min value is not calculated needed because it will always
7487 * be 1 on all machines.
7489 u64 max = min(0x7fffffffULL,
7490 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7491 kvm_max_guest_tsc_khz = max;
7493 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7496 kvm_init_msr_list();
7500 void kvm_arch_hardware_unsetup(void)
7502 kvm_x86_ops->hardware_unsetup();
7505 void kvm_arch_check_processor_compat(void *rtn)
7507 kvm_x86_ops->check_processor_compatibility(rtn);
7510 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7512 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7514 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7516 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7518 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7521 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7523 return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7526 struct static_key kvm_no_apic_vcpu __read_mostly;
7528 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7534 BUG_ON(vcpu->kvm == NULL);
7537 vcpu->arch.pv.pv_unhalted = false;
7538 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7539 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7540 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7542 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7544 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7549 vcpu->arch.pio_data = page_address(page);
7551 kvm_set_tsc_khz(vcpu, max_tsc_khz);
7553 r = kvm_mmu_create(vcpu);
7555 goto fail_free_pio_data;
7557 if (irqchip_in_kernel(kvm)) {
7558 r = kvm_create_lapic(vcpu);
7560 goto fail_mmu_destroy;
7562 static_key_slow_inc(&kvm_no_apic_vcpu);
7564 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7566 if (!vcpu->arch.mce_banks) {
7568 goto fail_free_lapic;
7570 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7572 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7574 goto fail_free_mce_banks;
7579 vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7580 vcpu->arch.pv_time_enabled = false;
7582 vcpu->arch.guest_supported_xcr0 = 0;
7583 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7585 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7587 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7589 kvm_async_pf_hash_reset(vcpu);
7592 vcpu->arch.pending_external_vector = -1;
7596 fail_free_mce_banks:
7597 kfree(vcpu->arch.mce_banks);
7599 kvm_free_lapic(vcpu);
7601 kvm_mmu_destroy(vcpu);
7603 free_page((unsigned long)vcpu->arch.pio_data);
7608 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7612 kvm_pmu_destroy(vcpu);
7613 kfree(vcpu->arch.mce_banks);
7614 kvm_free_lapic(vcpu);
7615 idx = srcu_read_lock(&vcpu->kvm->srcu);
7616 kvm_mmu_destroy(vcpu);
7617 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7618 free_page((unsigned long)vcpu->arch.pio_data);
7619 if (!lapic_in_kernel(vcpu))
7620 static_key_slow_dec(&kvm_no_apic_vcpu);
7623 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7625 kvm_x86_ops->sched_in(vcpu, cpu);
7628 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7633 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7634 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7635 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7636 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7637 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7639 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7640 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7641 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7642 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7643 &kvm->arch.irq_sources_bitmap);
7645 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7646 mutex_init(&kvm->arch.apic_map_lock);
7647 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7649 pvclock_update_vm_gtod_copy(kvm);
7651 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7652 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7657 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7660 r = vcpu_load(vcpu);
7662 kvm_mmu_unload(vcpu);
7666 static void kvm_free_vcpus(struct kvm *kvm)
7669 struct kvm_vcpu *vcpu;
7672 * Unpin any mmu pages first.
7674 kvm_for_each_vcpu(i, vcpu, kvm) {
7675 kvm_clear_async_pf_completion_queue(vcpu);
7676 kvm_unload_vcpu_mmu(vcpu);
7678 kvm_for_each_vcpu(i, vcpu, kvm)
7679 kvm_arch_vcpu_free(vcpu);
7681 mutex_lock(&kvm->lock);
7682 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7683 kvm->vcpus[i] = NULL;
7685 atomic_set(&kvm->online_vcpus, 0);
7686 mutex_unlock(&kvm->lock);
7689 void kvm_arch_sync_events(struct kvm *kvm)
7691 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7692 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7693 kvm_free_all_assigned_devices(kvm);
7697 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7701 struct kvm_memslots *slots = kvm_memslots(kvm);
7702 struct kvm_memory_slot *slot, old;
7704 /* Called with kvm->slots_lock held. */
7705 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7708 slot = id_to_memslot(slots, id);
7710 if (WARN_ON(slot->npages))
7714 * MAP_SHARED to prevent internal slot pages from being moved
7717 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7718 MAP_SHARED | MAP_ANONYMOUS, 0);
7719 if (IS_ERR((void *)hva))
7720 return PTR_ERR((void *)hva);
7729 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7730 struct kvm_userspace_memory_region m;
7732 m.slot = id | (i << 16);
7734 m.guest_phys_addr = gpa;
7735 m.userspace_addr = hva;
7736 m.memory_size = size;
7737 r = __kvm_set_memory_region(kvm, &m);
7743 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7749 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7751 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7755 mutex_lock(&kvm->slots_lock);
7756 r = __x86_set_memory_region(kvm, id, gpa, size);
7757 mutex_unlock(&kvm->slots_lock);
7761 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7763 void kvm_arch_destroy_vm(struct kvm *kvm)
7765 if (current->mm == kvm->mm) {
7767 * Free memory regions allocated on behalf of userspace,
7768 * unless the the memory map has changed due to process exit
7771 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7772 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7773 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7775 kvm_iommu_unmap_guest(kvm);
7776 kfree(kvm->arch.vpic);
7777 kfree(kvm->arch.vioapic);
7778 kvm_free_vcpus(kvm);
7779 kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7782 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7783 struct kvm_memory_slot *dont)
7787 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7788 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7789 kvfree(free->arch.rmap[i]);
7790 free->arch.rmap[i] = NULL;
7795 if (!dont || free->arch.lpage_info[i - 1] !=
7796 dont->arch.lpage_info[i - 1]) {
7797 kvfree(free->arch.lpage_info[i - 1]);
7798 free->arch.lpage_info[i - 1] = NULL;
7803 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7804 unsigned long npages)
7808 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7813 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7814 slot->base_gfn, level) + 1;
7816 slot->arch.rmap[i] =
7817 kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7818 if (!slot->arch.rmap[i])
7823 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7824 sizeof(*slot->arch.lpage_info[i - 1]));
7825 if (!slot->arch.lpage_info[i - 1])
7828 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7829 slot->arch.lpage_info[i - 1][0].write_count = 1;
7830 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7831 slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7832 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7834 * If the gfn and userspace address are not aligned wrt each
7835 * other, or if explicitly asked to, disable large page
7836 * support for this slot
7838 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7839 !kvm_largepages_enabled()) {
7842 for (j = 0; j < lpages; ++j)
7843 slot->arch.lpage_info[i - 1][j].write_count = 1;
7850 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7851 kvfree(slot->arch.rmap[i]);
7852 slot->arch.rmap[i] = NULL;
7856 kvfree(slot->arch.lpage_info[i - 1]);
7857 slot->arch.lpage_info[i - 1] = NULL;
7862 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7865 * memslots->generation has been incremented.
7866 * mmio generation may have reached its maximum value.
7868 kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7871 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7872 struct kvm_memory_slot *memslot,
7873 const struct kvm_userspace_memory_region *mem,
7874 enum kvm_mr_change change)
7879 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7880 struct kvm_memory_slot *new)
7882 /* Still write protect RO slot */
7883 if (new->flags & KVM_MEM_READONLY) {
7884 kvm_mmu_slot_remove_write_access(kvm, new);
7889 * Call kvm_x86_ops dirty logging hooks when they are valid.
7891 * kvm_x86_ops->slot_disable_log_dirty is called when:
7893 * - KVM_MR_CREATE with dirty logging is disabled
7894 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7896 * The reason is, in case of PML, we need to set D-bit for any slots
7897 * with dirty logging disabled in order to eliminate unnecessary GPA
7898 * logging in PML buffer (and potential PML buffer full VMEXT). This
7899 * guarantees leaving PML enabled during guest's lifetime won't have
7900 * any additonal overhead from PML when guest is running with dirty
7901 * logging disabled for memory slots.
7903 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7904 * to dirty logging mode.
7906 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7908 * In case of write protect:
7910 * Write protect all pages for dirty logging.
7912 * All the sptes including the large sptes which point to this
7913 * slot are set to readonly. We can not create any new large
7914 * spte on this slot until the end of the logging.
7916 * See the comments in fast_page_fault().
7918 if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7919 if (kvm_x86_ops->slot_enable_log_dirty)
7920 kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7922 kvm_mmu_slot_remove_write_access(kvm, new);
7924 if (kvm_x86_ops->slot_disable_log_dirty)
7925 kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7929 void kvm_arch_commit_memory_region(struct kvm *kvm,
7930 const struct kvm_userspace_memory_region *mem,
7931 const struct kvm_memory_slot *old,
7932 const struct kvm_memory_slot *new,
7933 enum kvm_mr_change change)
7935 int nr_mmu_pages = 0;
7937 if (!kvm->arch.n_requested_mmu_pages)
7938 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7941 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7944 * Dirty logging tracks sptes in 4k granularity, meaning that large
7945 * sptes have to be split. If live migration is successful, the guest
7946 * in the source machine will be destroyed and large sptes will be
7947 * created in the destination. However, if the guest continues to run
7948 * in the source machine (for example if live migration fails), small
7949 * sptes will remain around and cause bad performance.
7951 * Scan sptes if dirty logging has been stopped, dropping those
7952 * which can be collapsed into a single large-page spte. Later
7953 * page faults will create the large-page sptes.
7955 if ((change != KVM_MR_DELETE) &&
7956 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7957 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7958 kvm_mmu_zap_collapsible_sptes(kvm, new);
7961 * Set up write protection and/or dirty logging for the new slot.
7963 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7964 * been zapped so no dirty logging staff is needed for old slot. For
7965 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7966 * new and it's also covered when dealing with the new slot.
7968 * FIXME: const-ify all uses of struct kvm_memory_slot.
7970 if (change != KVM_MR_DELETE)
7971 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7974 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7976 kvm_mmu_invalidate_zap_all_pages(kvm);
7979 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7980 struct kvm_memory_slot *slot)
7982 kvm_mmu_invalidate_zap_all_pages(kvm);
7985 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
7987 if (!list_empty_careful(&vcpu->async_pf.done))
7990 if (kvm_apic_has_events(vcpu))
7993 if (vcpu->arch.pv.pv_unhalted)
7996 if (atomic_read(&vcpu->arch.nmi_queued))
7999 if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8002 if (kvm_arch_interrupt_allowed(vcpu) &&
8003 kvm_cpu_has_interrupt(vcpu))
8009 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8011 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8012 kvm_x86_ops->check_nested_events(vcpu, false);
8014 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8017 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8019 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8022 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8024 return kvm_x86_ops->interrupt_allowed(vcpu);
8027 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8029 if (is_64_bit_mode(vcpu))
8030 return kvm_rip_read(vcpu);
8031 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8032 kvm_rip_read(vcpu));
8034 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8036 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8038 return kvm_get_linear_rip(vcpu) == linear_rip;
8040 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8042 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8044 unsigned long rflags;
8046 rflags = kvm_x86_ops->get_rflags(vcpu);
8047 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8048 rflags &= ~X86_EFLAGS_TF;
8051 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8053 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8055 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8056 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8057 rflags |= X86_EFLAGS_TF;
8058 kvm_x86_ops->set_rflags(vcpu, rflags);
8061 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8063 __kvm_set_rflags(vcpu, rflags);
8064 kvm_make_request(KVM_REQ_EVENT, vcpu);
8066 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8068 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8072 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8076 r = kvm_mmu_reload(vcpu);
8080 if (!vcpu->arch.mmu.direct_map &&
8081 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8084 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8087 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8089 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8092 static inline u32 kvm_async_pf_next_probe(u32 key)
8094 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8097 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8099 u32 key = kvm_async_pf_hash_fn(gfn);
8101 while (vcpu->arch.apf.gfns[key] != ~0)
8102 key = kvm_async_pf_next_probe(key);
8104 vcpu->arch.apf.gfns[key] = gfn;
8107 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8110 u32 key = kvm_async_pf_hash_fn(gfn);
8112 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8113 (vcpu->arch.apf.gfns[key] != gfn &&
8114 vcpu->arch.apf.gfns[key] != ~0); i++)
8115 key = kvm_async_pf_next_probe(key);
8120 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8122 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8125 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8129 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8131 vcpu->arch.apf.gfns[i] = ~0;
8133 j = kvm_async_pf_next_probe(j);
8134 if (vcpu->arch.apf.gfns[j] == ~0)
8136 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8138 * k lies cyclically in ]i,j]
8140 * |....j i.k.| or |.k..j i...|
8142 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8143 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8148 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8151 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8155 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8156 struct kvm_async_pf *work)
8158 struct x86_exception fault;
8160 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8161 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8163 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8164 (vcpu->arch.apf.send_user_only &&
8165 kvm_x86_ops->get_cpl(vcpu) == 0))
8166 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8167 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8168 fault.vector = PF_VECTOR;
8169 fault.error_code_valid = true;
8170 fault.error_code = 0;
8171 fault.nested_page_fault = false;
8172 fault.address = work->arch.token;
8173 kvm_inject_page_fault(vcpu, &fault);
8177 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8178 struct kvm_async_pf *work)
8180 struct x86_exception fault;
8182 trace_kvm_async_pf_ready(work->arch.token, work->gva);
8183 if (work->wakeup_all)
8184 work->arch.token = ~0; /* broadcast wakeup */
8186 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8188 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8189 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8190 fault.vector = PF_VECTOR;
8191 fault.error_code_valid = true;
8192 fault.error_code = 0;
8193 fault.nested_page_fault = false;
8194 fault.address = work->arch.token;
8195 kvm_inject_page_fault(vcpu, &fault);
8197 vcpu->arch.apf.halted = false;
8198 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8201 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8203 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8206 return !kvm_event_needs_reinjection(vcpu) &&
8207 kvm_x86_ops->interrupt_allowed(vcpu);
8210 void kvm_arch_start_assignment(struct kvm *kvm)
8212 atomic_inc(&kvm->arch.assigned_device_count);
8214 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8216 void kvm_arch_end_assignment(struct kvm *kvm)
8218 atomic_dec(&kvm->arch.assigned_device_count);
8220 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8222 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8224 return atomic_read(&kvm->arch.assigned_device_count);
8226 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8228 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8230 atomic_inc(&kvm->arch.noncoherent_dma_count);
8232 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8234 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8236 atomic_dec(&kvm->arch.noncoherent_dma_count);
8238 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8240 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8242 return atomic_read(&kvm->arch.noncoherent_dma_count);
8244 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8246 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8247 struct irq_bypass_producer *prod)
8249 struct kvm_kernel_irqfd *irqfd =
8250 container_of(cons, struct kvm_kernel_irqfd, consumer);
8252 if (kvm_x86_ops->update_pi_irte) {
8253 irqfd->producer = prod;
8254 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8255 prod->irq, irqfd->gsi, 1);
8261 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8262 struct irq_bypass_producer *prod)
8265 struct kvm_kernel_irqfd *irqfd =
8266 container_of(cons, struct kvm_kernel_irqfd, consumer);
8268 if (!kvm_x86_ops->update_pi_irte) {
8269 WARN_ON(irqfd->producer != NULL);
8273 WARN_ON(irqfd->producer != prod);
8274 irqfd->producer = NULL;
8277 * When producer of consumer is unregistered, we change back to
8278 * remapped mode, so we can re-use the current implementation
8279 * when the irq is masked/disabed or the consumer side (KVM
8280 * int this case doesn't want to receive the interrupts.
8282 ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8284 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8285 " fails: %d\n", irqfd->consumer.token, ret);
8288 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8289 uint32_t guest_irq, bool set)
8291 if (!kvm_x86_ops->update_pi_irte)
8294 return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8297 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8306 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8307 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8310 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8311 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8312 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8313 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);