1 ;;; Intel IA-64 CPU description. -*- Scheme -*-
2 ;;; Copyright (C) 2000 Red Hat, Inc.
3 ;;; This file is part of CGEN.
4 ;;; See file COPYING.CGEN for details.
6 (include "simplify.inc")
9 ;;; Architecture and cpu family definitions.
13 (comment "Intel IA-64 architecture")
22 ;; Each instruction in the 128-bit bundle is 41 bits wide.
23 (base-insn-bitsize 41)
25 ;; Each bundle is 3 insns wide.
28 ;; ??? How to specify "lots", as that's what the architecture's
32 ;; Initial bit numbers to decode by.
33 (decode-assist (40 39 38 37))
38 (comment "Intel IA-64 family")
46 ;; We need 64-bit host support.
47 (set! INT (mode:add! 'INT (mode:lookup 'DI)))
48 (set! UINT (mode:add! 'UINT (mode:lookup 'UDI)))
50 ;; ??? This shouldn't be necessary, IMO.
51 (set! WI (mode:add! 'WI (mode:lookup 'DI)))
52 (set! UWI (mode:add! 'UWI (mode:lookup 'UDI)))
53 (set! AI (mode:add! 'AI (mode:lookup 'UDI)))
54 (set! IAI (mode:add! 'IAI (mode:lookup 'UDI)))
61 (comment "Intel IA-64 processors")
65 ; ??? Incomplete. Pipeline and unit info wrong.
69 (comment "Intel Itanium processor")
71 (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
72 (unit u-exec "Execution Unit" () 1 1
78 ;;; These are used to mark instructions so that we can decode the
79 ;;; dependancy violation data in Intel's tables.
88 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
90 I1 I2 I3 I4 I5 I6 I7 I8 I9 I10
91 I11 I12 I13 I14 I15 I16 I17 I18 I19 I20
92 I21 I22 I23 I24 I25 I26 I27 I28 I29
94 M1 M2 M3 M4 M5 M6 M7 M8 M9 M10
95 M11 M12 M13 M14 M15 M16 M17 M18 M19 M20
96 M21 M22 M23 M24 M25 M26 M27 M28 M29 M30
97 M31 M32 M33 M34 M35 M36 M37 M38 M39 M40
98 M41 M42 M43 M44 M45 M46
100 B1 B2 B3 B4 B5 B6 B7 B8 B9
102 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10
108 ;; ??? NONE isn't a valid value, but non-FP insns obviously can't have
109 ;; a valid value either.
115 (values NONE s0 s1 s2 s3)
133 (values NONE unc or and or.andcm orcm andcm and.orcm)
137 ;; Field AR3 references a register field.
138 ;; Field CR3 references a register field.
139 ;; Field ireg references a register field.
141 ;;; ??? IA-64 specific instruction attributes:
143 ;;; FIRST Must be at the beginning of an instruction group.
144 ;;; SLOT2 Must be in slot 2 on a bundle.
145 ;;; LAST Must be at the end of an instruction group.
146 ;;; I_IN_MLI Insn is allowed in I slot of MLI.
147 ;;; PRIV Privileged instruction.
148 ;;; NO_PRED Insn cannot be predicated.
151 ;;; Instruction fields.
153 ;;; ??? This is confusing (at least to me) -- note that we specify the _top_
154 ;;; of the field and a length.
156 ;;; ??? There are only two fields used nearly universally. But the
157 ;;; instruction formats are very regular in the sense that the same
158 ;;; field specifications are re-used many times. So we just have the
159 ;;; raw fields here first.
161 ;; Fields used by most instructions.
162 (dnf f-opcode "major opcode" () 40 4)
163 (dnf f-qp "qualifying predicate" () 5 6)
165 ;; Random parts used by the 109 (!) instruction formats.
166 (dnf f-36-6 "6 @ 36" () 36 6)
167 (df f-36-1s "1 @ 36, signed" () 36 1 INT #f #f)
168 (dnf f-36-1 "1 @ 36" () 36 1)
169 (dnf f-35-9 "9 @ 35" () 35 9)
170 (dnf f-35-6 "6 @ 35" () 35 6)
171 (dnf f-35-3 "3 @ 35" () 35 3)
172 (dnf f-35-2 "2 @ 35" () 35 2)
173 (dnf f-35-1 "1 @ 35" () 35 1)
174 (dnf f-34-2 "2 @ 34" () 34 2)
175 (dnf f-33-1 "1 @ 33" () 33 1)
176 (dnf f-32-27 "27 @ 32" () 32 27)
177 (dnf f-32-20 "20 @ 32" () 32 20)
178 (dnf f-32-13 "13 @ 32" () 32 13)
179 (dnf f-32-9 "9 @ 32" () 32 9)
180 (dnf f-32-6 "6 @ 32" () 32 6)
181 (dnf f-32-4 "4 @ 32" () 32 4)
182 (dnf f-32-2 "2 @ 32" () 32 2)
183 (dnf f-32-1 "1 @ 32" () 32 1)
184 (dnf f-31-8 "8 @ 31" () 31 8)
185 (dnf f-31-2 "2 @ 31" () 31 2)
186 (dnf f-30-4 "4 @ 30" () 30 4)
187 (dnf f-30-19 "19 @ 30" () 30 19)
188 (dnf f-29-2 "2 @ 29" () 29 2)
189 (dnf f-28-2 "2 @ 28" () 28 2)
190 (dnf f-27-8 "8 @ 27" () 27 8)
191 (dnf f-27-4 "4 @ 27" () 27 4)
192 (dnf f-27-3 "3 @ 27" () 27 3)
193 (dnf f-27-1 "1 @ 27" () 27 1)
194 (dnf f-26-21 "21 @ 26" () 26 21)
195 (dnf f-26-11 "11 @ 26" () 26 11)
196 (dnf f-26-7 "7 @ 26" () 26 7)
197 (dnf f-26-5 "5 @ 26" () 26 5)
198 (dnf f-26-1 "1 @ 26" () 26 1)
199 (dnf f-25-20 "20 @ 25" () 25 20)
200 (dnf f-25-6 "6 @ 25" () 25 6)
201 (dnf f-24-5 "5 @ 24" () 24 5)
202 (dnf f-23-4 "4 @ 23" () 23 4)
203 (dnf f-23-1 "1 @ 23" () 23 1)
204 (dnf f-22-1 "1 @ 22" () 22 1)
205 (dnf f-21-2 "2 @ 21" () 21 2)
206 (dnf f-21-1 "1 @ 21" () 21 1)
207 (dnf f-20-1 "1 @ 20" () 20 1)
208 (dnf f-19-7 "7 @ 19" () 19 7)
209 (dnf f-19-6 "6 @ 19" () 19 6)
210 (dnf f-19-4 "4 @ 19" () 19 4)
211 (dnf f-19-1 "1 @ 19" () 19 1)
212 (dnf f-18-5 "5 @ 18" () 18 5)
213 (dnf f-15-3 "3 @ 15" () 15 3)
214 (dnf f-15-1 "1 @ 15" () 15 1)
215 (dnf f-14-2 "2 @ 14" () 14 2)
216 (dnf f-13-1 "1 @ 13" () 13 1)
217 (dnf f-12-7 "7 @ 12" () 12 7)
218 (dnf f-12-1 "1 @ 12" () 12 1)
219 (dnf f-11-6 "6 @ 11" () 11 6)
220 (dnf f-11-3 "3 @ 11" () 11 3)
221 (dnf f-8-3 "3 @ 8" () 8 3)
223 ;; The extra field for movl
224 (dnf f-81-41 "41 @ 81" () 81 41)
226 ;; Virtual fields of the broken up constants.
227 (dnmf fv-sint8 "i8 for A3 A8 I27 M30"
231 (sequence () ; insert
232 (set (ifield f-36-1s) (srl (ifield fv-sint8) (const 7)))
233 (set (ifield f-19-7) (and (ifield fv-sint8) (const #x7f)))
235 (sequence () ; extract
236 (set (ifield fv-sint8)
237 (or (sll (ifield f-36-1s) (const 7))
242 (dnmf fv-sint9a "i9 for M3 M8 M15"
244 (f-36-1s f-27-1 f-19-7)
245 (sequence () ; insert
246 (set (ifield f-36-1s) (srl (ifield fv-sint9a) (const 8)))
248 (and (srl (ifield fv-sint9a) (const 7)) (const 1)))
249 (set (ifield f-19-7) (and (ifield fv-sint9a) (const #x7f)))
251 (sequence () ; extract
252 (set (ifield fv-sint9a)
253 (or (sll (ifield f-36-1s) (const 8))
254 (or (sll (ifield f-27-1) (const 7))
259 (dnmf fv-sint9b "i9 for M5 M10"
261 (f-36-1s f-27-1 f-12-7)
262 (sequence () ; insert
263 (set (ifield f-36-1s) (srl (ifield fv-sint9b) (const 8)))
265 (and (srl (ifield fv-sint9b) (const 7)) (const 1)))
266 (set (ifield f-12-7) (and (ifield fv-sint9b) (const #x7f)))
268 (sequence () ; extract
269 (set (ifield fv-sint9b)
270 (or (sll (ifield f-36-1s) (const 8))
271 (or (sll (ifield f-27-1) (const 7))
276 (dnmf fv-sint14 "i14 for A4"
278 (f-36-1s f-32-6 f-19-7)
279 (sequence () ; insert
280 (set (ifield f-36-1s) (srl (ifield fv-sint14) (const 13)))
282 (and (srl (ifield fv-sint14) (const 7)) (const #x3f)))
283 (set (ifield f-19-7) (and (ifield fv-sint14) (const #x7f)))
285 (sequence () ; extract
286 (set (ifield fv-sint14)
287 (or (sll (ifield f-36-1s) (const 13))
288 (or (sll (ifield f-32-6) (const 7))
293 (dnmf fv-sint17 "mask17 for I23"
295 (f-36-1s f-31-8 f-12-7)
296 (sequence () ; insert
297 (set (ifield f-36-1s) (srl (ifield fv-sint17) (const 16)))
299 (and (srl (ifield fv-sint17) (const 8)) (const #xff)))
301 (and (srl (ifield fv-sint17) (const 1)) (const #x7f)))
303 (sequence () ; extract
304 (set (ifield fv-sint17)
305 (or (sll (ifield f-36-1s) (const 16))
306 (or (sll (ifield f-31-8) (const 8))
311 (dnmf fv-sint22 "i22 for A5"
313 (f-36-1s f-35-9 f-26-5 f-19-7)
314 (sequence () ; insert
315 (set (ifield f-36-1s) (srl (ifield fv-sint22) (const 21)))
317 (and (srl (ifield fv-sint22) (const 16)) (const #x1f)))
319 (and (srl (ifield fv-sint22) (const 7)) (const #x1ff)))
320 (set (ifield f-19-7) (and (ifield fv-sint22) (const #x7f)))
322 (sequence () ; extract
323 (set (ifield fv-sint22)
324 (or (or (sll (ifield f-36-1s) (const 21))
325 (sll (ifield f-26-5) (const 16)))
326 (or (sll (ifield f-35-9) (const 7))
331 (dnmf fv-sint44 "i44 for I24"
334 (sequence () ; insert
335 (set (ifield f-36-1s) (srl (ifield fv-sint44) (const 43)))
337 (and (srl (ifield fv-sint44) (const 16))
340 (sequence () ; extract
341 (set (ifield fv-sint44)
342 (or (sll (ifield f-36-1s) (const 43))
343 (sll (ifield f-32-27) (const 16))))
347 (dnmf fv-sint64 "i64 for I18"
349 (f-81-41 f-36-1s f-35-9 f-26-5 f-21-1 f-19-7)
350 (sequence () ; insert
351 (set (ifield f-36-1s) (srl (ifield fv-sint64) (const 63)))
352 (set (ifield f-81-41)
353 (and (srl (ifield fv-sint64) (const 22))
354 (const #x1fffffffff)))
356 (and (srl (ifield fv-sint64) (const 21)) (const 1)))
358 (and (srl (ifield fv-sint64) (const 16)) (const #x1f)))
360 (and (srl (ifield fv-sint64) (const 7)) (const #x1ff)))
361 (set (ifield f-19-7) (and (ifield fv-sint64) (const #x7f)))
363 (sequence () ; extract
364 (set (ifield fv-sint64)
365 (or (or (or (sll (ifield f-36-1s) (const 63))
366 (sll (ifield f-81-41) (const 22)))
367 (or (sll (ifield f-21-1) (const 21))
368 (sll (ifield f-26-5) (const 16))))
369 (or (sll (ifield f-35-9) (const 7))
374 (dnmf fv-uint21 "u21 for I19 M37 F15"
377 (sequence () ; insert
378 (set (ifield f-36-1) (srl (ifield fv-uint21) (const 20)))
379 (set (ifield f-25-20) (and (ifield fv-uint21) (const #xfffff)))
381 (sequence () ; extract
382 (set (ifield fv-uint21)
383 (or (sll (ifield f-36-1) (const 20))
388 (dnmf fv-uint24 "u24 for M44"
390 (f-36-1 f-32-2 f-26-21)
391 (sequence () ; insert
392 (set (ifield f-36-1) (srl (ifield fv-uint24) (const 23)))
394 (and (srl (ifield fv-uint24) (const 21)) (const 3)))
395 (set (ifield f-26-21)
396 (and (ifield fv-uint24) (const #x1fffff)))
398 (sequence () ; extract
399 (set (ifield fv-uint24)
400 (or (sll (ifield f-36-1) (const 23))
401 (or (sll (ifield f-32-2) (const 21))
406 (dnmf fv-tgt25a "target25 for I20 M20 M21"
408 (f-36-1s f-32-13 f-12-7)
409 (sequence () ; insert
410 ;; ??? Wherefore right shift.
411 (set (ifield f-36-1s) (srl (ifield fv-tgt25a) (const 20)))
412 (set (ifield f-32-13)
413 (and (srl (ifield fv-tgt25a) (const 7)) (const #x1fff)))
414 (set (ifield f-12-7) (and (ifield fv-tgt25a) (const #x7f)))
416 (sequence () ; extract
417 ;; ??? Where will pc be added.
418 ;; ??? Wherefore left shift.
419 (set (ifield fv-tgt25a)
420 (or (sll (ifield f-36-1s) (const 20))
421 (or (sll (ifield f-32-13) (const 7))
426 (dnmf fv-tgt25b "target25 for F14"
429 (sequence () ; insert
430 ;; ??? Wherefore right shift.
431 (set (ifield f-36-1s) (srl (ifield fv-tgt25b) (const 20)))
432 (set (ifield f-25-20) (and (ifield fv-tgt25b) (const #xfffff)))
434 (sequence () ; extract
435 ;; ??? Where will pc be added.
436 ;; ??? Wherefore left shift.
437 (set (ifield fv-tgt25b)
438 (or (sll (ifield f-36-1) (const 20))
443 (dnmf fv-tgt25c "target25 for M22 M23 B1 B2 B3 B6"
446 (sequence () ; insert
447 ;; ??? Wherefore right shift.
448 (set (ifield f-36-1s) (srl (ifield fv-tgt25c) (const 20)))
449 (set (ifield f-32-20) (and (ifield fv-tgt25c) (const #xfffff)))
451 (sequence () ; extract
452 ;; ??? Where will pc be added.
453 ;; ??? Wherefore left shift.
454 (set (ifield fv-tgt25c)
455 (or (sll (ifield f-36-1s) (const 20))
460 (dnmf fv-tag13a "tag13 for I21"
463 (sequence () ; insert
464 ;; ??? Wherefore right shift.
465 (set (ifield f-32-9) (and (ifield fv-tag13a (const #x1ff))))
467 (sequence () ; extract
468 ;; ??? Where will pc be added.
469 ;; ??? Wherefore left shift.
470 (set (ifield fv-tag13a)
471 (sub (xor (ifield f-32-9) (const #x100)) (const #x100)))
475 (dnmf fv-tag13b "tag13 for B6 B7"
478 (sequence () ; insert
479 ;; ??? Wherefore right shift.
481 (and (sll (ifield fv-tag13b) (const 7)) (const 3)))
482 (set (ifield f-12-7) (and (ifield fv-tag13b) (const #x7f)))
484 (sequence () ; extract
485 ;; ??? Where will pc be added.
486 ;; ??? Wherefore left shift.
487 (set (ifield fv-tag13a)
488 (or (sll (sub (xor (ifield f-34-2) (const 2))
495 (dnmf fv-uint9 "u9 for F5"
498 (sequence () ; insert
499 (set (ifield f-26-7) (srl (ifield fv-uint9) (const 2)))
500 (set (ifield f-34-2) (and (ifield fv-uint9) (const 3)))
502 (sequence () ; extract
503 (set (ifield fv-uint9)
504 (or (sll (ifield f-26-7) (const 2))
509 ;; Fields with funny arithmetic
511 (df f-count2a "count2 for A2" () 28 2 UINT
512 ((value pc) (sub WI value (const 1)))
513 ((value pc) (add WI value (const 1)))
516 (df f-count2b "count2 for A10" () 28 2 UINT
518 (if WI (le value (const 2))
519 (sub WI value (const 1))
520 (error "invalid value for field count2b")))
521 ((value pc) (add WI value (const 1)))
524 (df f-count2c "count2 for I1" () 31 2 UINT
527 ((eq value (const 0)) (const 0))
528 ((eq value (const 7)) (const 1))
529 ((eq value (const 15)) (const 2))
530 ((eq value (const 16)) (const 3))
531 (else (error "invalid value for field count2c"))))
534 ((eq value (const 0)) (const 0))
535 ((eq value (const 1)) (const 7))
536 ((eq value (const 2)) (const 15))
537 ((eq value (const 3)) (const 16))))
540 (df f-ccount5 "ccount5 for I8" () 24 5 UINT
541 ((value pc) (sub WI (const 31) value))
542 ((value pc) (sub WI (const 31) value))
545 (df f-len4 "len4 for I15" () 30 4 UINT
546 ((value pc) (sub WI value (const 1)))
547 ((value pc) (add WI value (const 1)))
550 (df f-len6 "len6 for I11 I12 I13 I14" () 32 6 UINT
551 ((value pc) (sub WI value (const 1)))
552 ((value pc) (add WI value (const 1)))
555 (df f-cpos6a "cpos6 for I12 I13" () 25 6 UINT
556 ((value pc) (sub WI (const 63) value))
557 ((value pc) (sub WI (const 63) value))
560 (df f-cpos6b "cpos6 for I14" () 19 6 UINT
561 ((value pc) (sub WI (const 63) value))
562 ((value pc) (sub WI (const 63) value))
565 (df f-cpos6c "cpos6 for I15" () 36 6 UINT
566 ((value pc) (sub WI (const 63) value))
567 ((value pc) (sub WI (const 63) value))
570 (dnmf fv-inc3 "inc3 for M17" () INT
572 (sequence () ; insert
573 (set (ifield f-15-1) (lt (ifield fv-inc3) (const 0)))
574 (set (ifield f-14-2) (abs (ifield fv-inc3)))
576 (cond ((eq (ifield f-14-2) (const 1)) (const 3))
577 ((eq (ifield f-14-2) (const 4)) (const 2))
578 ((eq (ifield f-14-2) (const 8)) (const 1))
579 ((eq (ifield f-14-2) (const 16)) (const 0))
580 (else (error "invalid value for field inc3"))))
582 (sequence () ; extract
583 (set (ifield fv-inc3)
584 (mul (add (mul (neg (ifield f-15-1)) (const 2)) (const 1))
585 (if (eq (ifield f-14-2) (const 3))
587 (sll (const 1) (sub (const 4)
594 ;;; These entries list the elements of the raw hardware. They're also
595 ;;; used to provide tables and other elements of the assembly language.
597 ;; The normal h-uint only provides 32 bits of integer.
598 (dnh h-int64 "64-bit integer" ()
603 ;; ??? Intel calls this if IP, but from experience with the i960
604 ;; simulator using the name "ip", we know that gdb reacts badly.
605 (dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
607 (define-pmacro (build-decpair num) ((.dec num) num))
611 (comment "general registers")
613 (type register WI (128))
615 (.map build-decpair (.iota 128)))
618 ;; ??? Skip GR NaTs for now, since we're not simulating.
622 (comment "floating-point registers")
623 (type register XF (128))
624 (indices keyword "fr"
625 (.map build-decpair (.iota 128)))
630 (comment "branch registers")
632 (type register WI (8))
633 (indices keyword "br"
634 (.map build-decpair (.iota 8)))
639 (comment "application registers")
640 (type register WI (128))
641 (indices keyword "ar"
642 (.map build-decpair (.iota 128)))
647 (comment "predicate registers")
648 (type register BI (64))
649 (indices keyword "pr"
650 (.map build-decpair (.iota 64)))
655 (comment "control registers")
656 (type register WI (128))
657 (indices keyword "cr"
658 (.map build-decpair (.iota 128)))
661 ;; ??? CFM, PSR, PMD, CPUID
663 ;;; Instruction Operands.
665 ;;; These entries provide a layer between the assembler and the raw
666 ;;; hardware description, and are used to refer to hardware elements
667 ;;; in the semantic code. Usually there's a bit of over-specification,
668 ;;; but in more complicated instruction sets there isn't.
670 (dnop qp "qualifying predicate" () h-pr f-qp)
672 (dnop r1 "general register 1" () h-gr f-12-7)
673 (dnop r2 "general register 2" () h-gr f-19-7)
674 (dnop r3 "general register 3" () h-gr f-26-7)
675 (dnop r33 "general register 3 for A5" () h-gr f-21-2)
677 (dnop f1 "floating-point register 1" () h-fr f-12-7)
678 (dnop f2 "floating-point register 2" () h-fr f-19-7)
679 (dnop f3 "floating-point register 3" () h-fr f-26-7)
681 (dnop p1 "predicate register 1" () h-pr f-11-6)
682 (dnop p2 "predicate register 2" () h-pr f-32-6)
684 (dnop b1 "branch register 1" () h-br f-8-3)
685 (dnop b2 "branch register 2" () h-br f-15-3)
687 (dnop ar3 "application register 3" () h-ar f-26-7)
688 (dnop cr3 "control register 3" () h-cr f-26-7)
690 (dnop imm1 "imm1 for I14" () h-int64 f-36-1s)
691 (dnop imm8 "imm8 for A3 A8 I27 M30" () h-int64 fv-sint8)
692 (dnop imm9a "imm9 for M3 M8 M15" () h-int64 fv-sint9a)
693 (dnop imm9b "imm9 for M5 M10" () h-int64 fv-sint9b)
694 (dnop imm14 "imm14 for A4" () h-int64 fv-sint14)
695 (dnop imm17 "mask17 for I23" () h-int64 fv-sint17)
696 (dnop imm21 "imm21 for I19" () h-int64 fv-uint21)
697 (dnop imm22 "imm22 for A5" () h-int64 fv-sint22)
698 (dnop imm44 "imm44 for I24" () h-int64 fv-sint44)
699 (dnop imm64 "imm64 for I18" () h-int64 fv-sint64)
701 (dnop count2a "count2 for A2" () h-int64 f-count2a)
702 (dnop count2b "count2 for A10" () h-int64 f-count2b)
703 (dnop count2c "count2 for I1" () h-int64 f-count2c)
704 (dnop count5 "count5 for I6" () h-int64 f-18-5)
705 (dnop count6 "count6 for I10" () h-int64 f-32-6)
706 (dnop ccount5 "ccount5 for I8" () h-int64 f-ccount5)
708 (dnop len4 "len4 for I15" () h-int64 f-len4)
709 (dnop len6 "len6 for I11 I12 I13 I14" () h-int64 f-len6)
711 (dnop pos6 "pos6 for I11" () h-int64 f-19-6)
712 (dnop cpos6a "cpos6 for I12 I13" () h-int64 f-cpos6a)
713 (dnop cpos6b "cpos6 for I14" () h-int64 f-cpos6b)
714 (dnop cpos6c "cpos6 for I15" () h-int64 f-cpos6c)
716 (dnop inc3 "inc3 for M17" () h-int64 fv-inc3)
720 (comment "mbtype4 type for I3")
723 (handlers (parse "mbtype4")
727 (dnop mhtype8 "mhtype8 for I4" () h-int64 f-27-8)
729 (dnop tgt25a "tgt25 for I20 M20 M21" () h-int64 fv-tgt25a)
730 (dnop tgt25b "tgt25 for F14" () h-int64 fv-tgt25b)
731 (dnop tgt25c "tgt25 for M22 M23 B1 B2 B3 B6" () h-int64 fv-tgt25c)
733 (dnop tag13a "tag13 for I21" () h-int64 fv-tag13a)
739 (comment "ldhint completer")
742 (handlers (parse "ldhint")
748 (comment "sthint completer")
751 (handlers (parse "sthint")
757 (comment "mwh completer for mov_br")
760 (handlers (parse "mwh")
766 (comment "ih completer for mov_br")
769 (handlers (parse "ih")
775 (comment "lfhint for lfetch")
778 (handlers (parse "lfhint")
784 (comment "combined i,l,o,r for alloc")
787 (handlers (parse "sorsolsof")
791 ;; These are architecturally ignored bits, as opposed to architecturally
792 ;; reserved bits. I.e. we should assemble them in with zeros, but we should
793 ;; ignore them when disassembling.
795 (dnop ign_36_1 "ignore 1 @ 36" () h-int64 f-36-1)
796 (dnop ign_32_2 "ignore 2 @ 32" () h-int64 f-32-2)
797 (dnop ign_32_1 "ignore 1 @ 32" () h-int64 f-32-1)
798 (dnop ign_29_2 "ignore 2 @ 29" () h-int64 f-29-2)
799 (dnop ign_27_4 "ignore 4 @ 27" () h-int64 f-27-4)
800 (dnop ign_27_3 "ignore 3 @ 27" () h-int64 f-27-3)
801 (dnop ign_27_1 "ignore 1 @ 27" () h-int64 f-27-1)
802 (dnop ign_26_11 "ignore 11 @ 26" () h-int64 f-26-11)
803 (dnop ign_26_7 "ignore 7 @ 26" () h-int64 f-26-7)
804 (dnop ign_26_1 "ignore 1 @ 26" () h-int64 f-26-1)
805 (dnop ign_23_4 "ignore 4 @ 23" () h-int64 f-23-4)
806 (dnop ign_19_7 "ignore 7 @ 19" () h-int64 f-19-7)
807 (dnop ign_19_6 "ignore 6 @ 19" () h-int64 f-19-6)
808 (dnop ign_19_4 "ignore 4 @ 19" () h-int64 f-19-4)
809 (dnop ign_19_1 "ignore 1 @ 19" () h-int64 f-19-1)
810 (dnop ign_13_1 "ignore 1 @ 13" () h-int64 f-13-1)
811 (dnop ign_12_7 "ignore 7 @ 12" () h-int64 f-12-7)
813 ;; ??? Add more as needed.
815 ;;; "A" Format Instruction definitions.
817 (define-pmacro (I-A1 mnemonic maybe-p1 op x2a ve x4 x2b)
818 (dni (.sym mnemonic maybe-p1)
819 (.str "Integer ALU, reg-reg, " mnemonic maybe-p1)
821 (.str mnemonic " $r1=$r2,$r3" maybe-p1)
822 (+ (f-opcode op) (f-35-2 x2a) (f-33-1 ve) (f-32-4 x4) (f-28-2 x2b)
823 ign_36_1 r3 r2 r1 qp)
829 (I-A1 add "" 8 0 0 0 0)
830 (I-A1 add ",1" 8 0 0 0 1)
831 (I-A1 sub "" 8 0 0 1 1)
832 (I-A1 sub ",1" 8 0 0 1 0)
833 (I-A1 addp4 "" 8 0 0 2 0)
834 (I-A1 and "" 8 0 0 3 0)
835 (I-A1 andcm "" 8 0 0 3 1)
836 (I-A1 or "" 8 0 0 3 2)
837 (I-A1 xor "" 8 0 0 3 3)
839 (define-pmacro (I-A2 mnemonic op x2a ve x4)
841 (.str "Shift Left and Add, " mnemonic)
843 (.str mnemonic " $r1=$r2,$count2a,$r3")
844 (+ (f-opcode op) (f-35-2 x2a) (f-33-1 ve) (f-32-4 x4)
845 ign_36_1 count2a r3 r2 r1 qp)
851 (I-A2 shladd 8 0 0 4)
852 (I-A2 shladdp4 8 0 0 6)
854 (define-pmacro (I-A3 mnemonic op x2a ve x4 x2b)
855 (dni (.sym mnemonic "i")
856 (.str "Integer ALU, imm8-reg, " mnemonic)
858 (.str mnemonic " $r1=$imm8,$r3")
859 (+ (f-opcode op) (f-35-2 x2a) (f-33-1 ve) (f-32-4 x4) (f-28-2 x2b)
867 (I-A3 and 8 0 0 11 0)
868 (I-A3 andcm 8 0 0 11 1)
870 (I-A3 xor 8 0 0 11 3)
872 (define-pmacro (I-A4 mnemonic op x2a ve)
873 (dni (.str mnemonic "i")
874 (.str "Add imm14, " mnemonic)
876 (.str mnemonic " $r1=$imm14,$r3")
877 (+ (f-opcode op) (f-35-2 x2a) (f-33-1 ve)
887 (define-pmacro (I-A5 mnemonic op)
889 (.str "Add imm22, " mnemonic)
891 (.str mnemonic " $r1=$imm22,$r33")
892 (+ (f-opcode op) imm22 r33 r1 qp)
900 (define-pmacro (I-A6 mnemonic ctype-attr op x2 tb ta c)
902 (.str "Integer Compare, reg-reg, " mnemonic)
903 ((FORMAT A6) (FIELD-CTYPE ctype-attr))
904 (.str mnemonic " $p1,$p2=$r2,$r3")
905 (+ (f-opcode op) (f-36-1 tb) (f-35-2 x2) (f-33-1 ta) (f-12-1 c)
912 (define-pmacro (I-A6-cmp-cond-ctype cmp cond ctype op x2 ta c)
913 (I-A6 (.sym cmp "." cond
914 (.eval (if (eq? (string-length ctype) 0) "" "."))
916 (.eval (if (eq? (string-length ctype) 0) 'NONE (string->symbol ctype)))
920 (define-pmacro (I-A6-cmp cmp x2)
922 (I-A6-cmp-cond-ctype cmp lt "" 12 x2 0 0)
923 (I-A6-cmp-cond-ctype cmp ltu "" 13 x2 0 0)
924 (I-A6-cmp-cond-ctype cmp eq "" 14 x2 0 0)
926 (I-A6-cmp-cond-ctype cmp lt "unc" 12 x2 0 1)
927 (I-A6-cmp-cond-ctype cmp ltu "unc" 13 x2 0 1)
928 (I-A6-cmp-cond-ctype cmp eq "unc" 14 x2 0 1)
930 (I-A6-cmp-cond-ctype cmp eq "and" 12 x2 1 0)
931 (I-A6-cmp-cond-ctype cmp eq "or" 13 x2 1 0)
932 (I-A6-cmp-cond-ctype cmp eq "or.andcm" 14 x2 1 0)
934 (I-A6-cmp-cond-ctype cmp ne "and" 12 x2 1 1)
935 (I-A6-cmp-cond-ctype cmp ne "or" 13 x2 1 1)
936 (I-A6-cmp-cond-ctype cmp ne "or.andcm" 14 x2 1 1)
943 (define-pmacro (I-A7 mnemonic ctype-attr op x2 tb ta c)
945 (.str "Integer Compare, zero-reg, " mnemonic)
946 ((FORMAT A7) (FIELD-CTYPE ctype-attr))
947 (.str mnemonic " $p1,$p2=r0,$r3")
948 (+ (f-opcode op) (f-36-1 tb) (f-35-2 x2) (f-33-1 ta) (f-12-1 c)
949 p2 r3 (f-19-7 0) p1 qp)
955 (define-pmacro (I-A7-cmp-cond-ctype cmp cond ctype op x2 ta c)
956 (I-A7 (.sym cmp "." cond "." ctype) (.sym ctype) op x2 1 ta c)
959 (define-pmacro (I-A7-cmp-cond cmp cond x2 ta c)
961 (I-A7-cmp-cond-ctype cmp cond and 12 x2 ta c)
962 (I-A7-cmp-cond-ctype cmp cond or 13 x2 ta c)
963 (I-A7-cmp-cond-ctype cmp cond andcm 14 x2 ta c)
967 (define-pmacro (I-A7-cmp cmp x2)
969 (I-A7-cmp-cond cmp gt x2 0 0)
970 (I-A7-cmp-cond cmp le x2 0 1)
971 (I-A7-cmp-cond cmp ge x2 1 0)
972 (I-A7-cmp-cond cmp lt x2 1 1)
979 (define-pmacro (I-A8 mnemonic ctype-attr op x2 ta c)
981 (.str "Integer Compare, imm8-reg, " mnemonic)
982 ((FORMAT A7) (FIELD-CTYPE ctype-attr))
983 (.str mnemonic " $p1,$p2=$imm8,$r3")
984 (+ (f-opcode op) (f-35-2 x2) (f-33-1 ta) (f-12-1 c)
991 (define-pmacro (I-A8-cmp-cond-ctype cmp cond ctype op x2 ta c)
992 (I-A8 (.sym cmp "." cond
993 (.eval (if (eq? (string-length ctype) 0) "" "."))
995 (.eval (if (eq? (string-length ctype) 0) 'NONE (string->symbol ctype)))
999 (define-pmacro (I-A8-cmp cmp x2)
1001 (I-A8-cmp-cond-ctype cmp lt "" 12 x2 0 0)
1002 (I-A8-cmp-cond-ctype cmp ltu "" 13 x2 0 0)
1003 (I-A8-cmp-cond-ctype cmp eq "" 14 x2 0 0)
1005 (I-A8-cmp-cond-ctype cmp lt "unc" 12 x2 0 1)
1006 (I-A8-cmp-cond-ctype cmp ltu "unc" 13 x2 0 1)
1007 (I-A8-cmp-cond-ctype cmp eq "unc" 14 x2 0 1)
1009 (I-A8-cmp-cond-ctype cmp eq "and" 12 x2 1 0)
1010 (I-A8-cmp-cond-ctype cmp eq "or" 12 x2 1 0)
1011 (I-A8-cmp-cond-ctype cmp eq "or.andcm" 12 x2 1 0)
1013 (I-A8-cmp-cond-ctype cmp ne "and" 12 x2 1 1)
1014 (I-A8-cmp-cond-ctype cmp ne "or" 12 x2 1 1)
1015 (I-A8-cmp-cond-ctype cmp ne "or.andcm" 12 x2 1 1)
1022 (define-pmacro (I-A9 mnemonic op x2a za zb x4 x2b)
1023 (dni (.str mnemonic)
1024 (.str "Multimetia ALU, " mnemonic)
1026 (.str mnemonic " $r1=$r2,$r3")
1027 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-4 x4)
1028 (f-28-2 x2b) r3 r2 r1 qp)
1034 (I-A9 padd1 8 1 0 0 0 0)
1035 (I-A9 padd2 8 1 0 1 0 0)
1036 (I-A9 padd4 8 1 1 0 0 0)
1037 (I-A9 padd1.sss 8 1 0 0 0 1)
1038 (I-A9 padd2.sss 8 1 0 1 0 1)
1039 (I-A9 padd1.uuu 8 1 0 0 0 2)
1040 (I-A9 padd2.uuu 8 1 0 1 0 2)
1041 (I-A9 padd1.uus 8 1 0 0 0 3)
1042 (I-A9 padd2.uus 8 1 0 1 0 3)
1044 (I-A9 psub1 8 1 0 0 1 0)
1045 (I-A9 psub2 8 1 0 1 1 0)
1046 (I-A9 psub4 8 1 1 0 1 0)
1047 (I-A9 psub1.sss 8 1 0 0 1 1)
1048 (I-A9 psub2.sss 8 1 0 1 1 1)
1049 (I-A9 psub1.uuu 8 1 0 0 1 2)
1050 (I-A9 psub2.uuu 8 1 0 1 1 2)
1051 (I-A9 psub1.uus 8 1 0 0 1 3)
1052 (I-A9 psub2.uus 8 1 0 1 1 3)
1054 (I-A9 pavg1 8 1 0 0 2 2)
1055 (I-A9 pavg2 8 1 0 1 2 2)
1056 (I-A9 pavg1.raz 8 1 0 0 2 3)
1057 (I-A9 pavg2.raz 8 1 0 1 2 3)
1059 (I-A9 pavgsub1 8 1 0 0 3 2)
1060 (I-A9 pavgsub2 8 1 0 1 3 2)
1062 (I-A9 pcmp1.eq 8 1 0 0 9 0)
1063 (I-A9 pcmp2.eq 8 1 0 1 9 0)
1064 (I-A9 pcmp4.eq 8 1 1 0 9 0)
1065 (I-A9 pcmp1.gt 8 1 0 0 9 1)
1066 (I-A9 pcmp2.gt 8 1 0 1 9 1)
1067 (I-A9 pcmp4.gt 8 1 1 0 9 1)
1069 (define-pmacro (I-A10 mnemonic op x2a za zb x4)
1071 (.str "Multimedia Shift and Add, " mnemonic)
1073 (.str mnemonic " $r1=$r2,$count2b,$r3")
1074 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-4 x4)
1075 count2b r3 r2 r1 qp)
1081 (I-A10 pshladd2 8 1 0 1 4)
1082 (I-A10 pshradd2 8 1 0 1 6)
1084 ;;; "I" Format Instruction definitions.
1086 (define-pmacro (I-I1 mnemonic op za zb ve x2a x2b)
1088 (.str "Multimedia Multiply and Shift, " mnemonic)
1090 (.str mnemonic " $r1=$r2,$r3,$count2c")
1091 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
1092 (f-29-2 x2b) count2c ign_27_1 r3 r2 r1 qp)
1098 (I-I1 pmpyshr2 7 0 1 0 0 3)
1099 (I-I1 pmpyshr2.u 7 0 1 0 0 1)
1101 (define-pmacro (I-I2 mnemonic op za zb ve x2a x2b x2c)
1103 (.str "Multimedia Multiply/Mix/Pack/Unpack, " mnemonic)
1105 (.str mnemonic " $r1=$r2,$r3")
1106 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
1107 (f-31-2 x2c) (f-29-2 x2b) ign_27_1 r3 r2 r1 qp)
1113 (I-I2 pmpy2.r 7 0 1 0 2 1 3)
1114 (I-I2 pmpy2.l 7 0 1 0 2 3 3)
1116 (I-I2 mix1.r 7 0 0 0 2 0 2)
1117 (I-I2 mix2.r 7 0 1 0 2 0 2)
1118 (I-I2 mix4.r 7 1 0 0 2 0 2)
1119 (I-I2 mix1.l 7 0 0 0 2 2 2)
1120 (I-I2 mix2.l 7 0 1 0 2 2 2)
1121 (I-I2 mix4.l 7 1 0 0 2 2 2)
1123 (I-I2 pack2.uss 7 0 1 0 2 0 0)
1124 (I-I2 pack2.sss 7 0 1 0 2 2 0)
1125 (I-I2 pack4.sss 7 1 0 0 2 2 0)
1127 (I-I2 unpack1.h 7 0 0 0 2 0 1)
1128 (I-I2 unpack2.h 7 0 1 0 2 0 1)
1129 (I-I2 unpack4.h 7 1 0 0 2 0 1)
1130 (I-I2 unpack1.l 7 0 0 0 2 2 1)
1131 (I-I2 unpack2.l 7 0 1 0 2 2 1)
1132 (I-I2 unpack4.l 7 1 0 0 2 2 1)
1134 (I-I2 pmin1.u 7 0 0 0 2 1 0)
1135 (I-I2 pmax1.u 7 0 0 0 2 1 1)
1136 (I-I2 pmin2 7 0 1 0 2 3 0)
1137 (I-I2 pmax2 7 0 1 0 2 3 1)
1139 (I-I2 psad1 7 0 0 0 2 3 2)
1141 (define-pmacro (I-I3 mnemonic op za zb ve x2a x2b x2c)
1143 (.str "Multimedia Mux1, " mnemonic)
1145 (.str mnemonic " $r1=$r2,$mbtype4")
1146 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
1147 (f-31-2 x2c) (f-29-2 x2b) ign_27_4 mbtype4 r2 r1 qp)
1153 (I-I3 mux1 7 0 0 0 3 2 2)
1155 (define-pmacro (I-I4 mnemonic op za zb ve x2a x2b x2c)
1157 (.str "Multimedia Mux2, " mnemonic)
1159 (.str mnemonic " $r1=$r2,$mhtype8")
1160 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
1161 (f-31-2 x2c) (f-29-2 x2b) mhtype8 r2 r1 qp)
1167 (I-I4 mux2 7 0 1 0 3 2 2)
1169 (define-pmacro (I-I5 mnemonic op za zb ve x2a x2b x2c)
1171 (.str "Shift Right, variable, " mnemonic)
1173 (.str mnemonic " $r1=$r3,$r2")
1174 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
1175 (f-31-2 x2c) (f-29-2 x2b) ign_27_1 r3 r2 r1 qp)
1181 (I-I5 pshr2 7 0 1 0 0 2 0)
1182 (I-I5 pshr4 7 1 0 0 0 2 0)
1183 (I-I5 shr 7 1 1 0 0 2 0)
1185 (I-I5 pshr2.u 7 0 1 0 0 0 0)
1186 (I-I5 pshr4.u 7 1 0 0 0 0 0)
1187 (I-I5 shr.u 7 1 1 0 0 0 0)
1189 (define-pmacro (I-I6 mnemonic op za zb ve x2a x2b x2c)
1190 (dni (.sym mnemonic "i")
1191 (.str "Shift Right, fixed, " mnemonic)
1193 (.str mnemonic " $r1=$r3,$count5")
1194 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
1195 (f-31-2 x2c) (f-29-2 x2b) ign_27_1 r3 ign_19_1 count5 ign_13_1
1202 (I-I6 pshr2 7 0 1 0 1 3 0)
1203 (I-I6 pshr4 7 1 0 0 1 3 0)
1204 (I-I6 pshr2.u 7 0 1 0 1 1 0)
1205 (I-I6 pshr4.u 7 1 0 0 1 1 0)
1207 (define-pmacro (I-I7 mnemonic op za zb ve x2a x2b x2c)
1209 (.str "Shift Left, variable, " mnemonic)
1211 (.str mnemonic " $r1=$r2,$r3")
1212 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
1213 (f-31-2 x2c) (f-29-2 x2b) ign_27_1 r3 r2 r1 qp)
1219 (I-I7 pshl2 7 0 1 0 0 0 1)
1220 (I-I7 pshl4 7 1 0 0 0 0 1)
1221 (I-I7 shl 7 1 1 0 0 0 1)
1223 (define-pmacro (I-I8 mnemonic op za zb ve x2a x2b x2c)
1224 (dni (.sym mnemonic "i")
1225 (.str "Shift Left, fixed, " mnemonic)
1227 (.str mnemonic " $r1=$r2,$ccount5")
1228 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
1229 (f-31-2 x2c) (f-29-2 x2b) ign_27_3 ccount5 r2 r1 qp)
1235 (I-I8 pshl2 7 0 1 0 0 0 1)
1236 (I-I8 pshl4 7 1 0 0 0 0 1)
1238 (define-pmacro (I-I9 mnemonic op za zb ve x2a x2b x2c)
1240 (.str "Population Count, " mnemonic)
1242 (.str mnemonic " $r1=$r3")
1243 (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
1244 (f-31-2 x2c) (f-29-2 x2b) ign_27_1 r3 (f-19-7 0) r1 qp)
1250 (I-I9 popcnt 7 0 1 0 1 1 2)
1252 (define-pmacro (I-I10 mnemonic op x2 x)
1254 (.str "Shift Right Pair, " mnemonic)
1256 (.str mnemonic " $r1=$r2,$r3,$count6")
1257 (+ (f-opcode op) ign_36_1 (f-35-2 x2) (f-33-1 x) count6 r3 r2 r1 qp)
1265 (define-pmacro (I-I11 mnemonic op x2 x y)
1267 (.str "Extract, " mnemonic)
1269 (.str mnemonic " $r1=$r3,$pos6,$len6")
1270 (+ (f-opcode op) ign_36_1 (f-35-2 x2) (f-33-1 x) (f-13-1 y)
1277 (I-I11 extr.u 5 1 0 0)
1278 (I-I11 extr 5 1 0 1)
1280 (define-pmacro (I-I12 mnemonic op x2 x y)
1282 (.str "Zero and Deposit, " mnemonic)
1284 (.str mnemonic " $r1=$r2,$cpos6a,$len6")
1285 (+ (f-opcode op) ign_36_1 (f-35-2 x2) (f-33-1 x) (f-26-1 y)
1286 r2 cpos6a len6 r1 qp)
1292 (I-I12 dep.z 5 1 1 0)
1294 (define-pmacro (I-I13 mnemonic op x2 x y)
1295 (dni (.sym mnemonic "i")
1296 (.str "Zero and Deposit Immediate, " mnemonic)
1298 (.str mnemonic " $r1=$imm8,$cpos6a,$len6")
1299 (+ (f-opcode op) (f-35-2 x2) (f-33-1 x) (f-26-1 y)
1300 imm8 cpos6a len6 r1 qp)
1306 (I-I13 dep.z 5 1 1 0)
1308 (define-pmacro (I-I14 mnemonic op x2 x)
1309 (dni (.sym mnemonic "i")
1310 (.str "Deposit Immediate, " mnemonic)
1312 (.str mnemonic " $r1=$imm1,$r3,$cpos6b,$len6")
1313 (+ (f-opcode op) (f-35-2 x2) (f-33-1 x) ign_13_1
1314 imm1 r3 cpos6b len6 r1 qp)
1322 (define-pmacro (I-I15 mnemonic op)
1324 (.str "Deposit, " mnemonic)
1326 (.str mnemonic " $r1=$r2,$r3,$cpos6c,$len4")
1327 (+ (f-opcode op) cpos6c len4 r2 r3 r1 qp)
1335 (define-pmacro (I-I16 mnemonic ctype-attr op x2 ta tb y c)
1337 (.str "Test Bit, " mnemonic)
1338 ((FORMAT I16) (FIELD-CTYPE ctype-attr))
1339 (.str mnemonic " $p1,$p2=$r3,$pos6")
1340 (+ (f-opcode op) (f-36-1 tb) (f-35-2 x2) (f-33-1 ta) (f-13-1 y)
1341 (f-12-1 c) p2 r3 pos6 p1 qp)
1347 (define-pmacro (I-I16-ctype mnemonic ctype op x2 ta tb y c)
1348 (I-I16 (.sym mnemonic
1349 (.eval (if (eq? (string-length ctype) 0) "" "."))
1351 (.eval (if (eq? (string-length ctype) 0) 'NONE
1352 (string->symbol ctype)))
1356 (I-I16-ctype tbit.z "" 5 0 0 0 0 0)
1357 (I-I16-ctype tbit.z "unc" 5 0 0 0 0 1)
1358 (I-I16-ctype tbit.z "and" 5 0 0 1 0 0)
1359 (I-I16-ctype tbit.nz "and" 5 0 0 1 0 1)
1360 (I-I16-ctype tbit.z "or" 5 0 1 0 0 0)
1361 (I-I16-ctype tbit.nz "or" 5 0 1 0 0 1)
1362 (I-I16-ctype tbit.z "or.andcm" 5 0 1 1 0 0)
1363 (I-I16-ctype tbit.nz "or.andcm" 5 0 1 1 0 1)
1365 (define-pmacro (I-I17 mnemonic ctype-attr op x2 ta tb y c)
1367 (.str "Test Bit, " mnemonic)
1368 ((FORMAT I17) (FIELD-CTYPE ctype-attr))
1369 (.str mnemonic " $p1,$p2=$r3")
1370 (+ (f-opcode op) (f-36-1 tb) (f-35-2 x2) (f-33-1 ta) (f-13-1 y)
1371 (f-12-1 c) p2 r3 ign_19_6 p1 qp)
1377 (define-pmacro (I-I17-ctype mnemonic ctype op x2 ta tb y c)
1378 (I-I17 (.sym mnemonic
1379 (.eval (if (eq? (string-length ctype) 0) "" "."))
1381 (.eval (if (eq? (string-length ctype) 0) 'NONE
1382 (string->symbol ctype)))
1386 (I-I17-ctype tnat.z "" 5 0 0 0 0 0)
1387 (I-I17-ctype tnat.z "unc" 5 0 0 0 0 1)
1388 (I-I17-ctype tnat.z "and" 5 0 0 1 0 0)
1389 (I-I17-ctype tnat.nz "and" 5 0 0 1 0 1)
1390 (I-I17-ctype tnat.z "or" 5 0 1 0 0 0)
1391 (I-I17-ctype tnat.nz "or" 5 0 1 0 0 1)
1392 (I-I17-ctype tnat.z "or.andcm" 5 0 1 1 0 0)
1393 (I-I17-ctype tnat.nz "or.andcm" 5 0 1 1 0 1)
1395 (define-pmacro (I-I18 mnemonic op vc)
1397 (.str "Move Long Immediate, " mnemonic)
1399 (.str mnemonic " $r1=$imm64")
1400 (+ (f-opcode op) (f-20-1 vc) r1 imm64 qp)
1408 (define-pmacro (I-I19 mnemonic op x3 x6)
1410 (.str "Break/Nop, " mnemonic)
1412 (.str mnemonic " $imm21")
1413 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_26_1 imm21 qp)
1419 (I-I19 break.i 0 0 0)
1422 (define-pmacro (I-I20 mnemonic op x3)
1424 (.str "Integer Speculation Check, " mnemonic)
1426 (.str mnemonic " $r2,$tgt25a")
1427 (+ (f-opcode op) (f-35-3 x3) tgt25a r2 qp)
1435 (define-pmacro (I-I21 mnemonic op x3 x)
1436 (dni (.sym mnemonic _tbr)
1437 (.str "Move to BR, " mnemonic)
1440 "$movbr_mwh$movbr_ih $b1=$r2,$tag13a")
1441 (+ (f-opcode op) (f-35-3 x3) movbr_ih (f-22-1 x) movbr_mwh
1442 (f-12-1 x) (f-11-3 x3) ign_36_1 b1 r2 tag13a qp)
1449 (I-I21 mov.ret 0 7 1)
1451 (define-pmacro (I-I22 mnemonic op x3 x6)
1452 (dni (.sym mnemonic _fbr)
1453 (.str "Move from BR, " mnemonic)
1455 (.str mnemonic " $r1=$b2")
1456 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1 ign_26_11
1463 (I-I22 mov 0 0 #x31)
1465 (define-pmacro (I-I23 mnemonic op x3)
1466 (dni (.sym mnemonic _tpr)
1467 (.str "Move to PR, reg, " mnemonic)
1469 (.str mnemonic " pr=$r2,$imm17")
1470 (+ (f-opcode op) (f-35-3 x3) ign_32_1 ign_23_4 r2 imm17 qp)
1478 (define-pmacro (I-I24 mnemonic op x3)
1479 (dni (.sym mnemonic _tpri)
1480 (.str "Move to PR, imm, " mnemonic)
1482 (.str mnemonic " pr.rot=$imm44")
1483 (+ (f-opcode op) (f-35-3 x3) imm44 qp)
1491 (define-pmacro (I-I25 mnemonic src op x3 x6)
1492 (dni (.sym mnemonic _f src)
1493 (.str "Move from Pred/IP, " mnemonic)
1495 (.str mnemonic " $r1=" src)
1496 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_26_7 ign_19_7 r1 qp)
1502 (I-I25 mov ip 0 0 #x30)
1503 (I-I25 mov pr 0 0 #x33)
1505 (define-pmacro (I-I26 mnemonic op x3 x6)
1506 (dni (.sym mnemonic _tar)
1507 (.str "Move to AR, reg, " mnemonic)
1509 (.str mnemonic " $ar3=$r2")
1510 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1 ign_12_7 ar3 r2 qp)
1516 (I-I26 mov.i 0 0 #x2A)
1518 (define-pmacro (I-I27 mnemonic op x3 x6)
1519 (dni (.sym mnemonic _tari)
1520 (.str "Move to AR, imm, " mnemonic)
1522 (.str mnemonic " $ar3=$imm8")
1523 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_12_7 ar3 imm8 qp)
1529 (I-I27 mov.i 0 0 #x0A)
1531 (define-pmacro (I-I28 mnemonic op x3 x6)
1532 (dni (.sym mnemonic _far)
1533 (.str "Move from AR, " mnemonic)
1535 (.str mnemonic " $r1=$ar3")
1536 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1 ign_19_7 ar3 r1 qp)
1542 (I-I28 mov.i 0 0 #x32)
1544 (define-pmacro (I-I29 mnemonic op x3 x6)
1546 (.str "Sign/Zero Extend/Compute Zero Index, " mnemonic)
1548 (.str mnemonic " $r1=$r3")
1549 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1 ign_19_7 r3 r1 qp)
1555 (I-I29 zxt1 0 0 #x10)
1556 (I-I29 zxt2 0 0 #x11)
1557 (I-I29 zxt4 0 0 #x12)
1559 (I-I29 sxt1 0 0 #x14)
1560 (I-I29 sxt2 0 0 #x15)
1561 (I-I29 sxt4 0 0 #x16)
1563 (I-I29 czx1.l 0 0 #x18)
1564 (I-I29 czx2.l 0 0 #x19)
1565 (I-I29 czx1.r 0 0 #x1C)
1566 (I-I29 czx2.r 0 0 #x1D)
1568 ;;; "M" Format Instruction definitions.
1570 (define-pmacro (apply-ildspec macro mnemonic x6-2)
1572 (.apply macro (.splice mnemonic x6-2))
1573 (.apply macro (.splice (.sym mnemonic .s) (.eval (+ x6-2 #x04))))
1574 (.apply macro (.splice (.sym mnemonic .a) (.eval (+ x6-2 #x08))))
1575 (.apply macro (.splice (.sym mnemonic .sa) (.eval (+ x6-2 #x0C))))
1576 (.apply macro (.splice (.sym mnemonic .bias) (.eval (+ x6-2 #x10))))
1577 (.apply macro (.splice (.sym mnemonic .acq) (.eval (+ x6-2 #x14))))
1578 (.apply macro (.splice (.sym mnemonic .c.clr) (.eval (+ x6-2 #x20))))
1579 (.apply macro (.splice (.sym mnemonic .c.nc) (.eval (+ x6-2 #x24))))
1580 (.apply macro (.splice (.sym mnemonic .c.clr.acq) (.eval (+ x6-2 #x28))))
1584 (define-pmacro (I-M1 mnemonic op m x x6)
1586 (.str "Integer Load, " mnemonic)
1588 (.str mnemonic "$ldhint $r1=[$r3]")
1589 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
1597 (.pmacro (mnemonic x6)
1598 (I-M1 mnemonic 4 0 0 x6))
1602 (.pmacro (mnemonic x6)
1603 (I-M1 mnemonic 4 0 0 x6))
1607 (.pmacro (mnemonic x6)
1608 (I-M1 mnemonic 4 0 0 x6))
1612 (.pmacro (mnemonic x6)
1613 (I-M1 mnemonic 4 0 0 x6))
1616 (I-M1 ld8.fill 4 0 0 #x1B)
1618 (define-pmacro (I-M2 mnemonic op m x x6)
1619 (dni (.sym mnemonic .ir)
1620 (.str "Integer Load, incr reg, " mnemonic)
1622 (.str mnemonic "$ldhint $r1=[$r3],$r2")
1623 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
1631 (.pmacro (mnemonic x6)
1632 (I-M2 mnemonic 4 1 0 x6))
1636 (.pmacro (mnemonic x6)
1637 (I-M2 mnemonic 4 1 0 x6))
1641 (.pmacro (mnemonic x6)
1642 (I-M2 mnemonic 4 1 0 x6))
1646 (.pmacro (mnemonic x6)
1647 (I-M2 mnemonic 4 1 0 x6))
1650 (I-M2 ld8.fill 4 1 0 #x1B)
1652 (define-pmacro (I-M3 mnemonic op x6)
1653 (dni (.sym mnemonic .ii)
1654 (.str "Integer Load, incr imm, " mnemonic)
1656 (.str mnemonic "$ldhint $r1=[$r3],$imm9a")
1657 (+ (f-opcode op) (f-35-6 x6) ldhint r3 imm9a r1 qp)
1664 (.pmacro (mnemonic x6)
1665 (I-M3 mnemonic 5 x6))
1669 (.pmacro (mnemonic x6)
1670 (I-M3 mnemonic 5 x6))
1674 (.pmacro (mnemonic x6)
1675 (I-M3 mnemonic 5 x6))
1679 (.pmacro (mnemonic x6)
1680 (I-M3 mnemonic 5 x6))
1683 (I-M3 ld8.fill 5 #x1B)
1685 (define-pmacro (apply-istspec macro mnemonic x6-2)
1687 (.apply macro (.splice mnemonic x6-2))
1688 (.apply macro (.splice (.sym mnemonic .rel) (.eval (+ x6-2 #x04))))
1692 (define-pmacro (I-M4 mnemonic op m x x6)
1694 (.str "Integer Store, " mnemonic)
1696 (.str mnemonic "$sthint [$r3]=$r2")
1697 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
1698 sthint r3 r2 ign_12_7 qp)
1705 (.pmacro (mnemonic x6)
1706 (I-M4 mnemonic 4 0 0 x6))
1710 (.pmacro (mnemonic x6)
1711 (I-M4 mnemonic 4 0 0 x6))
1715 (.pmacro (mnemonic x6)
1716 (I-M4 mnemonic 4 0 0 x6))
1720 (.pmacro (mnemonic x6)
1721 (I-M4 mnemonic 4 0 0 x6))
1724 (I-M4 st8.spill 4 0 0 #x3B)
1726 (define-pmacro (I-M5 mnemonic op x6)
1727 (dni (.sym mnemonic .ii)
1728 (.str "Integer Store, incr imm, " mnemonic)
1730 (.str mnemonic "$sthint [$r3]=$r2,$imm9b")
1731 (+ (f-opcode op) (f-35-6 x6) sthint r3 imm9b r2 qp)
1738 (.pmacro (mnemonic x6)
1739 (I-M5 mnemonic 5 x6))
1743 (.pmacro (mnemonic x6)
1744 (I-M5 mnemonic 5 x6))
1748 (.pmacro (mnemonic x6)
1749 (I-M5 mnemonic 5 x6))
1753 (.pmacro (mnemonic x6)
1754 (I-M5 mnemonic 5 x6))
1757 (I-M5 st8.spill 5 #x3B)
1759 (define-pmacro (apply-fldspec macro mnemonic x6-2)
1761 (.apply macro (.splice mnemonic x6-2))
1762 (.apply macro (.splice (.sym mnemonic .s) (.eval (+ x6-2 #x04))))
1763 (.apply macro (.splice (.sym mnemonic .a) (.eval (+ x6-2 #x08))))
1764 (.apply macro (.splice (.sym mnemonic .sa) (.eval (+ x6-2 #x0C))))
1765 (.apply macro (.splice (.sym mnemonic .c.clr) (.eval (+ x6-2 #x20))))
1766 (.apply macro (.splice (.sym mnemonic .c.nc) (.eval (+ x6-2 #x24))))
1770 (define-pmacro (I-M6 mnemonic op m x x6)
1772 (.str "Floating-point Load, " mnemonic)
1774 (.str mnemonic "$ldhint $f1=[$r3]")
1775 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
1783 (.pmacro (mnemonic x6)
1784 (I-M6 mnemonic 6 0 0 x6))
1788 (.pmacro (mnemonic x6)
1789 (I-M6 mnemonic 6 0 0 x6))
1793 (.pmacro (mnemonic x6)
1794 (I-M6 mnemonic 6 0 0 x6))
1798 (.pmacro (mnemonic x6)
1799 (I-M6 mnemonic 6 0 0 x6))
1802 (I-M6 ldf.fill 6 0 0 #x1B)
1804 (define-pmacro (I-M7 mnemonic op m x x6)
1805 (dni (.sym mnemonic .ir)
1806 (.str "Floating-point Load, incr reg, " mnemonic)
1808 (.str mnemonic "$ldhint $f1=[$r3],$r2")
1809 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
1817 (.pmacro (mnemonic x6)
1818 (I-M7 mnemonic 6 1 0 x6))
1822 (.pmacro (mnemonic x6)
1823 (I-M7 mnemonic 6 1 0 x6))
1827 (.pmacro (mnemonic x6)
1828 (I-M7 mnemonic 6 1 0 x6))
1832 (.pmacro (mnemonic x6)
1833 (I-M7 mnemonic 6 1 0 x6))
1836 (I-M7 ldf.fill 6 1 0 #x1B)
1838 (define-pmacro (I-M8 mnemonic op x6)
1839 (dni (.sym mnemonic .ii)
1840 (.str "Floating-point Load, incr imm, " mnemonic)
1842 (.str mnemonic "$ldhint $f1=[$r3],$imm9a")
1843 (+ (f-opcode op) (f-35-6 x6) ldhint r3 imm9a f1 qp)
1850 (.pmacro (mnemonic x6)
1851 (I-M8 mnemonic 7 x6))
1855 (.pmacro (mnemonic x6)
1856 (I-M8 mnemonic 7 x6))
1860 (.pmacro (mnemonic x6)
1861 (I-M8 mnemonic 7 x6))
1865 (.pmacro (mnemonic x6)
1866 (I-M8 mnemonic 7 x6))
1869 (I-M8 ldf.fill 7 #x1B)
1871 (define-pmacro (I-M9 mnemonic op m x x6)
1873 (.str "Floating-point Store, " mnemonic)
1875 (.str mnemonic "$sthint [$r3]=$f2")
1876 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
1877 sthint r3 f2 ign_12_7 qp)
1883 (I-M9 stfs 6 0 0 #x32)
1884 (I-M9 stfd 6 0 0 #x33)
1885 (I-M9 stf8 6 0 0 #x31)
1886 (I-M9 stfe 6 0 0 #x30)
1887 (I-M9 stf.spill 6 0 0 #x3B)
1889 (define-pmacro (I-M10 mnemonic op x6)
1890 (dni (.sym mnemonic .ii)
1891 (.str "Floating-point Store, incr imm, " mnemonic)
1893 (.str mnemonic "$sthint [$r3]=$f2,$imm9b")
1894 (+ (f-opcode op) (f-35-6 x6) sthint r3 imm9b f2 qp)
1904 (I-M10 stf.spill 7 #x3B)
1906 (define-pmacro (I-M11 mnemonic op m x x6)
1908 (.str "Floating-point Load Pair, " mnemonic)
1910 (.str mnemonic "$ldhint $f1,$f2=[$r3]")
1911 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
1919 (.pmacro (mnemonic x6)
1920 (I-M11 mnemonic 6 0 1 x6))
1924 (.pmacro (mnemonic x6)
1925 (I-M11 mnemonic 6 0 1 x6))
1929 (.pmacro (mnemonic x6)
1930 (I-M11 mnemonic 6 0 1 x6))
1933 (define-pmacro (I-M12 mnemonic n op m x x6)
1935 (.str "Floating-point Load Pair, incr imm, " mnemonic)
1937 (.str mnemonic "$ldhint $f1,$f2=[$r3]," n)
1938 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
1946 (.pmacro (mnemonic x6)
1947 (I-M12 mnemonic 8 6 1 1 x6))
1951 (.pmacro (mnemonic x6)
1952 (I-M12 mnemonic 16 6 1 1 x6))
1956 (.pmacro (mnemonic x6)
1957 (I-M12 mnemonic 16 6 1 1 x6))
1960 (define-pmacro (apply-lftype macro mnemonic)
1962 (.apply macro (.splice mnemonic NONE #x2C))
1963 (.apply macro (.splice (.sym mnemonic .excl) NONE #x2D))
1964 (.apply macro (.splice (.sym mnemonic .fault) fault #x2E))
1965 (.apply macro (.splice (.sym mnemonic .fault.excl) fault #x2F))
1969 (define-pmacro (I-M13 mnemonic fault-attr op m x x6)
1970 (dni (.sym mnemonic)
1971 (.str "Line Prefetch, " mnemonic)
1972 ((FORMAT M13) (FIELD-LFTYPE fault-attr))
1973 (.str mnemonic "$lfhint [$r3]")
1974 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) lfhint (f-27-1 x)
1975 r3 ign_19_7 ign_12_7 qp)
1982 (.pmacro (mnemonic fault-attr x6)
1983 (I-M13 mnemonic fault-attr 6 0 0 x6))
1986 (define-pmacro (I-M14 mnemonic fault-attr op m x x6)
1987 (dni (.sym mnemonic .ir)
1988 (.str "Line Prefetch, incr reg" mnemonic)
1989 ((FORMAT M14) (FIELD-LFTYPE fault-attr))
1990 (.str mnemonic "$lfhint [$r3],$r2")
1991 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) lfhint (f-27-1 x)
1999 (.pmacro (mnemonic fault-attr x6)
2000 (I-M14 mnemonic fault-attr 6 0 0 x6))
2003 (define-pmacro (I-M15 mnemonic fault-attr op x6)
2004 (dni (.sym mnemonic .ii)
2005 (.str "Line Prefetch, incr imm" mnemonic)
2006 ((FORMAT M15) (FIELD-LFTYPE fault-attr))
2007 (.str mnemonic "$lfhint [$r3],$imm9a")
2008 (+ (f-opcode op) (f-35-6 x6) lfhint r3 imm9a ign_12_7 qp)
2015 (.pmacro (mnemonic fault-attr x6)
2016 (I-M15 mnemonic fault-attr 7 x6))
2019 (define-pmacro (I-M16 mnemonic extra op m x x6)
2021 (.str "Exchange/Compare and Exchange, " mnemonic)
2023 (.str mnemonic "$ldhint $r1=[$r3],$r2" extra)
2024 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
2031 (I-M16 cmpxchg1.acq ",ar.ccv" 4 0 1 #x00)
2032 (I-M16 cmpxchg2.acq ",ar.ccv" 4 0 1 #x01)
2033 (I-M16 cmpxchg4.acq ",ar.ccv" 4 0 1 #x02)
2034 (I-M16 cmpxchg8.acq ",ar.ccv" 4 0 1 #x03)
2036 (I-M16 cmpxchg1.rel ",ar.ccv" 4 0 1 #x04)
2037 (I-M16 cmpxchg2.rel ",ar.ccv" 4 0 1 #x05)
2038 (I-M16 cmpxchg4.rel ",ar.ccv" 4 0 1 #x06)
2039 (I-M16 cmpxchg8.rel ",ar.ccv" 4 0 1 #x07)
2041 (I-M16 xchg1.rel "" 4 0 1 #x08)
2042 (I-M16 xchg2.rel "" 4 0 1 #x09)
2043 (I-M16 xchg4.rel "" 4 0 1 #x0A)
2044 (I-M16 xchg8.rel "" 4 0 1 #x0B)
2046 (define-pmacro (I-M17 mnemonic op m x x6)
2048 (.str "Fetch and Add, " mnemonic)
2050 (.str mnemonic "$ldhint $r1=[$r3],$inc3")
2051 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
2052 ldhint r3 ign_19_4 inc3 r1 qp)
2058 (I-M17 fetchadd4.acq 4 0 1 #x12)
2059 (I-M17 fetchadd8.acq 4 0 1 #x13)
2060 (I-M17 fetchadd4.rel 4 0 1 #x16)
2061 (I-M17 fetchadd8.rel 4 0 1 #x17)
2063 (define-pmacro (I-M18 mnemonic op m x x6)
2065 (.str "Set FR, " mnemonic)
2067 (.str mnemonic " $f1=$r2")
2068 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
2069 ign_26_7 ign_29_2 r2 f1 qp)
2075 (I-M18 setf.sig 6 0 1 #x1C)
2076 (I-M18 setf.exp 6 0 1 #x1D)
2077 (I-M18 setf.s 6 0 1 #x1E)
2078 (I-M18 setf.d 6 0 1 #x1F)
2080 (define-pmacro (I-M19 mnemonic op m x x6)
2082 (.str "Get FR, " mnemonic)
2084 (.str mnemonic " $r1=$f2")
2085 (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
2086 ign_26_7 ign_29_2 f2 r1 qp)
2092 (I-M19 getf.sig 4 0 1 #x1C)
2093 (I-M19 getf.exp 4 0 1 #x1D)
2094 (I-M19 getf.s 4 0 1 #x1E)
2095 (I-M19 getf.d 4 0 1 #x1F)
2097 (define-pmacro (I-M20 mnemonic op x3)
2099 (.str "Integer Speculation Check, " mnemonic)
2101 (.str mnemonic " $r2,$tgt25a")
2102 (+ (f-opcode op) (f-35-3 x3) r2 tgt25a qp)
2110 (define-pmacro (I-M21 mnemonic op x3)
2111 (dni (.sym mnemonic .f)
2112 (.str "Floating-point Speculation Check, " mnemonic)
2114 (.str mnemonic " $f2,$tgt25a")
2115 (+ (f-opcode op) (f-35-3 x3) f2 tgt25a qp)
2123 (define-pmacro (I-M22 mnemonic op x3)
2125 (.str "Integer Advanced Load Check, " mnemonic)
2127 (.str mnemonic " $r1,$tgt25c")
2128 (+ (f-opcode op) (f-35-3 x3) tgt25c r1 qp)
2134 (I-M22 chk.a.nc 0 4)
2135 (I-M22 chk.a.clr 0 5)
2137 (define-pmacro (I-M23 mnemonic op x3)
2138 (dni (.sym mnemonic .f)
2139 (.str "Floating-point Advanced Load Check, " mnemonic)
2141 (.str mnemonic " $f1,$tgt25c")
2142 (+ (f-opcode op) (f-35-3 x3) tgt25c f1 qp)
2148 (I-M22 chk.a.nc 0 6)
2149 (I-M22 chk.a.clr 0 7)
2151 (define-pmacro (I-M24 mnemonic op x3 x4 x2)
2153 (.str "Sync/Fence/Serialize/ALAT Control, " mnemonic)
2156 (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4)
2157 ign_36_1 ign_26_7 ign_19_7 ign_12_7 qp)
2163 (I-M24 invala 0 0 0 1)
2166 (I-M24 mf.a 0 0 3 2)
2167 (I-M24 srlz.d 0 0 0 3)
2168 (I-M24 srlz.i 0 0 1 3)
2169 (I-M24 sync.i 0 0 3 3)
2171 (define-pmacro (I-M25 mnemonic op x3 x4 x2)
2173 (.str "RSE Control, " mnemonic)
2176 (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4)
2177 ign_36_1 ign_26_7 ign_19_7 ign_12_7 (f-qp 0))
2183 (I-M25 flushrs 0 0 #xC 0)
2184 (I-M25 loadrs 0 0 #xA 0)
2186 (define-pmacro (I-M26 mnemonic op x3 x4 x2)
2188 (.str "Integer ALAT Entry Invalidate, " mnemonic)
2190 (.str mnemonic " $r1")
2191 (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4)
2192 ign_36_1 ign_26_7 ign_19_7 r1 qp)
2198 (I-M26 invala.e 0 0 2 1)
2200 (define-pmacro (I-M27 mnemonic op x3 x4 x2)
2201 (dni (.sym mnemonic .f)
2202 (.str "Floating-point ALAT Entry Invalidate, " mnemonic)
2204 (.str mnemonic " $f1")
2205 (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4)
2206 ign_36_1 ign_26_7 ign_19_7 f1 qp)
2212 (I-M27 invala.e 0 0 3 1)
2214 (define-pmacro (I-M28 mnemonic op x3 x6)
2216 (.str "Flush Cache/Purge Translation Cache Entry, " mnemonic)
2218 (.str mnemonic " $r3")
2219 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6)
2220 ign_36_1 r3 ign_19_7 ign_12_7 qp)
2227 (I-M28 ptc.e 1 0 #x34)
2229 (define-pmacro (I-M29 mnemonic op x3 x6)
2230 (dni (.sym mnemonic _tar)
2231 (.str "Move to AR, reg, " mnemonic)
2233 (.str mnemonic " $ar3=$r2")
2234 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6)
2235 ign_36_1 ar3 r2 ign_12_7 qp)
2241 (I-M29 mov.m 1 0 #x2A)
2243 (define-pmacro (I-M30 mnemonic op x3 x4 x2)
2244 (dni (.sym mnemonic _tari)
2245 (.str "Move to AR, imm," mnemonic)
2247 (.str mnemonic " $ar3=$imm8")
2248 (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4)
2249 ar3 imm8 ign_12_7 qp)
2255 (I-M30 mov.m 0 0 8 2)
2257 (define-pmacro (I-M31 mnemonic op x3 x6)
2258 (dni (.sym mnemonic _far)
2259 (.str "Move from AR, " mnemonic)
2261 (.str mnemonic " $r1=$ar3")
2262 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1 ign_19_7 ar3 r1 qp)
2268 (I-M31 mov.m 1 0 #x22)
2270 (define-pmacro (I-M32 mnemonic op x3 x6)
2271 (dni (.sym mnemonic _tcr)
2272 (.str "Move to CR, " mnemonic)
2274 (.str mnemonic " $cr3=$r2")
2275 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6)
2276 ign_36_1 cr3 r2 ign_12_7 qp)
2282 (I-M32 mov 1 0 #x2C)
2284 (define-pmacro (I-M33 mnemonic op x3 x6)
2285 (dni (.sym mnemonic _fcr)
2286 (.str "Move from CR, " mnemonic)
2288 (.str mnemonic " $r1=$cr3")
2289 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6)
2290 ign_36_1 cr3 ign_19_7 r1 qp)
2296 (I-M33 mov 1 0 #x24)
2298 (define-pmacro (I-M34 mnemonic op x3)
2300 (.str "Allocate Register Stack Frame, " mnemonic)
2302 (.str mnemonic " $r1=ar.pfs,$sorsolsof")
2303 (+ (f-opcode op) (f-35-3 x3) ign_36_1 ign_32_2
2304 sorsolsof r1 (f-qp 0))
2312 (define-pmacro (I-M35 mnemonic which op x3 x6)
2313 (dni (.sym mnemonic _t which)
2314 (.str "Move to PSR, " mnemonic)
2316 (.str mnemonic " " which "=$r2")
2317 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1
2318 r2 ign_26_7 ign_12_7 qp)
2324 (I-M35 mov psr.l 1 0 #x2D)
2325 (I-M35 mov psr.um 1 0 #x29)
2327 (define-pmacro (I-M36 mnemonic which op x3 x6)
2328 (dni (.sym mnemonic _f which)
2329 (.str "Move from PSR, " mnemonic)
2331 (.str mnemonic " $r1=" which)
2332 (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1
2333 ign_26_7 ign_19_7 r1 qp)
2339 (I-M36 mov psr 1 0 #x25)
2340 (I-M36 mov psr.um 1 0 #x21)
2342 (define-pmacro (I-M37 mnemonic op x3 x4 x2)
2344 (.str "Break/Nop, " mnemonic)
2346 (.str mnemonic " $imm21")
2347 (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4) ign_26_1 imm21 qp)
2353 (I-M37 break.m 0 0 0 0)
2354 (I-M37 nop.m 0 0 1 0)