2 * Target-specific parts of the CPU object
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qapi/error.h"
24 #include "exec/target_page.h"
25 #include "hw/qdev-core.h"
26 #include "hw/qdev-properties.h"
27 #include "qemu/error-report.h"
28 #include "migration/vmstate.h"
29 #ifdef CONFIG_USER_ONLY
32 #include "hw/core/sysemu-cpu-ops.h"
33 #include "exec/address-spaces.h"
35 #include "sysemu/tcg.h"
36 #include "sysemu/kvm.h"
37 #include "sysemu/replay.h"
38 #include "exec/translate-all.h"
40 #include "hw/core/accel-cpu.h"
41 #include "trace/trace-root.h"
43 uintptr_t qemu_host_page_size;
44 intptr_t qemu_host_page_mask;
46 #ifndef CONFIG_USER_ONLY
47 static int cpu_common_post_load(void *opaque, int version_id)
49 CPUState *cpu = opaque;
51 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
52 version_id is increased. */
53 cpu->interrupt_request &= ~0x01;
56 /* loadvm has just updated the content of RAM, bypassing the
57 * usual mechanisms that ensure we flush TBs for writes to
58 * memory we've translated code from. So we must flush all TBs,
59 * which will now be stale.
66 static int cpu_common_pre_load(void *opaque)
68 CPUState *cpu = opaque;
70 cpu->exception_index = -1;
75 static bool cpu_common_exception_index_needed(void *opaque)
77 CPUState *cpu = opaque;
79 return tcg_enabled() && cpu->exception_index != -1;
82 static const VMStateDescription vmstate_cpu_common_exception_index = {
83 .name = "cpu_common/exception_index",
85 .minimum_version_id = 1,
86 .needed = cpu_common_exception_index_needed,
87 .fields = (VMStateField[]) {
88 VMSTATE_INT32(exception_index, CPUState),
93 static bool cpu_common_crash_occurred_needed(void *opaque)
95 CPUState *cpu = opaque;
97 return cpu->crash_occurred;
100 static const VMStateDescription vmstate_cpu_common_crash_occurred = {
101 .name = "cpu_common/crash_occurred",
103 .minimum_version_id = 1,
104 .needed = cpu_common_crash_occurred_needed,
105 .fields = (VMStateField[]) {
106 VMSTATE_BOOL(crash_occurred, CPUState),
107 VMSTATE_END_OF_LIST()
111 const VMStateDescription vmstate_cpu_common = {
112 .name = "cpu_common",
114 .minimum_version_id = 1,
115 .pre_load = cpu_common_pre_load,
116 .post_load = cpu_common_post_load,
117 .fields = (VMStateField[]) {
118 VMSTATE_UINT32(halted, CPUState),
119 VMSTATE_UINT32(interrupt_request, CPUState),
120 VMSTATE_END_OF_LIST()
122 .subsections = (const VMStateDescription*[]) {
123 &vmstate_cpu_common_exception_index,
124 &vmstate_cpu_common_crash_occurred,
130 void cpu_exec_realizefn(CPUState *cpu, Error **errp)
132 #ifndef CONFIG_USER_ONLY
133 CPUClass *cc = CPU_GET_CLASS(cpu);
137 if (!accel_cpu_realizefn(cpu, errp)) {
141 /* NB: errp parameter is unused currently */
143 tcg_exec_realizefn(cpu, errp);
145 #endif /* CONFIG_TCG */
147 #ifdef CONFIG_USER_ONLY
148 assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
149 qdev_get_vmsd(DEVICE(cpu))->unmigratable);
151 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
152 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
154 if (cc->sysemu_ops->legacy_vmsd != NULL) {
155 vmstate_register(NULL, cpu->cpu_index, cc->sysemu_ops->legacy_vmsd, cpu);
157 #endif /* CONFIG_USER_ONLY */
160 void cpu_exec_unrealizefn(CPUState *cpu)
162 #ifndef CONFIG_USER_ONLY
163 CPUClass *cc = CPU_GET_CLASS(cpu);
165 if (cc->sysemu_ops->legacy_vmsd != NULL) {
166 vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
168 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
169 vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
173 /* NB: errp parameter is unused currently */
175 tcg_exec_unrealizefn(cpu);
177 #endif /* CONFIG_TCG */
179 cpu_list_remove(cpu);
182 void cpu_exec_initfn(CPUState *cpu)
187 #ifndef CONFIG_USER_ONLY
188 cpu->thread_id = qemu_get_thread_id();
189 cpu->memory = get_system_memory();
190 object_ref(OBJECT(cpu->memory));
194 const char *parse_cpu_option(const char *cpu_option)
198 gchar **model_pieces;
199 const char *cpu_type;
201 model_pieces = g_strsplit(cpu_option, ",", 2);
202 if (!model_pieces[0]) {
203 error_report("-cpu option cannot be empty");
207 oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
209 error_report("unable to find CPU model '%s'", model_pieces[0]);
210 g_strfreev(model_pieces);
214 cpu_type = object_class_get_name(oc);
216 cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
217 g_strfreev(model_pieces);
221 #if defined(CONFIG_USER_ONLY)
222 void tb_invalidate_phys_addr(target_ulong addr)
225 tb_invalidate_phys_page_range(addr, addr + 1);
229 static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
231 tb_invalidate_phys_addr(pc);
234 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
240 if (!tcg_enabled()) {
244 RCU_READ_LOCK_GUARD();
245 mr = address_space_translate(as, addr, &addr, &l, false, attrs);
246 if (!(memory_region_is_ram(mr)
247 || memory_region_is_romd(mr))) {
250 ram_addr = memory_region_get_ram_addr(mr) + addr;
251 tb_invalidate_phys_page_range(ram_addr, ram_addr + 1);
254 static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
257 * There may not be a virtual to physical translation for the pc
258 * right now, but there may exist cached TB for this pc.
259 * Flush the whole TB cache to force re-translation of such TBs.
260 * This is heavyweight, but we're debugging anyway.
266 /* Add a breakpoint. */
267 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
268 CPUBreakpoint **breakpoint)
272 bp = g_malloc(sizeof(*bp));
277 /* keep all GDB-injected breakpoints in front */
278 if (flags & BP_GDB) {
279 QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
281 QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
284 breakpoint_invalidate(cpu, pc);
290 trace_breakpoint_insert(cpu->cpu_index, pc, flags);
294 /* Remove a specific breakpoint. */
295 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
299 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
300 if (bp->pc == pc && bp->flags == flags) {
301 cpu_breakpoint_remove_by_ref(cpu, bp);
308 /* Remove a specific breakpoint by reference. */
309 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *bp)
311 QTAILQ_REMOVE(&cpu->breakpoints, bp, entry);
313 breakpoint_invalidate(cpu, bp->pc);
315 trace_breakpoint_remove(cpu->cpu_index, bp->pc, bp->flags);
319 /* Remove all matching breakpoints. */
320 void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
322 CPUBreakpoint *bp, *next;
324 QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
325 if (bp->flags & mask) {
326 cpu_breakpoint_remove_by_ref(cpu, bp);
331 /* enable or disable single step mode. EXCP_DEBUG is returned by the
332 CPU loop after each instruction */
333 void cpu_single_step(CPUState *cpu, int enabled)
335 if (cpu->singlestep_enabled != enabled) {
336 cpu->singlestep_enabled = enabled;
338 kvm_update_guest_debug(cpu, 0);
340 /* must flush all the translated code to avoid inconsistencies */
341 /* XXX: only flush what is necessary */
344 trace_breakpoint_singlestep(cpu->cpu_index, enabled);
348 void cpu_abort(CPUState *cpu, const char *fmt, ...)
355 fprintf(stderr, "qemu: fatal: ");
356 vfprintf(stderr, fmt, ap);
357 fprintf(stderr, "\n");
358 cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
359 if (qemu_log_separate()) {
360 FILE *logfile = qemu_log_lock();
361 qemu_log("qemu: fatal: ");
362 qemu_log_vprintf(fmt, ap2);
364 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
366 qemu_log_unlock(logfile);
372 #if defined(CONFIG_USER_ONLY)
374 struct sigaction act;
375 sigfillset(&act.sa_mask);
376 act.sa_handler = SIG_DFL;
378 sigaction(SIGABRT, &act, NULL);
384 /* physical memory access (slow version, mainly for debug) */
385 #if defined(CONFIG_USER_ONLY)
386 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
387 void *ptr, target_ulong len, bool is_write)
390 target_ulong l, page;
395 page = addr & TARGET_PAGE_MASK;
396 l = (page + TARGET_PAGE_SIZE) - addr;
399 flags = page_get_flags(page);
400 if (!(flags & PAGE_VALID))
403 if (!(flags & PAGE_WRITE))
405 /* XXX: this code should not depend on lock_user */
406 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
409 unlock_user(p, addr, l);
411 if (!(flags & PAGE_READ))
413 /* XXX: this code should not depend on lock_user */
414 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
417 unlock_user(p, addr, 0);
427 bool target_words_bigendian(void)
429 #if defined(TARGET_WORDS_BIGENDIAN)
436 void page_size_init(void)
438 /* NOTE: we can always suppose that qemu_host_page_size >=
440 if (qemu_host_page_size == 0) {
441 qemu_host_page_size = qemu_real_host_page_size;
443 if (qemu_host_page_size < TARGET_PAGE_SIZE) {
444 qemu_host_page_size = TARGET_PAGE_SIZE;
446 qemu_host_page_mask = -(intptr_t)qemu_host_page_size;