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[motonesfpga/motonesfpga.git] / de0_cv_nes / de0_cv_nes.qsf
1 # -------------------------------------------------------------------------- #\r
2 #\r
3 # Copyright (C) 1991-2014 Altera Corporation. All rights reserved.\r
4 # Your use of Altera Corporation's design tools, logic functions \r
5 # and other software and tools, and its AMPP partner logic \r
6 # functions, and any output files from any of the foregoing \r
7 # (including device programming or simulation files), and any \r
8 # associated documentation or information are expressly subject \r
9 # to the terms and conditions of the Altera Program License \r
10 # Subscription Agreement, the Altera Quartus II License Agreement,\r
11 # the Altera MegaCore Function License Agreement, or other \r
12 # applicable license agreement, including, without limitation, \r
13 # that your use is for the sole purpose of programming logic \r
14 # devices manufactured by Altera and sold by Altera or its \r
15 # authorized distributors.  Please refer to the applicable \r
16 # agreement for further details.\r
17 #\r
18 # -------------------------------------------------------------------------- #\r
19 #\r
20 # Quartus II 64-Bit\r
21 # Version 14.0.0 Build 200 06/17/2014 SJ Web Edition\r
22 # Date created = 15:11:02  May 18, 2016\r
23 #\r
24 # -------------------------------------------------------------------------- #\r
25 #\r
26 # Notes:\r
27 #\r
28 # 1) The default values for assignments are stored in the file:\r
29 #               de0_cv_nes_assignment_defaults.qdf\r
30 #    If this file doesn't exist, see file:\r
31 #               assignment_defaults.qdf\r
32 #\r
33 # 2) Altera recommends that you do not modify this file. This\r
34 #    file is updated automatically by the Quartus II software\r
35 #    and any changes you make may be lost or overwritten.\r
36 #\r
37 # -------------------------------------------------------------------------- #\r
38 \r
39 \r
40 set_global_assignment -name FAMILY "Cyclone V"\r
41 set_global_assignment -name DEVICE 5CEBA4F23C7\r
42 set_global_assignment -name TOP_LEVEL_ENTITY de0_cv_nes\r
43 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 14.0\r
44 set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:11:02  MAY 18, 2016"\r
45 set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"\r
46 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files\r
47 set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0\r
48 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85\r
49 set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA\r
50 set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484\r
51 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7\r
52 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256\r
53 set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"\r
54 set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation\r
55 set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"\r
56 set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"\r
57 set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top\r
58 set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top\r
59 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top\r
60 set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"\r
61 \r
62 \r
63 #clock pin\r
64 set_location_assignment PIN_M9 -to pi_base_clk\r
65 \r
66 \r
67 #vga pin\r
68 set_location_assignment PIN_A9 -to po_r[0]\r
69 set_location_assignment PIN_B10 -to po_r[1]\r
70 set_location_assignment PIN_C9 -to po_r[2]\r
71 set_location_assignment PIN_A5 -to po_r[3]\r
72 set_location_assignment PIN_L7 -to po_g[0]\r
73 set_location_assignment PIN_K7 -to po_g[1]\r
74 set_location_assignment PIN_J7 -to po_g[2]\r
75 set_location_assignment PIN_J8 -to po_g[3]\r
76 set_location_assignment PIN_B6 -to po_b[0]\r
77 set_location_assignment PIN_B7 -to po_b[1]\r
78 set_location_assignment PIN_A8 -to po_b[2]\r
79 set_location_assignment PIN_A7 -to po_b[3]\r
80 set_location_assignment PIN_H8 -to po_h_sync_n\r
81 set_location_assignment PIN_G8 -to po_v_sync_n\r
82 \r
83 #button pin\r
84 set_location_assignment PIN_P22 -to pi_rst_n\r
85 \r
86 #nt_v_mirror\r
87 set_location_assignment PIN_AB12 -to pi_nt_v_mirror\r
88 \r
89 ##LED test\r
90 #set_location_assignment PIN_AA2 -to dbg_cpu_clk\r
91 #set_location_assignment PIN_AA1 -to dbg_ppu_clk\r
92 #set_location_assignment PIN_W2 -to dbg_mem_clk\r
93 \r
94 #global clock.\r
95 set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to pi_base_clk\r
96 \r
97 #project files\r
98 #set_global_assignment -name VHDL_FILE mem/chr_rom.vhd\r
99 #set_global_assignment -name VHDL_FILE mem/ram.vhd\r
100 set_global_assignment -name VHDL_FILE chip_selector.vhd\r
101 #set_global_assignment -name VHDL_FILE dummy-mos6502.vhd\r
102 set_global_assignment -name VHDL_FILE ppu/render.vhd\r
103 #set_global_assignment -name VHDL_FILE ppu/ppu.vhd\r
104 \r
105 set_global_assignment -name VHDL_FILE de0_cv_nes.vhd\r
106 \r
107 \r
108 ##timing definition...\r
109 set_global_assignment -name SDC_FILE "mos6502-timing.sdc"\r
110 \r
111 #for signal trap ii setting...\r
112 set_global_assignment -name ENABLE_SIGNALTAP ON\r
113 set_global_assignment -name USE_SIGNALTAP_FILE "de0-cv-analyze-all.stp"\r
114 set_global_assignment -name SIGNALTAP_FILE "de0-cv-analyze-all.stp"\r
115 \r
116 set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0\r
117 set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0\r
118 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to dbg_base_clk -section_id auto_signaltap_0\r
119 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to pi_base_clk -section_id auto_signaltap_0\r
120 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to pi_base_clk -section_id auto_signaltap_0\r
121 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0\r
122 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0\r
123 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=0" -section_id auto_signaltap_0\r
124 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0\r
125 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_FLOW_USE_GENERATED=0" -section_id auto_signaltap_0\r
126 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_BITS=11" -section_id auto_signaltap_0\r
127 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=1" -section_id auto_signaltap_0\r
128 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0\r
129 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0\r
130 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0\r
131 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0\r
132 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0\r
133 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0\r
134 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to pi_rst_n -section_id auto_signaltap_0\r
135 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to po_b[0] -section_id auto_signaltap_0\r
136 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to po_b[1] -section_id auto_signaltap_0\r
137 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to po_b[2] -section_id auto_signaltap_0\r
138 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to po_b[3] -section_id auto_signaltap_0\r
139 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to po_g[0] -section_id auto_signaltap_0\r
140 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to po_g[1] -section_id auto_signaltap_0\r
141 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to po_g[2] -section_id auto_signaltap_0\r
142 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[9] -to po_g[3] -section_id auto_signaltap_0\r
143 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[10] -to po_h_sync_n -section_id auto_signaltap_0\r
144 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[11] -to po_r[0] -section_id auto_signaltap_0\r
145 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[12] -to po_r[1] -section_id auto_signaltap_0\r
146 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[13] -to po_r[2] -section_id auto_signaltap_0\r
147 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[14] -to po_r[3] -section_id auto_signaltap_0\r
148 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[15] -to po_v_sync_n -section_id auto_signaltap_0\r
149 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[16] -to "render:render_inst|reg_nes_x[0]" -section_id auto_signaltap_0\r
150 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[17] -to "render:render_inst|reg_nes_x[1]" -section_id auto_signaltap_0\r
151 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[18] -to "render:render_inst|reg_nes_x[2]" -section_id auto_signaltap_0\r
152 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[19] -to "render:render_inst|reg_nes_x[3]" -section_id auto_signaltap_0\r
153 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[20] -to "render:render_inst|reg_nes_x[4]" -section_id auto_signaltap_0\r
154 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[21] -to "render:render_inst|reg_nes_x[5]" -section_id auto_signaltap_0\r
155 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[22] -to "render:render_inst|reg_nes_x[6]" -section_id auto_signaltap_0\r
156 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[23] -to "render:render_inst|reg_nes_x[7]" -section_id auto_signaltap_0\r
157 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[24] -to "render:render_inst|reg_nes_x[8]" -section_id auto_signaltap_0\r
158 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[25] -to "render:render_inst|reg_nes_y[0]" -section_id auto_signaltap_0\r
159 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[26] -to "render:render_inst|reg_nes_y[1]" -section_id auto_signaltap_0\r
160 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[27] -to "render:render_inst|reg_nes_y[2]" -section_id auto_signaltap_0\r
161 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[28] -to "render:render_inst|reg_nes_y[3]" -section_id auto_signaltap_0\r
162 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[29] -to "render:render_inst|reg_nes_y[4]" -section_id auto_signaltap_0\r
163 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[30] -to "render:render_inst|reg_nes_y[5]" -section_id auto_signaltap_0\r
164 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[31] -to "render:render_inst|reg_nes_y[6]" -section_id auto_signaltap_0\r
165 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[32] -to "render:render_inst|reg_nes_y[7]" -section_id auto_signaltap_0\r
166 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[33] -to "render:render_inst|reg_nes_y[8]" -section_id auto_signaltap_0\r
167 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[34] -to "render:render_inst|reg_vga_x[0]" -section_id auto_signaltap_0\r
168 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[35] -to "render:render_inst|reg_vga_x[1]" -section_id auto_signaltap_0\r
169 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[36] -to "render:render_inst|reg_vga_x[2]" -section_id auto_signaltap_0\r
170 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[37] -to "render:render_inst|reg_vga_x[3]" -section_id auto_signaltap_0\r
171 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[38] -to "render:render_inst|reg_vga_x[4]" -section_id auto_signaltap_0\r
172 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[39] -to "render:render_inst|reg_vga_x[5]" -section_id auto_signaltap_0\r
173 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[40] -to "render:render_inst|reg_vga_x[6]" -section_id auto_signaltap_0\r
174 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[41] -to "render:render_inst|reg_vga_x[7]" -section_id auto_signaltap_0\r
175 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[42] -to "render:render_inst|reg_vga_x[8]" -section_id auto_signaltap_0\r
176 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[43] -to "render:render_inst|reg_vga_x[9]" -section_id auto_signaltap_0\r
177 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[44] -to "render:render_inst|reg_vga_y[0]" -section_id auto_signaltap_0\r
178 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[45] -to "render:render_inst|reg_vga_y[1]" -section_id auto_signaltap_0\r
179 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[46] -to "render:render_inst|reg_vga_y[2]" -section_id auto_signaltap_0\r
180 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[47] -to "render:render_inst|reg_vga_y[3]" -section_id auto_signaltap_0\r
181 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[48] -to "render:render_inst|reg_vga_y[4]" -section_id auto_signaltap_0\r
182 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[49] -to "render:render_inst|reg_vga_y[5]" -section_id auto_signaltap_0\r
183 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[50] -to "render:render_inst|reg_vga_y[6]" -section_id auto_signaltap_0\r
184 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[51] -to "render:render_inst|reg_vga_y[7]" -section_id auto_signaltap_0\r
185 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[52] -to "render:render_inst|reg_vga_y[8]" -section_id auto_signaltap_0\r
186 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[53] -to "render:render_inst|reg_vga_y[9]" -section_id auto_signaltap_0\r
187 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to pi_rst_n -section_id auto_signaltap_0\r
188 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to po_b[0] -section_id auto_signaltap_0\r
189 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to po_b[1] -section_id auto_signaltap_0\r
190 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to po_b[2] -section_id auto_signaltap_0\r
191 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to po_b[3] -section_id auto_signaltap_0\r
192 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to po_g[0] -section_id auto_signaltap_0\r
193 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to po_g[1] -section_id auto_signaltap_0\r
194 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to po_g[2] -section_id auto_signaltap_0\r
195 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to po_g[3] -section_id auto_signaltap_0\r
196 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to po_h_sync_n -section_id auto_signaltap_0\r
197 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to po_r[0] -section_id auto_signaltap_0\r
198 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to po_r[1] -section_id auto_signaltap_0\r
199 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to po_r[2] -section_id auto_signaltap_0\r
200 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to po_r[3] -section_id auto_signaltap_0\r
201 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to po_v_sync_n -section_id auto_signaltap_0\r
202 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to "render:render_inst|reg_nes_x[0]" -section_id auto_signaltap_0\r
203 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to "render:render_inst|reg_nes_x[1]" -section_id auto_signaltap_0\r
204 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to "render:render_inst|reg_nes_x[2]" -section_id auto_signaltap_0\r
205 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to "render:render_inst|reg_nes_x[3]" -section_id auto_signaltap_0\r
206 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to "render:render_inst|reg_nes_x[4]" -section_id auto_signaltap_0\r
207 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to "render:render_inst|reg_nes_x[5]" -section_id auto_signaltap_0\r
208 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to "render:render_inst|reg_nes_x[6]" -section_id auto_signaltap_0\r
209 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to "render:render_inst|reg_nes_x[7]" -section_id auto_signaltap_0\r
210 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to "render:render_inst|reg_nes_x[8]" -section_id auto_signaltap_0\r
211 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to "render:render_inst|reg_nes_y[0]" -section_id auto_signaltap_0\r
212 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to "render:render_inst|reg_nes_y[1]" -section_id auto_signaltap_0\r
213 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to "render:render_inst|reg_nes_y[2]" -section_id auto_signaltap_0\r
214 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to "render:render_inst|reg_nes_y[3]" -section_id auto_signaltap_0\r
215 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to "render:render_inst|reg_nes_y[4]" -section_id auto_signaltap_0\r
216 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to "render:render_inst|reg_nes_y[5]" -section_id auto_signaltap_0\r
217 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to "render:render_inst|reg_nes_y[6]" -section_id auto_signaltap_0\r
218 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to "render:render_inst|reg_nes_y[7]" -section_id auto_signaltap_0\r
219 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to "render:render_inst|reg_nes_y[8]" -section_id auto_signaltap_0\r
220 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to "render:render_inst|reg_vga_x[0]" -section_id auto_signaltap_0\r
221 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to "render:render_inst|reg_vga_x[1]" -section_id auto_signaltap_0\r
222 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to "render:render_inst|reg_vga_x[2]" -section_id auto_signaltap_0\r
223 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[37] -to "render:render_inst|reg_vga_x[3]" -section_id auto_signaltap_0\r
224 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[38] -to "render:render_inst|reg_vga_x[4]" -section_id auto_signaltap_0\r
225 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[39] -to "render:render_inst|reg_vga_x[5]" -section_id auto_signaltap_0\r
226 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[40] -to "render:render_inst|reg_vga_x[6]" -section_id auto_signaltap_0\r
227 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[41] -to "render:render_inst|reg_vga_x[7]" -section_id auto_signaltap_0\r
228 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[42] -to "render:render_inst|reg_vga_x[8]" -section_id auto_signaltap_0\r
229 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[43] -to "render:render_inst|reg_vga_x[9]" -section_id auto_signaltap_0\r
230 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[44] -to "render:render_inst|reg_vga_y[0]" -section_id auto_signaltap_0\r
231 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[45] -to "render:render_inst|reg_vga_y[1]" -section_id auto_signaltap_0\r
232 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[46] -to "render:render_inst|reg_vga_y[2]" -section_id auto_signaltap_0\r
233 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[47] -to "render:render_inst|reg_vga_y[3]" -section_id auto_signaltap_0\r
234 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[48] -to "render:render_inst|reg_vga_y[4]" -section_id auto_signaltap_0\r
235 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[49] -to "render:render_inst|reg_vga_y[5]" -section_id auto_signaltap_0\r
236 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[50] -to "render:render_inst|reg_vga_y[6]" -section_id auto_signaltap_0\r
237 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[51] -to "render:render_inst|reg_vga_y[7]" -section_id auto_signaltap_0\r
238 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[52] -to "render:render_inst|reg_vga_y[8]" -section_id auto_signaltap_0\r
239 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[53] -to "render:render_inst|reg_vga_y[9]" -section_id auto_signaltap_0\r
240 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=54" -section_id auto_signaltap_0\r
241 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=54" -section_id auto_signaltap_0\r
242 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=21163" -section_id auto_signaltap_0\r
243 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0\r
244 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=189" -section_id auto_signaltap_0\r
245 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=8192" -section_id auto_signaltap_0\r
246 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=19982" -section_id auto_signaltap_0\r
247 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=8192" -section_id auto_signaltap_0\r
248 set_global_assignment -name SLD_FILE "de0-cv-analyze-all_auto_stripped.stp"\r
249 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top