de0_cv_nes/simulation/modelsim/de0_cv_nes_run_msim_rtl_vhdl.do

   1 transcript on\r
   2 if {[file exists rtl_work]} {\r
   3         vdel -lib rtl_work -all\r
   4 }\r
   5 vlib rtl_work\r
   6 vmap work rtl_work\r
   7 \r
   8 vcom -93 -work work {../../chip_selector.vhd}\r
   9 vcom -93 -work work {../../mem/ram.vhd}\r
  10 vcom -93 -work work {../../mem/chr_rom.vhd}\r
  11 vcom -93 -work work {../../ppu/ppu.vhd}\r
  12 vcom -93 -work work {../../ppu/render.vhd}\r
  13 vcom -93 -work work {../../dummy-mos6502.vhd}\r
  14 \r
  15 vcom -93 -work work {../../de0_cv_nes.vhd}\r
  16 vcom -93 -work work {../../testbench_motones_sim.vhd}\r
  17 \r
  18 vsim -t 1ps -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L cyclonev -L rtl_work -L work -voptargs="+acc"  testbench_motones_sim\r
  19 \r
  20 ##script custom part...\r
  21 \r
  22 add wave -label rst_n               sim:/testbench_motones_sim/sim_board/pi_rst_n;\r
  23 add wave -label base_clk            sim:/testbench_motones_sim/sim_board/pi_base_clk;\r
  24 add wave -label wr_cpu_en           sim:/testbench_motones_sim/sim_board/wr_cpu_en;\r
  25 add wave -label r_nw                sim:/testbench_motones_sim/sim_board/wr_r_nw;\r
  26 add wave -label addr -radix hex     sim:/testbench_motones_sim/sim_board/wr_addr;\r
  27 add wave -label d_io -radix hex     sim:/testbench_motones_sim/sim_board/wr_d_io;\r
  28 \r
  29 \r
  30 #add wave -divider ppu\r
  31 #add wave -label pi_ce_n         -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/pi_ce_n;\r
  32 #add wave -label ppu_ctrl        -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_ctrl;\r
  33 #add wave -label ppu_mask        -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_mask;\r
  34 #add wave -label ppu_status      -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/pi_ppu_status;\r
  35 #add wave -label oam_addr        -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_oam_addr;\r
  36 #add wave -label oam_data        -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_oam_data;\r
  37 #add wave -label ppu_scroll_x    -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_scroll_x;\r
  38 #add wave -label ppu_scroll_y    -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_scroll_y;\r
  39 #add wave -label ppu_addr        -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_addr;\r
  40 #add wave -label ppu_data        -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_data;\r
  41 \r
  42 add wave -divider vram\r
  43 add wave -label v_rd_n        -radix hex sim:/testbench_motones_sim/sim_board/wr_v_rd_n;\r
  44 add wave -label v_wr_n        -radix hex sim:/testbench_motones_sim/sim_board/wr_v_wr_n;\r
  45 add wave -label vram_addr        -radix hex sim:/testbench_motones_sim/sim_board/wr_v_addr;\r
  46 add wave -label vram_data        -radix hex sim:/testbench_motones_sim/sim_board/wr_v_data;\r
  47 \r
  48 add wave -divider render\r
  49 add wave -label vga_x       sim:/testbench_motones_sim/sim_board/render_inst/reg_vga_x;\r
  50 add wave -label vga_y       sim:/testbench_motones_sim/sim_board/render_inst/reg_vga_y;\r
  51 add wave -label nes_x       sim:/testbench_motones_sim/sim_board/render_inst/reg_nes_x;\r
  52 add wave -label nes_y       sim:/testbench_motones_sim/sim_board/render_inst/reg_nes_y;\r
  53 #add wave -label wr_rnd_en  sim:/testbench_motones_sim/sim_board/wr_rnd_en;\r
  54 add wave -label reg_v_cur_state sim:/testbench_motones_sim/sim_board/render_inst/reg_v_cur_state;\r
  55 add wave -label prf_x       sim:/testbench_motones_sim/sim_board/render_inst/reg_prf_x;\r
  56 #add wave -label prf_y       sim:/testbench_motones_sim/sim_board/render_inst/reg_prf_y;\r
  57 \r
  58 add wave -label disp_nt -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_disp_nt;\r
  59 add wave -label disp_attr   -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_disp_attr;\r
  60 add wave -label disp_ptn_l -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_disp_ptn_l;\r
  61 add wave -label disp_ptn_h -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_disp_ptn_h;\r
  62 \r
  63 add wave -label plt_addr -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_plt_addr;\r
  64 add wave -label plt_data -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_plt_data;\r
  65 \r
  66 \r
  67 add wave -divider vga\r
  68 add wave -label h_sync_n       sim:/testbench_motones_sim/sim_board/po_h_sync_n;\r
  69 add wave -label v_sync_n    sim:/testbench_motones_sim/sim_board/po_v_sync_n;\r
  70 add wave -label r -radix hex sim:/testbench_motones_sim/sim_board/po_r;\r
  71 add wave -label g -radix hex sim:/testbench_motones_sim/sim_board/po_g;\r
  72 add wave -label b -radix hex sim:/testbench_motones_sim/sim_board/po_b;\r
  73 \r
  74 \r
  75 #add wave -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg*;\r
  76 \r
  77 \r
  78 view structure\r
  79 view signals\r
  80 \r
  81 run 4 us\r
  82 wave zoom full\r
  83 \r
  84 run 162 us\r
  85 \r